From patchwork Thu Oct 10 04:05:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13829457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3BF99CEE323 for ; Thu, 10 Oct 2024 04:03:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA28F10E847; Thu, 10 Oct 2024 04:03:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Nk5MAi/j"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 04DB610E847 for ; Thu, 10 Oct 2024 04:03:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728533011; x=1760069011; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xds8PkdwI0VJA0d45naKfpotIs7pkwLlbjuf+M1iooQ=; b=Nk5MAi/jSeMKOB4ceFFBqqv2M4VYseT+l3uaGi5vBfEVBpv1sssZP6H+ Ge2gES5wyw61sklusknOTMGJ23zUwsS96F7CzxSTPJ+TlRVn6z6CYJX91 +ZjtfZr8+XrZU5PrjSVqPLdCXcD/yHXR7a87soev0U2bt7SmZZzSv6dIP riw4iOAkIkgJpQf7VdO11Teg+yZIOe9A3aMHXjGUpUrmHHhfzbREsg1nJ vz159vcMuNeK2asX4KNX1Yq+NROgalBVU3LOkTGMi2U2l8w/eIFGDOU24 qIzzwmAJP//gs4gLuvBlMwCpklOu55sjHMYm5Q8DYBEtZY86oFmVmufL1 g==; X-CSE-ConnectionGUID: UAb8z83pQ/+uDbxCvHsZFw== X-CSE-MsgGUID: C5XIq3dARHKLqKEm9Z6hnA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="38454086" X-IronPort-AV: E=Sophos;i="6.11,191,1725346800"; d="scan'208";a="38454086" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 21:03:30 -0700 X-CSE-ConnectionGUID: jT7/cAVrSeqo6CE4kvnnIQ== X-CSE-MsgGUID: adwqzsr/QK2b4wTFBGtNJg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,191,1725346800"; d="scan'208";a="107301287" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa002.jf.intel.com with ESMTP; 09 Oct 2024 21:03:29 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, jani.nikula@intel.com, ankit.k.nautiyal@intel.com, uma.shankar@intel.com, animesh.manna@intel.com Subject: [PATCH v14 1/3] drm/i915/vrr: Add helper to check if vrr possible Date: Thu, 10 Oct 2024 09:35:01 +0530 Message-ID: <20241010040503.1795399-2-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com> References: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add helper to check if vrr is possible based on flipline is computed. --v1: return just flipline instead using ternary operator [Jonathan, Ville]. Signed-off-by: Mitul Golani Reviewed-by: Jonathan Cavitt --- drivers/gpu/drm/i915/display/intel_vrr.c | 7 ++++++- drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 9a51f5bac307..f65ebe210047 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -56,6 +56,11 @@ bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh) vrefresh <= info->monitor_range.max_vfreq; } +bool intel_vrr_possible(const struct intel_crtc_state *crtc_state) +{ + return crtc_state->vrr.flipline; +} + void intel_vrr_check_modeset(struct intel_atomic_state *state) { @@ -281,7 +286,7 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) intel_de_rmw(display, CHICKEN_TRANS(cpu_transcoder), 0, PIPE_VBLANK_WITH_DELAY); - if (!crtc_state->vrr.flipline) { + if (!intel_vrr_possible(crtc_state)) { intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), 0); return; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 89937858200d..af921dda4619 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -15,6 +15,7 @@ struct intel_crtc_state; bool intel_vrr_is_capable(struct intel_connector *connector); bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh); +bool intel_vrr_possible(const struct intel_crtc_state *crtc_state); void intel_vrr_check_modeset(struct intel_atomic_state *state); void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state); From patchwork Thu Oct 10 04:05:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13829458 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23438CF0437 for ; Thu, 10 Oct 2024 04:03:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B6FE410E848; Thu, 10 Oct 2024 04:03:34 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Tj1vVvTA"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id A667810E848 for ; Thu, 10 Oct 2024 04:03:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728533013; x=1760069013; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/9f9WGUodLRqPiwfkp7V8nRs2WNvNNCISQWLeElSSbE=; b=Tj1vVvTASPB6MrNoh7B8Q0C2GYwXJbyhiLozX3yjOg/0oNl48UWNEKAv E9UGfdBclw6ZNjmnqNbzyMCcl2Uou1rv4mTCFLiMcxBbzWVzZFVdDMlQ3 6o2LdGbhpzgkZMFUsxlfFCiu4Xvnd+91ScKyJ3NFdspCjK8WT27nwdwkP Z2S5DtxwN0C1RKS4f3hU5Y/LIa9K5xsQ1q2GKoER/wOiidIqA6p2+VhKG wS7hrrldEXwdOR7CGqNnd6WB64MqPp8WmlpL6F4qqiGCFPYLRGPQTatFO HfNEGYpNeQUbzWKVRZwGKNMIaXcBTYeHGjRnpdAr/RtidPOYQalRIELXR A==; X-CSE-ConnectionGUID: FfSp2SlfQB+AAzRiimGN0A== X-CSE-MsgGUID: GI1+lgbMTUOd70inGSj6Vg== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="38454096" X-IronPort-AV: E=Sophos;i="6.11,191,1725346800"; d="scan'208";a="38454096" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 21:03:33 -0700 X-CSE-ConnectionGUID: iXanxCgGSAmV4pgRmy9LMQ== X-CSE-MsgGUID: bRRcRSnVTwyuX4LQSxCS6A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,191,1725346800"; d="scan'208";a="107301295" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa002.jf.intel.com with ESMTP; 09 Oct 2024 21:03:32 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, jani.nikula@intel.com, ankit.k.nautiyal@intel.com, uma.shankar@intel.com, animesh.manna@intel.com Subject: [PATCH v14 2/3] drm/i915/vrr: Split vrr-compute-config in two phases Date: Thu, 10 Oct 2024 09:35:02 +0530 Message-ID: <20241010040503.1795399-3-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com> References: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Animesh Manna As vrr guardband calculation is dependent on modified vblank start so better to compute late after all vblank adjustement. v1: Initial version. v2: Split in a separate patch from panel-replay workaround. [Ankit] v3: Add a function for late vrr related computation. [Ville] v4: Use flipline instead of vrr.enable and some cosmetic changes. [Ville] v5: Use intel_vrr_possible helper. Signed-off-by: Animesh Manna Signed-off-by: Mitul Golani Reviewed-by: Jonathan Cavitt --- drivers/gpu/drm/i915/display/intel_display.c | 2 ++ drivers/gpu/drm/i915/display/intel_vrr.c | 13 +++++++++---- drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index e1f6255e918b..b1e3551c7594 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5050,6 +5050,8 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state, struct drm_connector *connector; int i; + intel_vrr_compute_config_late(crtc_state); + for_each_new_connector_in_state(&state->base, connector, conn_state, i) { struct intel_encoder *encoder = diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index f65ebe210047..496b6fa32c08 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -244,11 +244,16 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, (crtc_state->hw.adjusted_mode.crtc_vtotal - crtc_state->hw.adjusted_mode.vsync_end); } +} + +void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + + if (!intel_vrr_possible(crtc_state)) + return; - /* - * For XE_LPD+, we use guardband and pipeline override - * is deprecated. - */ if (DISPLAY_VER(display) >= 13) { crtc_state->vrr.guardband = crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vblank_start; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index af921dda4619..b3b45c675020 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -19,6 +19,7 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state); void intel_vrr_check_modeset(struct intel_atomic_state *state); void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state); +void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state); void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state); void intel_vrr_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); From patchwork Thu Oct 10 04:05:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13829459 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50959CEDDBB for ; Thu, 10 Oct 2024 04:03:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E7BF210E84C; Thu, 10 Oct 2024 04:03:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="38454106" X-IronPort-AV: E=Sophos;i="6.11,191,1725346800"; d="scan'208";a="38454106" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 21:03:35 -0700 X-CSE-ConnectionGUID: W761FCHKR6a7PhcX4S2AJA== X-CSE-MsgGUID: VB8PV83jRiKbhut24DCcfw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,191,1725346800"; d="scan'208";a="107301323" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa002.jf.intel.com with ESMTP; 09 Oct 2024 21:03:34 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, jani.nikula@intel.com, ankit.k.nautiyal@intel.com, uma.shankar@intel.com, animesh.manna@intel.com Subject: [PATCH v14 3/3] drm/i915/panelreplay: Panel replay workaround with VRR Date: Thu, 10 Oct 2024 09:35:03 +0530 Message-ID: <20241010040503.1795399-4-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com> References: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Animesh Manna Panel Replay VSC SDP not getting sent when VRR is enabled and W1 and W2 are 0. So Program Set Context Latency in TRANS_SET_CONTEXT_LATENCY register to at least a value of 1. The same is applicable for PSR1/PSR2 as well. HSD: 14015406119 v1: Initial version. v2: Update timings stored in adjusted_mode struct. [Ville] v3: Add WA in compute_config(). [Ville] v4: - Add DISPLAY_VER() check and improve code comment. [Rodrigo] - Introduce centralized intel_crtc_vblank_delay(). [Ville] v5: Move to crtc_compute_config(). [Ville] v6: Restrict DISPLAY_VER till 14. [Mitul] v7: - Corrected code-comment. [Mitul] - dev_priv local variable removed. [Jani] v8: Introduce late_compute_config() which will take care late vblank-delay adjustment. [Ville] v9: Implementation simplified and split into multiple patches. v10: - Split vrr changes and use struct intel_display in DISPLAY_VER(). [Ankit] - Use for_each_new_intel_connector_in_state(). [Jani] v11: Remove loop and use flipline instead of vrr.enable flag. [Ville] v12: - Use intel_Vrr_possible helper. - Correct flag check for flipline. v13: - Refactor workaround [Jonathan] - Drop the comment around woraround number. [Ville] Signed-off-by: Animesh Manna Signed-off-by: Mitul Golani Reviewed-by: Jonathan Cavitt --- drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index b1e3551c7594..81fe32ca063c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2609,13 +2609,29 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) return 0; } +static bool intel_crtc_needs_wa_14015401596(struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + + return (intel_vrr_possible(crtc_state) && crtc_state->has_psr && + adjusted_mode->crtc_vblank_start == adjusted_mode->crtc_vdisplay && + IS_DISPLAY_VER(display, 13, 14)); +} + static int intel_crtc_compute_config(struct intel_atomic_state *state, struct intel_crtc *crtc) { struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct drm_display_mode *adjusted_mode = + &crtc_state->hw.adjusted_mode; int ret; + /* Wa_14015401596 */ + if (intel_crtc_needs_wa_14015401596(crtc_state)) + adjusted_mode->crtc_vblank_start += 1; + ret = intel_dpll_crtc_compute_clock(state, crtc); if (ret) return ret;