From patchwork Thu Oct 10 05:33:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829477 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FBD6CF07A5 for ; Thu, 10 Oct 2024 05:34:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C5A5E10E86D; Thu, 10 Oct 2024 05:34:24 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TaXVZdQC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id BEB7710E86D; Thu, 10 Oct 2024 05:34:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538463; x=1760074463; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=But5542R3jhDoKCWxeMyyDDgaHMeCkN6TOj1X5AsQ1U=; b=TaXVZdQCIS10QB9h8iwyabrhl1MIe/vkMjWHVkqQZZ4uJeomDV6vRK1w iPgEHklT0b9IOT31ldOOKr+CTB9SxzddvtermttyO/EtPaZcUpcZNvty2 q+9u349xR/J6cxvewapgZPZcMoKX0WGonbsVNFwH9wSr7MUs+7/Wh4STW dIpkEzkapLcdHlN/ag0vxhqvr1quCLW2vStabyo4N+ScD0o+xUrSAIAQV 8EMJSZDrmVT1GscUvIfd8trMURDz7IW25o3/1HVFHzWIeIJOW30pk9n/U euiyLtnd1X3Rx3KVbKA8vte8tTkLYFRAbpg9Cuet53+0tdGceatsPO9qV Q==; X-CSE-ConnectionGUID: VPi4ieSpRzexvFwp/bKknA== X-CSE-MsgGUID: F2i/TKrkRJqmqdKpUd9eNg== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749359" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749359" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:22 -0700 X-CSE-ConnectionGUID: QZJsfSPbQmaisXAhH8DKkQ== X-CSE-MsgGUID: chiJNq6nSKmdzahS5MgY7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697280" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:21 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 1/7] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR Date: Thu, 10 Oct 2024 08:33:10 +0300 Message-Id: <20241010053316.1580527-2-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR usage. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h index 6ed0e0dc97e76..50540eac61a31 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h @@ -100,6 +100,7 @@ #define TRANS_PUSH(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A) #define TRANS_PUSH_EN REG_BIT(31) #define TRANS_PUSH_SEND REG_BIT(30) +#define LNL_TRANS_PUSH_PSR_PR_EN REG_BIT(16) #define _TRANS_VRR_VSYNC_A 0x60078 #define TRANS_VRR_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A) From patchwork Thu Oct 10 05:33:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829478 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87B04CF07A8 for ; Thu, 10 Oct 2024 05:34:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2AA0610E86E; Thu, 10 Oct 2024 05:34:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="KKRDh9mU"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5BA6F10E870; Thu, 10 Oct 2024 05:34:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538464; x=1760074464; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Gy1uMYs1gdTbCHmDv3DmaooHU6YuNWJDSsaeO02R+Do=; b=KKRDh9mUF/etgrUQZ2qP0hTkTqUa9o5pwq/hS13aN547NsRqa5l2ihwi oqNcNuzc5KhyLTqR4s0It3oJc7lTsdV1t0EBQkgyqT0feiDlj18+TvkpI HKSutiI10yc+FCULVwV+HtA6YarDgWBDBPOjlPc9iGGaapgXTkI9VkKRx hH/hjbHaeZG5xXet2YbwmD55KTEotATdZGj+ojdqv/3yHnRvcTn6duRs9 vR7yFwjx3vvZHV4lgo6D84eeLcPLfTaHO253AACFhjYiGOGq/0V6hfi1b 39vbFZdcJF9i30FWq8qKwZt01AYnPAndSq+YyiSr51NPb4Qhl2QYZSHjf A==; X-CSE-ConnectionGUID: 0s2FsK0PTqSo5tsihkHYtA== X-CSE-MsgGUID: qZ4rYkAWTVaBPbAEKdBdoA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749362" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749362" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:24 -0700 X-CSE-ConnectionGUID: /6763J0SRLuIGJDW2DK2cg== X-CSE-MsgGUID: Hz2opstbSiW6F47/bXfgyg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697290" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:22 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 2/7] drm/i915/vrr: Do not overwrite TRANS_PUSH PSR Frame Change Enable Date: Thu, 10 Oct 2024 08:33:11 +0300 Message-Id: <20241010053316.1580527-3-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently vrr code is overwriting possibly set PSR PR Frame Change Enable bit in TRANS_PUSH register. Avoid this by using rmw instead of write. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_vrr.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 9a51f5bac3071..8b4e3f938efea 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -339,8 +339,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) if (!crtc_state->vrr.enable) return; - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), - TRANS_PUSH_EN); + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0, + TRANS_PUSH_EN); if (HAS_AS_SDP(display)) intel_de_write(display, @@ -371,7 +371,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) intel_de_wait_for_clear(display, TRANS_VRR_STATUS(display, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); + + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN, + 0); if (HAS_AS_SDP(display)) intel_de_write(display, From patchwork Thu Oct 10 05:33:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829479 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD5AECF07A9 for ; Thu, 10 Oct 2024 05:34:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4FD1310E870; Thu, 10 Oct 2024 05:34:27 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ZvsVrzqo"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 28A6310E870; Thu, 10 Oct 2024 05:34:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538466; x=1760074466; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lB8wn+6G5oAKHs7RAX8RzIzr4i1sL7H45Rj+u3LM4Sg=; b=ZvsVrzqoYPIYiN7biTXMSdzvJsNsMzXkidwHrDDv8mNOGVGVeKatOB3i cuFPsk1ebuhhhn5C2o/JAHoWNzmPoiKmPKTHPlWV94S2/YTCdEw0JLnr8 VEz2VoTzOPYvbCYIqoLhxo6Ov1mfYgWKyxYcCIyKLtWiPUkx/xQG/YmCm NAZa41mHesPmJXAOmLvfaQKju23Zx+O++NqF+gXcENSkQ/vg6i+vqQWDb 72CTPLsF6BAnLQEPL45sKT/FEwBjj2eusDHEkDsOcGKwWLvkKfamq8I0N KAix+25pG0XUIdJMjIIOr+fdMPA8rUwBBNAKT9B/ccYk5NSk/v4Y7lLzi Q==; X-CSE-ConnectionGUID: 61KnjtRrT3Gwi/x2dBM/VQ== X-CSE-MsgGUID: rp9B7d1OSvG4nLLwQC4B+w== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749363" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749363" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:26 -0700 X-CSE-ConnectionGUID: OqVo+IPiQjCj8nDhYF0rbw== X-CSE-MsgGUID: TwYwBIxCRyaOkOCdE8RWcA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697298" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:24 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 3/7] drm/i915/vrr: Use TRANS_PUSH mechanism for PSR frame change Date: Thu, 10 Oct 2024 08:33:12 +0300 Message-Id: <20241010053316.1580527-4-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In Lunarlake and onwards it is possible to generate "PSR frame change" event using TRANS_PUSH mechanism. Implement function to enable this and take PSR into account in intel_vrr_send_push. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++ drivers/gpu/drm/i915/display/intel_vrr.c | 45 ++++++++++++++++++++++-- drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 3 files changed, 50 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e3357f3b5c705..be73c1aaf1ee2 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -44,6 +44,7 @@ #include "intel_psr.h" #include "intel_psr_regs.h" #include "intel_snps_phy.h" +#include "intel_vrr.h" #include "skl_universal_plane.h" /** @@ -1928,6 +1929,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_de_rmw(display, CLKGATE_DIS_MISC, 0, CLKGATE_DIS_MISC_DMASC_GATING_DIS); } + + if (DISPLAY_VER(dev_priv) >= 20) + intel_vrr_psr_frame_change_enable(crtc_state); } static bool psr_interrupt_error_check(struct intel_dp *intel_dp) @@ -2164,6 +2168,8 @@ void intel_psr_disable(struct intel_dp *intel_dp, mutex_lock(&intel_dp->psr.lock); + if (DISPLAY_VER(display) >= 20) + intel_vrr_psr_frame_change_disable(old_crtc_state); intel_psr_disable_locked(intel_dp); mutex_unlock(&intel_dp->psr.lock); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 8b4e3f938efea..5925ade4591d4 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -312,12 +312,20 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + u32 trans_push_val = TRANS_PUSH_SEND; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.enable && (DISPLAY_VER(display) < 20 || + !crtc_state->has_psr)) return; + if (crtc_state->vrr.enable) + trans_push_val |= TRANS_PUSH_EN; + + if (DISPLAY_VER(display) >= 20 && crtc_state->has_psr) + trans_push_val |= LNL_TRANS_PUSH_PSR_PR_EN; + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), - TRANS_PUSH_EN | TRANS_PUSH_SEND); + trans_push_val); } bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) @@ -325,7 +333,8 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.enable && (DISPLAY_VER(display) < 20 || + !crtc_state->has_psr)) return false; return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; @@ -358,6 +367,36 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) } } +/** + * intel_vrr_psr_frame_change_enable - Enable PSR frame change mechanism + * @crtc_state: Intel crtc state + * + * This function is for PSR to enable PSR frame change mechanism which is more + * controlled way to generate frame change event. + */ +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + + intel_de_rmw(display, TRANS_PUSH(display, crtc_state->cpu_transcoder), + 0, LNL_TRANS_PUSH_PSR_PR_EN); +} + +/** + * intel_vrr_psr_frame_change_disable - Disable PSR frame change mechanism + * @crtc_state: Intel crtc state + * + * This function is for PSR to disable PSR frame change mechanism. + */ +void intel_vrr_psr_frame_change_disable(const struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + intel_de_rmw(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), + LNL_TRANS_PUSH_PSR_PR_EN, 0); +} + void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) { struct intel_display *display = to_intel_display(old_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 89937858200d3..a75f159168c11 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -23,6 +23,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state); void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state); +void intel_vrr_psr_frame_change_disable(const struct intel_crtc_state *crtc_state); void intel_vrr_get_config(struct intel_crtc_state *crtc_state); int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); From patchwork Thu Oct 10 05:33:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E006CF07A5 for ; Thu, 10 Oct 2024 05:34:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F20910E873; Thu, 10 Oct 2024 05:34:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="P8j4jkcx"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id E422E10E873; Thu, 10 Oct 2024 05:34:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538468; x=1760074468; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WdE/Nz3eZxJr44SKptPj/OQ+CoFRqztYMwPcAYmoTWA=; b=P8j4jkcxw4YqzEQwVDQFEwwbrCQJnu7HuRYgQ3kjUUUMOPRsFNq1tTsY gknSeSxnPsDj75wfM6zCRGMAS3lyxjhsVtVOs1apMye6V/VUktqkKZeL/ d6mf6fvvwmEFkXvsHzsgFWAS1Uo99atxJ7VrWLYVeDGlqDzZPDtwcCQB3 CHv1dcyuxpDLz16/fLGzp85/m5+5jvyRpvbDRtwURIWrDl0nwXdqBdt8V iGHxxMoqI89E+g25ibt/7YUYWMjldVI1LGQSgZhgNxWw9Xc/XgHN2TBaU YvMX4/LW3xsk+JJcntLFmsANrv0aB4HZ0kAw9/tb01IuF49NRJR0KgWbT w==; X-CSE-ConnectionGUID: NqDZolLbT3WueBYfOKbxBw== X-CSE-MsgGUID: 2uzkIokBSo+5LAKCAhGXbA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749367" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749367" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:28 -0700 X-CSE-ConnectionGUID: XnXFKzWXSsKJcS9vUfm4Dw== X-CSE-MsgGUID: 8kjwlUrTSgWVf6joB1tlmw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697306" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:26 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 4/7] drm/i915/psr: Rename psr_force_hw_tracking_exit as psr_force_exit Date: Thu, 10 Oct 2024 08:33:13 +0300 Message-Id: <20241010053316.1580527-5-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2 HW tracking and PSR2 selective fetch. Due to this rename it as psr_force_exit. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index be73c1aaf1ee2..b32020321ca7a 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2301,7 +2301,7 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME; } -static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) +static void psr_force_exit(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; @@ -2805,7 +2805,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state, /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) - psr_force_hw_tracking_exit(intel_dp); + psr_force_exit(intel_dp); /* * Clear possible busy bits in case we have @@ -3202,10 +3202,10 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) * continuous full frame is disabled, only a single full * frame is required */ - psr_force_hw_tracking_exit(intel_dp); + psr_force_exit(intel_dp); } } else { - psr_force_hw_tracking_exit(intel_dp); + psr_force_exit(intel_dp); if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); From patchwork Thu Oct 10 05:33:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E70B4CF07A7 for ; Thu, 10 Oct 2024 05:34:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A5DB10E875; Thu, 10 Oct 2024 05:34:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TwLCzcgZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id AB8DC10E874; Thu, 10 Oct 2024 05:34:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538470; x=1760074470; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7DWC8mH5AZEggSSmtIdY30N/vcGvbyKQUnm9UPGqiKA=; b=TwLCzcgZPn9CAbEGJk7hbBjmecRjVWgsomsOSVTOOJjvGOvC4NlktpKM S/znbMLCk4SMVHod1Rx/xshfenSx7pdC0aP5Rd6Gm4gJ+8Grgac/+6htL 9mJQ+X7Mf4vbEnw/E4rB9UEmFV9HPuycrDFQIJeUP/arwSeTYSDEO2IZt UsVUFkuWMCR5JxEyTREy4fOQpAw87DMNdm+ybLF3vabVsgU+KdEADG46s 7kCRLs1GiJFsZ22zU0BrmmqLrNA7iENCgH5LWemeCTa4j3bhabhfaQLL1 OEPQVGUeD7PmyvefNgHN1Yi7H+x0oDSll09gl6RV+7BmdhFNXaZJ5z+1k Q==; X-CSE-ConnectionGUID: tODVXvlDSomTyvyXgDz0xA== X-CSE-MsgGUID: w4aKtorBSnauNHT37GkaXw== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749369" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749369" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:29 -0700 X-CSE-ConnectionGUID: F+boBgJBSFeT0uHCyPimQQ== X-CSE-MsgGUID: jlagK++zQhi5iQqH5EgK8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697311" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:28 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 5/7] drm/i915/psr: Simplify frontbuffer invalidate/flush callbacks Date: Thu, 10 Oct 2024 08:33:14 +0300 Message-Id: <20241010053316.1580527-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There is unnecessary complexity in frontbuffer tracking invalidate and flush callbacks. Simplify them a bit with some minor changes to sequences: Invalidate: 1. Additionally write single full frame bit when selective fetch is enabled. This should be ok as continuous full frame bit is already set. 2. Rewrite bits in PSR2_MAN_TRK_CTL if two invalidate calls in row without flush in between (psr.psr2_sel_fetch_cff_enabled == true). Flush: 1. intel_dp->psr.psr2_sel_fetch_cff_enabled is clearn also when it is already false. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 66 +++++------------------- 1 file changed, 12 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index b32020321ca7a..5be8076475f0b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -3069,28 +3069,8 @@ static void intel_psr_work(struct work_struct *work) static void _psr_invalidate_handle(struct intel_dp *intel_dp) { - struct intel_display *display = to_intel_display(intel_dp); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; - if (intel_dp->psr.psr2_sel_fetch_enabled) { - u32 val; - - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { - /* Send one update otherwise lag is observed in screen */ - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); - return; - } - - val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), 0); + psr_force_exit(intel_dp); intel_dp->psr.psr2_sel_fetch_cff_enabled = true; } else { intel_psr_exit(intel_dp); @@ -3172,43 +3152,21 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); struct drm_i915_private *dev_priv = to_i915(display->drm); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; + + psr_force_exit(intel_dp); if (intel_dp->psr.psr2_sel_fetch_enabled) { - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { - /* can we turn CFF off? */ - if (intel_dp->psr.busy_frontbuffer_bits == 0) { - u32 val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - - /* - * Set psr2_sel_fetch_cff_enabled as false to allow selective - * updates. Still keep cff bit enabled as we don't have proper - * SU configuration in case update is sent for any reason after - * sff bit gets cleared by the HW on next vblank. - */ - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); - intel_dp->psr.psr2_sel_fetch_cff_enabled = false; - } - } else { + /* can we turn CFF off? */ + if (intel_dp->psr.busy_frontbuffer_bits == 0) /* - * continuous full frame is disabled, only a single full - * frame is required + * Set psr2_sel_fetch_cff_enabled as false to allow selective + * updates. Still keep cff bit enabled as we don't have proper + * SU configuration in case update is sent for any reason after + * sff bit gets cleared by the HW on next vblank. */ - psr_force_exit(intel_dp); - } - } else { - psr_force_exit(intel_dp); - - if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) - queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); + intel_dp->psr.psr2_sel_fetch_cff_enabled = false; + } else if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) { + queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); } } From patchwork Thu Oct 10 05:33:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829482 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0114CF07AA for ; Thu, 10 Oct 2024 05:34:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A32810E86C; Thu, 10 Oct 2024 05:34:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ASY2D6wY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6E92210E869; Thu, 10 Oct 2024 05:34:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538471; x=1760074471; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gBH9dAuUxnVJKGGrfb1/Sf0yNXap94STvghKy/uzE34=; b=ASY2D6wYRinY/NoAM4o5sxMVj9r6vwhBJQbDsqNYsMIEVKUhFpgamQtL /XxaGKRRrzM+qMzU6gbM/Yv39d+sV+f67FoGOBdhIp+A0YpC8IMKA26US mcZkGfqp79dPC6HXwuOllOcFpKOFBsQhfiGeFgKfuhYHj/lu1hP7VwRI6 q5pZFsN9HcHUNRwNd8SyEEgac+umhOnhrVQcu5LIsI+xn/FdbEFPUATcy 3fSczrdk2gYYqC+CrLOrvN3HZkadIGRyX4vwvqSLE1YEKAlYa1MwwfP7H oWwBlyLxrZplKDxwbXJzAGMSfGL7zTw7bXEWIvnGRwQkQpsY5+mi8VuEU Q==; X-CSE-ConnectionGUID: Vjj0O5WWQB6o52SM86AXEA== X-CSE-MsgGUID: HqqdZLYyTlWnyMsJVB4i6g== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749370" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749370" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:31 -0700 X-CSE-ConnectionGUID: ZvMg81fETuSpygeSJeJ3pQ== X-CSE-MsgGUID: lxc4YysuSk+z6vastajGKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697319" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:29 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 6/7] drm/i915/psr: Add VRR send push interface for PSR usage Date: Thu, 10 Oct 2024 08:33:15 +0300 Message-Id: <20241010053316.1580527-7-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add own interface for PSR usage to perform push on frontbuffer tracking invalidate and flush call backs. Use this new interface from PSR code. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++++- drivers/gpu/drm/i915/display/intel_vrr.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 4 ++++ 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 5be8076475f0b..7959a33771b13 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2326,8 +2326,13 @@ static void psr_force_exit(struct intel_dp *intel_dp) * This workaround do not exist for platforms with display 10 or newer * but testing proved that it works for up display 13, for newer * than that testing will be needed. + * + * In Lunarlake we can use TRANS_PUSH mechanism to force sending update + * to sink. */ - intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0); + DISPLAY_VER(display) >= 20 ? + intel_vrr_psr_send_push(display, cpu_transcoder) : + intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0); } void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5925ade4591d4..d51830d173b61 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -328,6 +328,24 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) trans_push_val); } +/** + * intel_vrr_psr_send_push - Send push interface for PSR code + * @display: Intel display + * @cpu_transcoder: cpu_transcode + * + * This is for PSR usage to perform push on frontbuffer tracking invalidate and + * flush call back. PSR mutex should be taken by caller. + */ +void intel_vrr_psr_send_push(struct intel_display *display, + enum transcoder cpu_transcoder) +{ + if (DISPLAY_VER(display) < 20) + return; + + intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0, + TRANS_PUSH_SEND | LNL_TRANS_PUSH_PSR_PR_EN); +} + bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index a75f159168c11..3da7ba12697ff 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -12,6 +12,8 @@ struct drm_connector_state; struct intel_atomic_state; struct intel_connector; struct intel_crtc_state; +struct intel_display; +enum transcoder; bool intel_vrr_is_capable(struct intel_connector *connector); bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh); @@ -25,6 +27,8 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state); void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_psr_frame_change_disable(const struct intel_crtc_state *crtc_state); +void intel_vrr_psr_send_push(struct intel_display *display, + enum transcoder cpu_transcoder); void intel_vrr_get_config(struct intel_crtc_state *crtc_state); int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); From patchwork Thu Oct 10 05:33:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13829483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5323BCF07A8 for ; Thu, 10 Oct 2024 05:34:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 01E0010E874; Thu, 10 Oct 2024 05:34:37 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="RTHqSXIv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 317D110E878; Thu, 10 Oct 2024 05:34:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728538473; x=1760074473; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dJjAjikPyU3T0yDKvFtlnGP1qSs6wRJLbXqKVmVj/tA=; b=RTHqSXIvVyntP4eCb6G6RHnk7BaIMN3abPslMUtjyDO7Sf4NwmFbFItw 7M5cF745xrGhRoHSEM8Ll+i1wTfM6ifJsge/FyjXD0XTXtwYM+28TRvjw 4ONnVJ8SL2hZC+RnSfiu6UR9jKiwuM/YsJ9Xw5n+3NTLHBMw2fmkrIbFv oyVga3ONI9WNPELQLkobag6mlmumdsRkQGZWcTR3cKpDjE0CCVjPsogCZ unjAgtP6hTqU2c27hmaWoukpfbLAX3kq6HrO+mnECIPYprD3CBIx2WMIp Pt1xXntvCQPzr8yhdyJK1+dlwX7Lhj84sDf6KCXvTrZOFBRcjTmmRf9FX A==; X-CSE-ConnectionGUID: KgAXlmi9RSiklEPCHWQ+5A== X-CSE-MsgGUID: T42/dREQSqS9Wey6yOiwYA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="30749373" X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="30749373" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:33 -0700 X-CSE-ConnectionGUID: +NrZ+FpzTECwB9witIGxVA== X-CSE-MsgGUID: qsoY14IeQLKGJELQM8CdUQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="76697324" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.162]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 22:34:31 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, intel-xe@lists.freedesktop.org, =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH 7/7] drm/i915/display: Generate PSR frame change event on cursor update Date: Thu, 10 Oct 2024 08:33:16 +0300 Message-Id: <20241010053316.1580527-8-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241010053316.1580527-1-jouni.hogander@intel.com> References: <20241010053316.1580527-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On LunarLake and onwards we are using vrr send push mechanism to trigger frame change event. Due to this we need to trigger it using intel_vrr_psr_send_push provided by VRR code on legacy cursor update. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_cursor.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index 050eacc709cc1..dc8629f843662 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -25,6 +25,7 @@ #include "intel_psr.h" #include "intel_psr_regs.h" #include "intel_vblank.h" +#include "intel_vrr.h" #include "skl_watermark.h" /* Cursor formats */ @@ -790,6 +791,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane, struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); struct intel_crtc_state *new_crtc_state; + struct intel_display *display = to_intel_display(crtc); struct intel_vblank_evade_ctx evade; int ret; @@ -910,6 +912,9 @@ intel_legacy_cursor_update(struct drm_plane *_plane, intel_plane_disable_arm(plane, crtc_state); } + if (crtc_state->has_psr) + intel_vrr_psr_send_push(display, crtc_state->cpu_transcoder); + local_irq_enable(); intel_psr_unlock(crtc_state);