From patchwork Wed Oct 16 10:14:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13838121 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6B11621E3CB; Wed, 16 Oct 2024 10:15:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729073737; cv=none; b=qpb90Mq9FCzPuW1zCMjYJwWZjHoztRDpfxGp3uODP8ivPhUUZKBhyUFyLRH5CisuW4Ku89n07g37zVZmjuryamGuL9yHguP58GM36AO76zM0a4+oNG5kajGjMmL9R8xn+VG0Pv+Yfk3q52roWTXPdNXXosiUYhVPo/SLRD5pXHw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729073737; c=relaxed/simple; bh=k2SBFdp8xbEWK3/p1amSJ24ZHOMKpkaY/QnWPMXuKl0=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=jsecbODtAnBD7o7KmV2cvjlyhKe0aON5a3IRM9eT7bv/rKlj7PGIB11bv2CFkjPYmHhgzpPp0L8UvQYI55xwFQlSS/l3Gkkw+zYrpaTh8xKmYJk39BW9f615pUhZGcVY4YNsiAatxBLt3PS0B4Fu5aw5jsmRFQoKJXLucqbfpnI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-IronPort-AV: E=Sophos;i="6.11,207,1725289200"; d="scan'208";a="226086880" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 16 Oct 2024 19:15:33 +0900 Received: from localhost.localdomain (unknown [10.226.92.50]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 9911F4005E13; Wed, 16 Oct 2024 19:15:17 +0900 (JST) From: Biju Das To: Michael Turquette , Stephen Boyd Cc: Biju Das , Geert Uytterhoeven , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das , Hien Huynh Subject: [PATCH v3] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk Date: Wed, 16 Oct 2024 11:14:31 +0100 Message-ID: <20241016101513.39984-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 While computing foutpostdiv_rate, the value of params->pl5_fracin is discarded, which results in the wrong refresh rate. Fix the formula for computing foutpostdiv_rate. Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk support") Signed-off-by: Hien Huynh Signed-off-by: Biju Das --- v2->v3: * Used mul_u32_u32() for 32-bit multiplication. v1->v2: * Improved the precision by division of params->pl5_refdiv done after all multiplication. --- drivers/clk/renesas/rzg2l-cpg.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index 88bf39e8c79c..4449afb57eda 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -548,7 +548,7 @@ static unsigned long rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params, unsigned long rate) { - unsigned long foutpostdiv_rate; + unsigned long foutpostdiv_rate, foutvco_rate; params->pl5_intin = rate / MEGA; params->pl5_fracin = div_u64(((u64)rate % MEGA) << 24, MEGA); @@ -557,10 +557,10 @@ rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params, params->pl5_postdiv2 = 1; params->pl5_spread = 0x16; - foutpostdiv_rate = - EXTAL_FREQ_IN_MEGA_HZ * MEGA / params->pl5_refdiv * - ((((params->pl5_intin << 24) + params->pl5_fracin)) >> 24) / - (params->pl5_postdiv1 * params->pl5_postdiv2); + foutvco_rate = mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA, (params->pl5_intin << 24) + + params->pl5_fracin) / params->pl5_refdiv >> 24; + foutpostdiv_rate = DIV_ROUND_CLOSEST_ULL(foutvco_rate, + params->pl5_postdiv1 * params->pl5_postdiv2); return foutpostdiv_rate; }