From patchwork Thu Oct 17 08:51:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 13839634 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50493D21260 for ; Thu, 17 Oct 2024 08:54:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/z+P8UNvqP2F207yqlUX6ImNjWsCKBW8fNTzu+b0Lqk=; b=edM1jIZXAhtNkgIu+GNOoJnRyj PfMvRON8+ov8YYJUvZDcU2SYgs1brmvH1wrv1kn5zshn67nEHFoF6VXQwwwy7A0vTql8njEcLMBGF YoDwE5f+YgExZtVpYWeLqDqkZp3sWDfOVJIF6kmLZkLaan4weM4+6a3izsgHMrQpHN4jVMM0SDdyE 2BXJnNc4MmR7d3gs4jCCjVOIm6Z2p7qhG8vFc6IWYT6782R9Cgc50ZJXNWzslJ4S3znUUHyM67b7j UOtBzYHj70y0xLeNFpMUa/Pj96if7cRWR2/o6W9+kxolnMOigGBtAh3qDJiqHTD0gxFjEt2wNpiQn CJgz7igg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1MHZ-0000000EFFA-1Hgx; Thu, 17 Oct 2024 08:54:57 +0000 Received: from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1MEg-0000000EEmh-2Dcq; Thu, 17 Oct 2024 08:52:00 +0000 Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-a99650da839so99170866b.2; Thu, 17 Oct 2024 01:51:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1729155117; x=1729759917; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/z+P8UNvqP2F207yqlUX6ImNjWsCKBW8fNTzu+b0Lqk=; b=LsTUDmf/8S8qjkxF/7Dt+y+Eld8l3KPx7rZWEmwCBFEN31g10/bNxeHg9bB98UzFdX HAQsy2R3jctq88NI+79yvy9Yr/k7s0Rqy0pguEBLpMhh3gOeUWjMeh2mKXUdfhMGpR0n bDmSkZsy5HzqgUHIlEhOMDOW5qtr9Q60SY6Rw9Erc5zPuiMQWMCLnN10TOd/ty/Gb8vG sk/nfxENqVzLwwJdstmu7iY9LEtCzB4WPR0lPhlxTu94/3p60ikDjhH+PvWvBi/Sx7EI CUiRePZ1UYdyjLOl91I7162i+Bpcv3GR8KJTXCFVbFHqyT11LMS1pGnkd/abyodDQ61e S/dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729155117; x=1729759917; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/z+P8UNvqP2F207yqlUX6ImNjWsCKBW8fNTzu+b0Lqk=; b=R0Kr4/sXbW0Bz7OBIWy4HGY6e4flIeQOpXa8h+sIQbJeN7GyHZ5KFMuAcOKUIDgltr /KXNL4LLohdngJxSQwrKFF8cxc02idkiEzHWCOOFYv0DYjWbFzi2sj8xybBf706zF+Ti cr2nJGxuXTlX1YiuOU6Jooe681aC6TjcuNguZSweMK8r8dSxTaxppdR9ry3qfrxW3IZ+ DPyoS2U3RTWhpeJriwUX27YJ79wbH+LmOEihEVfqYmOtS2g0G4BXFr4ZfIt3uH/GLMRj rrQz785FrsodaPhN4D2JPAn20zd3Zt7S/xl815UYFZdUlV6W5DX78TkuITzWPgG4JrEJ Pezg== X-Forwarded-Encrypted: i=1; AJvYcCUEEMw6tAVwx3R+wZXMKDkFUalyDAwQfSQjkNSPdjlzREiU6GRsLNrUoKjn6i+hLTQqP+Iyf31f5oXZ76XMNK4=@lists.infradead.org, AJvYcCVSslwRnWF0n546I+/ZaGemmspePwRJsKDV2A/L+VBfm4ovmKGrjMhkyePSVROKjFE+MmsqSgLndMfVhPXoJvXR@lists.infradead.org X-Gm-Message-State: AOJu0YwQGhTzgpKTRveDDYxJwFg4jnszagFDOoKPwGQBaeBpMA7tCDVf TJqzMxSZmBWh0zCMGomwXjJ5AH6FEhHCXyhvLmufChzOKkN1KzhE X-Google-Smtp-Source: AGHT+IHasxy8ZcBwQ63aPHXND9H4VsUQyIbWvOQ1NFxI6SZCCyCKPXsoumTK68tT8iJu7uplyyd/TQ== X-Received: by 2002:a17:907:848:b0:a99:d587:6045 with SMTP id a640c23a62f3a-a99e3b319efmr1895383266b.19.1729155116394; Thu, 17 Oct 2024 01:51:56 -0700 (PDT) Received: from zenbook.agu.edu.tr ([95.183.227.32]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a29816c24sm267045266b.110.2024.10.17.01.51.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 01:51:55 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Matthias Brugger , AngeloGioacchino Del Regno , Alexandre Mergnat , Fabien Parent , Markus Schneider-Pargmann , Alexandre Bailon , Chen-Yu Tsai , Eugen Hristev , MandyJH Liu Cc: Yassine Oudjana , Yassine Oudjana , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 1/2] dt-bindings: power: Add binding for MediaTek MT6735 power controller Date: Thu, 17 Oct 2024 11:51:34 +0300 Message-ID: <20241017085136.68053-2-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017085136.68053-1-y.oudjana@protonmail.com> References: <20241017085136.68053-1-y.oudjana@protonmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241017_015158_598301_30259B8D X-CRM114-Status: GOOD ( 12.78 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Yassine Oudjana Add DT binding for MediaTek MT6735 SCPSYS power controller. Signed-off-by: Yassine Oudjana Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../bindings/power/mediatek,power-controller.yaml | 1 + .../devicetree/bindings/soc/mediatek/scpsys.txt | 1 + .../power/mediatek,mt6735-power-controller.h | 14 ++++++++++++++ 3 files changed, 16 insertions(+) create mode 100644 include/dt-bindings/power/mediatek,mt6735-power-controller.h diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 8985e2df8a566..6d37c06b2f65b 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -23,6 +23,7 @@ properties: compatible: enum: + - mediatek,mt6735-power-controller - mediatek,mt6795-power-controller - mediatek,mt8167-power-controller - mediatek,mt8173-power-controller diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index 2bc367793aec1..3530a6668b486 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -20,6 +20,7 @@ Required properties: - compatible: Should be one of: - "mediatek,mt2701-scpsys" - "mediatek,mt2712-scpsys" + - "mediatek,mt6735-scpsys" - "mediatek,mt6765-scpsys" - "mediatek,mt6797-scpsys" - "mediatek,mt7622-scpsys" diff --git a/include/dt-bindings/power/mediatek,mt6735-power-controller.h b/include/dt-bindings/power/mediatek,mt6735-power-controller.h new file mode 100644 index 0000000000000..6957075fcb9e5 --- /dev/null +++ b/include/dt-bindings/power/mediatek,mt6735-power-controller.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_POWER_MT6735_POWER_CONTROLLER_H +#define _DT_BINDINGS_POWER_MT6735_POWER_CONTROLLER_H + +#define MT6735_POWER_DOMAIN_MD1 0 +#define MT6735_POWER_DOMAIN_CONN 1 +#define MT6735_POWER_DOMAIN_DIS 2 +#define MT6735_POWER_DOMAIN_MFG 3 +#define MT6735_POWER_DOMAIN_ISP 4 +#define MT6735_POWER_DOMAIN_VDE 5 +#define MT6735_POWER_DOMAIN_VEN 6 + +#endif From patchwork Thu Oct 17 08:51:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 13839635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD7CCD21260 for ; Thu, 17 Oct 2024 08:56:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RIKQOSn+OzCMfWxjDnYu4Cj5q8Asx6TloHeXxyGjmj8=; b=3Lw4LDIYqvWOXhKdddp+pea1c3 d1HjA+qj+WqfLxQlM7SZBsSFk6/DNg2npCApqQbeaCSajoiTTWVgVMp8CSTcWjd3wygPUN2ZClxgU 2R+Cza6Ksxfi2YMko6I5iOyzyBr3HpB6CjwSgUPYWKKRMFUWW6JV4WqXNhT4h8D9SkQkdHZ5Juk6F 0RoZf5WU+CWOdXeV4lnfVzVXC2XtmduHZlghlS39ZoXDq0tktjqu0LaEcrWDY0YJOIC8iuoGhNO0X vmcCvpbtdFCkEqkiNHa09D4a2iiq7OSr97Ev/64k2DeF+f5H+gLyPdsCavPR43d1tFYmSMmGrFegj zwtNMs0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1MJ4-0000000EFUK-2fjf; Thu, 17 Oct 2024 08:56:30 +0000 Received: from mail-lf1-x12e.google.com ([2a00:1450:4864:20::12e]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1MEj-0000000EEnE-2Oqw; Thu, 17 Oct 2024 08:52:03 +0000 Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-539d9fffea1so701666e87.2; Thu, 17 Oct 2024 01:52:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1729155120; x=1729759920; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RIKQOSn+OzCMfWxjDnYu4Cj5q8Asx6TloHeXxyGjmj8=; b=SIkmp1srQomZsJecmu/U1FppH+prUU5j8nbpnkMqnxpzRBR0251qm2UEcovlif4Q+s oU9sLy8pzn6v8JSPK9+BRQCMhhADMkp/tvjaqT4QAxqiTxjT5Er/pEK3S5PYM6P+vgOc 8Thqw94nzjb3Fi8z1AlExUmu6X1H4BZF93Bp3dEjT3EHdYvkWsjcDpqmho28NlDgMfW5 T3VymD+PkSsNdjHMbnijeWO60sXG97cfTwys+kY3QKsDZPXr8uf/IvPyODOT40G+fLYJ b1bk2jKcSFehsQGuwVJXEu3IBK/DAk30L3zThRz9LpkOg4mAdyVoTbSMRq9UORU0eCSC m5VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729155120; x=1729759920; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RIKQOSn+OzCMfWxjDnYu4Cj5q8Asx6TloHeXxyGjmj8=; b=jZJMNDrr/ca/g7mOErU5uXCjXqCSsVuNTvfh9vIcamhSIPulUTSvk5TmJEr2DXMmJB 0WVo4KbuhcUVN1VRWT/zyDiWuFwr6MiXjjzUOY4y5icS1IDKBjHzAXkQ6G+7s9I4sH1g xamWGoD20jT9BL1mYqluRYkShc9StVVDpSVC89kRoV+lrgiqUkjeN4dZ+3FvcZa6w202 qgNuUPT6q//ZcSDZ1Oj/9TFuqHAbrfDBRA1q0D4NBuCul34KSGK5zS8glrTUftRCxF8O Djv9XMc3ASbvU2tXVcaNd1ZMTeXVwDaChs2WbsjqCpHrV1ahKPvjv3DABzjxO3WCgClQ HS6Q== X-Forwarded-Encrypted: i=1; AJvYcCWgsx3JJY8hzdvXavmqN7r4DWtSCvzZ5yESPO23E88jFf5j40CnhM0K6Rnkz9TnCy43jEA7R43bxq2ej1wTryM=@lists.infradead.org, AJvYcCXuWfTayIITvfAZ15r5reiHOot4gwf1DGMmK2WBPkIv96m/Cpj0EydWjo5ew1VImmSPxLCaviWEO8g6OtJrtQHJ@lists.infradead.org X-Gm-Message-State: AOJu0Yybeu9I3EaHGJfOzkiT8aCuAfcsQmVDx6XRScLvBRzjk3xlxtk0 m/J7R2mLSZDQQ5t8Ivn8Nx8an4iw2HPCYP+g8+lyT5got3YMgMOO X-Google-Smtp-Source: AGHT+IFa05Tw/OxDuv2XAa8AxBAc26dQ4PJSNT2cz40KikvUKyt7MVPDkF5xJw0vAU4W5HtGJocRug== X-Received: by 2002:a05:6512:3994:b0:539:f2b9:c4d0 with SMTP id 2adb3069b0e04-53a03f8865amr4887610e87.52.1729155119163; Thu, 17 Oct 2024 01:51:59 -0700 (PDT) Received: from zenbook.agu.edu.tr ([95.183.227.32]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a29816c24sm267045266b.110.2024.10.17.01.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 01:51:58 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Matthias Brugger , AngeloGioacchino Del Regno , Alexandre Mergnat , Fabien Parent , Markus Schneider-Pargmann , Alexandre Bailon , Chen-Yu Tsai , Eugen Hristev , MandyJH Liu Cc: Yassine Oudjana , Yassine Oudjana , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 2/2] soc: mediatek: pm-domains: Add support for MT6735 Date: Thu, 17 Oct 2024 11:51:35 +0300 Message-ID: <20241017085136.68053-3-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017085136.68053-1-y.oudjana@protonmail.com> References: <20241017085136.68053-1-y.oudjana@protonmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241017_015201_814229_8263A94A X-CRM114-Status: GOOD ( 17.30 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Yassine Oudjana Add support for SCPSYS power domains of MT6735. All non-CPU power domains are added except for MD2 (C2K modem), which is left out due to issues with powering it on. Signed-off-by: Yassine Oudjana Reviewed-by: AngeloGioacchino Del Regno --- drivers/pmdomain/mediatek/mt6735-pm-domains.h | 96 +++++++++++++++++++ drivers/pmdomain/mediatek/mtk-pm-domains.c | 5 + drivers/pmdomain/mediatek/mtk-pm-domains.h | 2 + include/linux/soc/mediatek/infracfg.h | 5 + 4 files changed, 108 insertions(+) create mode 100644 drivers/pmdomain/mediatek/mt6735-pm-domains.h diff --git a/drivers/pmdomain/mediatek/mt6735-pm-domains.h b/drivers/pmdomain/mediatek/mt6735-pm-domains.h new file mode 100644 index 0000000000000..71896be68e227 --- /dev/null +++ b/drivers/pmdomain/mediatek/mt6735-pm-domains.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT6735_PM_DOMAINS_H +#define __SOC_MEDIATEK_MT6735_PM_DOMAINS_H + +#include "mtk-pm-domains.h" +#include + +/* + * MT6735 power domain support + */ + +static const struct scpsys_domain_data scpsys_domain_data_mt6735[] = { + [MT6735_POWER_DOMAIN_MD1] = { + .name = "md1", + .sta_mask = PWR_STATUS_MD1, + .ctl_offs = SPM_MD1_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = 0, + .bp_cfg = { + BUS_PROT_INFRA_UPDATE_TOPAXI(MT6735_TOP_AXI_PROT_EN_MD1), + }, + }, + [MT6735_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = SPM_CONN_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = 0, + .bp_cfg = { + BUS_PROT_INFRA_UPDATE_TOPAXI(MT6735_TOP_AXI_PROT_EN_CONN), + }, + }, + [MT6735_POWER_DOMAIN_DIS] = { + .name = "dis", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = SPM_DIS_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_cfg = { + BUS_PROT_INFRA_UPDATE_TOPAXI(MT8173_TOP_AXI_PROT_EN_MM_M0), + }, + }, + [MT6735_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = SPM_MFG_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_cfg = { + BUS_PROT_INFRA_UPDATE_TOPAXI(MT8173_TOP_AXI_PROT_EN_MFG_S), + }, + }, + [MT6735_POWER_DOMAIN_ISP] = { + .name = "isp", + .sta_mask = PWR_STATUS_ISP, + .ctl_offs = SPM_ISP_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + }, + [MT6735_POWER_DOMAIN_VDE] = { + .name = "vde", + .sta_mask = PWR_STATUS_VDEC, + .ctl_offs = SPM_VDE_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT6735_POWER_DOMAIN_VEN] = { + .name = "ven", + .sta_mask = BIT(8), + .ctl_offs = SPM_VEN_PWR_CON, + .pwr_sta_offs = SPM_PWR_STATUS, + .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, +}; + +static const struct scpsys_soc_data mt6735_scpsys_data = { + .domains_data = scpsys_domain_data_mt6735, + .num_domains = ARRAY_SIZE(scpsys_domain_data_mt6735), +}; + +#endif /* __SOC_MEDIATEK_MT6735_PM_DOMAINS_H */ diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.c b/drivers/pmdomain/mediatek/mtk-pm-domains.c index 3580913f25d39..b866b006af699 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.c +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.c @@ -16,6 +16,7 @@ #include #include +#include "mt6735-pm-domains.h" #include "mt6795-pm-domains.h" #include "mt8167-pm-domains.h" #include "mt8173-pm-domains.h" @@ -608,6 +609,10 @@ static void scpsys_domain_cleanup(struct scpsys *scpsys) } static const struct of_device_id scpsys_of_match[] = { + { + .compatible = "mediatek,mt6735-power-controller", + .data = &mt6735_scpsys_data, + }, { .compatible = "mediatek,mt6795-power-controller", .data = &mt6795_scpsys_data, diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.h b/drivers/pmdomain/mediatek/mtk-pm-domains.h index aaba5e6b0536f..2ac96804b9853 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.h +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.h @@ -21,6 +21,7 @@ #define SPM_ISP_PWR_CON 0x0238 #define SPM_DIS_PWR_CON 0x023c #define SPM_CONN_PWR_CON 0x0280 +#define SPM_MD1_PWR_CON 0x0284 #define SPM_VEN2_PWR_CON 0x0298 #define SPM_AUDIO_PWR_CON 0x029c #define SPM_MFG_2D_PWR_CON 0x02c0 @@ -30,6 +31,7 @@ #define SPM_PWR_STATUS 0x060c #define SPM_PWR_STATUS_2ND 0x0610 +#define PWR_STATUS_MD1 BIT(0) #define PWR_STATUS_CONN BIT(1) #define PWR_STATUS_DISP BIT(3) #define PWR_STATUS_MFG BIT(4) diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h index 6c6cccc848f48..9956e18c5ffa9 100644 --- a/include/linux/soc/mediatek/infracfg.h +++ b/include/linux/soc/mediatek/infracfg.h @@ -434,6 +434,11 @@ #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ BIT(7) | BIT(8)) +#define MT6735_TOP_AXI_PROT_EN_CONN (BIT(2) | BIT(8)) +#define MT6735_TOP_AXI_PROT_EN_MD1 (BIT(24) | BIT(25) | \ + BIT(26) | BIT(27) | \ + BIT(28)) + #define INFRA_TOPAXI_PROTECTEN 0x0220 #define INFRA_TOPAXI_PROTECTSTA1 0x0228 #define INFRA_TOPAXI_PROTECTEN_SET 0x0260