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Peter Anvin" , linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 1/3] PCI: Remove unused PCI_SUBTRACTIVE_DECODE Date: Thu, 17 Oct 2024 17:11:08 +0300 Message-Id: <20241017141111.44612-1-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The commit 2fe2abf896c1 ("PCI: augment bus resource table with a list") added PCI_SUBTRACTIVE_DECODE which is put into the struct pci_bus_resource flags field but is never read. There seems to never have been users for it. Remove both PCI_SUBTRACTIVE_DECODE and the flags field from the struct pci_bus_resource. Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron --- arch/s390/pci/pci_bus.c | 2 +- arch/x86/pci/fixup.c | 2 +- drivers/pci/bus.c | 4 +--- drivers/pci/probe.c | 5 ++--- include/linux/pci.h | 12 +----------- 5 files changed, 6 insertions(+), 19 deletions(-) diff --git a/arch/s390/pci/pci_bus.c b/arch/s390/pci/pci_bus.c index daa5d7450c7d..5630af5deb8b 100644 --- a/arch/s390/pci/pci_bus.c +++ b/arch/s390/pci/pci_bus.c @@ -53,7 +53,7 @@ static int zpci_bus_prepare_device(struct zpci_dev *zdev) zpci_setup_bus_resources(zdev); for (i = 0; i < PCI_STD_NUM_BARS; i++) { if (zdev->bars[i].res) - pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res, 0); + pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res); } } diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 98a9bb92d75c..0681ecfe3430 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -757,7 +757,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) dev_info(&dev->dev, "adding root bus resource %pR (tainting kernel)\n", res); add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); - pci_bus_add_resource(dev->bus, res, 0); + pci_bus_add_resource(dev->bus, res); } base = ((res->start >> 8) & AMD_141b_MMIO_BASE_MMIOBASE_MASK) | diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 55c853686051..9cf6d0f3ab2b 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -46,8 +46,7 @@ void pci_free_resource_list(struct list_head *resources) } EXPORT_SYMBOL(pci_free_resource_list); -void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, - unsigned int flags) +void pci_bus_add_resource(struct pci_bus *bus, struct resource *res) { struct pci_bus_resource *bus_res; @@ -58,7 +57,6 @@ void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, } bus_res->res = res; - bus_res->flags = flags; list_add_tail(&bus_res->list, &bus->resources); } diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 4f68414c3086..4243b1e6ece2 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -546,8 +546,7 @@ void pci_read_bridge_bases(struct pci_bus *child) if (dev->transparent) { pci_bus_for_each_resource(child->parent, res) { if (res && res->flags) { - pci_bus_add_resource(child, res, - PCI_SUBTRACTIVE_DECODE); + pci_bus_add_resource(child, res); pci_info(dev, " bridge window %pR (subtractive decode)\n", res); } @@ -1032,7 +1031,7 @@ static int pci_register_host_bridge(struct pci_host_bridge *bridge) if (res->flags & IORESOURCE_BUS) pci_bus_insert_busn_res(bus, bus->number, res->end); else - pci_bus_add_resource(bus, res, 0); + pci_bus_add_resource(bus, res); if (offset) { if (resource_type(res) == IORESOURCE_IO) diff --git a/include/linux/pci.h b/include/linux/pci.h index 573b4c4c2be6..6a9cf80d0d4b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -633,18 +633,9 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); * Use pci_bus_for_each_resource() to iterate through all the resources. */ -/* - * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly - * and there's no way to program the bridge with the details of the window. - * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- - * decode bit set, because they are explicit and can be programmed with _SRS. - */ -#define PCI_SUBTRACTIVE_DECODE 0x1 - struct pci_bus_resource { struct list_head list; struct resource *res; - unsigned int flags; }; #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ @@ -1498,8 +1489,7 @@ void pci_add_resource(struct list_head *resources, struct resource *res); void pci_add_resource_offset(struct list_head *resources, struct resource *res, resource_size_t offset); void pci_free_resource_list(struct list_head *resources); -void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, - unsigned int flags); +void pci_bus_add_resource(struct pci_bus *bus, struct resource *res); struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); void pci_bus_remove_resources(struct pci_bus *bus); void pci_bus_remove_resource(struct pci_bus *bus, struct resource *res); From patchwork Thu Oct 17 14:11:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13840092 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4213A1DE897; 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X-CSE-ConnectionGUID: 6U8AMqhdSqCEQY1Bo5Zc8g== X-CSE-MsgGUID: /yBIg86CR0WTH7rn24qz2g== X-IronPort-AV: E=McAfee;i="6700,10204,11228"; a="54075348" X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="54075348" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:11:32 -0700 X-CSE-ConnectionGUID: pMEREt9/Tx28oNObN5FQCA== X-CSE-MsgGUID: b7sVqaPaTL6pEWw7tpBqYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="78701368" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.91]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:11:30 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 2/3] PCI: Move struct pci_bus_resource into bus.c Date: Thu, 17 Oct 2024 17:11:09 +0300 Message-Id: <20241017141111.44612-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241017141111.44612-1-ilpo.jarvinen@linux.intel.com> References: <20241017141111.44612-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The struct pci_bus_resource is only used in bus.c so move it there. Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron --- drivers/pci/bus.c | 12 ++++++++++++ include/linux/pci.h | 12 ------------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 9cf6d0f3ab2b..e0a2441be6d3 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -18,6 +18,18 @@ #include "pci.h" +/* + * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond + * to P2P or CardBus bridge windows) go in a table. Additional ones (for + * buses below host bridges or subtractive decode bridges) go in the list. + * Use pci_bus_for_each_resource() to iterate through all the resources. + */ + +struct pci_bus_resource { + struct list_head list; + struct resource *res; +}; + void pci_add_resource_offset(struct list_head *resources, struct resource *res, resource_size_t offset) { diff --git a/include/linux/pci.h b/include/linux/pci.h index 6a9cf80d0d4b..5a9d849b28ef 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -626,18 +626,6 @@ void pci_set_host_bridge_release(struct pci_host_bridge *bridge, int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); -/* - * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond - * to P2P or CardBus bridge windows) go in a table. Additional ones (for - * buses below host bridges or subtractive decode bridges) go in the list. - * Use pci_bus_for_each_resource() to iterate through all the resources. - */ - -struct pci_bus_resource { - struct list_head list; - struct resource *res; -}; - #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ struct pci_bus { From patchwork Thu Oct 17 14:11:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13840093 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 852211DE8BC; Thu, 17 Oct 2024 14:11:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729174303; cv=none; b=q695oEiWauhpYfU1LKLbazZPizK/Eov5Q6zeBG+hPmzkupwxL3PzpUsMTt0wuhqIqrNEIcTgETlFLu6me32K1zwEwbmR6WhBI4VEWG6nfFngnV8IsHlJ2DJSqZSvSL6i7ppXgD997GBC4noqF/N+qSWyy4J68XzOq0toY4QK+fE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729174303; c=relaxed/simple; bh=5IR1uB3TgtqzCsMDhgM3NCGAzVYFoWeICAq85ssp+Gs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=UnUJY+2Ddypd79pDqXEilDlfTsWx6DJ6SlyXXBGHHbpYwotr935B+aYZnpPF8K7WX6ABOeya1B7zyeBlDHwOEyVEE13XOZChlmoWub82aRkGtO6Phd4++ObmLMTK2Wms2HcA9hGdnbUZqB6ns5GOkFB/n86mpMKkzwubA/AtUmc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=avpGkxX7; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="avpGkxX7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729174299; x=1760710299; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5IR1uB3TgtqzCsMDhgM3NCGAzVYFoWeICAq85ssp+Gs=; b=avpGkxX7idBye7OM1HVX5FpfK3eY/knE17LlVT576FK0NrVFBoAJI06c qmBtTfL8fSX32EmaRhU5q646bDs/BTO1T6djdxwIhwkmLqAi44oEKi1Fa YYqup8HwTfEux02EaJMvhQjx0m1OYl0puGJnlsTEnKTyFegIoaX7YhiEn 0QAacnuMH8rUfDgUf3dNw+qUVc3Gp2RT98KmMIa3wR3h3Y2N85bH7tUxE gVr0MSeZVWkbxmGR1GAx5R6VWoj6QMnXqQFTscfJNUTWVxBob4UmVOWeT i1GB6OplIBDOOxXZV0NnKjuo85Pr0s46UTlaoGsHum/cp3vnJYiYdkbTR Q==; X-CSE-ConnectionGUID: moPGL17lQNeLIMsMZ0Eu7w== X-CSE-MsgGUID: xje5+rqKRyqI8xBYIoWIzA== X-IronPort-AV: E=McAfee;i="6700,10204,11228"; a="54075357" X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="54075357" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:11:38 -0700 X-CSE-ConnectionGUID: 7LNHrZfTTVmUUOv2f/oL3Q== X-CSE-MsgGUID: q7uFooHwQpy5EWKpCPBRTQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="78701389" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.91]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:11:37 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 3/3] PCI: Use reverse logic in pci_read_bridge_bases() Date: Thu, 17 Oct 2024 17:11:10 +0300 Message-Id: <20241017141111.44612-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241017141111.44612-1-ilpo.jarvinen@linux.intel.com> References: <20241017141111.44612-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Use reverse logic combined with return and continue to allow significant reduction in indentation level in pci_read_bridge_bases(). Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron --- drivers/pci/probe.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 4243b1e6ece2..cc97dbda7e76 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -543,14 +543,15 @@ void pci_read_bridge_bases(struct pci_bus *child) pci_read_bridge_mmio(child->self, child->resource[1], false); pci_read_bridge_mmio_pref(child->self, child->resource[2], false); - if (dev->transparent) { - pci_bus_for_each_resource(child->parent, res) { - if (res && res->flags) { - pci_bus_add_resource(child, res); - pci_info(dev, " bridge window %pR (subtractive decode)\n", - res); - } - } + if (!dev->transparent) + return; + + pci_bus_for_each_resource(child->parent, res) { + if (!res || !res->flags) + continue; + + pci_bus_add_resource(child, res); + pci_info(dev, " bridge window %pR (subtractive decode)\n", res); } }