From patchwork Fri Oct 18 20:49:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842391 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32C3AD3F29E for ; Fri, 18 Oct 2024 20:49:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A3AA10E998; Fri, 18 Oct 2024 20:49:50 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="SuN3cbJ+"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0C7C910E993; Fri, 18 Oct 2024 20:49:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284587; x=1760820587; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0iWqE8xPiM8xgC5QVcLRr8OFRri4Rq0NNVsfE6u4wsY=; b=SuN3cbJ+xJ7KWBfj64W9U4N0IEOOVE5OTwyTol2smVon914TUNw360sE b255s57BIlPw9zDfKw/A61CCAKJLtV1GtWXtRidaj7zRiKzJrFXjAbEAG RLy85fhY3T4PfVkIW7xIJQCRJW02SuPr34oRhmaAcMrpLbxkgu4yJYEBn zv7B1E9BYY+M3G7LlZ+BHqG+vP4aNR8kDqprDNm6F943h9xAF+RQ36LpN +UX7C/wGNW+hCWzkwFDkSFvG3Zz2zGQ+80QaKyiTAdbUym79MT4DfOkEj gjz208SAbh7q1wmMxvHO8KsURsy9g82AIWjC5qdvMiylF/WPtoPMx21jc g==; X-CSE-ConnectionGUID: /DIaWZQ4SgusG10AxGvEqg== X-CSE-MsgGUID: PM+p13muTI6EqNi3PdfNuw== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240171" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240171" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:46 -0700 X-CSE-ConnectionGUID: 2XHP5J5ISQ2XGRQ67EbxDA== X-CSE-MsgGUID: 0cLgG9/0R9S530KKQBw0xQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798925" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:46 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Mitul Golani , Ankit Nautiyal , Matt Atwood Subject: [PATCH 01/12] drm/i915/display/ptl: Fill VRR crtc_state timings before other transcoder timings Date: Fri, 18 Oct 2024 13:49:30 -0700 Message-ID: <20241018204941.73473-2-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Mitul Golani In progress to make VRR timing generator as the default timing generator, rest other timings will be derived based on vrr.vmin and vrr.vmax. Call intel_vrr_get_config before intel_get_transcoder_timings to accomodate values getting pre-filled. Signed-off-by: Mitul Golani Signed-off-by: Ankit Nautiyal Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_display.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ef1436146325..01466611eebe 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4134,13 +4134,13 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, intel_joiner_get_config(pipe_config); intel_dsc_get_config(pipe_config); + if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder)) + intel_vrr_get_config(pipe_config); + if (!transcoder_is_dsi(pipe_config->cpu_transcoder) || DISPLAY_VER(dev_priv) >= 11) intel_get_transcoder_timings(crtc, pipe_config); - if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder)) - intel_vrr_get_config(pipe_config); - intel_get_pipe_src_size(crtc, pipe_config); if (IS_HASWELL(dev_priv)) { From patchwork Fri Oct 18 20:49:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842389 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40A58D3F29E for ; Fri, 18 Oct 2024 20:49:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D59BD10E993; Fri, 18 Oct 2024 20:49:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VTMoIA3K"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 478A610E992; Fri, 18 Oct 2024 20:49:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284587; x=1760820587; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hLDukfrIdwplob1FNU3PxeYoQ1fRvXtTrRyN2LMjxBY=; b=VTMoIA3Ka6tCaaR4bnFZ2S9xeb3Re6dsZY/Z7Whx8H+Wj9cxI9e0n84F HklnKz71xoU99CfVVmmtB/GqB3Ja32+zTQZcgRruZRIpE3rppwTJ6TZjx MLrdt9RRW9D0+hZ36P9doszjF0vmbOitpkkw0N+bU9tE6BdJQll9rT7hk lcmtwunoqHLCxuAUCLsk0iAeTUJztieiWZKhZ4/qybXAY/i8W9FTed+cX uc5dqs1AQ1Pe/nam5YSzj8YjxriTF2C8l30slipt6lgDIUHKAVE9NqGBU Z3lAxnRDNwMUr5GQRi7SGQBg3oJv6wZJwGzWrP7cpmiXZYi89sb4qQ9n4 A==; X-CSE-ConnectionGUID: fB4bHO2ZQjSbCOUXy7ZXvQ== X-CSE-MsgGUID: 8TMwdOmDRTO8GVOyodlNZw== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240175" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240175" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:47 -0700 X-CSE-ConnectionGUID: qPvF9dT3SLmmpjJj205n9g== X-CSE-MsgGUID: 7PeE4tLlSQOLu+EhhQeVsQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798929" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:47 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Dnyaneshwar Bhadane , Matt Atwood Subject: [PATCH 02/12] drm/i915/ptl: Define IS_PANTHERLAKE macro Date: Fri, 18 Oct 2024 13:49:31 -0700 Message-ID: <20241018204941.73473-3-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Dnyaneshwar Bhadane Common display code requires IS_PANTHERLAKE macro. Define the macro and set 0 as PTL is no longer support for i915. Signed-off-by: Dnyaneshwar Bhadane Signed-off-by: Matt Atwood Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/i915_drv.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a66e5bb078cf..ca1ab5931e28 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -538,6 +538,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, */ #define IS_LUNARLAKE(i915) (0 && i915) #define IS_BATTLEMAGE(i915) (0 && i915) +#define IS_PANTHERLAKE(i915) (0 && i915) #define IS_ARROWLAKE(i915) \ IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL) From patchwork Fri Oct 18 20:49:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5278ED3F2A0 for ; Fri, 18 Oct 2024 20:49:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D34E510E996; Fri, 18 Oct 2024 20:49:49 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="UjL9V86i"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id EF3CE10E994; Fri, 18 Oct 2024 20:49:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284588; x=1760820588; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IOo7BYoDy99k4tV8+KUOjtIzDdeOCaKkEgwHRriKFaQ=; b=UjL9V86iTcsB9BVwQX/X+QwgglpvIBg1ZJyBOqS/DjNhB43cNkUiAuTP 3lTWuXJmr7JfViyFLSlWE7i8DbRFQg2TFpOic25wgI5kDjXmoLA4tqAWX QO6P0mcMzJFdigo4+LbuW74CkrHXeH72m9aTEI8T9wiix16J7BWNPEYWJ npBmy3uzHRYpwqYsK5ea6ttGhwujuitw/1HRakHoQauYhIuR1vQ4zsGmL /nMgjIQYUZkH7R71kP+LfreAf59V+l0PXtV0siar3SroqT7DQajIgawoF z50pHP3bWbQvd34qloisWr1kDV2JE4aSvH58UQ4hyujrqtqrBD9ULGzbx w==; X-CSE-ConnectionGUID: GHAWGQMpS+2jIKk8LwNk1Q== X-CSE-MsgGUID: RO/nWq8TTZW6ByF5SHjgIQ== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240180" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240180" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:47 -0700 X-CSE-ConnectionGUID: YrkYfjt6Tlq9MV6zEl8T6w== X-CSE-MsgGUID: BAFwtNvnRZW29LR+326xeQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798932" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:47 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Dnyaneshwar Bhadane , Matt Atwood Subject: [PATCH 03/12] drm/i915/cx0: Extend C10 check to PTL Date: Fri, 18 Oct 2024 13:49:32 -0700 Message-ID: <20241018204941.73473-4-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Dnyaneshwar Bhadane When deciding the type of the phy, Add PTL support to make sure the correct path is taken for selection of C10 PHY. Only port A is connected C10 PHY for Pantherlake. Bspec: 72571 Signed-off-by: Dnyaneshwar Bhadane Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 9 +++++++-- drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 1 + 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 13a99f494680..73a151c81706 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -34,6 +34,9 @@ bool intel_encoder_is_c10phy(struct intel_encoder *encoder) struct drm_i915_private *i915 = to_i915(encoder->base.dev); enum phy phy = intel_encoder_to_phy(encoder); + if (IS_PANTHERLAKE(i915) && phy == PHY_A) + return true; + if ((IS_LUNARLAKE(i915) || IS_METEORLAKE(i915)) && phy < PHY_C) return true; @@ -221,7 +224,8 @@ static int __intel_cx0_read_once(struct intel_encoder *encoder, * down and let the message bus to end up * in a known state */ - intel_cx0_bus_reset(encoder, lane); + if (DISPLAY_VER(i915) < 30) + intel_cx0_bus_reset(encoder, lane); return REG_FIELD_GET(XELPDP_PORT_P2M_DATA_MASK, val); } @@ -310,7 +314,8 @@ static int __intel_cx0_write_once(struct intel_encoder *encoder, * down and let the message bus to end up * in a known state */ - intel_cx0_bus_reset(encoder, lane); + if (DISPLAY_VER(i915) < 30) + intel_cx0_bus_reset(encoder, lane); return 0; } diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h index b7041b578e5e..bd8c3de57dcd 100644 --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h @@ -67,6 +67,7 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev) #define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_METEORLAKE) #define IS_LUNARLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_LUNARLAKE) #define IS_BATTLEMAGE(dev_priv) IS_PLATFORM(dev_priv, XE_BATTLEMAGE) +#define IS_PANTHERLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_PANTHERLAKE) #define IS_HASWELL_ULT(dev_priv) (dev_priv && 0) #define IS_BROADWELL_ULT(dev_priv) (dev_priv && 0) From patchwork Fri Oct 18 20:49:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1CC9D3F2A0 for ; Fri, 18 Oct 2024 20:49:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E2A310E999; Fri, 18 Oct 2024 20:49:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hJkOuZUn"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5A79710E997; Fri, 18 Oct 2024 20:49:50 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="109798940" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:48 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Dnyaneshwar Bhadane , Matt Atwood Subject: [PATCH 04/12] drm/i915/ptl: Move async flip bit to PLANE_SURF register Date: Fri, 18 Oct 2024 13:49:33 -0700 Message-ID: <20241018204941.73473-5-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Dnyaneshwar Bhadane The async flip moved from PLANE_CTL to PLANE_SURF for PTL. Bspec: 69853,69878 Signed-off-by: Dnyaneshwar Bhadane Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 +++++++++---- .../gpu/drm/i915/display/skl_universal_plane_regs.h | 1 + 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index a0a7ed01415a..da974f4a25bd 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1567,17 +1567,22 @@ skl_plane_async_flip(struct intel_dsb *dsb, struct intel_display *display = to_intel_display(plane->base.dev); enum plane_id plane_id = plane->id; enum pipe pipe = plane->pipe; - u32 plane_ctl = plane_state->ctl; + u32 plane_ctl = plane_state->ctl, plane_surf; plane_ctl |= skl_plane_ctl_crtc(crtc_state); + plane_surf = skl_plane_surf(plane_state, 0); - if (async_flip) - plane_ctl |= PLANE_CTL_ASYNC_FLIP; + if (async_flip){ + if (DISPLAY_VER(display) >= 30) + plane_surf |= PLANE_SURF_ASYNC_UPDATE; + else + plane_ctl |= PLANE_CTL_ASYNC_FLIP; + } intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), plane_ctl); intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), - skl_plane_surf(plane_state, 0)); + plane_surf); } static bool intel_format_is_p01x(u32 format) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h index 4ddcd7d46bbd..ff31a00d511e 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h @@ -159,6 +159,7 @@ _PLANE_SURF_2_A, _PLANE_SURF_2_B) #define PLANE_SURF_ADDR_MASK REG_GENMASK(31, 12) #define PLANE_SURF_DECRYPT REG_BIT(2) +#define PLANE_SURF_ASYNC_UPDATE REG_BIT(0) #define _PLANE_KEYMAX_1_A 0x701a0 #define _PLANE_KEYMAX_2_A 0x702a0 From patchwork Fri Oct 18 20:49:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FA95D3F29F for ; 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X-CSE-ConnectionGUID: NZcV2C/BRRalYjEQv/hMFw== X-CSE-MsgGUID: Kd3ri3Z4Trqvfj8I7XwqWw== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240187" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240187" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:50 -0700 X-CSE-ConnectionGUID: o9lj2TW1Q+yhQpgugzSGag== X-CSE-MsgGUID: OzZhq2aHTK+MyC8ItRPLDg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798946" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:48 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Ravi Kumar Vodapalli , Matt Atwood Subject: [PATCH 05/12] drm/i915/xe3: Underrun recovery does not exist post Xe2 Date: Fri, 18 Oct 2024 13:49:34 -0700 Message-ID: <20241018204941.73473-6-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ravi Kumar Vodapalli From platforms xe3 Underrun recovery does not exist BSpec: 68849 Signed-off-by: Ravi Kumar Vodapalli Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 01466611eebe..dad415650b40 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -861,7 +861,7 @@ static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) */ if (IS_DG2(dev_priv)) tmp &= ~UNDERRUN_RECOVERY_ENABLE_DG2; - else if (DISPLAY_VER(dev_priv) >= 13) + else if (IS_DISPLAY_VER(dev_priv, IP_VER(13, 0), IP_VER(20, 0))) tmp |= UNDERRUN_RECOVERY_DISABLE_ADLP; /* Wa_14010547955:dg2 */ From patchwork Fri Oct 18 20:49:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842400 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4BD39D3F2A6 for ; Fri, 18 Oct 2024 20:49:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F047710E9A6; Fri, 18 Oct 2024 20:49:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (2048-bit key; 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a="54240191" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240191" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:54 -0700 X-CSE-ConnectionGUID: u9UqMPeuTjGEHKLsvo6crQ== X-CSE-MsgGUID: dx2N6h1ZSZm8UsGVqmvBqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798956" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:51 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: "Heikkila, Juha-pekka" , Heikkila@freedesktop.org, Matt Atwood Subject: [PATCH 06/12] drm/i915/display/xe3: disable x-tiled framebuffers Date: Fri, 18 Oct 2024 13:49:35 -0700 Message-ID: <20241018204941.73473-7-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: "Heikkila, Juha-pekka" Xe3 has no more support for x-tile on display. Signed-off-by: Heikkila, Juha-pekka Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index a7b4cf8b6d50..2075541bcdf4 100644 --- a/drivers/gpu/drm/i915/display/intel_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fb.c @@ -349,7 +349,7 @@ static const struct intel_modifier_desc intel_modifiers[] = { .plane_caps = INTEL_PLANE_CAP_TILING_Y, }, { .modifier = I915_FORMAT_MOD_X_TILED, - .display_ver = DISPLAY_VER_ALL, + .display_ver = { 0, 20 }, .plane_caps = INTEL_PLANE_CAP_TILING_X, }, { .modifier = DRM_FORMAT_MOD_LINEAR, From patchwork Fri Oct 18 20:49:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45B1BD3F2AC for ; Fri, 18 Oct 2024 20:49:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 76C7010E9AB; Fri, 18 Oct 2024 20:49:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="PQEEDTSx"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 87E0010E9A0; Fri, 18 Oct 2024 20:49:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284594; x=1760820594; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rjp8/tR3gqm4GS5X/ajslw5SDaQIA9QpQg3HsQOXC/w=; b=PQEEDTSx+W6DIsj36ep8ifmU/KOPES+bKPlUyCZO6FdgdJ8U3PCvlMC/ +OST+dh3P4nhSC/HTBh7yufHIJqFMxDIjNP7c7DdubPFUa1/PSeF1d0m7 QFzY14YLP4fk7ofyuVCqwXF1+96s1QQ/JsuCTbtTYP605q6gAWbV6KK+g lvGcN7U5QQDJoakot1s6NNbLXjyn4LOwKPtEo3eJa9za/Rac7W+4Jrur7 9tkgqd2x09Pqtl+SldFDrP6mVPwTnfYl1SHHSGezGyW6H6Qdh0eF9kh4U cgxe9XjAB/k9JEuea36u1suwMb66AHy8E8+MgzsACKA9aI9QutbAeAviB Q==; X-CSE-ConnectionGUID: 19vJ+cvuTc+sHJTeZXCc9g== X-CSE-MsgGUID: JGDCnyosR2aGK+8+I4qmKw== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240192" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240192" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:54 -0700 X-CSE-ConnectionGUID: HElyHhZ/QsGkOQW3kwP1/w== X-CSE-MsgGUID: sz58Dz4rTISXm9vK5B9sFQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798961" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:52 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Ravi Kumar Vodapalli , Matt Atwood Subject: [PATCH 07/12] drm/i915/xe3lpd: Skip disabling VRR during modeset disable Date: Fri, 18 Oct 2024 13:49:36 -0700 Message-ID: <20241018204941.73473-8-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ravi Kumar Vodapalli Spec does not request to disable VRR in the modeset disabling sequence for DP and HDMI for xe3_lpd. Bspec: 68848 Signed-off-by: Ravi Kumar Vodapalli Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_display.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index dad415650b40..90669c7f988b 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1310,9 +1310,11 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; - if (intel_crtc_vrr_disabling(state, crtc)) { - intel_vrr_disable(old_crtc_state); - intel_crtc_update_active_timings(old_crtc_state, false); + if (DISPLAY_VER(dev_priv) < 30) { + if (intel_crtc_vrr_disabling(state, crtc)) { + intel_vrr_disable(old_crtc_state); + intel_crtc_update_active_timings(old_crtc_state, false); + } } if (audio_disabling(old_crtc_state, new_crtc_state)) From patchwork Fri Oct 18 20:49:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842397 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4157DD3F2AA for ; Fri, 18 Oct 2024 20:49:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CF18F10E9A5; Fri, 18 Oct 2024 20:49:56 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="NkHVxGku"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id DCD2F10E9A5; Fri, 18 Oct 2024 20:49:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284595; x=1760820595; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Gy+C1wNvqHASzpX8yMLZ8MQ9yXlIHHkmL2QulC9QGio=; b=NkHVxGkuPRCJM+cTVxqw/o5EdpjmL0RGb0YQWzRIaZsHaYsljx9RqRKq YaM/V/Qo1QqV8E35GOIaXDbSP3mQoe+DHIhA3cTzH+Oqnq+FE3lR6hhtb j7365JiM4Kq2zUv793uUwwdYNcOT/FtpDpsRxZRoCmsOj7ivhd1SLJVNU beky+bTl4Th/p1xodgGIYcH14Oxml4bGIzIgpfrNz+6OxHPwxaANriUlv VWYDdofDw7fbMKNyFEto8r8Mt9rn8AMMyBrFAHei0tKIX0myJuXwah0YK av42ibLwcv11EHI6Xtk8H4ptnkKJvBjANy+RhXHSPWz/uzBkI3p8GRWfX A==; X-CSE-ConnectionGUID: ctWGloCqRIGUIt/SvLcMNw== X-CSE-MsgGUID: r/Ahrr7KRkCGDqYdZVCFRA== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240193" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240193" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:54 -0700 X-CSE-ConnectionGUID: rpktiwRaTpGr4auWHvANzQ== X-CSE-MsgGUID: QFuMsO14TTGRTYVaSyhaZg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798966" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:53 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Suraj Kandpal , Arun R Murthy , Matt Atwood Subject: [PATCH 08/12] drm/i915/xe3lpd: Increase resolution for plane to support 6k Date: Fri, 18 Oct 2024 13:49:37 -0700 Message-ID: <20241018204941.73473-9-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Suraj Kandpal DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution. Increase pipe and plane max width and height to reflect this increase in resolution. Signed-off-by: Arun R Murthy Signed-off-by: Suraj Kandpal Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_display.c | 5 ++++- drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 ++++++++++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 90669c7f988b..72150f257969 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8452,7 +8452,10 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, * plane so let's not advertize modes that are * too big for that. */ - if (DISPLAY_VER(dev_priv) >= 11) { + if (DISPLAY_VER(dev_priv) >= 30) { + plane_width_max = 6144; + plane_height_max = 4096; + } else if (DISPLAY_VER(dev_priv) >= 11) { plane_width_max = 5120 * num_joined_pipes; plane_height_max = 4320; } else { diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index da974f4a25bd..bd7786a6161a 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -431,6 +431,13 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb, } } +static int xe3_plane_max_width(const struct drm_framebuffer *fb, + int color_plane, + unsigned int rotation) +{ + return 6144; +} + static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) @@ -2589,7 +2596,11 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane); - if (DISPLAY_VER(dev_priv) >= 11) { + if (DISPLAY_VER(dev_priv) >= 30) { + plane->max_width = xe3_plane_max_width; + plane->max_height = icl_plane_max_height; + plane->min_cdclk = icl_plane_min_cdclk; + }else if (DISPLAY_VER(dev_priv) >= 11) { plane->min_width = icl_plane_min_width; if (icl_is_hdr_plane(dev_priv, plane_id)) plane->max_width = icl_hdr_plane_max_width; From patchwork Fri Oct 18 20:49:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9C4ED3F2AB for ; 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X-CSE-ConnectionGUID: BcZSQRqVQ1CpXJeGboG11w== X-CSE-MsgGUID: 1RII0b9oQA+pfXgWlJ2zwQ== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240194" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240194" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:54 -0700 X-CSE-ConnectionGUID: pKdUpqdzTISqEjPcH4t8mw== X-CSE-MsgGUID: vNQ5HktuQwCicpKWZ9t9mQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798969" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:53 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Suraj Kandpal , Matt Atwood Subject: [PATCH 09/12] drm/i915/xe3lpd: Increase max_h max_v for PSR Date: Fri, 18 Oct 2024 13:49:38 -0700 Message-ID: <20241018204941.73473-10-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Suraj Kandpal Spec states that PSR max active is same as max pipe active values. Now that each pipe supports 6k resolution increasing max_h and max_v for PSR too. Signed-off-by: Suraj Kandpal Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_psr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 3b20325b3f6a..16dbc8caef5f 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1451,7 +1451,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } - if (DISPLAY_VER(display) >= 12) { + if (DISPLAY_VER(display) >= 30) { + psr_max_h = 6144; + psr_max_v = 4096; + max_bpp = 30; + } else if (DISPLAY_VER(display) >= 12) { psr_max_h = 5120; psr_max_v = 3200; max_bpp = 30; From patchwork Fri Oct 18 20:49:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF024D3F2A0 for ; Fri, 18 Oct 2024 20:49:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4AD7710E9A8; Fri, 18 Oct 2024 20:49:58 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YEpy4oO3"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 22A2810E9AC; Fri, 18 Oct 2024 20:49:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284595; x=1760820595; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BWjSRRwMvtz851UbvKh5g4kBb5j9EaZ03BLUR8hbJyc=; b=YEpy4oO3rE7HcH3QvabUX8LDfCvwNC5BQQ+DzwbChAf9xISCZ5r2cjlm DuNEkkeM4owj/j+LTVYBfv0ZT2dYm9fziFUKgW6vNma+MNPjj2lrbYCQt EAXtD6G/L5IB2WPCPqoAs9Z0RAeCyP/iWjK9HqE8i5YRwpLS4n5xZRTKG PUVcRO8lMIS2iEC9Etovkh3DFnSDFqJ0RPkBjNmn9RFSj8eTvB7J4VSP+ NXf2gmD+blxqbMjNUwnwr07eOiqblKixOHbRfJUTAXQJV64HV53cSqyET +eSFRjNv70wvTkAbL+Av7PKnU5BJENPphQSe1WYfg3ORB+Oe6opU0iSJF A==; X-CSE-ConnectionGUID: e9p9HChJSKKHwjybXX5wmQ== X-CSE-MsgGUID: cHNdMx2/Tpiry2iaVIv35g== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240195" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240195" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:54 -0700 X-CSE-ConnectionGUID: J3dU9nJrRnqP6edXn0kpYA== X-CSE-MsgGUID: 0ZdZzEHQSfejizu/RHW4+Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798973" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:54 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Suraj Kandpal , Matt Atwood Subject: [PATCH 10/12] drm/i915/xe3lpd: Increase bigjoiner limitations Date: Fri, 18 Oct 2024 13:49:39 -0700 Message-ID: <20241018204941.73473-11-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Suraj Kandpal With 6k resolution support for a single crtc being added bigjoiner will only come into picture when hdisplay > 6144 Signed-off-by: Suraj Kandpal Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index be21e2743801..0093bd43c712 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1314,14 +1314,16 @@ bool intel_dp_needs_joiner(struct intel_dp *intel_dp, int num_joined_pipes) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); + int hdisplay_limit; if (!intel_dp_has_joiner(intel_dp)) return false; + hdisplay_limit = DISPLAY_VER(i915) >= 30 ? 6144 : 5120; num_joined_pipes /= 2; return clock > num_joined_pipes * i915->display.cdclk.max_dotclk_freq || - hdisplay > num_joined_pipes * 5120; + hdisplay > num_joined_pipes * hdisplay_limit; } int intel_dp_num_joined_pipes(struct intel_dp *intel_dp, From patchwork Fri Oct 18 20:49:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842398 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4B29D3F29B for ; Fri, 18 Oct 2024 20:49:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7C25210E9AD; Fri, 18 Oct 2024 20:49:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ACt0nmfc"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 550ED10E9A5; Fri, 18 Oct 2024 20:49:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729284596; x=1760820596; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=By1y0aYf3DfUCMTSGonjJbsred8WCBgRRffm0D8ZsOM=; b=ACt0nmfcTPuKZSjM54/75f0R0ECQAXzW+6Bmdl9tCFj/uRJAvbeJau8P shyVI/XGLZwokNrkeW0DUKluR/JOYUi5P8V0cMYPhVOCB38Yr28HABbA4 YkQ7DU7v2I+rwMtj8iUfa026Esdej/Wo179aZTV5RLj9vSwPiwNNQ4YYj 6OAa8XNS42hrosrNDx9zmMIKoh2M6vsohJUey30+y3h9J3JvjYGseanUR eI50iprNFMN+TgoRLYMn5yw8cYne+I5+7Vm3XLYnwby1Pm4VxC6rZvd4w riH84V9G0k42Ok4/dCejASQkE/TrVhCFqfYJ0xOVVNoVwBcaH6Sdwgjm/ Q==; X-CSE-ConnectionGUID: jps95rQ/SUGGmSIBlCK3MA== X-CSE-MsgGUID: TUc1hZ35Q62UoPAtbnftUw== X-IronPort-AV: E=McAfee;i="6700,10204,11229"; a="54240196" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240196" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:56 -0700 X-CSE-ConnectionGUID: sN8+2VIZQm688gmafmUX5w== X-CSE-MsgGUID: wun/3ifqRBKvVSU0GO6huQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798982" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:55 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Suraj Kandpal , Matt Atwood Subject: [PATCH 11/12] drm/i915/xe3lpd: Prune modes for YUV420 Date: Fri, 18 Oct 2024 13:49:40 -0700 Message-ID: <20241018204941.73473-12-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Suraj Kandpal We only support resolution upto 4k for single pipe when using YUV420 format so we prune these modes and restrict the plane size at src. Signed-off-by: Suraj Kandpal Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++-- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 ++++- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0093bd43c712..2a1a86606301 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1373,6 +1373,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, { struct intel_connector *connector = to_intel_connector(_connector); struct intel_dp *intel_dp = intel_attached_dp(connector); + enum intel_output_format sink_format; struct drm_i915_private *dev_priv = to_i915(connector->base.dev); const struct drm_display_mode *fixed_mode; int target_clock = mode->clock; @@ -1407,6 +1408,13 @@ intel_dp_mode_valid(struct drm_connector *_connector, mode->hdisplay, target_clock); max_dotclk *= num_joined_pipes; + sink_format = intel_dp_sink_format(connector, mode); + if (num_joined_pipes == 1) { + if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 && + mode->hdisplay > 4096) + return MODE_NO_420; + } + if (target_clock > max_dotclk) return MODE_CLOCK_HIGH; @@ -1422,10 +1430,9 @@ intel_dp_mode_valid(struct drm_connector *_connector, intel_dp_mode_min_output_bpp(connector, mode)); if (intel_dp_has_dsc(connector)) { - enum intel_output_format sink_format, output_format; + enum intel_output_format output_format; int pipe_bpp; - sink_format = intel_dp_sink_format(connector, mode); output_format = intel_dp_output_format(connector, sink_format); /* * TBD pass the connector BPC, diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index bd7786a6161a..99548a357dfe 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -435,7 +435,10 @@ static int xe3_plane_max_width(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) { - return 6144; + if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) + return 4096; + else + return 6144; } static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb, From patchwork Fri Oct 18 20:49:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Atwood X-Patchwork-Id: 13842401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94B32D3F2AA for ; Fri, 18 Oct 2024 20:50:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1CFFA10E9AF; Fri, 18 Oct 2024 20:50:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="54240197" X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="54240197" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:56 -0700 X-CSE-ConnectionGUID: FaC3G6XrQImTNwTE8KkL9g== X-CSE-MsgGUID: R+E8JUSESd2McGzPTQcKfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,214,1725346800"; d="scan'208";a="109798985" Received: from msatwood-mobl.jf.intel.com ([10.24.12.145]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2024 13:49:57 -0700 From: Matt Atwood To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Mika Kahola , Matt Atwood Subject: [PATCH 12/12] drm/i915/xe3lpd: Power request asserting/deasserting Date: Fri, 18 Oct 2024 13:49:41 -0700 Message-ID: <20241018204941.73473-13-matthew.s.atwood@intel.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com> References: <20241018204941.73473-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Mika Kahola There is a HW issue that arises when there are race conditions between TCSS entering/exiting TC7 or TC10 states while the driver is asserting/deasserting TCSS power request. As a workaround, Display driver will implement a mailbox sequence to ensure that the TCSS is in TC0 when TCSS power request is asserted/deasserted. The sequence is the following 1. Read mailbox command status and wait until run/busy bit is clear 2. Write mailbox data value '1' for power request asserting and '0' for power request deasserting 3. Write mailbox command run/busy bit and command value with 0x1 4. Read mailbox command and wait until run/busy bit is clear before continuing power request. Signed-off-by: Mika Kahola Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/display/intel_tc.c | 40 +++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 7 +++++ 2 files changed, 47 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 6f2ee7dbc43b..7d9f87db381c 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -1013,6 +1013,39 @@ xelpdp_tc_phy_wait_for_tcss_power(struct intel_tc_port *tc, bool enabled) return true; } +static bool xelpdp_tc_phy_wait_for_tcss_ready(struct drm_i915_private *i915, + bool enable) +{ + if (DISPLAY_VER(i915) < 30) + return true; + + /* check if mailbox is running busy */ + if (intel_de_wait_for_clear(i915, TCSS_DISP_MAILBOX_IN_CMD, + TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY, 10)) { + drm_dbg_kms(&i915->drm, + "timeout waiting for TCSS mailbox run/busy bit to clear\n"); + return false; + } + + if (enable) + intel_de_write(i915, TCSS_DISP_MAILBOX_IN_DATA, 1); + else + intel_de_write(i915, TCSS_DISP_MAILBOX_IN_DATA, 0); + + intel_de_write(i915, TCSS_DISP_MAILBOX_IN_CMD, + TCSS_DISP_MAILBOX_IN_CMD_DATA(1)); + + /* wait to clear mailbox running busy bit before continuing */ + if (intel_de_wait_for_clear(i915, TCSS_DISP_MAILBOX_IN_CMD, + TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY, 10)) { + drm_dbg_kms(&i915->drm, + "timeout waiting for TCSS mailbox run/busy bit to clear\n"); + return false; + } + + return true; +} + static void __xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool enable) { struct drm_i915_private *i915 = tc_to_i915(tc); @@ -1022,6 +1055,13 @@ static void __xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool ena assert_tc_cold_blocked(tc); + /* + * Gfx driver workaround for PTL tcss_rxdetect_clkswb_req/ack handshake + * violation when pwwreq= 0->1 during TC7/10 entry + */ + drm_WARN_ON(&i915->drm, + !xelpdp_tc_phy_wait_for_tcss_ready(i915, enable)); + val = intel_de_read(i915, reg); if (enable) val |= XELPDP_TCSS_POWER_REQUEST; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2743a2dd0a3d..d2775a32bf18 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4539,6 +4539,13 @@ enum skl_power_gate { #define TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT REG_BIT(1) #define TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT REG_BIT(0) +#define TCSS_DISP_MAILBOX_IN_CMD _MMIO(0x161300) +#define TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY REG_BIT(31) +#define TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK REG_GENMASK(7, 0) +#define TCSS_DISP_MAILBOX_IN_CMD_DATA(x) TCSS_DISP_MAILBOX_IN_CMD_RUN_BUSY | \ + REG_FIELD_PREP(TCSS_DISP_MAILBOX_IN_CMD_CMD_MASK, (x)) +#define TCSS_DISP_MAILBOX_IN_DATA _MMIO(0x161304) + #define PRIMARY_SPI_TRIGGER _MMIO(0x102040) #define PRIMARY_SPI_ADDRESS _MMIO(0x102080) #define PRIMARY_SPI_REGIONID _MMIO(0x102084)