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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Dragos Tatulea , Tariq Toukan Subject: [PATCH net-next 1/2] net/mlx5e: Update features on MTU change Date: Thu, 24 Oct 2024 19:41:32 +0300 Message-ID: <20241024164134.299646-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241024164134.299646-1-tariqt@nvidia.com> References: <20241024164134.299646-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C6:EE_|PH7PR12MB6588:EE_ X-MS-Office365-Filtering-Correlation-Id: 8e307e3e-6646-46f4-e8ff-08dcf44ad287 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: FDi0eCJzg/eK5nCuvf/RD7pD0vRUtf8/yx7MJ7bdOxuhQUrZ2z24xLqwLXtOup5Ulntd010pgxJHdf2IqLBjjQr6VHcNxJDPm9JkGGsUX/6q2MOe6YJacDvdqk1P4L1NoOj3x1j4ZaShU6WoKdpWWeqnhcIyxFt7aSyTIJr4jJx2dnfo+p19vfOsDANvmHqmE6rgkmBKZJBF+LK6slCJs5IC48CK5+TmLm5rYKZshPq3pQV2d3bqvLfqRR0IsmaRxzTv5UH3CVvQZZi1IvpHiSvHrF36gmqYTQwmLwNB2CtVBKq94AOVp7w/l7vh6kr6XG0cXFLZyQAKXsAnRS/i6wz3wZPh4K4PzKlEfa/ll1iYBhEslKVgTTWc1wHFcyszxlbsQel0ts70W+UH+5aGL1AKNXphmmTbU1zSkGejDJdAfC8dXCXteP46h06qBOqq0QkrkEscwYj1J+xYmfLWmt/LwA3m00LoBVUkg9vavMFirtvKuyZ3ovgCBI+poLfMn5LvTr8+wRVwl6oDHxmnANAu+ddAKr2UBm/UJhDDunepUnt6XnJw97DnAdk3p1NdEwACm6DIWmKxBkvuS0XAF8n0AMx6X9J514YQ11kcFrTCplzVyQNE/xlKAHl8OWZn6xYJD3t0M2/YEgEdWDuNl+lKyCEztJBiWhc3K0fapM3ZY/INm9tbUgkYS3eZ5nJQ2EWT+lxmEyI0gzN/d2/z+OOa+xJAezKDmhpL3FoJi+gVps8jlbg6eWgteB7+gRAdQX+OWGkakjYvthiLgubzNu2YxdipN62nnw/5rgevTBKgXuufH48KLpQlB0xbZQYApCZ9g3s/LxNIvxeP3U41QQ1f4AGI3UlMNoQ80A6v8f6GbnzPOPZm00+LHK34qAbjo3UxKyQ0+MH2CNxx5WllqiBDgZn/gwa9sn5R++6YuQDiZxXcmvECfgc8Au5w01b1q4iqTtSUMrTULAKuumd3k0v0tg+t2MwPnpNV8yIcYkMswgacK8O3pHT0zC8wBV/oZsTSBEJLPy9mG98O/MP4yYZHfWxp73yiY0/afbjGQAA2MxOXnm7DKeOdhiz1jE2ViXDBly66L8soiIhJY1PqjqYgQx0wxzDWogDJFZ39A2wVkOBfA+RH2YfV9zy0LfbCHgh1nEOhTClO86f1386oaRd56u9fmGdTS/+h/krxztcv7VEIN3gA42Up5XsSi0UHD+EJ+zuOrtD3vin4cLXtXP7f5AAO4TU/ITIanCZJgR2bmMkDtIJW2uEOXDDDJZHSYBUKAlWfPSfnJ6aWWSXsH8CnqxwSuGD3fwzvqmUZgEyHFP26h5k+JsYZHv77pydI9LtavsLSQ68Uory08qNKl7m12qDIhENBFQeWmw12d3jB6blEqByiyFsz1Qp7//c9UsMxMbp8hLRAsPLw422w7w== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 16:42:17.5709 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8e307e3e-6646-46f4-e8ff-08dcf44ad287 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6588 X-Patchwork-Delegate: kuba@kernel.org From: Dragos Tatulea When the MTU changes successfully, trigger netdev_update_features() to enable features in wanted state if applicable. An example of such scenario: $ ip link set dev eth1 up $ ethtool --set-ring eth1 rx 8192 $ ip link set dev eth1 mtu 9000 $ ethtool --features eth1 rx-gro-hw on --> fails $ ip link set dev eth1 mtu 7000 With this patch, HW GRO will be turned on automatically because it is set in the device's wanted_features. Signed-off-by: Dragos Tatulea Reviewed-by: Gal Pressman Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman --- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index ce94859014f8..235d00300626 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -4557,6 +4557,10 @@ int mlx5e_change_mtu(struct net_device *netdev, int new_mtu, out: WRITE_ONCE(netdev->mtu, params->sw_mtu); mutex_unlock(&priv->state_lock); + + if (!err) + netdev_update_features(netdev); + return err; } From patchwork Thu Oct 24 16:41:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13849399 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2043.outbound.protection.outlook.com [40.107.236.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D84916F910 for ; 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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Dragos Tatulea , Tariq Toukan Subject: [PATCH net-next 2/2] net/mlx5e: Update features on ring size change Date: Thu, 24 Oct 2024 19:41:33 +0300 Message-ID: <20241024164134.299646-3-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241024164134.299646-1-tariqt@nvidia.com> References: <20241024164134.299646-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044AB:EE_|DS7PR12MB6263:EE_ X-MS-Office365-Filtering-Correlation-Id: 1aa318aa-d504-4d69-a7f3-08dcf44ad669 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026; X-Microsoft-Antispam-Message-Info: EX+v+bu8drOdGAAjIppo6DuAMqx7owpdj/stZmgFUDrQjuVI2u2Xj3+PWTbpD78bBN172HUc+PmVu2oFadDvG6AseepzxJNBdec+4G1d2ADuUkpzHEAxFo/GOHfBjwTsvb9ycRR+P5U9yXTzVAAbf+0/Jirp7ouQCFzCjCH7J4znhSnXHBztuK/xAVfdWTG2hTPolRfxQ8CJUY9ZBvHLe8NCTo0q3lJ4n/u6XTWhqNOUIEKcfbDimnmN+DU6lsP150Au30FmKY0RB3kv/4vT+51HBxP77TuvjXtO0gyws8HIPqQDCnCXNzp9tpXrQ8cFr9cGkZ9S3+bVDGdyUt3qEXtdxV7x7T0J1xMXVhL2dDXe0gVn4H5UFG9c7Np5JPCOXUq78XalrWpTYfNBiM3PQavdav2xJfQJ+8CGbmIo2e8ZeR/DYj3jcatTuaT+k0jyLs7qwFZsogjvZir/vjE3qrH55IV9VNJGk6oFEGBLuTpM0tzp3ZgvElH7+P7ye5Wx4FwsXL0+DzXnoJq7Uq3ZIR+N4Nj2hq8vqWnMEQBgfotRg6uGLVakrcETTgdSUwdoCx736UE7/oq1TwnN2rtSJXFvqY9uSvXgiIbSK8wcyFWr8RV9u8CJr/XvclwNUiqb5Bbram3sOVGtp2c3vkNXdm26hOYbWM+n+DX5fDGOktRofdC5+OVrFUBRuviN+NQz1hZdM9DtfGKMdl1ZsT500XVbtHasu09ifc4+qZ69T/9Y1ZQp0xp2Wt8dYqyldcKRnMrtCGL/QsJfHFoPxonn9G46K40YbNeMc5BuYtuiPMuQZ5x4otlHUQcGaTu0JIIuM1U8PZKlXrTwbH4JbFpRULxk0iMLUaGSuGLNkNxQc6ZjnO0WiWb6VmkB3GpmFRo+ceI0ccPlfWSI0Dy983yLKDaOMx3hFnaO8/ySwmAMvXho1s1GcxjkW1m/hjKfu5fr/xVVxDgTK1GS+b3ioPz/ux3L2cIfO+DFpHoHvEOHpuKwN2XUjwuzhQrZUL0eQByLf59Cb2L+I0+4FeAySZHhTkOcEKKvFjzfeSCRTZanMdlALmXIKCb+F+etR3p4KZs7dKivors+5ZBZoizMhdgKOE/WGlkW1E0H2ovH/lqiN2TWUFcLbRSEzNin9wAdu83sq/Yzb4qdy+Lvjnd3V0XWjmL7dZo9sHHSAPL3GKiPhLTtfIhFpvjqiVk0ulhXj4iorumOzzdkS3uSYZa4f/b7abvUBsbTZ4GrDT7j0xEaMPH/+mNrUBO+7p53viT09TxAigfRIsbptVMjIjmkjQhKB8mROGa2KRPw6gzEod5qkrlcn34i76A+SHDl7b9vonVveB55FwTYqDW/B92tbx+glVqaekkKcAI2ZnyEvtG+ReA1bePPC0EGlFSMWl77g4Ylmdk8EwwHWC3ZkcMnDTghMQ== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 16:42:23.9898 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1aa318aa-d504-4d69-a7f3-08dcf44ad669 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6263 X-Patchwork-Delegate: kuba@kernel.org From: Dragos Tatulea When the ring size changes successfully, trigger netdev_update_features() to enable features in wanted state if applicable. An example of such scenario: $ ip link set dev eth1 up $ ethtool --set-ring eth1 rx 8192 $ ip link set dev eth1 mtu 9000 $ ethtool --features eth1 rx-gro-hw on --> fails $ ethtool --set-ring eth1 rx 1024 With this patch, HW GRO will be turned on automatically because it is set in the device's wanted_features. Signed-off-by: Dragos Tatulea Reviewed-by: Gal Pressman Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman --- drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c index 1966736f98b4..cae39198b4db 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c @@ -406,6 +406,9 @@ int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv, unlock: mutex_unlock(&priv->state_lock); + if (!err) + netdev_update_features(priv->netdev); + return err; }