From patchwork Tue Oct 29 15:18:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6405DD3A661 for ; Tue, 29 Oct 2024 15:20:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0c-0006uk-CR; Tue, 29 Oct 2024 11:19:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5nzx-0005X3-Mh for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:10 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5nzw-0000Oq-B8 for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215147; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hmjj7j2upwlaHs7IvJz1blz9Nv2Vqs0ImMRiMwgLbLk=; b=XaX7+VewELo8SSAALzPIanxZ9005rxESw1HnT1aMwVfgVFT/xaWFKjrIZbrkOxJgrsyUBs LGBGFbD2dX3L6q0HTAMUO6/qu38n+UuDVNi6AtgVPv3QbaOh4oOiGv+6UmqN+LJz65SIRj VyGpkdqHjZka9ho/kc241eQwHPKbz20= Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-408-WB-qGcTgOSq_GqW3ASEyoA-1; Tue, 29 Oct 2024 11:19:06 -0400 X-MC-Unique: WB-qGcTgOSq_GqW3ASEyoA-1 Received: by mail-wm1-f70.google.com with SMTP id 5b1f17b1804b1-43157e3521dso37172115e9.1 for ; Tue, 29 Oct 2024 08:19:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215143; x=1730819943; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hmjj7j2upwlaHs7IvJz1blz9Nv2Vqs0ImMRiMwgLbLk=; b=r95BQQyCXLPOlraSP5MVSpk6JIeGun8FTWQxGRsGU3/cBhhn2RANTjivZgUcJJPzyj scMBVz1hKqOmQZLaImpaSHgzNpk9iitrT/OtUBLlS8IFQgWzB5GALd7s/aYLkUl/ZUuc tohTcHv7qJ2L1r/omXfyInlmSU575gMT+anZyktPnPzIwpWJwyfjRVVYqUyzDEJywP9E 2+GcFR9gloInLmXsPU2H5vkb51YvLjlFahU17h0f88etyjo6+pZDjBpUVCfE2cuZMoRn uTpBdPPYnF5TtlsMa9Bc6ump0fa0cLRc4C6PsQNTHQaUuT/l0WwRt14u8W5rr5XMENDy t8ng== X-Gm-Message-State: AOJu0YwIn9j/RFFGykD2Fa1cbXuCOqRrV0OJC3wZgdxApgWfCg3+DPDf HHluz/I3I6j5afYtl0OM56PKCjUATRCD52bVZfaOc09Ww27wIe7ykLrC+FH/2UaDewwQqKpSWLe /0rHDH+cmFXVOWeMqXIvT7PgsUeG/0mpoHhEkXMxR8SZydMVHNG/pdEFmrzM+QNTDb2gsVvqUUB DNJBRsemf0Xjsk4G8wGxG7YC7sSu5ozM07NBgrTl8= X-Received: by 2002:a05:600c:4e91:b0:431:54f3:11af with SMTP id 5b1f17b1804b1-4319ad2103emr95091545e9.31.1730215143084; Tue, 29 Oct 2024 08:19:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGW1QCg7TiuyBlyPBi6p8Zdn9CMlnu+h38IwmZrwi4KsriZB8mPnNJH7WBdwXd8ggdn996epQ== X-Received: by 2002:a05:600c:4e91:b0:431:54f3:11af with SMTP id 5b1f17b1804b1-4319ad2103emr95091325e9.31.1730215142685; Tue, 29 Oct 2024 08:19:02 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3c625sm12830442f8f.37.2024.10.29.08.19.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:00 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com Subject: [PATCH 1/8] target/i386: cpu: set correct supported XCR0 features for TCG Date: Tue, 29 Oct 2024 16:18:51 +0100 Message-ID: <20241029151858.550269-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- target/i386/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5886b44fcf7..f08e9b8f1bc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1318,7 +1318,9 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .needs_ecx = true, .ecx = 0, .reg = R_EAX, }, - .tcg_features = ~0U, + .tcg_features = XSTATE_FP_MASK | XSTATE_SSE_MASK | + XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK | + XSTATE_PKRU_MASK, .migratable_flags = XSTATE_FP_MASK | XSTATE_SSE_MASK | XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK | @@ -1331,7 +1333,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .needs_ecx = true, .ecx = 0, .reg = R_EDX, }, - .tcg_features = ~0U, + .tcg_features = 0U, }, /*Below are MSR exposed features*/ [FEAT_ARCH_CAPABILITIES] = { From patchwork Tue Oct 29 15:18:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9470CD3A661 for ; Tue, 29 Oct 2024 15:20:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0f-0007AO-Ur; Tue, 29 Oct 2024 11:19:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o03-0005i7-RR for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:21 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o01-0000QD-6L for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215151; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=amEgcXJo78hmVv3iLaeffdJ13havQoo81JneMSxeI2g=; b=M58uAfeP0z9mSs6ub+ZHGMh8GL7DqZ8Jxk/mmCZ9kMa7e9S/U2x4nbrp53vy1L0UagjU9L O798a4+s7CQXzLH3aCxU/RcMiLxoZY1Y7iQXkk7H6SpGeg1KbV2siBxR8z9WROx6egCqpU UeyjkFfNOFx/uolznPDp1Y1eqp+Kawc= Received: from mail-lj1-f198.google.com (mail-lj1-f198.google.com [209.85.208.198]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-487-hOjrdwQfPrujzYkpgL2VnQ-1; Tue, 29 Oct 2024 11:19:08 -0400 X-MC-Unique: hOjrdwQfPrujzYkpgL2VnQ-1 Received: by mail-lj1-f198.google.com with SMTP id 38308e7fff4ca-2fb4c08c02cso30770951fa.1 for ; Tue, 29 Oct 2024 08:19:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215145; x=1730819945; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=amEgcXJo78hmVv3iLaeffdJ13havQoo81JneMSxeI2g=; b=D/22erS67sHfDkvkdrePjk38gXv5qyayuirpXeFY+9rbFhQhRfxE3nerGmn2NrSKal S7OjTgjqSRlXyVfwtqmEG2WZWAgMvF827KoGiHY/Z13IsF3lbgWcW2+5VleN5TvrCQPn wWUcFKjgjgKDDpR5sHr0QdIQRpa1a1mBriWsXFq+H1MPHjvbKA2ILFO6yy4i2Phv+AK6 n0Z8TyfDFvT+Ds8qgnbRZQh1NmU9Q8MhRaT4nkVe9OAUVlB1I87Sq72PEs84+nX5j9Pq YkXmuoC4txzfXXC0VKz6BIkzS3z75K661po5euEwNt2kc+v8KSYU24YvjyVrrQEYgKjF t3xw== X-Gm-Message-State: AOJu0Ywc33nTwAinY80oCAg4FwFhM6dxctoxBC6hKT2sPr7Y+EEBYmyH 3TSG5DiMZySDZu61voFpbktKU2vwUlHqwPKSDgzL4L6P8v/uXvxpLorW6gRsl8HoCGspSsBPpol 4Aa7armw9Kvq8khQj7xsrBxAg0qNkdugYtdRF5MnscjGvaf/Nl3zkgtgbEXKzkuP1eUxUGA6r9q pEmERaicsqN27KhG5BwRE+u3C/6P5uCU4w4Ap7578= X-Received: by 2002:a05:6512:12d1:b0:539:fcba:cc6d with SMTP id 2adb3069b0e04-53b34a19019mr5150159e87.42.1730215145184; Tue, 29 Oct 2024 08:19:05 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH4saYzE0tgf9mYzcF9FdC3vqsQk/xuOLBYideCq6dfXxsx0z+qYlzuVvewOADuaXryxD8bbg== X-Received: by 2002:a05:6512:12d1:b0:539:fcba:cc6d with SMTP id 2adb3069b0e04-53b34a19019mr5150137e87.42.1730215144603; Tue, 29 Oct 2024 08:19:04 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b5707e8sm177909125e9.36.2024.10.29.08.19.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:03 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com Subject: [PATCH 2/8] target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits Date: Tue, 29 Oct 2024 16:18:52 +0100 Message-ID: <20241029151858.550269-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Right now, QEMU is using the "feature" and "bits" fields of ExtSaveArea to query the accelerator for the support status of extended save areas. This is a problem for AVX10, which attaches two feature bits (AVX512F and AVX10) to the same extended save states. To keep the AVX10 hacks to the minimum, limit usage of esa->features and esa->bits. Instead, just query the accelerator for the 0xD leaf. Do it in common code and clear esa->size if an extended save state is unsupported. Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- target/i386/cpu.c | 33 +++++++++++++++++++++++++++++++-- target/i386/kvm/kvm-cpu.c | 4 ---- 2 files changed, 31 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f08e9b8f1bc..1ee4d988caf 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7102,6 +7102,15 @@ static void x86_cpu_set_sgxlepubkeyhash(CPUX86State *env) #endif } +static bool cpuid_has_xsave_feature(CPUX86State *env, const ExtSaveArea *esa) +{ + if (!esa->size) { + return false; + } + + return (env->features[esa->feature] & esa->bits); +} + static void x86_cpu_reset_hold(Object *obj, ResetType type) { CPUState *cs = CPU(obj); @@ -7210,7 +7219,7 @@ static void x86_cpu_reset_hold(Object *obj, ResetType type) if (!((1 << i) & CPUID_XSTATE_XCR0_MASK)) { continue; } - if (env->features[esa->feature] & esa->bits) { + if (cpuid_has_xsave_feature(env, esa)) { xcr0 |= 1ull << i; } } @@ -7348,7 +7357,7 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu) mask = 0; for (i = 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) { const ExtSaveArea *esa = &x86_ext_save_areas[i]; - if (env->features[esa->feature] & esa->bits) { + if (cpuid_has_xsave_feature(env, esa)) { mask |= (1ULL << i); } } @@ -8020,6 +8029,26 @@ static void x86_cpu_register_feature_bit_props(X86CPUClass *xcc, static void x86_cpu_post_initfn(Object *obj) { + static bool first = true; + uint64_t supported_xcr0; + int i; + + if (first) { + first = false; + + supported_xcr0 = + ((uint64_t) x86_cpu_get_supported_feature_word(NULL, FEAT_XSAVE_XCR0_HI) << 32) | + x86_cpu_get_supported_feature_word(NULL, FEAT_XSAVE_XCR0_LO); + + for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) { + ExtSaveArea *esa = &x86_ext_save_areas[i]; + + if (!(supported_xcr0 & (1 << i))) { + esa->size = 0; + } + } + } + accel_cpu_instance_init(CPU(obj)); } diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 6bf8dcfc607..d9306418490 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -133,10 +133,6 @@ static void kvm_cpu_xsave_init(void) if (!esa->size) { continue; } - if ((x86_cpu_get_supported_feature_word(NULL, esa->feature) & esa->bits) - != esa->bits) { - continue; - } host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx); if (eax != 0) { assert(esa->size == eax); From patchwork Tue Oct 29 15:18:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1945DD3A66B for ; Tue, 29 Oct 2024 15:19:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0J-0006C7-FR; Tue, 29 Oct 2024 11:19:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o07-0005l7-A0 for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:21 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o02-0000QH-C5 for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215153; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zyYC6UOZKU94Wwrtdw6/pO2lxILLRipgiNrFy5tbKJc=; b=G8brQK35haXtwiTQP0Z7/i+EgZuyyTyZothYVibloH8cw5BibcvciSTbZXvHMNUMPQMUr2 DVNIyBWOlD6j4UnsVkP48TO8x7jD9J0/mwaoqVuwr6SnlT7McnhK7N3wEqi6CvliqYswfV mWu0ymLRJvDUAi0wPnkX8Ln785YA+yk= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-76-I-oK3qVbMfWbbVFm0155jw-1; Tue, 29 Oct 2024 11:19:10 -0400 X-MC-Unique: I-oK3qVbMfWbbVFm0155jw-1 Received: by mail-wr1-f72.google.com with SMTP id ffacd0b85a97d-37d531a19a9so2909481f8f.1 for ; Tue, 29 Oct 2024 08:19:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215149; x=1730819949; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zyYC6UOZKU94Wwrtdw6/pO2lxILLRipgiNrFy5tbKJc=; b=O6yUl76vKQjx0iy5d6g4sDyl/zH2K8YLvmfQFSAiBo5jEuYMEA1eBRZNl0Z1npYBJ8 XpafE/Mit4ugB4G7zc/0DaeHiAp8dhWFSusQ+KUh+BHAMKdR+d0UeC9kJ5SZBFRCHEV8 4euOPgbM09GOhSEfBiZHtPGsCa095VmMEVxQnPD+2CVjxv4dq73Gz0u1aWaWMcYoCsRr 35PuJ+MgMUSMk+0G1z1eBpCe2Ws0qLQ+Kao5uDztRZPayBheyH8kaJiZygkgy/NPCSVX m+c6ZXgBmKQ28T+1J4VgJ2h8JzNnRzVOmcLctRI36xymnhPGnZ9+kJnyhvZ7bLR5pr/V GuVQ== X-Gm-Message-State: AOJu0YwJFelmqMNuvnrdGHI3Or0trmqrTHnqYhU8x8GZ+1OwbeQwD94Q RmadiqgElcDNAZGwJt+WqSX6r/607/x43j8x/kBe00rnpqfGPfE9u0oqvotzMuduJBrNVIRe11T A3xsWQ1r+w/l+YE6iZifvlykI3gdKJ7OHosOD5yUu2Tv7xtT3ISNF1kH34bZqnI6ZFjIFGOpcWa 2o/5SWR3gCYqp3ugEpQUnQ1HcKPG8d4HfZlbJGzlk= X-Received: by 2002:adf:ec89:0:b0:37d:3541:5643 with SMTP id ffacd0b85a97d-380612220ddmr8379152f8f.51.1730215148886; Tue, 29 Oct 2024 08:19:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEx2e7lV0kDVzVNOfkYZy74/XL+KH81n3/UeY0OMvCkCbttgiyJCL/PAWeqnxBDlQ5N/qwN/Q== X-Received: by 2002:adf:ec89:0:b0:37d:3541:5643 with SMTP id ffacd0b85a97d-380612220ddmr8379138f8f.51.1730215148431; Tue, 29 Oct 2024 08:19:08 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b4000dsm12970876f8f.45.2024.10.29.08.19.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:05 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com Subject: [PATCH 3/8] target/i386: return bool from x86_cpu_filter_features Date: Tue, 29 Oct 2024 16:18:53 +0100 Message-ID: <20241029151858.550269-4-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Prepare for filtering non-boolean features such as AVX10 version. Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- target/i386/cpu.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1ee4d988caf..c2f6045ec1c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5840,7 +5840,7 @@ static void x86_cpu_parse_featurestr(const char *typename, char *features, } } -static void x86_cpu_filter_features(X86CPU *cpu, bool verbose); +static bool x86_cpu_filter_features(X86CPU *cpu, bool verbose); /* Build a list with the name of all features on a feature word array */ static void x86_cpu_list_feature_names(FeatureWordArray features, @@ -7558,7 +7558,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) * * Returns: 0 if all flags are supported by the host, non-zero otherwise. */ -static void x86_cpu_filter_features(X86CPU *cpu, bool verbose) +static bool x86_cpu_filter_features(X86CPU *cpu, bool verbose) { CPUX86State *env = &cpu->env; FeatureWord w; @@ -7610,6 +7610,8 @@ static void x86_cpu_filter_features(X86CPU *cpu, bool verbose) mark_unavailable_features(cpu, FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT, prefix); } } + + return x86_cpu_have_filtered_features(cpu); } static void x86_cpu_hyperv_realize(X86CPU *cpu) @@ -7707,14 +7709,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } } - x86_cpu_filter_features(cpu, cpu->check_cpuid || cpu->enforce_cpuid); - - if (cpu->enforce_cpuid && x86_cpu_have_filtered_features(cpu)) { - error_setg(&local_err, - accel_uses_host_cpuid() ? + if (x86_cpu_filter_features(cpu, cpu->check_cpuid || cpu->enforce_cpuid)) { + if (cpu->enforce_cpuid) { + error_setg(&local_err, + accel_uses_host_cpuid() ? "Host doesn't support requested features" : "TCG doesn't support requested features"); - goto out; + goto out; + } } /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on From patchwork Tue Oct 29 15:18:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3B75D3A66B for ; Tue, 29 Oct 2024 15:20:42 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0L-0006UJ-83; Tue, 29 Oct 2024 11:19:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o08-0005lA-C7 for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:22 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o04-0000Qc-BS for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215154; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xl4RsPzTl9gqZQz0/OF4MHqmFAvJIOosnl1EsnMQjuA=; b=B6mlgpVAimzbheuALr92uAOBvqBnhgmwdjPG7pD/GgyneoCcZbLSxztZnunjigTRUzrN2b 4yAQQKyFIsljgsPXq0UhrULtIbT35gUnjoN/j6gV9AqCOF3634fbXfBLNfgzLwU4JKLolb LlylTA/KEiz22NwONBcY8w1VEBp5W7w= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-627-xpS_tTX_NcGpFHuAq_ZrOA-1; Tue, 29 Oct 2024 11:19:13 -0400 X-MC-Unique: xpS_tTX_NcGpFHuAq_ZrOA-1 Received: by mail-wr1-f72.google.com with SMTP id ffacd0b85a97d-37d4d51b4efso2532846f8f.3 for ; Tue, 29 Oct 2024 08:19:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215152; x=1730819952; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xl4RsPzTl9gqZQz0/OF4MHqmFAvJIOosnl1EsnMQjuA=; b=WeEuTwZNChXA13NabnIAnd8cBAViuCq7/yB5Fx3J8SdeaREggFcI6NeKMBlIat9s78 cZhalR5Yx6fAvYY3Rh2E3czrwk7tgze4aMkIlDDppYMC7BKr90E/Xaq/352iY9+8Yp7q E+92GCBKpkQmljA00WtOQFZgOme2NqLR/5ykzO+UkXwRnbW7Wlg0zfXv1LaNbbCXao7r jpCRD7PG/vmZ4CN2g2R+Isj1Km5VRlnOHlCyAorsCyCVry+qVvN/cGLW6oi+r74fWJVU x9brIuEY8OvS6PSF0IOzJ+Wd2EK+7RHDplJIq8k3ahjodJ8j9TXKsOjkp6dfYKtAFG1I XMew== X-Gm-Message-State: AOJu0YyTGp3wO/KzYGvZ2odS/YCaAJL1NnX488ujyuAd2JwyvMoc0zlv TPGZkR4UFOJnp3Zb9IRWP1OtrbVxTLczbnetw/XxBHql54FCToCWw9n5y0BzBKf+wXY3IvqpvGh OFLj7BJdA9u161Yp+6cxOGXQhpUf1FwJqn+0F+HEovl9S8zK/BHsIoEefHEknDXNz4WhqQWBscw zKPySP4BpBEZlatG6tY9KVySlpdPXYfCnj91aVQC8= X-Received: by 2002:adf:ce89:0:b0:37d:476d:2d58 with SMTP id ffacd0b85a97d-380611e56aemr8716814f8f.45.1730215151672; Tue, 29 Oct 2024 08:19:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH4wg9p2eEfzZsuqKc/Zds5oNZ1sCpx+RzELh5coGNHGtE/YZIBwyglL7sHISQKGja0zw+2HA== X-Received: by 2002:adf:ce89:0:b0:37d:476d:2d58 with SMTP id ffacd0b85a97d-380611e56aemr8716789f8f.45.1730215151160; Tue, 29 Oct 2024 08:19:11 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b0ea58sm12868467f8f.15.2024.10.29.08.19.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:09 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com Subject: [PATCH 4/8] target/i386: add AVX10 feature and AVX10 version property Date: Tue, 29 Oct 2024 16:18:54 +0100 Message-ID: <20241029151858.550269-5-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Tao Su When AVX10 enable bit is set, the 0x24 leaf will be present as "AVX10 Converged Vector ISA leaf" containing fields for the version number and the supported vector bit lengths. Introduce avx10-version property so that avx10 version can be controlled by user and cpu model. Per spec, avx10 version can never be 0, the default value of avx10-version is set to 0 to determine whether it is specified by user. The default can come from the device model or, for the max model, from KVM's reported value. Signed-off-by: Tao Su Link: https://lore.kernel.org/r/20241028024512.156724-3-tao1.su@linux.intel.com Link: https://lore.kernel.org/r/20241028024512.156724-4-tao1.su@linux.intel.com Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 4 +++ target/i386/cpu.c | 64 ++++++++++++++++++++++++++++++++++++++----- target/i386/kvm/kvm.c | 3 +- 3 files changed, 63 insertions(+), 8 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index a0a122cb5bf..72e98b25114 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -975,6 +975,8 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define CPUID_7_1_EDX_AMX_COMPLEX (1U << 8) /* PREFETCHIT0/1 Instructions */ #define CPUID_7_1_EDX_PREFETCHITI (1U << 14) +/* Support for Advanced Vector Extensions 10 */ +#define CPUID_7_1_EDX_AVX10 (1U << 19) /* Flexible return and event delivery (FRED) */ #define CPUID_7_1_EAX_FRED (1U << 17) /* Load into IA32_KERNEL_GS_BASE (LKGS) */ @@ -1954,6 +1956,8 @@ typedef struct CPUArchState { uint32_t cpuid_vendor3; uint32_t cpuid_version; FeatureWordArray features; + /* AVX10 version */ + uint8_t avx10_version; /* Features that were explicitly enabled/disabled */ FeatureWordArray user_features; uint32_t cpuid_model[12]; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c2f6045ec1c..fdbfcc59da4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -46,6 +46,9 @@ #include "cpu-internal.h" static void x86_cpu_realizefn(DeviceState *dev, Error **errp); +static void x86_cpu_get_supported_cpuid(uint32_t func, uint32_t index, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx); /* Helpers for building CPUID[2] descriptors: */ @@ -1132,7 +1135,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { "avx-vnni-int8", "avx-ne-convert", NULL, NULL, "amx-complex", NULL, "avx-vnni-int16", NULL, NULL, NULL, "prefetchiti", NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, NULL, "avx10", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, @@ -1989,6 +1992,7 @@ typedef struct X86CPUDefinition { int family; int model; int stepping; + int avx10_version; FeatureWordArray features; const char *model_id; const CPUCaches *const cache_info; @@ -5338,6 +5342,8 @@ static Property max_x86_cpu_properties[] = { static void max_x86_cpu_realize(DeviceState *dev, Error **errp) { Object *obj = OBJECT(dev); + X86CPU *cpu = X86_CPU(dev); + CPUX86State *env = &cpu->env; if (!object_property_get_int(obj, "family", &error_abort)) { if (X86_CPU(obj)->env.features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { @@ -5351,6 +5357,14 @@ static void max_x86_cpu_realize(DeviceState *dev, Error **errp) } } + if ((env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) && !env->avx10_version) { + uint32_t eax, ebx, ecx, edx; + x86_cpu_get_supported_cpuid(0x24, 0, + &eax, &ebx, &ecx, &edx); + + env->avx10_version = ebx & 0xff; + } + x86_cpu_realizefn(dev, errp); } @@ -6331,6 +6345,9 @@ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model) */ object_property_set_str(OBJECT(cpu), "vendor", def->vendor, &error_abort); + object_property_set_int(OBJECT(cpu), "avx10-version", def->avx10_version, + &error_abort); + x86_cpu_apply_version_props(cpu, model); /* @@ -6859,6 +6876,16 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, } break; } + case 0x24: { + *eax = 0; + *ebx = 0; + *ecx = 0; + *edx = 0; + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { + *ebx = env->avx10_version; + } + break; + } case 0x40000000: /* * CPUID code in kvm_arch_init_vcpu() ignores stuff @@ -7513,6 +7540,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); } + /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); + } + /* SVM requires CPUID[0x8000000A] */ if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); @@ -7563,6 +7595,10 @@ static bool x86_cpu_filter_features(X86CPU *cpu, bool verbose) CPUX86State *env = &cpu->env; FeatureWord w; const char *prefix = NULL; + bool have_filtered_features; + + uint32_t eax_0, ebx_0, ecx_0, edx_0; + uint32_t eax_1, ebx_1, ecx_1, edx_1; if (verbose) { prefix = accel_uses_host_cpuid() @@ -7584,13 +7620,10 @@ static bool x86_cpu_filter_features(X86CPU *cpu, bool verbose) */ if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) && kvm_enabled()) { - uint32_t eax_0, ebx_0, ecx_0, edx_0_unused; - uint32_t eax_1, ebx_1, ecx_1_unused, edx_1_unused; - x86_cpu_get_supported_cpuid(0x14, 0, - &eax_0, &ebx_0, &ecx_0, &edx_0_unused); + &eax_0, &ebx_0, &ecx_0, &edx_0); x86_cpu_get_supported_cpuid(0x14, 1, - &eax_1, &ebx_1, &ecx_1_unused, &edx_1_unused); + &eax_1, &ebx_1, &ecx_1, &edx_1); if (!eax_0 || ((ebx_0 & INTEL_PT_MINIMAL_EBX) != INTEL_PT_MINIMAL_EBX) || @@ -7611,7 +7644,23 @@ static bool x86_cpu_filter_features(X86CPU *cpu, bool verbose) } } - return x86_cpu_have_filtered_features(cpu); + have_filtered_features = x86_cpu_have_filtered_features(cpu); + + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { + x86_cpu_get_supported_cpuid(0x24, 0, + &eax_0, &ebx_0, &ecx_0, &edx_0); + uint8_t version = ebx_0 & 0xff; + + if (version < env->avx10_version) { + if (prefix) { + warn_report("%s: avx10.%d", prefix, env->avx10_version); + } + env->avx10_version = version; + have_filtered_features = true; + } + } + + return have_filtered_features; } static void x86_cpu_hyperv_realize(X86CPU *cpu) @@ -8395,6 +8444,7 @@ static Property x86_cpu_properties[] = { DEFINE_PROP_UINT32("min-level", X86CPU, env.cpuid_min_level, 0), DEFINE_PROP_UINT32("min-xlevel", X86CPU, env.cpuid_min_xlevel, 0), DEFINE_PROP_UINT32("min-xlevel2", X86CPU, env.cpuid_min_xlevel2, 0), + DEFINE_PROP_UINT8("avx10-version", X86CPU, env.avx10_version, 0), DEFINE_PROP_UINT64("ucode-rev", X86CPU, ucode_rev, 0), DEFINE_PROP_BOOL("full-cpuid-auto-level", X86CPU, full_cpuid_auto_level, true), DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index fd9f1988920..8e17942c3ba 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -1923,7 +1923,8 @@ static uint32_t kvm_x86_build_cpuid(CPUX86State *env, case 0x7: case 0x14: case 0x1d: - case 0x1e: { + case 0x1e: + case 0x24: { uint32_t times; c->function = i; From patchwork Tue Oct 29 15:18:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 650D1D3A661 for ; Tue, 29 Oct 2024 15:21:04 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0i-0007ct-W5; Tue, 29 Oct 2024 11:19:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o08-0005l8-6t for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:22 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o05-0000Ql-Gq for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215156; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Iqwu/d/vVs0Cnefe08Zu3g6DyPdDcSfsVDU4s2l0BtY=; b=eWLC2UPagQIpftiHtIxK5shMco5nIWpqPxBGNrgPqQlmwgWhJRU2fmRv6F71GPXf5R25Zt HWMJe3d7RyBdlQbt4wPxm/+ILbAS3m4xwxRmqNNvyOLLVtLH2gdovHiCKOqfTOvUkuOy3M 5sz9dVADVYZb3QDmR8p8HmUU/ILCZ7I= Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-55-p1Nrhv3PNeykDaP9DZ3K6w-1; Tue, 29 Oct 2024 11:19:14 -0400 X-MC-Unique: p1Nrhv3PNeykDaP9DZ3K6w-1 Received: by mail-wr1-f70.google.com with SMTP id ffacd0b85a97d-37d52ca258eso2984244f8f.3 for ; Tue, 29 Oct 2024 08:19:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215153; x=1730819953; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Iqwu/d/vVs0Cnefe08Zu3g6DyPdDcSfsVDU4s2l0BtY=; b=vxZy3wo1xa5lCMyt3Vvr/Ig2aFPZVK3ePdLBUtRV6pDRxf+Xxn7d38YxCIAE5oL+Lp 10bOHt526xIHh0lVPg6GpvtKqhpQQ3fyd+sWpj/UYTert4lcS9nFqhkkFj7rgvPmFeKw DLDO8UHP86BlvOj9O//nJLUcR8EXbbeAaQZP/3vBIvSgteBHgXr1j1akDiVTFfyac7Z6 Y7hKhdJ3j7PlJGvmo7TCmNN/c9PGDxbJwl2KkYwzfH43wS4HhoKS1jXTQipR6x8nQTeM uGEKkUzjiM0o0917V1eBFYRomTZVrB2fCAxah8ZpKflAJEYAG6wo0ODik8HY8OL3tKz/ txvA== X-Gm-Message-State: AOJu0Yz0u6RBOvvduZmldRcUu1U7Y0xCOrFIa4PKbql5s2X7daWz0Tkc QMzT5sKyidv/ocv9HsMmcJo6/fUoocFutm/aNZGo8T1as3Pq/1OnXj2D24Ob5A1sKoxSbA0I/G5 SUGwqjgbqHdyADVPIMWQY/K0PabJelaAPP/HrK27jfSZW5uvd3xYLmiTkeAecCZXB3NaNNpSKTc rt7V2BrNIihB9JN8w1EdLoydjpGno+H7S3LrCn0Pw= X-Received: by 2002:a05:6000:ac1:b0:37d:3280:203a with SMTP id ffacd0b85a97d-381b7057644mr33351f8f.10.1730215152842; Tue, 29 Oct 2024 08:19:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGyRkkN3T57Xw3R83w57A719dOnWaF70XOz5sMw1ShQMcHHQ/15AinK0icAmoal8xCmkPUdJA== X-Received: by 2002:a05:6000:ac1:b0:37d:3280:203a with SMTP id ffacd0b85a97d-381b7057644mr33331f8f.10.1730215152425; Tue, 29 Oct 2024 08:19:12 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b4ad08sm12792202f8f.64.2024.10.29.08.19.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:11 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com Subject: [PATCH 5/8] target/i386: add CPUID.24 features for AVX10 Date: Tue, 29 Oct 2024 16:18:55 +0100 Message-ID: <20241029151858.550269-6-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Tao Su Introduce features for the supported vector bit lengths. Signed-off-by: Tao Su Link: https://lore.kernel.org/r/20241028024512.156724-3-tao1.su@linux.intel.com Link: https://lore.kernel.org/r/20241028024512.156724-4-tao1.su@linux.intel.com Reviewed-by: Zhao Liu --- target/i386/cpu.h | 8 ++++++++ target/i386/cpu.c | 15 +++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 72e98b25114..f8f97fe9330 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -665,6 +665,7 @@ typedef enum FeatureWord { FEAT_XSAVE_XSS_HI, /* CPUID[EAX=0xd,ECX=1].EDX */ FEAT_7_1_EDX, /* CPUID[EAX=7,ECX=1].EDX */ FEAT_7_2_EDX, /* CPUID[EAX=7,ECX=2].EDX */ + FEAT_24_0_EBX, /* CPUID[EAX=0x24,ECX=0].EBX */ FEATURE_WORDS, } FeatureWord; @@ -993,6 +994,13 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); /* Packets which contain IP payload have LIP values */ #define CPUID_14_0_ECX_LIP (1U << 31) +/* AVX10 128-bit vector support is present */ +#define CPUID_24_0_EBX_AVX10_128 (1U << 16) +/* AVX10 256-bit vector support is present */ +#define CPUID_24_0_EBX_AVX10_256 (1U << 17) +/* AVX10 512-bit vector support is present */ +#define CPUID_24_0_EBX_AVX10_512 (1U << 18) + /* RAS Features */ #define CPUID_8000_0007_EBX_OVERFLOW_RECOV (1U << 0) #define CPUID_8000_0007_EBX_SUCCOR (1U << 1) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fdbfcc59da4..3f7fed8e485 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -901,6 +901,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, #define TCG_SGX_12_0_EAX_FEATURES 0 #define TCG_SGX_12_0_EBX_FEATURES 0 #define TCG_SGX_12_1_EAX_FEATURES 0 +#define TCG_24_0_EBX_FEATURES 0 #if defined CONFIG_USER_ONLY #define CPUID_8000_0008_EBX_KERNEL_FEATURES (CPUID_8000_0008_EBX_IBPB | \ @@ -1166,6 +1167,20 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { }, .tcg_features = TCG_7_2_EDX_FEATURES, }, + [FEAT_24_0_EBX] = { + .type = CPUID_FEATURE_WORD, + .feat_names = { + [16] = "avx10-128", + [17] = "avx10-256", + [18] = "avx10-512", + }, + .cpuid = { + .eax = 0x24, + .needs_ecx = true, .ecx = 0, + .reg = R_EBX, + }, + .tcg_features = TCG_24_0_EBX_FEATURES, + }, [FEAT_8000_0007_EDX] = { .type = CPUID_FEATURE_WORD, .feat_names = { From patchwork Tue Oct 29 15:18:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92AA8D3A66C for ; Tue, 29 Oct 2024 15:21:04 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0c-00071W-ST; Tue, 29 Oct 2024 11:19:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o0B-0005p5-3B for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:28 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o08-0000R2-OJ for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:22 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215159; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lCtUFyK+kuTAMXmk4mVAgW2xN+DwNT3py4Wk7BWJKOA=; b=OPL52i+cuZdN+5BcnzyIg/vyJPkxoT/FZKworIGtbclOyIBOQiNFCpNtDlIoGkaglJFdDr EJ//mztxX3AQ2TOpcKR2aU0FP4dykHocWrL1MAVswQWVbPjteqgNcN21hBu4rRRMjUHE9k 2DYhxx6E/Vq7tSNAMqfQAp5uCrQEEXc= Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-336-8hwoI_RYOpCt6wDpN8iJ6A-1; Tue, 29 Oct 2024 11:19:18 -0400 X-MC-Unique: 8hwoI_RYOpCt6wDpN8iJ6A-1 Received: by mail-wm1-f72.google.com with SMTP id 5b1f17b1804b1-4316655b2f1so36383025e9.0 for ; Tue, 29 Oct 2024 08:19:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215156; x=1730819956; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lCtUFyK+kuTAMXmk4mVAgW2xN+DwNT3py4Wk7BWJKOA=; b=d/+mgRLMdlaHdqrh7B8wZz7WIfsNDZ3tPOcAAERWGwgvB5ig2p1mDWLO3oXKDXV1ab YrLIfbCyKrq4umuHaySWGAkQH8GV0MJFJ1fOz/Za9fsOs+6WAOTKMT8VJWap2nn+Ijmr lXDjzdmFdyPA+A1AeU9/WJTH8QZrulERd9WSPTtJV+uqxfeOgivKnC0T3ZJs0+fBC8uS Igmb1OgLzX4KmISHCT1+oR0iEU0rlaSficZKpPLL1ZgvVQGW4/cgZvtCATe1DM2nP/vi 1Mr9I34klOZ8DhwsPx/+joxjY6pb8l27CYwykY9yiOJKL1AWAKYqu75vMSopz2yx6rdg 1kHA== X-Gm-Message-State: AOJu0YxjUTLQLKNYOMBtBfm9bydl5zwto5Ds3VrMskRCCAsBNA2/th29 8hWrptEOb2JnWOhiwvpq3HFKIeIrqLwjHHsA1FsIk1xSUZA+K57r548sq3SdorHkyogXUvDghE7 99QStKvm8yczxVJVUJTO8+NKMQvxzhq0NEHUH9pgW/ChdikW+btADJ+35Aqrd+T/AWfjzFUQ9PY J4yvWdcRrqC8McMVBRwKCu6LMxDULzsQkh4vFY8PI= X-Received: by 2002:a05:600c:3ba3:b0:42c:bd4d:e8ba with SMTP id 5b1f17b1804b1-4319aca2cfemr107067325e9.8.1730215155911; Tue, 29 Oct 2024 08:19:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGfjRYtjIbTJ3xK4do98iY+2IIN5B9ujMq3I3QBP42ZHBFQvo/RcwMmi0K7gxPMooVXaxky8w== X-Received: by 2002:a05:600c:3ba3:b0:42c:bd4d:e8ba with SMTP id 5b1f17b1804b1-4319aca2cfemr107067035e9.8.1730215155411; Tue, 29 Oct 2024 08:19:15 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4319357291bsm150316025e9.2.2024.10.29.08.19.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:13 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com, Xuelian Guo Subject: [PATCH 6/8] target/i386: Add feature dependencies for AVX10 Date: Tue, 29 Oct 2024 16:18:56 +0100 Message-ID: <20241029151858.550269-7-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Tao Su Since the highest supported vector length for a processor implies that all lesser vector lengths are also supported, add the dependencies of the supported vector lengths. If all vector lengths aren't supported, clear AVX10 enable bit as well. Note that the order of AVX10 related dependencies should be kept as: CPUID_24_0_EBX_AVX10_128 -> CPUID_24_0_EBX_AVX10_256, CPUID_24_0_EBX_AVX10_256 -> CPUID_24_0_EBX_AVX10_512, CPUID_24_0_EBX_AVX10_VL_MASK -> CPUID_7_1_EDX_AVX10, CPUID_7_1_EDX_AVX10 -> CPUID_24_0_EBX, so that prevent user from setting weird CPUID combinations, e.g. 256-bits and 512-bits are supported but 128-bits is not, no vector lengths are supported but AVX10 enable bit is still set. Since AVX10_128 will be reserved as 1, adding these dependencies has the bonus that when user sets -cpu host,-avx10-128, CPUID_7_1_EDX_AVX10 and CPUID_24_0_EBX will be disabled automatically. Tested-by: Xuelian Guo Signed-off-by: Tao Su Link: https://lore.kernel.org/r/20241028024512.156724-5-tao1.su@linux.intel.com Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 4 ++++ target/i386/cpu.c | 16 ++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f8f97fe9330..59959b8b7a4 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1000,6 +1000,10 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define CPUID_24_0_EBX_AVX10_256 (1U << 17) /* AVX10 512-bit vector support is present */ #define CPUID_24_0_EBX_AVX10_512 (1U << 18) +/* AVX10 vector length support mask */ +#define CPUID_24_0_EBX_AVX10_VL_MASK (CPUID_24_0_EBX_AVX10_128 | \ + CPUID_24_0_EBX_AVX10_256 | \ + CPUID_24_0_EBX_AVX10_512) /* RAS Features */ #define CPUID_8000_0007_EBX_OVERFLOW_RECOV (1U << 0) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3f7fed8e485..4c86a49ad05 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1787,6 +1787,22 @@ static FeatureDep feature_dependencies[] = { .from = { FEAT_7_0_EBX, CPUID_7_0_EBX_SGX }, .to = { FEAT_SGX_12_1_EAX, ~0ull }, }, + { + .from = { FEAT_24_0_EBX, CPUID_24_0_EBX_AVX10_128 }, + .to = { FEAT_24_0_EBX, CPUID_24_0_EBX_AVX10_256 }, + }, + { + .from = { FEAT_24_0_EBX, CPUID_24_0_EBX_AVX10_256 }, + .to = { FEAT_24_0_EBX, CPUID_24_0_EBX_AVX10_512 }, + }, + { + .from = { FEAT_24_0_EBX, CPUID_24_0_EBX_AVX10_VL_MASK }, + .to = { FEAT_7_1_EDX, CPUID_7_1_EDX_AVX10 }, + }, + { + .from = { FEAT_7_1_EDX, CPUID_7_1_EDX_AVX10 }, + .to = { FEAT_24_0_EBX, ~0ull }, + }, }; typedef struct X86RegisterInfo32 { From patchwork Tue Oct 29 15:18:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DFCBCD3A661 for ; Tue, 29 Oct 2024 15:19:50 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0L-0006UI-Dp; Tue, 29 Oct 2024 11:19:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o0C-0005sE-9t for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:28 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o0A-0000RM-CW for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215161; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ul/+wTlhx4/Ac2GnRdd1GaRTCtsYyRhOd1o7JsQ1WiM=; b=PNSQtY6I6gxex0gZ6TzqlxxJ/jjebF4q+686CwADHg+K3NJllhqhlBsrBhWlOuk48WXXzI 0rY5mc0Ey3d3a40o9PhBZArwiL+0erK/GIwjaea/77t6VVSFu9PlMmn/VsVtz74U/9adbf LD2ryCGbkT5KxuxWr6k8LpC1ARhTckI= Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-318-4O-JGqpAOeW5TEHgKTQukw-1; Tue, 29 Oct 2024 11:19:20 -0400 X-MC-Unique: 4O-JGqpAOeW5TEHgKTQukw-1 Received: by mail-wm1-f70.google.com with SMTP id 5b1f17b1804b1-4315afcae6cso32378705e9.0 for ; Tue, 29 Oct 2024 08:19:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215158; x=1730819958; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ul/+wTlhx4/Ac2GnRdd1GaRTCtsYyRhOd1o7JsQ1WiM=; b=UGEP3GDnVWOmvC8ESv60WHf5LpZRO55WKd17ZHgi4856kaFVUeAK7CxMua0LrU6RKL 6finE3SqwkQ9Gruh3s0W4elzE0fl94A5EaKGJfKW1yylnqmYUPi2WbYxvlH9YBe6ZxeL zSJkw5HmPzz6bQG2yAWNVpO5zaGTTT+TeAkGoj58VI+uQ4PAtf99vHhumjdCx3jGvpbg zivSyKJTwtBgCggRdNBr2/ySFjjlQ7tzMObsgvbA69SD2b25zl8RoYeZtCruWaFMIHWO TqfQT3OzQCSrTzQ6VQvOQ9nAwLZkP4W9T7KbRESXhzeIDETjlievC8+Y5+1vUehTfmCr xivQ== X-Gm-Message-State: AOJu0Yzl/DXY2TOjsgYtsASvugRdwI0cMqvtJqwMRalMFrOelwkPtaJR Ot0I0AXi7PUdJbuW3wEIIeM5Wu7aqmpqRVyCK3KK9P67yhGLSEMYIKRv7+Wt1kpjFYzj9xjRizq yyQRqjC9XVvFaLcSGQ4XIDXaVSvG8UqK6PrUxypuUJzGuspNDa2w5IorQKg1g7WSedkTCS0MIVY PxV5QHzCxeNuAPbcFsdX3e/8EvoQfq9ymAi9G2Uh8= X-Received: by 2002:a05:600c:4f91:b0:431:7ccd:ff8a with SMTP id 5b1f17b1804b1-431b5737b8emr21768335e9.14.1730215158543; Tue, 29 Oct 2024 08:19:18 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHWMAIfUiRbSWH/posKOyCgJJCPn1KrWgDvpMdnLFPu0itsMnydcdvKjrCyaHklg35VCeN6sw== X-Received: by 2002:a05:600c:4f91:b0:431:7ccd:ff8a with SMTP id 5b1f17b1804b1-431b5737b8emr21768165e9.14.1730215158125; Tue, 29 Oct 2024 08:19:18 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b567838sm181233555e9.23.2024.10.29.08.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:16 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com Subject: [PATCH 7/8] target/i386: Add AVX512 state when AVX10 is supported Date: Tue, 29 Oct 2024 16:18:57 +0100 Message-ID: <20241029151858.550269-8-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Tao Su AVX10 state enumeration in CPUID leaf D and enabling in XCR0 register are identical to AVX512 state regardless of the supported vector lengths. Given that some E-cores will support AVX10 but not support AVX512, add AVX512 state components to guest when AVX10 is enabled. Based on a patch by Tao Su Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- target/i386/cpu.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4c86a49ad05..b6799ddafa9 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7166,7 +7166,15 @@ static bool cpuid_has_xsave_feature(CPUX86State *env, const ExtSaveArea *esa) return false; } - return (env->features[esa->feature] & esa->bits); + if (env->features[esa->feature] & esa->bits) { + return true; + } + if (esa->feature == FEAT_7_0_EBX && esa->bits = CPUID_7_0_EBX_AVX512F + && (features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10)) { + return true; + } + + return false; } static void x86_cpu_reset_hold(Object *obj, ResetType type) From patchwork Tue Oct 29 15:18:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13855076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D72AD3A66D for ; Tue, 29 Oct 2024 15:21:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t5o0z-0008Bh-4a; Tue, 29 Oct 2024 11:20:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o0F-0005ss-Ok for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:28 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t5o0E-0000Rp-0w for qemu-devel@nongnu.org; Tue, 29 Oct 2024 11:19:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730215165; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tajAPxCNAmFaogn2scI69rY3YVc4yfZ9YuXGY2hOlxM=; b=ijpqZeZtHOnC3MC8KTeTTLvOwAhokyJSngVFT3I9ItqIcKoNARDMQ876xrPN+Knkf3/2S9 5mW+S16SgALHES71F9dZ0i+x/PO8eeQJ4OFkemXq4uh+Z6CKe45brISmjUlzFBZUXpFLIe /A5yIyNfonymyxNeiwCVR98aYNbCFi8= Received: from mail-lj1-f199.google.com (mail-lj1-f199.google.com [209.85.208.199]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-470-JoaMJjvyPz-c7CymS5LfbQ-1; Tue, 29 Oct 2024 11:19:24 -0400 X-MC-Unique: JoaMJjvyPz-c7CymS5LfbQ-1 Received: by mail-lj1-f199.google.com with SMTP id 38308e7fff4ca-2fb53ef3524so36757931fa.1 for ; Tue, 29 Oct 2024 08:19:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730215162; x=1730819962; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tajAPxCNAmFaogn2scI69rY3YVc4yfZ9YuXGY2hOlxM=; b=pHZXKC1sonii0UWX//cczSbCtYqc4YhAisnQdIV04SwJ/15bmFCgG9lEq5nViU7bkW TQRqRIOO/PTsSeXaouaG0Up3pfIeTV/qOE/DnG7zQXYBsVed/hPyixcAP5msL842f53s 2c8MSyMOn7AJZZkORhcdDD3HVBnJGWTSH1TTyzymb6aeBCUTK6Zu4nG0oa0ax9gU+xZb DaKAupvLWURQs6TolfQ/NQ7O1XwJ0Co9zJsomsKzSqF5smNwmomUBuhxEem2XgZ3pD+E wQWQMeBw+W0vWeuEqn8z8Cj5Q9DDf/wVc5PVeBlE3o3yc8gyfLuEluEYc4B/mdNr6HoW DZ5A== X-Gm-Message-State: AOJu0Yx8oukH2ubJtJfnRxEaWDVmWLeyo+u9SC2ohOI3TxZJ24VvvdAX owom7ypltMiE7nFBWttsy85iP0UgZy+YOMRLO++u/HiMo+Mhkb1ehtHNrXx/+UYuAAsoKQ7kaeT ElVX5sMMe0MWWbSxw5nYEygjM8yKiu7vNioutBBOOwmG/+mK+tT8Omi2hfp2wZEwDyDDSVdh1Ka 1i2s2ap/DsIsQLF2Fa8sOBlQknehLE9XDE+Pv01g4= X-Received: by 2002:a05:6512:3ca1:b0:539:edf4:68b4 with SMTP id 2adb3069b0e04-53b34a320e7mr4226519e87.57.1730215161597; Tue, 29 Oct 2024 08:19:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHGyxTx3I9tkKqHA4RrmOWySUruGsAGXNqt9IZj0tKMX5ocd+H6dIJU2XAmxFp7+50/PI3Diw== X-Received: by 2002:a05:6512:3ca1:b0:539:edf4:68b4 with SMTP id 2adb3069b0e04-53b34a320e7mr4226501e87.57.1730215161109; Tue, 29 Oct 2024 08:19:21 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058bac1cfsm12820702f8f.109.2024.10.29.08.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 08:19:19 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: tao1.su@linux.intel.com, zhao1.liu@intel.com, xiaoyao.li@intel.com, Xuelian Guo Subject: [PATCH 8/8] target/i386: Introduce GraniteRapids-v2 model Date: Tue, 29 Oct 2024 16:18:58 +0100 Message-ID: <20241029151858.550269-9-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241029151858.550269-1-pbonzini@redhat.com> References: <20241029151858.550269-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.302, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Tao Su Update GraniteRapids CPU model to add AVX10 and the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b). Tested-by: Xuelian Guo Signed-off-by: Tao Su Link: https://lore.kernel.org/r/20241028024512.156724-7-tao1.su@linux.intel.com Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b6799ddafa9..c39e0eb924c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4403,6 +4403,23 @@ static const X86CPUDefinition builtin_x86_defs[] = { .model_id = "Intel Xeon Processor (GraniteRapids)", .versions = (X86CPUVersionDefinition[]) { { .version = 1 }, + { + .version = 2, + .props = (PropValue[]) { + { "ss", "on" }, + { "tsc-adjust", "on" }, + { "cldemote", "on" }, + { "movdiri", "on" }, + { "movdir64b", "on" }, + { "avx10", "on" }, + { "avx10-128", "on" }, + { "avx10-256", "on" }, + { "avx10-512", "on" }, + { "avx10-version", "1" }, + { "stepping", "1" }, + { /* end of list */ } + } + }, { /* end of list */ }, }, },