From patchwork Wed Oct 30 16:53:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856889 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86DF9218D93; Wed, 30 Oct 2024 16:54:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307242; cv=none; b=hAKaSg8BwXtEUgRmkpA2W/ODykDRZhqxFiCSxBqWjLYYTKLhlvEIy7vMChpObBuWoqATfodhXd0El3A8c9yCYYgKhyF78qo7SG+RRyeGdeCYYDWScwAaFFF6QoT2XVcWJGujFHCoGWjxXS5+peNEU6vdmqbmOSTi91OODDxt80o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307242; c=relaxed/simple; bh=7J/eh52uJk71WbVQkH2eMFY49Q8W9fou8NIi2HeyyTc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lAQEtJeCUAs0g0LSkUq/ATLjWGDmYqwbt7oiWuU9YSHkdZKWFII4ZJYovdRAQOBnJLuITPTt66p2LDNSr/rLrTgvK/6wDhnYRxGpLkZ0UF5u7xIhh8ustjd2DwVqYy1k/3PJBM98dDL9uCQCm4/V/rlpusGYdQPRIdtcDEriYKE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SYYg92iq; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SYYg92iq" Received: by mail.gandi.net (Postfix) with ESMTPSA id 66B56C0007; Wed, 30 Oct 2024 16:53:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307233; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Z4FptY7neSNIpm8/KU8J5QUzyVqJhV+phM8Nu0jRFeM=; b=SYYg92iqYM6QI4WRUHBhJMciWL3wSKT/LkWq5jzxe3t089ytksV8bcb7VyKO7X+8YqEmYA aQln8KVQ1Wn++4bKppblhVOp4Ig4w/3WeMUlNTWjfoUPnJ44QHYv45dv/vOQwbxkEPw+Gj WLc9Bz1bDWo7MYiS+2z0YfkvsgrPxJYmtANyUFuIoSsGdESVVaBvKb74Yh+oOW2QtALQqx kR115S3d8ViFUCStd0co6hPRqr+TVfnipYk7lCO22zSfQV25c+L7K/TGc7cPaRjGvLXUUH q7GcT0iLgBFX18AvC+PNiknOCDu49BlmtxXlKgvhCtwjS49XCyKtZLfjEsktXw== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:03 +0100 Subject: [PATCH RFC net-next v2 01/18] net: pse-pd: Remove unused pse_ethtool_get_pw_limit function declaration Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-1-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent , Kalesh AP X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Removed the unused pse_ethtool_get_pw_limit() function declaration from pse.h. This function was declared but never implemented or used, making the declaration unnecessary. Reviewed-by: Kalesh AP Reviewed-by: Andrew Lunn Acked-by: Oleksij Rempel Reviewed-by: Kyle Swenson Signed-off-by: Kory Maincent --- include/linux/pse-pd/pse.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 591a53e082e6..85a08c349256 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -184,8 +184,6 @@ int pse_ethtool_set_config(struct pse_control *psec, int pse_ethtool_set_pw_limit(struct pse_control *psec, struct netlink_ext_ack *extack, const unsigned int pw_limit); -int pse_ethtool_get_pw_limit(struct pse_control *psec, - struct netlink_ext_ack *extack); bool pse_has_podl(struct pse_control *psec); bool pse_has_c33(struct pse_control *psec); @@ -222,12 +220,6 @@ static inline int pse_ethtool_set_pw_limit(struct pse_control *psec, return -EOPNOTSUPP; } -static inline int pse_ethtool_get_pw_limit(struct pse_control *psec, - struct netlink_ext_ack *extack) -{ - return -EOPNOTSUPP; -} - static inline bool pse_has_podl(struct pse_control *psec) { return false; From patchwork Wed Oct 30 16:53:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856893 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F7A02194A4; Wed, 30 Oct 2024 16:54:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307245; cv=none; b=VrF7UZTW7wmS3yVpbJcUTF/SWHimuHmw8pX/hAAraX4tRXDgiqC3oAvyywKyQS8ayeXvpANwjqfK5pQw/dwMtdIP85JrAXLwXXHbPykn6V1M58MQcb+vnj409w8SqEMhgNhZfpSXPATooUWgCa192FBpaQW5D6b0hGenLM8feF8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307245; c=relaxed/simple; bh=ZsdCmW4n2LvHHk61rNgVX7raqVKq/pW4WBuFPn32Q2I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DdHPpy1nfXnxhbLyOrzCU4PvCNeMiFRKx9kDC1Kgv6gRvgRSYzzMFRgC56K+E2TUyVOS5gjK1cJCVoF+5PqyvK31puS1Lx04+qOALnwe5J1f4OH/A53W0U6jBm5fwjuL4jyyd5w8kCCFDfkNVSYZKC0L1DOdmEPpzKpFcf1mHxk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=OjeSwvRn; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="OjeSwvRn" Received: by mail.gandi.net (Postfix) with ESMTPSA id AA3E0C0009; Wed, 30 Oct 2024 16:53:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307235; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZR/OQqXD89qyu5jFhAfZEfAZSUhVQIdWY1c3hbVfIMM=; b=OjeSwvRnaMSFCd46de9Q7uKPnYDwn4SdDNO6fxhk/COFFuPQZIr/bFmjCzX1/tY188URQ8 i2lDTFUvplQEBkSnpY6IorDz30CgovV0DHKR1/qQkQlyIQ57gFy9fHdZ9BO2A1lZvAmEu8 +ArFQt3hY5W8vACe9oOoFbw4xrigIrmtWB+JjIAhl2l6wU1QzwWu4jUqsgsXhKo5nIw3th w6cwwiw2VtAll6KP3Etwc/rPk7Hcf4/EN0nl0mHSfZHyRtuCT0zpA3bTUHtdL4eMHTCtj/ tOW3eHFZGXZenV87CaAXN3vZEE1uR+cFXK5k5QQkNdo6ty1JQlK+sJKyl0MOIw== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:04 +0100 Subject: [PATCH RFC net-next v2 02/18] net: pse-pd: tps23881: Simplify function returns by removing redundant checks Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-2-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Cleaned up several functions in tps23881 by removing redundant checks on return values at the end of functions. These check has been removed, and the return statement now directly returns the function result, reducing the code's complexity and making it more concise. Reviewed-by: Andrew Lunn Acked-by: Oleksij Rempel Reviewed-by: Kyle Swenson Signed-off-by: Kory Maincent --- drivers/net/pse-pd/tps23881.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 5c4e88be46ee..20eab9857817 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -118,11 +118,7 @@ static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id) val |= BIT(chan + 8); } - ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); - if (ret) - return ret; - - return 0; + return i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); } static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id) @@ -488,7 +484,7 @@ tps23881_write_port_matrix(struct tps23881_priv *priv, struct i2c_client *client = priv->client; u8 pi_id, lgcl_chan, hw_chan; u16 val = 0; - int i, ret; + int i; for (i = 0; i < port_cnt; i++) { pi_id = port_matrix[i].pi_id; @@ -519,11 +515,7 @@ tps23881_write_port_matrix(struct tps23881_priv *priv, } /* Write hardware ports matrix */ - ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val); - if (ret) - return ret; - - return 0; + return i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val); } static int @@ -572,11 +564,7 @@ tps23881_set_ports_conf(struct tps23881_priv *priv, val |= BIT(port_matrix[i].lgcl_chan[1]) | BIT(port_matrix[i].lgcl_chan[1] + 4); } - ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val); - if (ret) - return ret; - - return 0; + return i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val); } static int @@ -602,11 +590,7 @@ tps23881_set_ports_matrix(struct tps23881_priv *priv, if (ret) return ret; - ret = tps23881_set_ports_conf(priv, port_matrix); - if (ret) - return ret; - - return 0; + return tps23881_set_ports_conf(priv, port_matrix); } static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev) From patchwork Wed Oct 30 16:53:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856894 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34EC92194B5; Wed, 30 Oct 2024 16:54:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307246; cv=none; b=WL/oWC5KHFAvmLQ1KIsLNHFzl6C1CA0qt5sLp/tIN/yerG4Ju1ObnxC6WUWnr5ROPKkDdkKw3LimlpDDJdLX1e5xUop2i7X8ne4EIta4BmZxbi8NlMrNu1GLm0ykc62fYErV3ZFef4F1r//d99Ic7gH1PtOGUpLLSokf3cqrwy0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307246; c=relaxed/simple; bh=6YXADs66ZEo8Xd5qgtpbfltEJNbzzRkqeeQks6lC1aU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lGar2ygIB62cwpIxFvU+LOiu0LlAoSo9kQ7GU8yMsSXhLl+/+3cURDIZ+AxMxCJ69APPRjobV2ItdvPVPqWVf4RWhY8r1KmqiZsl6L3c5NPUTp+Zbu35tFI4x0ri+ymj8c/pfR+7wrQz2OZpHT8UNYyvD6lfS7qG31Hn+23pWVU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=NWbM+9JI; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="NWbM+9JI" Received: by mail.gandi.net (Postfix) with ESMTPSA id 118E7C000A; Wed, 30 Oct 2024 16:53:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307236; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uTPLNz5yTOtn3lqPTWfyhqM47yr8HvgCllgs7jDzZNE=; b=NWbM+9JI4oTCtdEnyWDljVNJoyaVGQ9zqnlpF4OPwHpPENZL2Scya9JEinu8CL8X5bkbvg W4sapk/gV3c+J7Pfk+M/pHJgRT0Xj+ig+HgiNkNWwla/Z8p29gOBS5S6zRznHAoLrY6Ak+ hVpjvpS6jniuzpSjtwzei4NpU5qibfT2nKVihLVF5yAF1z92a/DeeS2PiDxtkhvMCMuEFs 9evqq/JS11iHAumyCpifglVBoJDVI6H7YucVh1fSyIPbM4wc1/UbrC+bX2KjEN7uUk3zrV /2XVbBQ7UGcGvI1QkIkhAuz4ACwzcit60FJWXDwRP37fW6U1lZXH/pnHmBCKOw== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:05 +0100 Subject: [PATCH RFC net-next v2 03/18] net: pse-pd: tps23881: Use helpers to calculate bit offset for a channel Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-3-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) This driver frequently follows a pattern where two registers are read or written in a single operation, followed by calculating the bit offset for a specific channel. Introduce helpers to streamline this process and reduce code redundancy, making the codebase cleaner and more maintainable. Signed-off-by: Kory Maincent Acked-by: Oleksij Rempel --- Thanks to Oleksij for the design of the helpers functions. Change in v2: - New patch --- drivers/net/pse-pd/tps23881.c | 107 +++++++++++++++++++++++++++--------------- 1 file changed, 69 insertions(+), 38 deletions(-) diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 20eab9857817..391b8964f687 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -53,6 +53,55 @@ static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev) return container_of(pcdev, struct tps23881_priv, pcdev); } +/* + * Helper to extract a value from a u16 register value, which is made of two + * u8 registers. The function calculates the bit offset based on the channel + * and extracts the relevant bits using a provided field mask. + * + * @param reg_val: The u16 register value (composed of two u8 registers). + * @param chan: The channel number (0-7). + * @param field_offset: The base bit offset to apply (e.g., 0 or 4). + * @param field_mask: The mask to apply to extract the required bits. + * @return: The extracted value for the specific channel. + */ +static u16 tps23881_calc_val(u16 reg_val, u8 chan, u8 field_offset, + u16 field_mask) +{ + if (chan > 4) + reg_val >>= 8; + + return (reg_val >> field_offset) & field_mask; +} + +/* + * Helper to combine individual channel values into a u16 register value. + * The function sets the value for a specific channel in the appropriate + * position. + * + * @param reg_val: The current u16 register value. + * @param chan: The channel number (0-7). + * @param field_offset: The base bit offset to apply (e.g., 0 or 4). + * @param field_mask: The mask to apply for the field (e.g., 0x0F). + * @param field_val: The value to set for the specific channel (masked by + * field_mask). + * @return: The updated u16 register value with the channel value set. + */ +static u16 tps23881_set_val(u16 reg_val, u8 chan, u8 field_offset, + u16 field_mask, u16 field_val) +{ + field_val &= field_mask; + + if (chan < 4) { + reg_val &= ~(field_mask << field_offset); + reg_val |= (field_val << field_offset); + } else { + reg_val &= ~(field_mask << (field_offset + 8)); + reg_val |= (field_val << (field_offset + 8)); + } + + return reg_val; +} + static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id) { struct tps23881_priv *priv = to_tps23881_priv(pcdev); @@ -69,17 +118,12 @@ static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id) return ret; chan = priv->port[id].chan[0]; - if (chan < 4) - val = (u16)(ret | BIT(chan)); - else - val = (u16)(ret | BIT(chan + 4)); + val = tps23881_set_val(ret, chan, 0, BIT(chan % 4), BIT(chan % 4)); if (priv->port[id].is_4p) { chan = priv->port[id].chan[1]; - if (chan < 4) - val |= BIT(chan); - else - val |= BIT(chan + 4); + val = tps23881_set_val(val, chan, 0, BIT(chan % 4), + BIT(chan % 4)); } ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); @@ -105,17 +149,12 @@ static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id) return ret; chan = priv->port[id].chan[0]; - if (chan < 4) - val = (u16)(ret | BIT(chan + 4)); - else - val = (u16)(ret | BIT(chan + 8)); + val = tps23881_set_val(ret, chan, 4, BIT(chan % 4), BIT(chan % 4)); if (priv->port[id].is_4p) { chan = priv->port[id].chan[1]; - if (chan < 4) - val |= BIT(chan + 4); - else - val |= BIT(chan + 8); + val = tps23881_set_val(val, chan, 4, BIT(chan % 4), + BIT(chan % 4)); } return i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); @@ -127,6 +166,7 @@ static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id) struct i2c_client *client = priv->client; bool enabled; u8 chan; + u16 val; int ret; ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); @@ -134,17 +174,13 @@ static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id) return ret; chan = priv->port[id].chan[0]; - if (chan < 4) - enabled = ret & BIT(chan); - else - enabled = ret & BIT(chan + 4); + val = tps23881_calc_val(ret, chan, 0, BIT(chan % 4)); + enabled = !!(val); if (priv->port[id].is_4p) { chan = priv->port[id].chan[1]; - if (chan < 4) - enabled &= !!(ret & BIT(chan)); - else - enabled &= !!(ret & BIT(chan + 4)); + val = tps23881_calc_val(ret, chan, 0, BIT(chan % 4)); + enabled &= !!(val); } /* Return enabled status only if both channel are on this state */ @@ -160,6 +196,7 @@ static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev, struct i2c_client *client = priv->client; bool enabled, delivering; u8 chan; + u16 val; int ret; ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); @@ -167,23 +204,17 @@ static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev, return ret; chan = priv->port[id].chan[0]; - if (chan < 4) { - enabled = ret & BIT(chan); - delivering = ret & BIT(chan + 4); - } else { - enabled = ret & BIT(chan + 4); - delivering = ret & BIT(chan + 8); - } + val = tps23881_calc_val(ret, chan, 0, BIT(chan % 4)); + enabled = !!(val); + val = tps23881_calc_val(ret, chan, 4, BIT(chan % 4)); + delivering = !!(val); if (priv->port[id].is_4p) { chan = priv->port[id].chan[1]; - if (chan < 4) { - enabled &= !!(ret & BIT(chan)); - delivering &= !!(ret & BIT(chan + 4)); - } else { - enabled &= !!(ret & BIT(chan + 4)); - delivering &= !!(ret & BIT(chan + 8)); - } + val = tps23881_calc_val(ret, chan, 0, BIT(chan % 4)); + enabled &= !!(val); + val = tps23881_calc_val(ret, chan, 4, BIT(chan % 4)); + delivering &= !!(val); } /* Return delivering status only if both channel are on this state */ From patchwork Wed Oct 30 16:53:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856896 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A2E5219CAD; Wed, 30 Oct 2024 16:54:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="XuL9u5qn" Received: by mail.gandi.net (Postfix) with ESMTPSA id 652DBC0002; Wed, 30 Oct 2024 16:53:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307237; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eKLSHZxZaQU0T4PcJIBiuTLZvypxmjMd3HkpaU3gqC0=; b=XuL9u5qnHyY0jPYIJRxERFHJXxJ8XJe5eseene17heF4G63hpkBwVXd7ZiCMupBba2yeVT lY3J8L+lS2dTGACCQW59Zceh8bVdpoHfxqbOF9KwgYWMId+pxHIP7AsE2T0XbcaQm5EwAX REp+LSbOHaRSp10J+bEehk/dVxz955ZGSRFCzli0V8OV0Nc6DYRyvtYQy3/xQxU2oCfnbP IOsFxfKb5xQl1X72+jKLQdhU4soAPEYrc6Vlul/xtiMjk09hlz+ieuwGoOoMArZfRlZcas L1U4PDmBLSIGmaX6Dq9gZ713XaNgXDQGLXYdaUi94hieddljFHMSsaziWk5Ayg== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:06 +0100 Subject: [PATCH RFC net-next v2 04/18] net: pse-pd: tps23881: Add support for power limit and measurement features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-4-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Expand PSE callbacks to support the newly introduced pi_get/set_current_limit() and pi_get_voltage() functions. These callbacks allow for power limit configuration in the TPS23881 controller. Additionally, the patch includes the detected class, the current power delivered and the power limit ranges in the status returned, providing more comprehensive PoE status reporting. Signed-off-by: Kory Maincent Acked-by: Oleksij Rempel --- Change in v2: - Use newly introduced helpers. --- drivers/net/pse-pd/tps23881.c | 306 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 306 insertions(+) diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 391b8964f687..928d9844462c 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -25,17 +25,29 @@ #define TPS23881_REG_GEN_MASK 0x17 #define TPS23881_REG_NBITACC BIT(5) #define TPS23881_REG_PW_EN 0x19 +#define TPS23881_REG_2PAIR_POL1 0x1e #define TPS23881_REG_PORT_MAP 0x26 #define TPS23881_REG_PORT_POWER 0x29 +#define TPS23881_REG_4PAIR_POL1 0x2a +#define TPS23881_REG_INPUT_V 0x2e +#define TPS23881_REG_CHAN1_A 0x30 +#define TPS23881_REG_CHAN1_V 0x32 #define TPS23881_REG_POEPLUS 0x40 #define TPS23881_REG_TPON BIT(0) #define TPS23881_REG_FWREV 0x41 #define TPS23881_REG_DEVID 0x43 #define TPS23881_REG_DEVID_MASK 0xF0 #define TPS23881_DEVICE_ID 0x02 +#define TPS23881_REG_CHAN1_CLASS 0x4c #define TPS23881_REG_SRAM_CTRL 0x60 #define TPS23881_REG_SRAM_DATA 0x61 +#define TPS23881_UV_STEP 3662 +#define TPS23881_MAX_UV 60000000 +#define TPS23881_NA_STEP 70190 +#define TPS23881_MAX_UA 1150000 +#define TPS23881_MW_STEP 500 + struct tps23881_port_desc { u8 chan[2]; bool is_4p; @@ -187,6 +199,167 @@ static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id) return enabled; } +static int tps23881_pi_get_voltage(struct pse_controller_dev *pcdev, int id) +{ + struct tps23881_priv *priv = to_tps23881_priv(pcdev); + struct i2c_client *client = priv->client; + int ret, reg; + u8 chan; + u64 uV; + + /* Read Voltage only at one of the 2-pair ports */ + chan = priv->port[id].chan[0]; + if (chan < 4) + /* Registers 0x32 0x36 0x3a 0x3e */ + reg = TPS23881_REG_CHAN1_V + chan * 4; + else + /* Registers 0x33 0x37 0x3b 0x3f */ + reg = TPS23881_REG_CHAN1_V + 1 + (chan % 4) * 4; + + ret = i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + uV = ret; + uV *= TPS23881_UV_STEP; + if (uV > TPS23881_MAX_UV) { + dev_err(&client->dev, "voltage read out of range\n"); + return -ERANGE; + } + + return (int)uV; +} + +static int +tps23881_pi_get_chan_current(struct tps23881_priv *priv, u8 chan) +{ + struct i2c_client *client = priv->client; + int reg, ret; + u64 tmp_64; + + if (chan < 4) + /* Registers 0x30 0x34 0x38 0x3c */ + reg = TPS23881_REG_CHAN1_A + chan * 4; + else + /* Registers 0x31 0x35 0x39 0x3d */ + reg = TPS23881_REG_CHAN1_A + 1 + (chan % 4) * 4; + + ret = i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + tmp_64 = ret; + tmp_64 *= TPS23881_NA_STEP; + /* uA = nA / 1000 */ + tmp_64 = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000); + if (tmp_64 > TPS23881_MAX_UA) { + dev_err(&client->dev, "current read out of range\n"); + return -ERANGE; + } + return (int)tmp_64; +} + +static int +tps23881_pi_get_power(struct tps23881_priv *priv, unsigned long id) +{ + int ret, uV, uA; + u64 tmp_64; + u8 chan; + + ret = tps23881_pi_get_voltage(&priv->pcdev, id); + if (ret < 0) + return ret; + uV = ret; + + chan = priv->port[id].chan[0]; + ret = tps23881_pi_get_chan_current(priv, chan); + if (ret < 0) + return ret; + uA = ret; + + if (priv->port[id].is_4p) { + chan = priv->port[id].chan[1]; + ret = tps23881_pi_get_chan_current(priv, chan); + if (ret < 0) + return ret; + uA += ret; + } + + tmp_64 = uV; + tmp_64 *= uA; + /* mW = uV * uA / 1000000000 */ + return DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); +} + +static int +tps23881_pi_get_pw_limit_chan(struct tps23881_priv *priv, u8 chan) +{ + struct i2c_client *client = priv->client; + int ret, reg; + u16 val; + + reg = TPS23881_REG_2PAIR_POL1 + (chan % 4); + ret = i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + val = tps23881_calc_val(ret, chan, 0, 0xff); + return val * TPS23881_MW_STEP; +} + +static int tps23881_pi_get_pw_limit(struct tps23881_priv *priv, int id) +{ + int ret, mW; + u8 chan; + + chan = priv->port[id].chan[0]; + ret = tps23881_pi_get_pw_limit_chan(priv, chan); + if (ret < 0) + return ret; + + mW = ret; + if (priv->port[id].is_4p) { + chan = priv->port[id].chan[1]; + ret = tps23881_pi_get_pw_limit_chan(priv, chan); + if (ret < 0) + return ret; + mW += ret; + } + + return mW; +} + +static int tps23881_pi_get_max_pw_limit(struct tps23881_priv *priv, int id) +{ + int ret, uV; + u64 tmp_64; + + ret = tps23881_pi_get_voltage(&priv->pcdev, id); + if (ret < 0) + return ret; + uV = ret; + + tmp_64 = uV; + tmp_64 *= MAX_PI_CURRENT; + /* mW = uV * uA / 1000000000 */ + return DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); +} + +static int tps23881_pi_get_class(struct tps23881_priv *priv, int id) +{ + struct i2c_client *client = priv->client; + int ret, reg; + u8 chan; + + chan = priv->port[id].chan[0]; + reg = TPS23881_REG_CHAN1_CLASS + (chan % 4); + ret = i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + return tps23881_calc_val(ret, chan, 4, 0xff); +} + static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id, struct netlink_ext_ack *extack, @@ -229,6 +402,35 @@ static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev, else status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; + ret = tps23881_pi_get_power(priv, id); + if (ret < 0) + return ret; + status->c33_actual_pw = ret; + + status->c33_pw_limit_ranges = kzalloc(sizeof(*status->c33_pw_limit_ranges), + GFP_KERNEL); + if (!status->c33_pw_limit_ranges) + return -ENOMEM; + + status->c33_actual_pw = ret; + + ret = tps23881_pi_get_max_pw_limit(priv, id); + if (ret < 0) + return ret; + status->c33_pw_limit_nb_ranges = 1; + status->c33_pw_limit_ranges->min = 2000; + status->c33_pw_limit_ranges->max = ret; + + ret = tps23881_pi_get_pw_limit(priv, id); + if (ret < 0) + return ret; + status->c33_avail_pw_limit = ret; + + ret = tps23881_pi_get_class(priv, id); + if (ret < 0) + return ret; + status->c33_pw_class = ret; + return 0; } @@ -645,12 +847,116 @@ static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev) return ret; } +static int tps23881_pi_get_current_limit(struct pse_controller_dev *pcdev, + int id) +{ + struct tps23881_priv *priv = to_tps23881_priv(pcdev); + int ret, mW, uV; + u64 tmp_64; + + ret = tps23881_pi_get_pw_limit(priv, id); + if (ret < 0) + return ret; + mW = ret; + + ret = tps23881_pi_get_voltage(pcdev, id); + if (ret < 0) + return ret; + uV = ret; + + tmp_64 = mW; + tmp_64 *= 1000000000ull; + /* uA = mW * 1000000000 / uV */ + return DIV_ROUND_CLOSEST_ULL(tmp_64, uV); +} + +static int +tps23881_pi_set_2p_pw_limit(struct tps23881_priv *priv, u8 chan, u8 pol) +{ + struct i2c_client *client = priv->client; + int ret, reg; + u16 val; + + reg = TPS23881_REG_2PAIR_POL1 + (chan % 4); + ret = i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + if (chan < 4) + val = (ret & 0xff00) | pol; + else + val = (ret & 0xff) | (pol << 8); + + return i2c_smbus_write_word_data(client, reg, val); +} + +static int +tps23881_pi_set_4p_pw_limit(struct tps23881_priv *priv, u8 chan, u8 pol) +{ + struct i2c_client *client = priv->client; + int ret, reg; + u16 val; + + if ((chan % 4) < 2) + reg = TPS23881_REG_4PAIR_POL1; + else + reg = TPS23881_REG_4PAIR_POL1 + 1; + + ret = i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + if (chan < 4) + val = (ret & 0xff00) | pol; + else + val = (ret & 0xff) | (pol << 8); + + return i2c_smbus_write_word_data(client, reg, val); +} + +static int tps23881_pi_set_current_limit(struct pse_controller_dev *pcdev, + int id, int max_uA) +{ + struct tps23881_priv *priv = to_tps23881_priv(pcdev); + u8 chan, pw_pol; + int ret, mW; + u64 tmp_64; + + ret = tps23881_pi_get_voltage(pcdev, id); + if (ret < 0) + return ret; + + tmp_64 = ret; + tmp_64 *= max_uA; + /* mW = uV * uA / 1000000000 */ + mW = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); + pw_pol = DIV_ROUND_CLOSEST_ULL(mW, TPS23881_MW_STEP); + + if (priv->port[id].is_4p) { + chan = priv->port[id].chan[0]; + /* One chan is enough to configure the PI power limit */ + ret = tps23881_pi_set_4p_pw_limit(priv, chan, pw_pol); + if (ret < 0) + return ret; + } else { + chan = priv->port[id].chan[0]; + ret = tps23881_pi_set_2p_pw_limit(priv, chan, pw_pol); + if (ret < 0) + return ret; + } + + return 0; +} + static const struct pse_controller_ops tps23881_ops = { .setup_pi_matrix = tps23881_setup_pi_matrix, .pi_enable = tps23881_pi_enable, .pi_disable = tps23881_pi_disable, .pi_is_enabled = tps23881_pi_is_enabled, .ethtool_get_status = tps23881_ethtool_get_status, + .pi_get_voltage = tps23881_pi_get_voltage, + .pi_get_current_limit = tps23881_pi_get_current_limit, + .pi_set_current_limit = tps23881_pi_set_current_limit, }; static const char fw_parity_name[] = "ti/tps23881/tps23881-parity-14.bin"; From patchwork Wed Oct 30 16:53:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856891 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5F9E21730F; Wed, 30 Oct 2024 16:54:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307243; cv=none; b=YAdlrQiNRasqIoFz7aT9B7E+RBmmvMEta8Q7azQiR2g0AiQ7TcomFoiHwJcKvPkNvIpT19r+sZikn+NP1dArzJtUSoedONRW1HKXo3iXxMAuWxoCdqdk4ngc2dRB53oe9Z/z6BiDSH9fQyDT+V31MnnKJqbQeY5JaDRc5kYpgUg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Wed, 30 Oct 2024 16:53:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307238; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r0scBcKP4vZWA4og7cEvQ3Oi93wItzNm6GwrVtx1oDQ=; b=DuX0bbHuNeSDAbB8rjAN/+OVVjHfVlg21ViNhLGTlwnG1T/7lEfc8RDvdjcZ83LonIcNMt QXGMWBboNvKBSYTXUdQ+s2PbubTEfxhyvq1jUEahrPM/gf11uXLG6/7Rga0Hdg3w5FNHBl p9ZWOB2C0F3uDtAjjCD/5WMnLAvb8xx/HtGleQ6hZADQUVn8ymjgCX5qhzG+PBsWFFswqj Bu6c41L45qaJhGh1laOnmeRt4LCy0FDFCKZ7D7BpOo4tI7fQuM67q8n862quJW2d6tK31R +Ha5r6dzXcrtqPuc/NaSuYPWue0tS3qBKR05uTJzTaNd+h9pifVIMKj3vunmJw== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:07 +0100 Subject: [PATCH RFC net-next v2 05/18] net: pse-pd: Add support for PSE device index Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-5-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Add support for a PSE device index to report the PSE controller index to the user through ethtool. This will be useful for future support of power domains and port priority management. Signed-off-by: Kory Maincent --- changes in v2: - new patch. --- drivers/net/pse-pd/pse_core.c | 23 ++++++++++++++++++----- include/linux/pse-pd/pse.h | 4 ++++ 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 2906ce173f66..68297428f6b5 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -13,6 +13,7 @@ static DEFINE_MUTEX(pse_list_mutex); static LIST_HEAD(pse_controller_list); +static DEFINE_IDA(pse_ida); /** * struct pse_control - a PSE control @@ -440,18 +441,22 @@ int pse_controller_register(struct pse_controller_dev *pcdev) mutex_init(&pcdev->lock); INIT_LIST_HEAD(&pcdev->pse_control_head); + ret = ida_alloc_max(&pse_ida, INT_MAX, GFP_KERNEL); + if (ret < 0) + return ret; + pcdev->id = ret; if (!pcdev->nr_lines) pcdev->nr_lines = 1; ret = of_load_pse_pis(pcdev); if (ret) - return ret; + goto free_pse_ida; if (pcdev->ops->setup_pi_matrix) { ret = pcdev->ops->setup_pi_matrix(pcdev); if (ret) - return ret; + goto free_pse_ida; } /* Each regulator name len is pcdev dev name + 7 char + @@ -468,15 +473,17 @@ int pse_controller_register(struct pse_controller_dev *pcdev) continue; reg_name = devm_kzalloc(pcdev->dev, reg_name_len, GFP_KERNEL); - if (!reg_name) - return -ENOMEM; + if (!reg_name) { + ret = -ENOMEM; + goto free_pse_ida; + } snprintf(reg_name, reg_name_len, "pse-%s_pi%d", dev_name(pcdev->dev), i); ret = devm_pse_pi_regulator_register(pcdev, reg_name, i); if (ret) - return ret; + goto free_pse_ida; } mutex_lock(&pse_list_mutex); @@ -484,6 +491,10 @@ int pse_controller_register(struct pse_controller_dev *pcdev) mutex_unlock(&pse_list_mutex); return 0; + +free_pse_ida: + ida_free(&pse_ida, pcdev->id); + return ret; } EXPORT_SYMBOL_GPL(pse_controller_register); @@ -494,6 +505,7 @@ EXPORT_SYMBOL_GPL(pse_controller_register); void pse_controller_unregister(struct pse_controller_dev *pcdev) { pse_release_pis(pcdev); + ida_free(&pse_ida, pcdev->id); mutex_lock(&pse_list_mutex); list_del(&pcdev->list); mutex_unlock(&pse_list_mutex); @@ -750,6 +762,7 @@ static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, return -EOPNOTSUPP; } + status->pse_id = pcdev->id; return ops->ethtool_get_status(pcdev, id, extack, status); } diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 85a08c349256..5312488cb3cf 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -31,6 +31,7 @@ struct pse_control_config { /** * struct pse_control_status - PSE control/channel status. * + * @pse_id: index number of the PSE. Set by PSE core. * @podl_admin_state: operational state of the PoDL PSE * functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState * @podl_pw_status: power detection status of the PoDL PSE. @@ -52,6 +53,7 @@ struct pse_control_config { * ranges */ struct pse_control_status { + u32 pse_id; enum ethtool_podl_pse_admin_state podl_admin_state; enum ethtool_podl_pse_pw_d_status podl_pw_status; enum ethtool_c33_pse_admin_state c33_admin_state; @@ -150,6 +152,7 @@ struct pse_pi { * @types: types of the PSE controller * @pi: table of PSE PIs described in this controller device * @no_of_pse_pi: flag set if the pse_pis devicetree node is not used + * @id: Index of the PSE */ struct pse_controller_dev { const struct pse_controller_ops *ops; @@ -163,6 +166,7 @@ struct pse_controller_dev { enum ethtool_pse_types types; struct pse_pi *pi; bool no_of_pse_pi; + int id; }; #if IS_ENABLED(CONFIG_PSE_CONTROLLER) From patchwork Wed Oct 30 16:53:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856892 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1478A21949E; Wed, 30 Oct 2024 16:54:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307245; cv=none; b=MGicPfCVQUtgc8IRa9FqzywcoO1fb/PnKI7gjYWHMDJsKUGH4zy4jHOuF3t5JYS1YrlDhQwuQ8NZampjJ/g+0/6hc/wNgNt4FAgMz+37LY/hWQgN3qJMxqeFjMnpti1eXbvwbS3JGlZ5JDGdiDMj4rtfCfc79IRNYY+09tFSuxM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307245; c=relaxed/simple; bh=7/SUzH1iE+IjkMU6nacgty4uR0xYGzk+atmbObgyYtI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gSK296ys/UCBr/VNIAdYRJnbqVi0tJd7tNYCKhVqb3YJrra4mi5NHHY9pznffkv3QqXc+T/Hu9c8v31WDiOfDJozz4JA0vTmNkQKC+l+5aGoYuf345sdz4kfU0NC2rpAOx2FgnH5ggLTMmi/jnOoz+h6gCB8+v9ADeBK/fopt0Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=nNWodEyL; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="nNWodEyL" Received: by mail.gandi.net (Postfix) with ESMTPSA id 07952C000C; Wed, 30 Oct 2024 16:53:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307240; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zvToooZ8KufRb0CfSPZryTDz0LXf06qzd584waQycqk=; b=nNWodEyLdxsP7rqH/42SJnyQEE3j0bFkWls3IDAw7qsJnlvuoHnpF9rjiPktVmajH++iH+ cz0W6MSB3xXzfCtELAf35bKf0fubqeLwZ2hbK2dXNju5JXji/6WpRIX2rCXw+Qxgm3mMfF XmozJcL/LxkvERvdWTs9JrADOK5TWGB6KEOAVmMRgFfGPpXkUkHqwXwPKzeeauvQmBJIPd fK+rHuOsBOUDlQXIFh6BGJ15BKcXaio1m+AyNEakJRFrSNnPu/bqfQKkGQYYo9BN9+sU1R Tm46InKwHKBTHHqWyfZxvXuTq/yt6AfbF/GiIXD0C48y72fe1o2VmnH1LvCi/Q== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:08 +0100 Subject: [PATCH RFC net-next v2 06/18] net: ethtool: Add support for new PSE device index description Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-6-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Add functionality to report the newly introduced PSE device index to the user, enabling better identification and management of PSE devices. Signed-off-by: Kory Maincent Reviewed-by: Oleksij Rempel Reviewed-by: Andrew Lunn Reviewed-by: Andrew Lunn --- changes in v2: - new patch. --- Documentation/networking/ethtool-netlink.rst | 4 ++++ include/uapi/linux/ethtool_netlink.h | 1 + net/ethtool/pse-pd.c | 4 ++++ 3 files changed, 9 insertions(+) diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index b25926071ece..bd7173d1fa4d 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -1766,6 +1766,7 @@ Kernel response contents: limit of the PoE PSE. ``ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES`` nested Supported power limit configuration ranges. + ``ETHTOOL_A_PSE_ID`` u32 Index of the PSE ========================================== ====== ============================= When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies @@ -1839,6 +1840,9 @@ identifies the C33 PSE power limit ranges through If the controller works with fixed classes, the min and max values will be equal. +The ``ETHTOOL_A_PSE_ID`` attribute identifies the index of the PSE +controller. + PSE_SET ======= diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index 283305f6b063..9a4c293a9a82 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -970,6 +970,7 @@ enum { ETHTOOL_A_C33_PSE_EXT_SUBSTATE, /* u32 */ ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, /* u32 */ ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */ + ETHTOOL_A_PSE_ID, /* u32 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index a0705edca22a..5edb8b0a669e 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -83,6 +83,7 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, const struct pse_control_status *st = &data->status; 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arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SW7mrQCp" Received: by mail.gandi.net (Postfix) with ESMTPSA id 65166C000F; Wed, 30 Oct 2024 16:54:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307241; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=G/Vy6U/BZ9R4PCxWYE8hyZM9z4zw6/kCUK4+VjKfrOk=; b=SW7mrQCppFLI9apW/NT2RNEklkyU13vHb1pVg4+QuxaRpxFoCLq89Io9Uo0I6TW+ls9U0u vf0rIJ9XeiY6XjPcZJ0AvOr1B0cirZijnZ+Y9YPixD5UnCUmrTgxbGwnvqLkC0ZNkgMqhD sithP+gQJlShGNd5D3UI8JV7pGPCc55VOQWkG71jSM2Z3jiPQ4eSVHdvhfgzY8cELzl3iv LnMaP5lz2cx7U/wyOchOiCXtGXpva3KU6UBdgYtfcFZ/coRxuRe1nlRQwMB6iCFBFgQXNP LpV2DLZcUEfF+x1+pl/jdsXr9rUa+iN18k85w6xkmxYJoXi8Nr2xsR8gQpAsRw== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:09 +0100 Subject: [PATCH RFC net-next v2 07/18] net: ethtool: Add support for ethnl_info_init_ntf helper function Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-7-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Introduce support for the ethnl_info_init_ntf helper function to enable initialization of ethtool notifications outside of the netlink.c file. This change allows for more flexible notification handling. Signed-off-by: Kory Maincent --- changes in v2: - new patch. --- net/ethtool/netlink.c | 5 +++++ net/ethtool/netlink.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/net/ethtool/netlink.c b/net/ethtool/netlink.c index e3f0ef6b851b..808cc8096f93 100644 --- a/net/ethtool/netlink.c +++ b/net/ethtool/netlink.c @@ -805,6 +805,11 @@ static void ethnl_default_notify(struct net_device *dev, unsigned int cmd, typedef void (*ethnl_notify_handler_t)(struct net_device *dev, unsigned int cmd, const void *data); +void ethnl_info_init_ntf(struct genl_info *info, u8 cmd) +{ + genl_info_init_ntf(info, ðtool_genl_family, cmd); +} + static const ethnl_notify_handler_t ethnl_notify_handlers[] = { [ETHTOOL_MSG_LINKINFO_NTF] = ethnl_default_notify, [ETHTOOL_MSG_LINKMODES_NTF] = ethnl_default_notify, diff --git a/net/ethtool/netlink.h b/net/ethtool/netlink.h index 203b08eb6c6f..d04a8e9d54db 100644 --- a/net/ethtool/netlink.h +++ b/net/ethtool/netlink.h @@ -322,6 +322,8 @@ struct ethnl_sock_priv { int ethnl_sock_priv_set(struct sk_buff *skb, struct net_device *dev, u32 portid, enum ethnl_sock_type type); +void ethnl_info_init_ntf(struct genl_info *info, u8 cmd); + /** * struct ethnl_request_ops - unified handling of GET and SET requests * @request_cmd: command id for request (GET) From patchwork Wed Oct 30 16:53:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856897 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66F13219CB2; Wed, 30 Oct 2024 16:54:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307248; cv=none; b=LIrk1FXuU9RixTfgRdGhuIU/DrAyB96YsWaITb7tZNVMdN/lL7lgOs5QN47Y1L++KvU939B/MMJQtfeGeVDasMEnV+YFW+/1TKuXSUZBoJ/Qt+SYUBuAq+Csog+nMkDERYxWZW0EvZt2h5o0tOoUek+MpIhEoixateYL2bu0+bM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307248; c=relaxed/simple; bh=XSTqBxG79muhWGtJZTSPOybHI0VjOMwITB3nRdchBHA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LIfaKXzbxGqEwOd0DHzl+qPHCpkhuVV01UMc1ynXXhbBLWVv6eYwfqVc6uKrDVNmtuCJ8qwV9ejRkRTLnqGch1EqyaiZbWtOGrM6e5ElRYl0l8w3RLg9qTeR/fO7FdDt6jKmDFqBnUmNJTaLebVNaIu47RQhfYSfTHeiIFyqO4c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=At7qZq0W; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="At7qZq0W" Received: by mail.gandi.net (Postfix) with ESMTPSA id A3D22C0010; Wed, 30 Oct 2024 16:54:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307242; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YWeSI+uyqhf3WD9HtyPmIgrTHQ91Fae/0fNjWz1XPaU=; b=At7qZq0WZ05erxDFMcTc45mDnZ4GE/N9OaPOs2GuxAagMOq9AhGL/UOckPIAM/s+NlbAso iYgJZaQx+UqbJWa2rZz3T8qYVcAnVq+mVl0+naOFbErBZ6Oq9jurqVQ36OE57G76GdiHxE e7mY4P4Ya/QAGfn2p7V0shwuR43gKKBfZqw5rz3yWuAAaJrhm5bUOKUWylYRSB4h+HVmoC m26GS3A/+93b5GiELQUiz9AMLNHTPQXXLMf15LPlecsFg15PdzcVr8UyXoTNzsajUTb89E rcjrlr/qo7HSwPbV1c6OvGzWRh3zlUioRbd23iGMEPERlPUOLWCZkl+QVhxf8A== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:10 +0100 Subject: [PATCH RFC net-next v2 08/18] net: pse-pd: Add support for reporting events Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-8-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Add support for devm_pse_irq_helper() to register PSE interrupts. This aims to report events such as over-current or over-temperature conditions similarly to how the regulator API handles them but using a specific PSE ethtool netlink socket. Signed-off-by: Kory Maincent --- Change in v2: - Add support for PSE ethtool notification. - Saved the attached phy_device in the pse_control structure to know which interface should have the notification. - Rethink devm_pse_irq_helper() without devm_regulator_irq_helper() call. --- drivers/net/mdio/fwnode_mdio.c | 26 ++++---- drivers/net/pse-pd/pse_core.c | 122 ++++++++++++++++++++++++++++++++++- include/linux/ethtool_netlink.h | 9 +++ include/linux/pse-pd/pse.h | 16 ++++- include/uapi/linux/ethtool.h | 11 ++++ include/uapi/linux/ethtool_netlink.h | 11 ++++ net/ethtool/pse-pd.c | 46 +++++++++++++ 7 files changed, 224 insertions(+), 17 deletions(-) diff --git a/drivers/net/mdio/fwnode_mdio.c b/drivers/net/mdio/fwnode_mdio.c index b156493d7084..7d571895a8eb 100644 --- a/drivers/net/mdio/fwnode_mdio.c +++ b/drivers/net/mdio/fwnode_mdio.c @@ -18,7 +18,8 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("FWNODE MDIO bus (Ethernet PHY) accessors"); static struct pse_control * -fwnode_find_pse_control(struct fwnode_handle *fwnode) +fwnode_find_pse_control(struct fwnode_handle *fwnode, + struct phy_device *phydev) { struct pse_control *psec; struct device_node *np; @@ -30,7 +31,7 @@ fwnode_find_pse_control(struct fwnode_handle *fwnode) if (!np) return NULL; - psec = of_pse_control_get(np); + psec = of_pse_control_get(np, phydev); if (PTR_ERR(psec) == -ENOENT) return NULL; @@ -121,15 +122,9 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, u32 phy_id; int rc; - psec = fwnode_find_pse_control(child); - if (IS_ERR(psec)) - return PTR_ERR(psec); - mii_ts = fwnode_find_mii_timestamper(child); - if (IS_ERR(mii_ts)) { - rc = PTR_ERR(mii_ts); - goto clean_pse; - } + if (IS_ERR(mii_ts)) + return PTR_ERR(mii_ts); is_c45 = fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45"); if (is_c45 || fwnode_get_phy_id(child, &phy_id)) @@ -162,6 +157,12 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, goto clean_phy; } + psec = fwnode_find_pse_control(child, phy); + if (IS_ERR(psec)) { + rc = PTR_ERR(psec); + goto unregister_phy; + } + phy->psec = psec; /* phy->mii_ts may already be defined by the PHY driver. A @@ -173,12 +174,13 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, return 0; +unregister_phy: + if (is_acpi_node(child) || is_of_node(child)) + phy_device_remove(phy); clean_phy: phy_device_free(phy); clean_mii_ts: unregister_mii_timestamper(mii_ts); -clean_pse: - pse_control_put(psec); return rc; } diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 68297428f6b5..712cb2d9c7c4 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -6,6 +6,7 @@ // #include +#include #include #include #include @@ -23,6 +24,7 @@ static DEFINE_IDA(pse_ida); * @list: list entry for the pcdev's PSE controller list * @id: ID of the PSE line in the PSE controller device * @refcnt: Number of gets of this pse_control + * @attached_phydev: PHY device pointer attached by the PSE control */ struct pse_control { struct pse_controller_dev *pcdev; @@ -30,6 +32,7 @@ struct pse_control { struct list_head list; unsigned int id; struct kref refcnt; + struct phy_device *attached_phydev; }; static int of_load_single_pse_pi_pairset(struct device_node *node, @@ -552,6 +555,116 @@ int devm_pse_controller_register(struct device *dev, } EXPORT_SYMBOL_GPL(devm_pse_controller_register); +struct pse_irq { + struct pse_controller_dev *pcdev; + struct pse_irq_desc desc; + unsigned long *notifs; +}; + +static unsigned long pse_to_regulator_notifs(unsigned long notifs) +{ + switch (notifs) { + case ETHTOOL_C33_PSE_EVENT_OVER_CURRENT: + return REGULATOR_EVENT_OVER_CURRENT; + case ETHTOOL_C33_PSE_EVENT_OVER_TEMP: + return REGULATOR_EVENT_OVER_TEMP; + } + return 0; +} + +static struct phy_device * +pse_control_find_phy_by_id(struct pse_controller_dev *pcdev, int id) +{ + struct pse_control *psec; + + mutex_lock(&pse_list_mutex); + list_for_each_entry(psec, &pcdev->pse_control_head, list) { + if (psec->id == id) + return psec->attached_phydev; + } + mutex_unlock(&pse_list_mutex); + + return NULL; +} + +static irqreturn_t pse_notifier_isr(int irq, void *data) +{ + struct netlink_ext_ack extack = {}; + struct pse_controller_dev *pcdev; + unsigned long notifs_mask = 0; + struct pse_irq_desc *desc; + struct pse_irq *h = data; + int ret, i; + + desc = &h->desc; + pcdev = h->pcdev; + + /* Clear notifs mask */ + memset(h->notifs, 0, pcdev->nr_lines * sizeof(*h->notifs)); + mutex_lock(&pcdev->lock); + ret = desc->map_event(irq, pcdev, h->notifs, ¬ifs_mask); + mutex_unlock(&pcdev->lock); + if (ret || !notifs_mask) + return IRQ_NONE; + + for_each_set_bit(i, ¬ifs_mask, pcdev->nr_lines) { + struct phy_device *phydev; + unsigned long notifs, rnotifs; + + /* Do nothing PI not described */ + if (!pcdev->pi[i].rdev) + continue; + + notifs = h->notifs[i]; + dev_dbg(h->pcdev->dev, + "Sending PSE notification EVT 0x%lx\n", notifs); + + phydev = pse_control_find_phy_by_id(pcdev, i); + if (phydev) + ethnl_pse_send_ntf(phydev, notifs, &extack); + rnotifs = pse_to_regulator_notifs(notifs); + regulator_notifier_call_chain(pcdev->pi[i].rdev, rnotifs, + NULL); + } + + return IRQ_HANDLED; +} + +int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq, + int irq_flags, const struct pse_irq_desc *d) +{ + struct device *dev = pcdev->dev; + struct pse_irq *h; + int ret; + + if (!d || !d->map_event || !d->name) + return -EINVAL; + + h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); + if (!h) + return -ENOMEM; + + h->pcdev = pcdev; + h->desc = *d; + h->desc.name = devm_kstrdup(dev, d->name, GFP_KERNEL); + if (!h->desc.name) + return -ENOMEM; + + h->notifs = devm_kcalloc(pcdev->dev, pcdev->nr_lines, + sizeof(*h->notifs), GFP_KERNEL); + if (!h->notifs) + return -ENOMEM; + + ret = devm_request_threaded_irq(dev, irq, NULL, pse_notifier_isr, + IRQF_ONESHOT | irq_flags, + h->desc.name, h); + if (ret) + dev_err(pcdev->dev, "Failed to request IRQ %d\n", irq); + + return ret; +} +EXPORT_SYMBOL_GPL(devm_pse_irq_helper); + /* PSE control section */ static void __pse_control_release(struct kref *kref) @@ -594,7 +707,8 @@ void pse_control_put(struct pse_control *psec) EXPORT_SYMBOL_GPL(pse_control_put); static struct pse_control * -pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index) +pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index, + struct phy_device *phydev) { struct pse_control *psec; int ret; @@ -633,6 +747,7 @@ pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index) psec->pcdev = pcdev; list_add(&psec->list, &pcdev->pse_control_head); psec->id = index; + psec->attached_phydev = phydev; kref_init(&psec->refcnt); return psec; @@ -688,7 +803,8 @@ static int psec_id_xlate(struct pse_controller_dev *pcdev, return pse_spec->args[0]; } -struct pse_control *of_pse_control_get(struct device_node *node) +struct pse_control *of_pse_control_get(struct device_node *node, + struct phy_device *phydev) { struct pse_controller_dev *r, *pcdev; struct of_phandle_args args; @@ -738,7 +854,7 @@ struct pse_control *of_pse_control_get(struct device_node *node) } /* pse_list_mutex also protects the pcdev's pse_control list */ - psec = pse_control_get_internal(pcdev, psec_id); + psec = pse_control_get_internal(pcdev, psec_id, phydev); out: mutex_unlock(&pse_list_mutex); diff --git a/include/linux/ethtool_netlink.h b/include/linux/ethtool_netlink.h index aba91335273a..0fa1d8f59cf2 100644 --- a/include/linux/ethtool_netlink.h +++ b/include/linux/ethtool_netlink.h @@ -43,6 +43,9 @@ void ethtool_aggregate_rmon_stats(struct net_device *dev, struct ethtool_rmon_stats *rmon_stats); bool ethtool_dev_mm_supported(struct net_device *dev); +void ethnl_pse_send_ntf(struct phy_device *phydev, unsigned long notif, + struct netlink_ext_ack *extack); + #else static inline int ethnl_cable_test_alloc(struct phy_device *phydev, u8 cmd) { @@ -120,6 +123,12 @@ static inline bool ethtool_dev_mm_supported(struct net_device *dev) return false; } +static inline void ethnl_pse_send_ntf(struct phy_device *phydev, + unsigned long notif, + struct netlink_ext_ack *extack) +{ +} + #endif /* IS_ENABLED(CONFIG_ETHTOOL_NETLINK) */ static inline int ethnl_cable_test_result(struct phy_device *phydev, u8 pair, diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 5312488cb3cf..ce8737c2219a 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -8,6 +8,7 @@ #include #include #include +#include /* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */ #define MAX_PI_CURRENT 1920000 @@ -15,6 +16,13 @@ struct phy_device; struct pse_controller_dev; +struct pse_irq_desc { + const char *name; + int (*map_event)(int irq, struct pse_controller_dev *pcdev, + unsigned long *notifs, + unsigned long *notifs_mask); +}; + /** * struct pse_control_config - PSE control/channel configuration. * @@ -175,8 +183,11 @@ void pse_controller_unregister(struct pse_controller_dev *pcdev); struct device; int devm_pse_controller_register(struct device *dev, struct pse_controller_dev *pcdev); +int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq, + int irq_flags, const struct pse_irq_desc *d); -struct pse_control *of_pse_control_get(struct device_node *node); +struct pse_control *of_pse_control_get(struct device_node *node, + struct phy_device *phydev); void pse_control_put(struct pse_control *psec); int pse_ethtool_get_status(struct pse_control *psec, @@ -194,7 +205,8 @@ bool pse_has_c33(struct pse_control *psec); #else -static inline struct pse_control *of_pse_control_get(struct device_node *node) +static inline struct pse_control *of_pse_control_get(struct device_node *node, + struct phy_device *phydev) { return ERR_PTR(-ENOENT); } diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h index c405ed63acfa..a1ad257b1ec1 100644 --- a/include/uapi/linux/ethtool.h +++ b/include/uapi/linux/ethtool.h @@ -998,6 +998,17 @@ enum ethtool_c33_pse_pw_d_status { ETHTOOL_C33_PSE_PW_D_STATUS_OTHERFAULT, }; +/** + * enum ethtool_c33_pse_events - event list of the C33 PSE controller. + * @ETHTOOL_C33_PSE_EVENT_OVER_CURRENT: PSE output current is too high. + * @ETHTOOL_C33_PSE_EVENT_OVER_TEMP: PSE in over temperature state. + */ + +enum ethtool_c33_pse_events { + ETHTOOL_C33_PSE_EVENT_OVER_CURRENT = 1 << 0, + ETHTOOL_C33_PSE_EVENT_OVER_TEMP = 1 << 1, +}; + /** * enum ethtool_podl_pse_admin_state - operational state of the PoDL PSE * functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index 9a4c293a9a82..526b8b099c0e 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -114,6 +114,7 @@ enum { ETHTOOL_MSG_MODULE_FW_FLASH_NTF, ETHTOOL_MSG_PHY_GET_REPLY, ETHTOOL_MSG_PHY_NTF, + ETHTOOL_MSG_PSE_NTF, /* add new constants above here */ __ETHTOOL_MSG_KERNEL_CNT, @@ -977,6 +978,16 @@ enum { ETHTOOL_A_PSE_MAX = (__ETHTOOL_A_PSE_CNT - 1) }; +/* PSE NOTIFY */ +enum { + ETHTOOL_A_PSE_NTF_UNSPEC, + ETHTOOL_A_PSE_NTF_HEADER, /* nest - ETHTOOL_A_HEADER_* */ + ETHTOOL_A_C33_PSE_NTF_EVENTS, /* u32 */ + + __ETHTOOL_A_PSE_NTF_CNT, + ETHTOOL_A_PSE_NTF_MAX = (__ETHTOOL_A_PSE_NTF_CNT - 1) +}; + enum { ETHTOOL_A_RSS_UNSPEC, ETHTOOL_A_RSS_HEADER, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 5edb8b0a669e..52df956db0ba 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -319,3 +319,49 @@ const struct ethnl_request_ops ethnl_pse_request_ops = { .set = ethnl_set_pse, /* PSE has no notification */ }; + +void ethnl_pse_send_ntf(struct phy_device *phydev, unsigned long notifs, + struct netlink_ext_ack *extack) +{ + struct net_device *netdev = phydev->attached_dev; + struct genl_info info; + void *reply_payload; + struct sk_buff *skb; + int reply_len; + int ret; + + if (!netdev || !notifs) + return; + + ethnl_info_init_ntf(&info, ETHTOOL_MSG_MM_NTF); + info.extack = extack; + + reply_len = ethnl_reply_header_size(); + /* _C33_PSE_NTF_EVENTS */ + reply_len += nla_total_size(sizeof(u32)); + skb = genlmsg_new(reply_len, GFP_KERNEL); + reply_payload = ethnl_bcastmsg_put(skb, ETHTOOL_MSG_MM_NTF); + if (!reply_payload) + goto err_skb; + + ret = ethnl_fill_reply_header(skb, netdev, + ETHTOOL_A_PSE_NTF_HEADER); + if (ret < 0) + goto err_skb; + + ret = nla_put_u32(skb, ETHTOOL_A_C33_PSE_NTF_EVENTS, notifs); + if (ret) { + WARN_ONCE(ret == -EMSGSIZE, + "calculated message payload length (%d) not sufficient\n", + reply_len); + goto err_skb; + } + + genlmsg_end(skb, reply_payload); + ethnl_multicast(skb, netdev); + return; + +err_skb: + nlmsg_free(skb); +} +EXPORT_SYMBOL_GPL(ethnl_pse_send_ntf); From patchwork Wed Oct 30 16:53:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856898 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A200B21A6FB; Wed, 30 Oct 2024 16:54:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307249; cv=none; b=bwmbBNdI9Ic8z3e/9PGdm2PQG7wlbmKHUQeUACnzGoFbZkPKszDLuQpmfrK9ajfF1maeFm86i9iuf0iJHo/oKYZM02NrEkSOS3Vq+EfzAZow2YhkKPr0ij6U8fKJJ5N3AUFPcv9HE9sowXpnH/FmKuwHfbKr+6dpWMHJplje0o8= ARC-Message-Signature: i=1; a=rsa-sha256; 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Wed, 30 Oct 2024 16:54:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307244; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4hLFAduRWdDTP41xJjCujhm6I6wL+JgXBmoJJ0CTzww=; b=ol3mWFCyayVkTErFc3SZQhO6fsF1ejZZKk9jcW1W373IWwWamJ+x7ku7gzVtyvXfW19S6W 99151XFaJfj/fJ6cM8g6KFAtbdwgOira1CZd8Gb8o72w9Ldb/7N9pBYoTEhAf/bX83sK0+ B8IV5jHRFkkE2y0Dt6WE01vgKO/w0NV7O8RQ0wbpDMb7ROTqP8qUQBqwZmwBYY+UIKNn4j IJeksz5TVro4Frv1rOXzxoZVs4P7iqH1YIaN8/LDMWA0rOZFIoDHmxynRLvVWKeFBjsGhL atO1mfTTwqx+0BaMzX2z6A3x/EfElQWxucIh2k8DA6Hp+kJ9IYWl/izxxNJkbA== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:11 +0100 Subject: [PATCH RFC net-next v2 09/18] netlink: specs: Add support for PSE netlink notifications Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-9-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Introduce support for PSE-specific netlink notifications, allowing for the reporting of events related to c33 PSE (Power Sourcing Equipment). Signed-off-by: Kory Maincent --- changes in v2: - new patch. --- Documentation/netlink/specs/ethtool.yaml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 93369f0eb816..6983dea39976 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -1137,6 +1137,18 @@ attribute-sets: - name: downstream-sfp-name type: string + - + name: pse-ntf + attributes: + - + name: header + type: nest + nested-attributes: header + - + name: c33-pse-ntf-events + type: nest + nested-attributes: bitset + name-prefix: ethtool-a- operations: enum-model: directional @@ -1960,3 +1972,13 @@ operations: name: phy-ntf doc: Notification for change in PHY devices. notify: phy-get + - + name: pse-ntf + doc: Notification for pse events. + + attribute-set: pse-ntf + + event: + attributes: + - header + - c33-pse-ntf-events From patchwork Wed Oct 30 16:53:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856899 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF77221BB0A; Wed, 30 Oct 2024 16:54:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307250; cv=none; b=oK0yDHSgSDrjkoOtrQjT5T1/W0ZqRWqOAAIogAs4a5kowSZyGcTlLJXHTpbnN7r8ZNKl9buPbEtIjbBuHRqlQ8go+w198/1pxBwq75Q9MAE87A+oPGl9L0AYz9fqfFQln+j3k4E4eVcNKaYNcLdmEB8X8Mzx0oMG2u9CpO8vGII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307250; c=relaxed/simple; bh=pgngeL1kRve3sqgMsMP9B0SyqIQZzJSt8f6LKb/qKpM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GF6f2rR30OXcuSiTr4jat544DTrOVFI0A4CWHiUhDBdkiFbWkPD17XEYgOHKhyvcEwyqUKSX0NP0XWGtcJJU/rAeBhnaEnhz9K4fI1uCC2f358GsBK9GEJqI589t5ucRNnzOjUaN85hCrtu2BRMqh32oinnyLNQ+nDHgGynByr4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=B/eP4cyZ; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="B/eP4cyZ" Received: by mail.gandi.net (Postfix) with ESMTPSA id 34B12C0014; Wed, 30 Oct 2024 16:54:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307245; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QxWo1fsyB4vJFRjc+GJjnsHl3xaRDNnxkxepOa554E4=; b=B/eP4cyZSRc5tV9OSXiF7D4Ck/5sJR2OtfsgiX5SKZzov1IEEwcKsl2fssp4cHqbRFu3Wi G7fEcgOIVrqtDF8klRdxfA8e/QX1eyJwv3niC6Kqa1Ok80hLEzZxMH3QvTXo1GGKBMI/OW hyXkbw4SFqowfzca6qiM5lf55XlPB7GpEyaY//Y/PlHk9QpV0jhAhmyvtujoYhUh2LDfWB UJ+UykR7ZWnAYmSJ5Op48OoNo5k9x0Ci57AKsbMlc1oUy7tZHKnykY/4XKgg+17zCKT2xV TXuoDPjNnltPonuf3QVUlVCUvaZsb39Dqqo4UtqkazJ5Y3IZcWsOy8rh4GyM6A== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:12 +0100 Subject: [PATCH RFC net-next v2 10/18] net: pse-pd: tps23881: Add support for PSE events and interrupts Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-10-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Add support for PSE event reporting through interrupts. Set up the newly introduced devm_pse_irq_helper helper to register the interrupt. Events are reported for over-current and over-temperature conditions. Reviewed-by: Kyle Swenson Signed-off-by: Kory Maincent --- Change in v2: - Remove support for OSS pin and TPC23881 specific port priority management --- drivers/net/pse-pd/tps23881.c | 90 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 928d9844462c..3e15e2c97b24 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -17,6 +17,13 @@ #define TPS23881_MAX_CHANS 8 +#define TPS23881_REG_IT 0x0 +#define TPS23881_REG_IT_MASK 0x1 +#define TPS23881_REG_IT_IFAULT BIT(5) +#define TPS23881_REG_IT_SUPF BIT(7) +#define TPS23881_REG_FAULT 0x7 +#define TPS23881_REG_SUPF_EVENT 0xb +#define TPS23881_REG_TSD BIT(7) #define TPS23881_REG_PW_STATUS 0x10 #define TPS23881_REG_OP_MODE 0x12 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa @@ -24,6 +31,7 @@ #define TPS23881_REG_DET_CLA_EN 0x14 #define TPS23881_REG_GEN_MASK 0x17 #define TPS23881_REG_NBITACC BIT(5) +#define TPS23881_REG_INTEN BIT(7) #define TPS23881_REG_PW_EN 0x19 #define TPS23881_REG_2PAIR_POL1 0x1e #define TPS23881_REG_PORT_MAP 0x26 @@ -1055,6 +1063,82 @@ static int tps23881_flash_sram_fw(struct i2c_client *client) return 0; } +static int tps23881_irq_handler(int irq, struct pse_controller_dev *pcdev, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + struct tps23881_priv *priv = to_tps23881_priv(pcdev); + struct i2c_client *client = priv->client; + int ret, i; + u16 val; + + ret = i2c_smbus_read_word_data(client, TPS23881_REG_IT); + if (ret < 0) + return ret; + + val = (u16)ret; + /* The Supply event bit is repeated twice so we only need to read + * the one from the first byte. + */ + if (val & TPS23881_REG_IT_SUPF) { + ret = i2c_smbus_read_word_data(client, TPS23881_REG_SUPF_EVENT); + if (ret < 0) + return ret; + + if (ret & TPS23881_REG_TSD) { + for (i = 0; i < TPS23881_MAX_CHANS; i++) { + *notifs_mask |= 1 << i; + notifs[i] = ETHTOOL_C33_PSE_EVENT_OVER_TEMP; + } + } + } + + if (val & (TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_IFAULT << 8)) { + ret = i2c_smbus_read_word_data(client, TPS23881_REG_FAULT); + if (ret < 0) + return ret; + + /* Convert interrupt events located in 0xf0f to 0xff be + * aligned with the port number. + */ + val = (u16)(((ret >> 4) & 0xf0) | (ret & 0x0f)); + + *notifs_mask |= val; + for_each_set_bit(i, notifs_mask, TPS23881_MAX_CHANS) + notifs[i] = ETHTOOL_C33_PSE_EVENT_OVER_CURRENT; + } + + return 0; +} + +static int tps23881_setup_irq(struct tps23881_priv *priv, int irq) +{ + struct i2c_client *client = priv->client; + struct pse_irq_desc irq_desc = { + .name = "tps23881-irq", + .map_event = tps23881_irq_handler, + }; + int ret; + u16 val; + + val = TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_SUPF | + TPS23881_REG_IT_IFAULT << 8 | TPS23881_REG_IT_SUPF << 8; + ret = i2c_smbus_write_word_data(client, TPS23881_REG_IT_MASK, val); + if (ret) + return ret; + + ret = i2c_smbus_read_word_data(client, TPS23881_REG_GEN_MASK); + if (ret < 0) + return ret; + + val = (u16)(ret | TPS23881_REG_INTEN | TPS23881_REG_INTEN << 8); + ret = i2c_smbus_write_word_data(client, TPS23881_REG_GEN_MASK, val); + if (ret < 0) + return ret; + + return devm_pse_irq_helper(&priv->pcdev, irq, 0, &irq_desc); +} + static int tps23881_i2c_probe(struct i2c_client *client) { struct device *dev = &client->dev; @@ -1135,6 +1219,12 @@ static int tps23881_i2c_probe(struct i2c_client *client) "failed to register PSE controller\n"); } + if (client->irq) { + ret = tps23881_setup_irq(priv, client->irq); + if (ret) + return ret; + } + return ret; } From patchwork Wed Oct 30 16:53:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856900 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C758224B41; Wed, 30 Oct 2024 16:54:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307251; cv=none; b=dGGHIeMYPij0c5YICbjU3LyGepE4MwGgeDRet0sPowS7y30bfPr0pWqzqofK+X+IN0pyPJ1J8ZemzNcZr8uU1LSv2Gr7D4oCWkkCQBDumbp53qpTBiNLK7RUKDpSVVwudJzVa/VTHfjl06XON5N76Y2zJOq8HZc6dsfF3WqA2+s= ARC-Message-Signature: i=1; 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Wed, 30 Oct 2024 16:54:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307246; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ysWxHEpRdEmHqrjbAKaK8Fqz3AhswCItaU2FNFSHMD0=; b=oSx3d3p7WIMtRFNBxl6hkqvHLBN3USrAXINJb7uGUJVGFZG1LVTb+5OZqRdhUoXKshavUw uI0StiW04bkLRUF5Z9BEX8VBH2wHQe+QmQx9yaQS0B0/VeGWZyZ69Sm/DBDH7b4jYvlSKE pBZtfsbaURoP/vX1mHPKzbSR5u6EsWhp9l0gYeY9/eleqEEjuxpTciaZ1YhxxFxlz/CBhE njIBKqVB2VJ4DThX19Z8qqUrALjYoABKl81REqv0akq72OuP6+MsXbgZS1tpUaoA5KnMBG JOe1oTPL2nvxw++Xh5muekLT00Qwj8iOsyGQGKpurVkN622U5H2dSoP2hZVo4g== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:13 +0100 Subject: [PATCH RFC net-next v2 11/18] regulator: Add support for power budget description Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-11-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) In preparation for future support of PSE port priority and power management, we need the power budget value of the power supply. This addition allows the regulator to track the available power capacity, which will be essential for prioritizing ports when making power allocation decisions. Signed-off-by: Kory Maincent --- Changes in v2: - new patch. --- drivers/regulator/core.c | 11 +++++++++++ drivers/regulator/of_regulator.c | 3 +++ include/linux/regulator/consumer.h | 6 ++++++ include/linux/regulator/machine.h | 2 ++ 4 files changed, 22 insertions(+) diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 1179766811f5..cd7b26f77a8e 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c @@ -4622,6 +4622,17 @@ int regulator_get_current_limit(struct regulator *regulator) } EXPORT_SYMBOL_GPL(regulator_get_current_limit); +/** + * regulator_get_power_budget - get regulator total power budget + * @regulator: regulator source + * + * Return: Power budget of the regulator in mW. + */ +int regulator_get_power_budget(struct regulator *regulator) +{ + return regulator->rdev->constraints->pw_budget; +} + /** * regulator_set_mode - set regulator operating mode * @regulator: regulator source diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c index 3f490d81abc2..a8996e7597d4 100644 --- a/drivers/regulator/of_regulator.c +++ b/drivers/regulator/of_regulator.c @@ -125,6 +125,9 @@ static int of_get_regulation_constraints(struct device *dev, if (constraints->min_uA != constraints->max_uA) constraints->valid_ops_mask |= REGULATOR_CHANGE_CURRENT; + if (!of_property_read_u32(np, "regulator-power-budget", &pval)) + constraints->pw_budget = pval; + constraints->boot_on = of_property_read_bool(np, "regulator-boot-on"); constraints->always_on = of_property_read_bool(np, "regulator-always-on"); if (!constraints->always_on) /* status change should be possible. */ diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h index b9ce521910a0..3e75d49d361f 100644 --- a/include/linux/regulator/consumer.h +++ b/include/linux/regulator/consumer.h @@ -235,6 +235,7 @@ int regulator_sync_voltage(struct regulator *regulator); int regulator_set_current_limit(struct regulator *regulator, int min_uA, int max_uA); int regulator_get_current_limit(struct regulator *regulator); +int regulator_get_power_budget(struct regulator *regulator); int regulator_set_mode(struct regulator *regulator, unsigned int mode); unsigned int regulator_get_mode(struct regulator *regulator); @@ -534,6 +535,11 @@ static inline int regulator_get_current_limit(struct regulator *regulator) return 0; } +static inline int regulator_get_power_budget(struct regulator *regulator) +{ + return 0; +} + static inline int regulator_set_mode(struct regulator *regulator, unsigned int mode) { diff --git a/include/linux/regulator/machine.h b/include/linux/regulator/machine.h index 0cd76d264727..3304cf8773b7 100644 --- a/include/linux/regulator/machine.h +++ b/include/linux/regulator/machine.h @@ -113,6 +113,7 @@ struct notification_limit { * @min_uA: Smallest current consumers may set. * @max_uA: Largest current consumers may set. * @ilim_uA: Maximum input current. + * @pw_budget: Power budget for the regulator in mW. * @system_load: Load that isn't captured by any consumer requests. * * @over_curr_limits: Limits for acting on over current. @@ -185,6 +186,7 @@ struct regulation_constraints { int max_uA; int ilim_uA; + int pw_budget; int system_load; /* used for coupled regulators */ From patchwork Wed Oct 30 16:53:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856901 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 826FB22802B; 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arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="KwPTMdmK" Received: by mail.gandi.net (Postfix) with ESMTPSA id CAF1BC0013; Wed, 30 Oct 2024 16:54:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307248; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eH94oL4C+uAtHpUg+7hvQnupTMOvyV/l+52BXsH7jwA=; b=KwPTMdmKSgaQCp5EMrAGyqtd7uzCpA3dkipCPWLf7ADvWya0q0zuaHbdf+82d1WL6csOnY /wvcyn3ve/ZEIs2Uiakm6+WhovXRVwMGzY10RlE90Fyg9kXaLdcoXPP6cmSX0gKWt7W8k7 wkjNTAZlfXpsjFQQzzwnyPmuWhKdldOe4UIeCJrzuBZa3cMh1vFC1pGUtZ+60Xxr79lToG zlFvrirkWfb1nO/ya05vevuSg17SByewArYdyXbY/2FrmQ8RrHKusT4Q/wB0AVy5p5GTqM uqs72vwmf6Frnqncaa5BHsxUW41UhSv3eozK4wlajMthRMwzee0ux27EFRMRQA== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:14 +0100 Subject: [PATCH RFC net-next v2 12/18] regulator: dt-bindings: Add regulator-power-budget property Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-12-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Introduce a new property to describe the power budget of the regulator. This property will allow power management support for regulator consumers like PSE controllers, enabling them to make decisions based on the available power capacity. Signed-off-by: Kory Maincent --- Changes in v2: - new patch. --- Documentation/devicetree/bindings/regulator/regulator.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/regulator.yaml b/Documentation/devicetree/bindings/regulator/regulator.yaml index 1ef380d1515e..52a410b51769 100644 --- a/Documentation/devicetree/bindings/regulator/regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/regulator.yaml @@ -34,6 +34,9 @@ properties: regulator-input-current-limit-microamp: description: maximum input current regulator allows + regulator-power-budget: + description: power budget of the regulator in mW + regulator-always-on: description: boolean, regulator should never be disabled type: boolean From patchwork Wed Oct 30 16:53:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856902 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C72652281D5; Wed, 30 Oct 2024 16:54:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307254; cv=none; b=I7QfRUg+MiV4Ywh++6xADsjT/OruaNnTBAKwiRZ6uz6bZQRsdB9D8TimX2X+ifhooE9sXbbIr1hfCKw3bZcq6CJn3qtCIcyT2XRbRVpiiva+DBqMkTG1YYdOwNsUKEn5ljIlcdTfC6jHmAbshESeZb7w1x5Ovx5OzeXvLBJ3I3g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307254; c=relaxed/simple; bh=bIbennVFQOoAbhfAkEzVVrAC6qa7AQEZgPtmaeHMieI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=W+9BU1+kSRRirF2K7VmgCWxWWxWKmXcjgLa4O6adq+HvmZQHYHFvQ/tOIYkG9QuoTwrE2rq28sv7u0ZAqvOZEZKW1x4sUFO5L7NTg7PaNHR9YsXZwHA6C8OPGpOkKAAIr4tvfo05nE1SIVYNQBsghJajA5GM+G/xPJcbX4lksSQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=fiQA+V7W; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="fiQA+V7W" Received: by mail.gandi.net (Postfix) with ESMTPSA id 1E631C0015; Wed, 30 Oct 2024 16:54:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5PGDvkEewZhLHhVNOjTjRFkS3ITb9jjwAXpCdiJWZ98=; b=fiQA+V7W1Jn1SgX6g6/RLNpZMdrYookqhrdxKG0QKxm/tdl8/MOqdta0vjvtXIr3uk/FjN fyoMtoP9pIj3RMuRS5BjI2iuBbnxt4dgF74odYxkkC/Nf0ISFcizTvQ2+M9RVr5EMNuw+w DcCTNCEsN0molYDNwdpXOoMJtpsLTMlNYZXBYVHylYsx5esUnT/cVR2RgBuly2pr8Usf0Y NGaHD5dhFgLbpfNVpTGnGt0HEkdVGtE34t6gio2aCWY7FySz24eWS1ZWgAdrr5daYXIXoB EEoqWbkgH8iO/vFIvIMT96rm9leFwmG8Jtt90rMcCB/RbigEnC8PdjPP52eDtQ== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:15 +0100 Subject: [PATCH RFC net-next v2 13/18] net: pse-pd: Add support for PSE power domains Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-13-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Introduce PSE power domain support in preparation for future port priority features. Multiple PSE PIs are grouped under a PSE power domain, which defines the available power budget. This setup allows the system to check whether activating a port would exceed the budget, helping prevent over-budget states. Signed-off-by: Kory Maincent --- Changes in v2: - new patch. --- drivers/net/pse-pd/pse_core.c | 121 ++++++++++++++++++++++++++++++++++++++++++ include/linux/pse-pd/pse.h | 2 + 2 files changed, 123 insertions(+) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 712cb2d9c7c4..13f6ddcfca10 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -15,6 +15,7 @@ static DEFINE_MUTEX(pse_list_mutex); static LIST_HEAD(pse_controller_list); static DEFINE_IDA(pse_ida); +static DEFINE_XARRAY_ALLOC(pse_pw_d_map); /** * struct pse_control - a PSE control @@ -35,6 +36,12 @@ struct pse_control { struct phy_device *attached_phydev; }; +struct pse_power_domain { + int id; + struct regulator *supply; + int pw_budget; +}; + static int of_load_single_pse_pi_pairset(struct device_node *node, struct pse_pi *pi, int pairset_num) @@ -431,6 +438,115 @@ devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev, return 0; } +static void pse_flush_pw_ds(struct pse_controller_dev *pcdev) +{ + struct pse_power_domain *pw_d; + int i; + + for (i = 0; i < pcdev->nr_lines; i++) { + pw_d = xa_load(&pse_pw_d_map, pcdev->pi[i].pw_d->id); + if (pw_d) { + regulator_put(pw_d->supply); + xa_erase(&pse_pw_d_map, pw_d->id); + } + } +} + +static struct pse_power_domain *devm_pse_alloc_pw_d(struct device *dev) +{ + struct pse_power_domain *pw_d; + int index, ret; + + pw_d = devm_kzalloc(dev, sizeof(*pw_d), GFP_KERNEL); + if (!pw_d) + return ERR_PTR(-ENOMEM); + + ret = xa_alloc(&pse_pw_d_map, &index, pw_d, xa_limit_31b, GFP_KERNEL); + if (ret) + return ERR_PTR(ret); + + pw_d->id = index; + return pw_d; +} + +static int pse_get_power_budget(struct regulator *supply) +{ + int ret, uV; + s64 tmp_64; + + ret = regulator_get_voltage(supply); + if (ret < 0) + return ret; + + uV = ret; + ret = regulator_get_power_budget(supply); + if (ret < 0) + return ret; + + tmp_64 = ret; + tmp_64 *= uV; + /* mW = uV * uA / 1000000000 */ + return DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); +} + +static int pse_register_pw_ds(struct pse_controller_dev *pcdev) +{ + int i, ret; + + for (i = 0; i < pcdev->nr_lines; i++) { + struct regulator_dev *rdev = pcdev->pi[i].rdev; + struct pse_power_domain *pw_d; + struct regulator *supply; + bool present = false; + unsigned long index; + int pw_budget; + + /* No regulator or regulator parent supply registered. + * We need a regulator parent to register a PSE power domain + */ + if (!rdev || !rdev->supply) + continue; + + xa_for_each(&pse_pw_d_map, index, pw_d) { + /* Power supply already registered as a PSE power + * domain. + */ + if (pw_d->supply == rdev->supply) { + present = true; + pcdev->pi[i].pw_d = pw_d; + break; + } + } + if (present) + break; + + ret = pse_get_power_budget(rdev->supply); + if (ret < 0) { + dev_warn(pcdev->dev, + "can't read power budget from PI %d, no power domain will be associated\n", + i); + continue; + } + pw_budget = ret; + + pw_d = devm_pse_alloc_pw_d(pcdev->dev); + if (IS_ERR_OR_NULL(pw_d)) + return PTR_ERR(pw_d); + + pw_d->pw_budget = pw_budget; + supply = regulator_get(pcdev->dev, rdev->supply_name); + if (IS_ERR(supply)) { + xa_erase(&pse_pw_d_map, pw_d->id); + return PTR_ERR(supply); + } + + pw_d->supply = rdev->supply; + pcdev->pi[i].pw_d = pw_d; + } + + return 0; +} + /** * pse_controller_register - register a PSE controller device * @pcdev: a pointer to the initialized PSE controller device @@ -489,6 +605,10 @@ int pse_controller_register(struct pse_controller_dev *pcdev) goto free_pse_ida; } + ret = pse_register_pw_ds(pcdev); + if (ret) + goto free_pse_ida; + mutex_lock(&pse_list_mutex); list_add(&pcdev->list, &pse_controller_list); mutex_unlock(&pse_list_mutex); @@ -508,6 +628,7 @@ EXPORT_SYMBOL_GPL(pse_controller_register); void pse_controller_unregister(struct pse_controller_dev *pcdev) { pse_release_pis(pcdev); + pse_flush_pw_ds(pcdev); ida_free(&pse_ida, pcdev->id); mutex_lock(&pse_list_mutex); list_del(&pcdev->list); diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index ce8737c2219a..3b35dc0f8dc3 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -138,12 +138,14 @@ struct pse_pi_pairset { * @np: device node pointer of the PSE PI node * @rdev: regulator represented by the PSE PI * @admin_state_enabled: PI enabled state + * @pw_d: Power domain of the PSE PI */ struct pse_pi { struct pse_pi_pairset pairset[2]; struct device_node *np; struct regulator_dev *rdev; bool admin_state_enabled; + struct pse_power_domain *pw_d; }; /** From patchwork Wed Oct 30 16:53:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856903 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28D7C228B5D; Wed, 30 Oct 2024 16:54:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307255; cv=none; b=oz/2WG1tsFuv+Db9hLLl+5bJuMRzmzc8QP+OiPj09HuWfqS/itPLPNklWTlTpK2i+gfs3WBvIlRIK77Cs9GR0mcef9Tj2wgeg98nsPfhXb+CGs4+G28JLzD8LeNqNfzPOTc7Q9HN3ESggyMPmG4Fx3J58I2g5TZxbVgXAaTemm8= ARC-Message-Signature: i=1; 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Wed, 30 Oct 2024 16:54:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307250; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7dziNS10ELnVbTBvXG7mY7ScmIfQ75je25h84Kh8NZY=; b=Y9whLtQMTUlGaOil42Z9dzJlwNjLmNx/6vxHQjEvAnC8RvB9oOmxZpGVQGDUqwB7u0T60/ HKEFyKRhsjPq6LAawMwBmZiws1honlATRmOVMKDGOMKASk4c56F8ON3vV+C+2vZ+qi5e1e KT3+TJAFT/UiMmLtwio+BXPW2dGjb4sInifdR2DGCLZ4VJ3+YzEk9JyN8TZwB0vYXlAHA0 IZwOV2eAq/yVyOkGzjbK1QKy4l2/yZ4slox4H+wTpsljdBSJ3BGvzx+yIZG02zU7N8a9t9 nmYacIOkOlP35ph16YwAJlyJHFcM6oi2jz8mm6GfFtyhzGWCxhOGLTtDDs/UCQ== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:16 +0100 Subject: [PATCH RFC net-next v2 14/18] net: ethtool: Add support for new power domains index description Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-14-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Report the index of the newly introduced PSE power domain to the user, enabling improved management of the power budget for PSE devices. Signed-off-by: Kory Maincent --- Changes in v2: - new patch. --- Documentation/networking/ethtool-netlink.rst | 4 ++++ drivers/net/pse-pd/pse_core.c | 1 + include/linux/pse-pd/pse.h | 2 ++ include/uapi/linux/ethtool_netlink.h | 1 + net/ethtool/pse-pd.c | 7 +++++++ 5 files changed, 15 insertions(+) diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index bd7173d1fa4d..3573543ae5ad 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -1767,6 +1767,7 @@ Kernel response contents: ``ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES`` nested Supported power limit configuration ranges. ``ETHTOOL_A_PSE_ID`` u32 Index of the PSE + ``ETHTOOL_A_PSE_PW_D_ID`` u32 Index of the PSE power domain ========================================== ====== ============================= When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies @@ -1843,6 +1844,9 @@ equal. The ``ETHTOOL_A_PSE_ID`` attribute identifies the index of the PSE controller. +The ``ETHTOOL_A_PSE_PW_D_ID`` attribute identifies the index of PSE power +domain. + PSE_SET ======= diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 13f6ddcfca10..29374b1ce378 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -1000,6 +1000,7 @@ static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, } status->pse_id = pcdev->id; + status->pw_d_id = pcdev->pi[id].pw_d->id; return ops->ethtool_get_status(pcdev, id, extack, status); } diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 3b35dc0f8dc3..e275ef7e1eb0 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -40,6 +40,7 @@ struct pse_control_config { * struct pse_control_status - PSE control/channel status. * * @pse_id: index number of the PSE. Set by PSE core. + * @pw_d_id: PSE power domain index. Set by PSE core. * @podl_admin_state: operational state of the PoDL PSE * functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState * @podl_pw_status: power detection status of the PoDL PSE. @@ -62,6 +63,7 @@ struct pse_control_config { */ struct pse_control_status { u32 pse_id; + u32 pw_d_id; enum ethtool_podl_pse_admin_state podl_admin_state; enum ethtool_podl_pse_pw_d_status podl_pw_status; enum ethtool_c33_pse_admin_state c33_admin_state; diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index 526b8b099c0e..47784a165e8b 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -972,6 +972,7 @@ enum { ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, /* u32 */ ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */ ETHTOOL_A_PSE_ID, /* u32 */ + ETHTOOL_A_PSE_PW_D_ID, /* u32 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 52df956db0ba..1288e8a2c3a7 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -84,6 +84,8 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, int len = 0; len += nla_total_size(sizeof(u32)); /* _PSE_ID */ + if (st->pw_d_id > 0) + len += nla_total_size(sizeof(u32)); /* _PSE_PW_D_ID */ if (st->podl_admin_state > 0) len += nla_total_size(sizeof(u32)); /* _PODL_PSE_ADMIN_STATE */ if (st->podl_pw_status > 0) @@ -152,6 +154,11 @@ static int pse_fill_reply(struct sk_buff *skb, if (nla_put_u32(skb, ETHTOOL_A_PSE_ID, st->pse_id)) return -EMSGSIZE; + if (st->pw_d_id > 0 && + nla_put_u32(skb, ETHTOOL_A_PSE_PW_D_ID, + st->pw_d_id)) + return -EMSGSIZE; + if (st->podl_admin_state > 0 && nla_put_u32(skb, ETHTOOL_A_PODL_PSE_ADMIN_STATE, st->podl_admin_state)) From patchwork Wed Oct 30 16:53:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856904 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F510229132; Wed, 30 Oct 2024 16:54:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307257; cv=none; b=sfAEEK+ApgvLJS0i00dMsm+kDpAUW/4eREZH9x4T451kgnX9vDbpf8x+z3byNIKW+8VXCD0kvweGGaEDw6ibj6ouDFuFhpV9Qh60TJWOlr7TfB/PlGHbEvv8wgdN7N9/xXlk2h/JcZ35TS09EGLtkKQfySaKLXwAWCJN2icvqqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307257; c=relaxed/simple; bh=Aw35rarNrgyd9iIqV12PBn4CMkLCsURbgF2H3eKwo6Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QKIgsYMx4UjYSLCjnrkPB908FmBkfsEHVMfTvuhabTClFn+LjtJJXx40IS2hrbFtYLyu/t68gcDMSvpvQ8ZX3hsRsBEIdltq+CYigvB6KAuNPwyoXDEVLbQGroHyEo2d7w5iN5HqAoBQ5eyyqV9xh3Z0HRwGvr42q79L8Nv6NPY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=m7YNFqxL; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="m7YNFqxL" Received: by mail.gandi.net (Postfix) with ESMTPSA id C2CCEC0016; Wed, 30 Oct 2024 16:54:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307252; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0IEJNg3a6UlsNz51NUXx0CUXxOrj3s8D1zu3Xp8SybM=; b=m7YNFqxL5VR9RUdHp09Ptg08rCCd5ql/CSHlHXsO77lUyh9FxQ+iTR9bzh8lVahaKoxkY2 SZzsasZMxL0oyZOujedjE0zcdyhnJCtZpol0Su7/ZVIfpsyImZEIglU1RfSJlN4aIc4GqL TvH44TeJFw87AgOGRzgnDerh9+M1xwWZuONsNuS2Zy+XMKa+TKSG2aKcq9d2EV9A3n7JQn NjrjVJ9QZACzV/QfbRWyV+F6nH/GAMulqnh3Xt1QAzEognmGhJEx1KdBb2pkukCditIN8v 7VwFOAo2DDLlTttt8iR4KR1FIw0cnR/XmWLTfv2AQmH8+5R+deWjBK7MukMaaQ== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:17 +0100 Subject: [PATCH RFC net-next v2 15/18] net: pse-pd: Add support for getting and setting port priority Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-15-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) This patch introduces the ability to configure the PSE PI port priority. Port priority is utilized by PSE controllers to determine which ports to turn off first in scenarios such as power budget exceedance. The pis_prio_max value is used to define the maximum priority level supported by the controller. Both the current priority and the maximum priority are exposed to the user through the pse_ethtool_get_status call. This patch add support for two mode of port priority modes. 1. Static Method: This method involves distributing power based on PD classification. It’s straightforward and stable, the PSE core keeping track of the budget and subtracting the power requested by each PD’s class. Advantages: Every PD gets its promised power at any time, which guarantees reliability. Disadvantages: PD classification steps are large, meaning devices request much more power than they actually need. As a result, the power supply may only operate at, say, 50% capacity, which is inefficient and wastes money. Priority max value is matching the number of PSE PIs within the PSE. 2. Dynamic Method: To address the inefficiencies of the static method, vendors like Microchip have introduced dynamic power budgeting, as seen in the PD692x0 firmware. This method monitors the current consumption per port and subtracts it from the available power budget. When the budget is exceeded, lower-priority ports are shut down. Advantages: This method optimizes resource utilization, saving costs. Disadvantages: Low-priority devices may experience instability. Priority max value is set by the PSE controller driver. Signed-off-by: Kory Maincent --- Change in v2: - Rethink the port priority support. --- drivers/net/pse-pd/pse_core.c | 305 +++++++++++++++++++++++++++++++++++++++++- include/linux/pse-pd/pse.h | 51 +++++++ include/uapi/linux/ethtool.h | 28 +++- 3 files changed, 375 insertions(+), 9 deletions(-) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 29374b1ce378..25911083ff3b 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -229,6 +229,9 @@ static int pse_pi_is_enabled(struct regulator_dev *rdev) return -EOPNOTSUPP; id = rdev_get_id(rdev); + if (pcdev->port_prio_mode == ETHTOOL_PSE_PORT_PRIO_STATIC) + return pcdev->pi[id].pw_enabled; + mutex_lock(&pcdev->lock); ret = ops->pi_is_enabled(pcdev, id); mutex_unlock(&pcdev->lock); @@ -248,6 +251,16 @@ static int pse_pi_enable(struct regulator_dev *rdev) id = rdev_get_id(rdev); mutex_lock(&pcdev->lock); + if (pcdev->port_prio_mode == ETHTOOL_PSE_PORT_PRIO_STATIC) { + /* Manage enabled status by software. + * Real enable process will happen after a port connected + * event. + */ + pcdev->pi[id].admin_state_enabled = 1; + mutex_unlock(&pcdev->lock); + return 0; + } + ret = ops->pi_enable(pcdev, id); if (!ret) pcdev->pi[id].admin_state_enabled = 1; @@ -268,9 +281,12 @@ static int pse_pi_disable(struct regulator_dev *rdev) id = rdev_get_id(rdev); mutex_lock(&pcdev->lock); + ret = ops->pi_disable(pcdev, id); - if (!ret) + if (!ret) { pcdev->pi[id].admin_state_enabled = 0; + pcdev->pi[id].pw_enabled = 0; + } mutex_unlock(&pcdev->lock); return ret; @@ -564,6 +580,7 @@ int pse_controller_register(struct pse_controller_dev *pcdev) if (ret < 0) return ret; pcdev->id = ret; + pcdev->port_prio_supp_modes |= BIT(ETHTOOL_PSE_PORT_PRIO_DISABLED); if (!pcdev->nr_lines) pcdev->nr_lines = 1; @@ -704,10 +721,166 @@ pse_control_find_phy_by_id(struct pse_controller_dev *pcdev, int id) return psec->attached_phydev; } mutex_unlock(&pse_list_mutex); - return NULL; } +static void pse_deallocate_pw_budget(struct pse_controller_dev *pcdev, int id) +{ + struct pse_power_domain *pw_d = pcdev->pi[id].pw_d; + + if (!pw_d) + return; + + pw_d->pw_budget += pcdev->pi[id].pw_allocated; +} + +static int pse_pi_disable_isr(struct pse_controller_dev *pcdev, int id, + struct netlink_ext_ack *extack) +{ + const struct pse_controller_ops *ops = pcdev->ops; + int ret; + + if (!ops->pi_disable) { + NL_SET_ERR_MSG(extack, "PSE does not support disable control"); + return -EOPNOTSUPP; + } + + if (!pcdev->pi[id].admin_state_enabled || + !pcdev->pi[id].pw_enabled) + return 0; + + ret = ops->pi_disable(pcdev, id); + if (ret) { + NL_SET_ERR_MSG_FMT(extack, + "PI %d: disable error %d", + id, ret); + return ret; + } + + pse_deallocate_pw_budget(pcdev, id); + pcdev->pi[id].pw_enabled = 0; + return 0; +} + +static int pse_disable_pis_prio(struct pse_controller_dev *pcdev, int prio) +{ + int i, ret; + + for (i = 0; i < pcdev->nr_lines; i++) { + struct netlink_ext_ack extack = {}; + struct phy_device *phydev; + + if (pcdev->pi[i].prio != prio) + continue; + + dev_dbg(pcdev->dev, + "Disabling PI %d to free power budget\n", + i); + + NL_SET_ERR_MSG_FMT(&extack, + "Disabling PI %d to free power budget", + i); + + ret = pse_pi_disable_isr(pcdev, i, &extack); + phydev = pse_control_find_phy_by_id(pcdev, i); + if (phydev) + ethnl_pse_send_ntf(phydev, + ETHTOOL_C33_PSE_EVENT_DISCONNECTED, + &extack); + if (ret) + return ret; + } + + return 0; +} + +static int pse_allocate_pw_budget(struct pse_controller_dev *pcdev, int id, + int pw_req, struct netlink_ext_ack *extack) +{ + struct pse_power_domain *pw_d = pcdev->pi[id].pw_d; + int ret, _prio; + + if (!pw_d) + return 0; + + _prio = pcdev->nr_lines; + while (pw_req > pw_d->pw_budget && _prio > pcdev->pi[id].prio) { + ret = pse_disable_pis_prio(pcdev, _prio--); + if (ret) + return ret; + } + + if (pw_req > pw_d->pw_budget) { + NL_SET_ERR_MSG_FMT(extack, + "PI %d: not enough power budget available", + id); + return -ERANGE; + } + + pw_d->pw_budget -= pw_req; + pcdev->pi[id].pw_allocated = pw_req; + return 0; +} + +static int pse_pi_enable_isr(struct pse_controller_dev *pcdev, int id, + struct netlink_ext_ack *extack) +{ + const struct pse_controller_ops *ops = pcdev->ops; + int ret, pw_req; + + if (!ops->pi_enable || !ops->pi_get_pw_req) { + NL_SET_ERR_MSG(extack, "PSE does not support enable control"); + return -EOPNOTSUPP; + } + + if (!pcdev->pi[id].admin_state_enabled || + pcdev->pi[id].pw_enabled) + return 0; + + ret = ops->pi_get_pw_req(pcdev, id); + if (ret < 0) + return ret; + + pw_req = ret; + ret = pse_allocate_pw_budget(pcdev, id, pw_req, extack); + if (ret) + return ret; + + ret = ops->pi_enable(pcdev, id); + if (ret) { + pse_deallocate_pw_budget(pcdev, id); + NL_SET_ERR_MSG_FMT(extack, + "PI %d: enable error %d", + id, ret); + return ret; + } + + pcdev->pi[id].pw_enabled = 1; + return 0; +} + +static int pse_set_config_isr(struct pse_controller_dev *pcdev, int id, + unsigned long notifs, + struct netlink_ext_ack *extack) +{ + int ret = 0; + + if (notifs & ETHTOOL_C33_PSE_EVENT_CONNECTED && + notifs & ETHTOOL_C33_PSE_EVENT_DISCONNECTED) { + NL_SET_ERR_MSG_FMT(extack, + "PI %d: error, connection and disconnection reported simultaneously", + id); + return -EINVAL; + } + + if (notifs & ETHTOOL_C33_PSE_EVENT_CONNECTED) + ret = pse_pi_enable_isr(pcdev, id, extack); + else if (notifs & ETHTOOL_C33_PSE_EVENT_DISCONNECTED) + ret = pse_pi_disable_isr(pcdev, id, extack); + + return ret; +} + static irqreturn_t pse_notifier_isr(int irq, void *data) { struct netlink_ext_ack extack = {}; @@ -724,7 +897,6 @@ static irqreturn_t pse_notifier_isr(int irq, void *data) memset(h->notifs, 0, pcdev->nr_lines * sizeof(*h->notifs)); mutex_lock(&pcdev->lock); ret = desc->map_event(irq, pcdev, h->notifs, ¬ifs_mask); - mutex_unlock(&pcdev->lock); if (ret || !notifs_mask) return IRQ_NONE; @@ -737,6 +909,12 @@ static irqreturn_t pse_notifier_isr(int irq, void *data) continue; notifs = h->notifs[i]; + if (pcdev->port_prio_mode == ETHTOOL_PSE_PORT_PRIO_STATIC) { + ret = pse_set_config_isr(pcdev, i, notifs, &extack); + if (ret) + notifs |= ETHTOOL_C33_PSE_EVENT_PORT_PRIO_STATIC_ERROR; + } + dev_dbg(h->pcdev->dev, "Sending PSE notification EVT 0x%lx\n", notifs); @@ -748,6 +926,8 @@ static irqreturn_t pse_notifier_isr(int irq, void *data) NULL); } + mutex_unlock(&pcdev->lock); + return IRQ_HANDLED; } @@ -1001,6 +1181,20 @@ static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, status->pse_id = pcdev->id; status->pw_d_id = pcdev->pi[id].pw_d->id; + status->c33_prio_supp_modes = pcdev->port_prio_supp_modes; + status->c33_prio_mode = pcdev->port_prio_mode; + switch (pcdev->port_prio_mode) { + case ETHTOOL_PSE_PORT_PRIO_STATIC: + status->c33_prio_max = pcdev->nr_lines; + status->c33_prio = pcdev->pi[id].prio; + break; + case ETHTOOL_PSE_PORT_PRIO_DYNAMIC: + status->c33_prio_max = pcdev->pis_prio_max; + break; + default: + break; + } + return ops->ethtool_get_status(pcdev, id, extack, status); } @@ -1038,11 +1232,12 @@ static int pse_ethtool_c33_set_config(struct pse_control *psec, case ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED: /* We could have mismatch between admin_state_enabled and * state reported by regulator_is_enabled. This can occur when - * the PI is forcibly turn off by the controller. Call - * regulator_disable on that case to fix the counters state. + * the PI is forcibly turn off by the controller or by the + * interrupt context. Call regulator_disable on that case + * to fix the counters state. */ - if (psec->pcdev->pi[psec->id].admin_state_enabled && - !regulator_is_enabled(psec->ps)) { + if (!regulator_is_enabled(psec->ps) && + psec->pcdev->pi[psec->id].admin_state_enabled) { err = regulator_disable(psec->ps); if (err) break; @@ -1149,6 +1344,102 @@ int pse_ethtool_set_pw_limit(struct pse_control *psec, } EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit); +int pse_ethtool_set_prio(struct pse_control *psec, + struct netlink_ext_ack *extack, + unsigned int prio) +{ + struct pse_controller_dev *pcdev = psec->pcdev; + const struct pse_controller_ops *ops; + int ret = 0; + + switch (pcdev->port_prio_mode) { + case ETHTOOL_PSE_PORT_PRIO_STATIC: + if (prio > pcdev->nr_lines) { + NL_SET_ERR_MSG_FMT(extack, + "priority %d exceed priority max %d", + prio, pcdev->nr_lines); + return -ERANGE; + } + + /* We don't want priority change in the middle of an + * enable/disable call + */ + mutex_lock(&pcdev->lock); + pcdev->pi[psec->id].prio = prio; + mutex_unlock(&pcdev->lock); + break; + + case ETHTOOL_PSE_PORT_PRIO_DYNAMIC: + ops = psec->pcdev->ops; + if (!ops->pi_set_prio) { + NL_SET_ERR_MSG(extack, + "pse driver does not support setting port priority"); + return -EOPNOTSUPP; + } + + if (prio > pcdev->pis_prio_max) { + NL_SET_ERR_MSG_FMT(extack, + "priority %d exceed priority max %d", + prio, pcdev->pis_prio_max); + return -ERANGE; + } + + mutex_lock(&pcdev->lock); + ret = ops->pi_set_prio(pcdev, psec->id, prio); + mutex_unlock(&pcdev->lock); + break; + + default: + ret = -EOPNOTSUPP; + } + + return ret; +} +EXPORT_SYMBOL_GPL(pse_ethtool_set_prio); + +int pse_ethtool_set_prio_mode(struct pse_control *psec, + struct netlink_ext_ack *extack, + enum pse_port_prio_modes prio_mode) +{ + struct pse_controller_dev *pcdev = psec->pcdev; + const struct pse_controller_ops *ops; + int ret = 0, i; + + if (!(BIT(prio_mode) & pcdev->port_prio_supp_modes)) { + NL_SET_ERR_MSG(extack, "priority mode not supported"); + return -EOPNOTSUPP; + } + + ops = psec->pcdev->ops; + + /* We don't want priority mode change in the middle of an + * enable/disable call + */ + mutex_lock(&pcdev->lock); + pcdev->port_prio_mode = prio_mode; + + /* Reset all priorities */ + for (i = 0; i < psec->pcdev->nr_lines; i++) { + /* PI not described */ + if (!pcdev->pi[i].rdev) + continue; + + pcdev->pi[i].prio = 0; + + if (!ops->pi_set_prio) + continue; + + if (pcdev->port_prio_supp_modes & + BIT(ETHTOOL_PSE_PORT_PRIO_DYNAMIC)) + ret = ops->pi_set_prio(pcdev, psec->id, 0); + } + + mutex_unlock(&psec->pcdev->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pse_ethtool_set_prio_mode); + bool pse_has_podl(struct pse_control *psec) { return psec->pcdev->types & ETHTOOL_PSE_PODL; diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index e275ef7e1eb0..653f9e3634bb 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -9,9 +9,12 @@ #include #include #include +#include /* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */ #define MAX_PI_CURRENT 1920000 +/* Maximum power in mW according to IEEE 802.3-2022 Table 145-16 */ +#define MAX_PI_PW 99900 struct phy_device; struct pse_controller_dev; @@ -60,6 +63,12 @@ struct pse_control_config { * is in charge of the memory allocation. * @c33_pw_limit_nb_ranges: number of supported power limit configuration * ranges + * @c33_prio_supp_modes: PSE port priority modes supported. Set by PSE core. + * @c33_prio_mode: PSE port priority mode selected. Set by PSE core. + * @c33_prio_max: max priority allowed for the c33_prio variable value. Set + * by PSE core. + * @c33_prio: priority of the PSE. Set by PSE core in case of static port + * priority mode. */ struct pse_control_status { u32 pse_id; @@ -74,6 +83,10 @@ struct pse_control_status { u32 c33_avail_pw_limit; struct ethtool_c33_pse_pw_limit_range *c33_pw_limit_ranges; u32 c33_pw_limit_nb_ranges; + u32 c33_prio_supp_modes; + enum pse_port_prio_modes c33_prio_mode; + u32 c33_prio_max; + u32 c33_prio; }; /** @@ -93,6 +106,8 @@ struct pse_control_status { * set_current_limit regulator callback. * Should not return an error in case of MAX_PI_CURRENT * current value set. + * @pi_set_prio: Configure the PSE PI priority. + * @pi_get_pw_req: Get the power requested by a PD before enabling the PSE PI */ struct pse_controller_ops { int (*ethtool_get_status)(struct pse_controller_dev *pcdev, @@ -107,6 +122,9 @@ struct pse_controller_ops { int id); int (*pi_set_current_limit)(struct pse_controller_dev *pcdev, int id, int max_uA); + int (*pi_set_prio)(struct pse_controller_dev *pcdev, int id, + unsigned int prio); + int (*pi_get_pw_req)(struct pse_controller_dev *pcdev, int id); }; struct module; @@ -141,6 +159,10 @@ struct pse_pi_pairset { * @rdev: regulator represented by the PSE PI * @admin_state_enabled: PI enabled state * @pw_d: Power domain of the PSE PI + * @prio: Priority of the PSE PI. Used in static port priority mode + * @pw_enabled: PSE PI power status in static port priority mode + * @pw_allocated: Power allocated to a PSE PI to manage power budget in + * static port priority mode */ struct pse_pi { struct pse_pi_pairset pairset[2]; @@ -148,6 +170,9 @@ struct pse_pi { struct regulator_dev *rdev; bool admin_state_enabled; struct pse_power_domain *pw_d; + int prio; + bool pw_enabled; + int pw_allocated; }; /** @@ -165,6 +190,9 @@ struct pse_pi { * @pi: table of PSE PIs described in this controller device * @no_of_pse_pi: flag set if the pse_pis devicetree node is not used * @id: Index of the PSE + * @pis_prio_max: Maximum value allowed for the PSE PIs priority + * @port_prio_supp_modes: Bitfield of port priority mode supported by the PSE + * @port_prio_mode: Current port priority mode of the PSE */ struct pse_controller_dev { const struct pse_controller_ops *ops; @@ -179,6 +207,9 @@ struct pse_controller_dev { struct pse_pi *pi; bool no_of_pse_pi; int id; + unsigned int pis_prio_max; + u32 port_prio_supp_modes; + enum pse_port_prio_modes port_prio_mode; }; #if IS_ENABLED(CONFIG_PSE_CONTROLLER) @@ -203,6 +234,12 @@ int pse_ethtool_set_config(struct pse_control *psec, int pse_ethtool_set_pw_limit(struct pse_control *psec, struct netlink_ext_ack *extack, const unsigned int pw_limit); +int pse_ethtool_set_prio(struct pse_control *psec, + struct netlink_ext_ack *extack, + unsigned int prio); +int pse_ethtool_set_prio_mode(struct pse_control *psec, + struct netlink_ext_ack *extack, + enum pse_port_prio_modes prio_mode); bool pse_has_podl(struct pse_control *psec); bool pse_has_c33(struct pse_control *psec); @@ -240,6 +277,20 @@ static inline int pse_ethtool_set_pw_limit(struct pse_control *psec, return -EOPNOTSUPP; } +static inline int pse_ethtool_set_prio(struct pse_control *psec, + struct netlink_ext_ack *extack, + unsigned int prio) +{ + return -EOPNOTSUPP; +} + +static inline int pse_ethtool_set_prio_mode(struct pse_control *psec, + struct netlink_ext_ack *extack, + enum pse_port_prio_modes prio_mode) +{ + return -EOPNOTSUPP; +} + static inline bool pse_has_podl(struct pse_control *psec) { return false; diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h index a1ad257b1ec1..22664b1ea4a2 100644 --- a/include/uapi/linux/ethtool.h +++ b/include/uapi/linux/ethtool.h @@ -1002,11 +1002,35 @@ enum ethtool_c33_pse_pw_d_status { * enum ethtool_c33_pse_events - event list of the C33 PSE controller. * @ETHTOOL_C33_PSE_EVENT_OVER_CURRENT: PSE output current is too high. * @ETHTOOL_C33_PSE_EVENT_OVER_TEMP: PSE in over temperature state. + * @ETHTOOL_C33_PSE_EVENT_CONNECTED: PD detected on the PSE. + * @ETHTOOL_C33_PSE_EVENT_DISCONNECTED: PD has been disconnected on the PSE. + * @ETHTOOL_C33_PSE_EVENT_PORT_PRIO_STATIC_ERROR: PSE faced an error in static + * port priority management mode. */ enum ethtool_c33_pse_events { - ETHTOOL_C33_PSE_EVENT_OVER_CURRENT = 1 << 0, - ETHTOOL_C33_PSE_EVENT_OVER_TEMP = 1 << 1, + ETHTOOL_C33_PSE_EVENT_OVER_CURRENT = 1 << 0, + ETHTOOL_C33_PSE_EVENT_OVER_TEMP = 1 << 1, + ETHTOOL_C33_PSE_EVENT_CONNECTED = 1 << 2, + ETHTOOL_C33_PSE_EVENT_DISCONNECTED = 1 << 3, + ETHTOOL_C33_PSE_EVENT_PORT_PRIO_STATIC_ERROR = 1 << 4, +}; + +/** + * enum pse_port_prio_modes - PSE port priority modes. + * @ETHTOOL_PSE_PORT_PRIO_DISABLED: Port priority disabled. + * @ETHTOOL_PSE_PORT_PRIO_STATIC: PSE static port priority. Port priority + * based on the power requested during PD classification. This mode + * is managed by the PSE core. + * @ETHTOOL_PSE_PORT_PRIO_DYNAMIC: PSE dynamic port priority. Port priority + * based on the current consumption per ports compared to the total + * power budget. This mode is managed by the PSE controller. + */ + +enum pse_port_prio_modes { + ETHTOOL_PSE_PORT_PRIO_DISABLED, + ETHTOOL_PSE_PORT_PRIO_STATIC, + ETHTOOL_PSE_PORT_PRIO_DYNAMIC, }; /** From patchwork Wed Oct 30 16:53:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856905 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 197672296FB; Wed, 30 Oct 2024 16:54:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307258; cv=none; b=q3NQtmCr3H7Cz7wPXoPTixuNkC24t5sO4IB1xFPZfbjchMTCQqdF+PwT1ED/ntHR67itRKFIkxgVPeeucVLUrFKam8r1PExmz/nzlKa44YEUpt7EfuvDA3g6Fx4xHg9YfTqZ2m1CLrWlQBm6JAqUkQ6M53xAzbDfpV3J1GqJWVo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307258; c=relaxed/simple; bh=qX+YkhDlPG//wL/JH9DiVb0gpnB3cmnkUkvSYjhEkoY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k4w7Dm6I/myHGUhqNfsvZKVKNR2t/bimfTnsG8CyOZ7N3iD66dkatFktB5P7MmOwdHfij7om8q2Gdwes7GG2O4lK+ovq6TRoAz+UEv3kW5MYaVfpAoyoxH8IoJSQOKhpC0YuseLX0iirPnpcNfBE7TPwVR1Iu6FqYN3uucktv88= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=PAHTytHD; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PAHTytHD" Received: by mail.gandi.net (Postfix) with ESMTPSA id 1E2E7C000F; Wed, 30 Oct 2024 16:54:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307253; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1THR6bEa4LkLlafXsbuPr+6IzTBnW5zq/DBbHrAtWpE=; b=PAHTytHD1g4mccSWs8mgYgd77IiXsLljhYXFDJzgtNo3W077wFvA1l3H20kTFX7y9vDxiY LezGhmZAhsg21/iRkcO2D9WW6ho1+wmgxGS7qTf58anyUuWwjkDFuPaqP1573dfFnWeZj6 GuLtoEjtnxQNvbITh1nJ/55et0YOh6IWB3rx/AyEAxOgwHTZ8F4l2XH56PxMj+WyaDp/ze u9y858X53yifrwH7ALGuzz45XYdY+Zeels65BAn7Y77Ce0ivmVqhN+H63+ykSqJXeXeOLG 3ktwwYvzEHWr1xGnkMbABmkrV8znOWFbPjqmGfuoxfIAb2C7LxvvtppdXq8xsw== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:18 +0100 Subject: [PATCH RFC net-next v2 16/18] net: ethtool: Add PSE new port priority support feature Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-16-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) This patch expands the status information provided by ethtool for PSE c33 with current port priority and max port priority. It also adds a call to pse_ethtool_set_prio() and pse_ethtool_set_prio_mode() to configure the PSE port priority and its mode. Signed-off-by: Kory Maincent --- Change in v2: - Improve port priority documentation. - Add port priority modes. --- Documentation/networking/ethtool-netlink.rst | 63 ++++++++++++++++++++++++++++ include/uapi/linux/ethtool_netlink.h | 4 ++ net/ethtool/pse-pd.c | 36 ++++++++++++++++ 3 files changed, 103 insertions(+) diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index 3573543ae5ad..5bb090455620 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -1768,6 +1768,13 @@ Kernel response contents: configuration ranges. ``ETHTOOL_A_PSE_ID`` u32 Index of the PSE ``ETHTOOL_A_PSE_PW_D_ID`` u32 Index of the PSE power domain + ``ETHTOOL_A_C33_PSE_PRIO_SUPP_MODES`` u32 priority modes supported + ``ETHTOOL_A_C33_PSE_PRIO_MODE`` u32 priority mode of the PSE + currently configured + ``ETHTOOL_A_C33_PSE_PRIO_MAX`` u32 priority maximum configurable + on the PoE PSE + ``ETHTOOL_A_C33_PSE_PRIO`` u32 priority of the PoE PSE + currently configured ========================================== ====== ============================= When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies @@ -1847,6 +1854,18 @@ controller. The ``ETHTOOL_A_PSE_PW_D_ID`` attribute identifies the index of PSE power domain. +When set, the optional ``ETHTOOL_A_C33_PSE_PRIO_SUPP_MODES`` attribute +identifies the priority mode supported by the C33 PSE. +When set, the optional ``ETHTOOL_A_C33_PSE_PRIO_MODE`` attributes is used to +identifies the currently configured C33 PSE priority mode. +For a description of C33 PSE priority modes, see ``PSE_SET``. + +When set, the optional ``ETHTOOL_A_C33_PSE_PRIO_MAX`` attribute identifies +the C33 PSE maximum priority value. +When set, the optional ``ETHTOOL_A_C33_PSE_PRIO`` attributes is used to +identifies the currently configured C33 PSE priority. +For a description of C33 PSE priority attributes, see ``PSE_SET``. + PSE_SET ======= @@ -1860,6 +1879,10 @@ Request contents: ``ETHTOOL_A_C33_PSE_ADMIN_CONTROL`` u32 Control PSE Admin state ``ETHTOOL_A_C33_PSE_AVAIL_PWR_LIMIT`` u32 Control PoE PSE available power limit + ``ETHTOOL_A_C33_PSE_PRIO_MODE`` u32 Control priority mode of the + PoE PSE + ``ETHTOOL_A_C33_PSE_PRIO`` u32 Control priority of the + PoE PSE ====================================== ====== ============================= When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` attribute is used @@ -1882,6 +1905,46 @@ various existing products that document power consumption in watts rather than classes. If power limit configuration based on classes is needed, the conversion can be done in user space, for example by ethtool. +When set, the optional ``ETHTOOL_A_C33_PSE_PRIO_MODE`` attributes is used to +control the C33 PSE priority mode. The available mode are: + +1. Static Method: + + This method involves distributing power based on PD classification. It’s + straightforward and stable, with the PSE core keeping track of the budget + and subtracting the power requested by each PD’s class. + + Advantages: Every PD gets its promised power at any time, which guarantees + reliability. + + Disadvantages: PD classification steps are large, meaning devices request + much more power than they actually need. As a result, the power supply may + only operate at, say, 50% capacity, which is inefficient and wastes money. + +2. Dynamic Method: + + This method monitors the current consumption per port and subtracts it from + the available power budget. When the budget is exceeded, lower-priority + ports are shut down. This method is managed by the PSE controller itself. + + Advantages: This method optimizes resource utilization, saving costs. + + Disadvantages: Low-priority devices may experience instability. + +When set, the optional ``ETHTOOL_A_C33_PSE_PRIO`` attributes is used to +control the C33 PSE priority. Allowed priority value are between zero +and the value of ``ETHTOOL_A_C33_PSE_PRIO_MAX`` attribute. + +A lower value indicates a higher priority, meaning that a priority value +of 0 corresponds to the highest port priority. +Port priority serves two functions: + + - Power-up Order: After a reset, ports are powered up in order of their + priority from highest to lowest. Ports with higher priority + (lower values) power up first. + - Shutdown Order: When the power budget is exceeded, ports with lower + priority (higher values) are turned off first. + RSS_GET ======= diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index 47784a165e8b..aaeb8a6eecee 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -973,6 +973,10 @@ enum { ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */ ETHTOOL_A_PSE_ID, /* u32 */ ETHTOOL_A_PSE_PW_D_ID, /* u32 */ + ETHTOOL_A_C33_PSE_PRIO_SUPP_MODES, /* u32 */ + ETHTOOL_A_C33_PSE_PRIO_MODE, /* u32 */ + ETHTOOL_A_C33_PSE_PRIO_MAX, /* u32 */ + ETHTOOL_A_C33_PSE_PRIO, /* u32 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 1288e8a2c3a7..13ba7534c833 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -112,6 +112,12 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, len += st->c33_pw_limit_nb_ranges * (nla_total_size(0) + nla_total_size(sizeof(u32)) * 2); + if (st->c33_prio_mode) + /* _C33_PSE_PRIO_MODE */ + len += nla_total_size(sizeof(u32)); + if (st->c33_prio_max) + /* _C33_PSE_PRIO_MAX + _C33_PSE_PRIO */ + len += nla_total_size(sizeof(u32)) * 2; return len; } @@ -209,6 +215,15 @@ static int pse_fill_reply(struct sk_buff *skb, pse_put_pw_limit_ranges(skb, st)) return -EMSGSIZE; + if (st->c33_prio_mode > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_PRIO_MODE, st->c33_prio_mode)) + return -EMSGSIZE; + + if (st->c33_prio_max > 0 && + (nla_put_u32(skb, ETHTOOL_A_C33_PSE_PRIO_MAX, st->c33_prio_max) || + nla_put_u32(skb, ETHTOOL_A_C33_PSE_PRIO, st->c33_prio))) + return -EMSGSIZE; + return 0; } @@ -230,6 +245,8 @@ const struct nla_policy ethnl_pse_set_policy[ETHTOOL_A_PSE_MAX + 1] = { NLA_POLICY_RANGE(NLA_U32, ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED, ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED), [ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT] = { .type = NLA_U32 }, + [ETHTOOL_A_C33_PSE_PRIO_MODE] = { .type = NLA_U32 }, + [ETHTOOL_A_C33_PSE_PRIO] = { .type = NLA_U32 }, }; static int @@ -278,6 +295,25 @@ ethnl_set_pse(struct ethnl_req_info *req_info, struct genl_info *info) if (ret) return ret; + if (tb[ETHTOOL_A_C33_PSE_PRIO_MODE]) { + unsigned int prio_mode; + + prio_mode = nla_get_u32(tb[ETHTOOL_A_C33_PSE_PRIO_MODE]); + ret = pse_ethtool_set_prio_mode(phydev->psec, info->extack, + prio_mode); + if (ret) + return ret; + } + + if (tb[ETHTOOL_A_C33_PSE_PRIO]) { + unsigned int prio; + + prio = nla_get_u32(tb[ETHTOOL_A_C33_PSE_PRIO]); + ret = pse_ethtool_set_prio(phydev->psec, info->extack, prio); + if (ret) + return ret; + } + if (tb[ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT]) { unsigned int pw_limit; From patchwork Wed Oct 30 16:53:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856906 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 055BC229B53; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) Expand the c33 PSE attributes with PSE id, PSE power domain id, priority and priority max to be able to set and get the PSE Power Interface priority. ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-get --json '{"header":{"dev-name":"eth1"}}' {'c33-pse-actual-pw': 1700, 'c33-pse-admin-state': 3, 'c33-pse-avail-pw-limit': 97500, 'c33-pse-prio': 2, 'c33-pse-prio-max': 2, 'c33-pse-pw-class': 4, 'c33-pse-pw-d-status': 4, 'c33-pse-pw-limit-ranges': [{'max': 18100, 'min': 15000}, {'max': 38000, 'min': 30000}, {'max': 65000, 'min': 60000}, {'max': 97500, 'min': 90000}], 'header': {'dev-index': 5, 'dev-name': 'eth1'}} ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-set --json '{"header":{"dev-name":"eth1"}, "c33-pse-prio":1}' None Signed-off-by: Kory Maincent --- Documentation/netlink/specs/ethtool.yaml | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 6983dea39976..5f5634acd24f 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -1025,6 +1025,30 @@ attribute-sets: type: nest multi-attr: true nested-attributes: c33-pse-pw-limit + - + name: pse-id + type: u32 + name-prefix: ethtool-a- + - + name: pse-pw-d-id + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-prio-supp-modes + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-prio-mode + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-prio-max + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-prio + type: u32 + name-prefix: ethtool-a- - name: rss attributes: @@ -1793,6 +1817,12 @@ operations: - c33-pse-ext-substate - c33-pse-avail-pw-limit - c33-pse-pw-limit-ranges + - pse-id + - pse-pw-d-id + - c33-pse-prio-supp-modes + - c33-pse-prio-mode + - c33-pse-prio-max + - c33-pse-prio dump: *pse-get-op - name: pse-set @@ -1807,6 +1837,7 @@ operations: - podl-pse-admin-control - c33-pse-admin-control - c33-pse-avail-pw-limit + - c33-pse-prio - name: rss-get doc: Get RSS params. From patchwork Wed Oct 30 16:53:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13856907 X-Patchwork-Delegate: kuba@kernel.org Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E48222A495; Wed, 30 Oct 2024 16:54:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307260; cv=none; b=BDXlZCYOnkEwaj0FepYi7hQEdR39eNhYfFKYZmkSz01/r3vzJ9PeWS7R49bMcdxc44FzY9zopjaTAZBW+K/xVbWc8pitRJJZihiyFByf6HNpVN50jphUDA92D18TiAABrRZRMVEvyutI2HmvEtALrRgN+PoPSQa8noZy/kGTjzs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730307260; c=relaxed/simple; bh=EMjeSvfOC5IkeddTk73wHP7CNIy5Wf4vXWrjzp14ZzA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aWjzkxksUNvPWWr+lNT7TQUDaeeKm1X1u0lLqB8AusMkHFzJXScnacxLGvC071jsssgaEBq//mCSi/uwlPoWI1OMgoxTHIayPstkQFmB6deV1P2VCdbnTW6JPgxXCPpNebZ1J/IpJW0sVfKSb4SzS5GwgaexgrYOPa33qRSnO9c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=YjpHq0m/; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="YjpHq0m/" Received: by mail.gandi.net (Postfix) with ESMTPSA id B655FC000B; Wed, 30 Oct 2024 16:54:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1730307255; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SvmAMGax6dNwCZy8+Fe42XCwON0HoTKAXTO/9PqlEtM=; b=YjpHq0m/GxEuDroMzfEDPgg+YUwnojLZ8Rq74FKOypdQiJf7iCKwQfASsGvcydXS0VqW7F zJ14yG1WcrEKd6xEbWLFNJkczPIGQZuso6zQvuwFzMZ5G4uF7W0+MxyZRyglteULdkxC4i E0Tq4Eft30snvBIRTzZawHMsKyRYst2JxZoCD9ZjHnJfqa0PCv186Dd36lnN2avhzDiSYg oaGue/7w2znr+OhM2ywZ3824K9EtpZCATZmcKEB8WOk3G52zyXRgAX6BXw1zJGegDEHtvz t2J3Oe8uO2yDqIOtastSjp2OXiKLvNDBLC7v1m58u/LAI+PxjhAA29fJ45Rg3Q== From: Kory Maincent Date: Wed, 30 Oct 2024 17:53:20 +0100 Subject: [PATCH RFC net-next v2 18/18] net: pse-pd: pd692x0: Add support for PSE PI priority feature Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-feature_poe_port_prio-v2-18-9559622ee47a@bootlin.com> References: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> In-Reply-To: <20241030-feature_poe_port_prio-v2-0-9559622ee47a@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Liam Girdwood , Mark Brown Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , Kory Maincent X-Mailer: b4 0.15-dev-8cb71 X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Kory Maincent (Dent Project) This patch extends the PSE callbacks by adding support for the newly introduced pi_set_prio() callback, enabling the configuration of PSE PI priorities. The current port priority is now also included in the status information returned to users. Reviewed-by: Kyle Swenson Signed-off-by: Kory Maincent --- drivers/net/pse-pd/pd692x0.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index 0af7db80b2f8..018b6559049f 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -685,6 +685,8 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, if (ret < 0) return ret; status->c33_avail_pw_limit = ret; + /* PSE core priority start at 0 */ + status->c33_prio = buf.data[2] - 1; memset(&buf, 0, sizeof(buf)); msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS]; @@ -1061,6 +1063,25 @@ static int pd692x0_pi_set_current_limit(struct pse_controller_dev *pcdev, return pd692x0_sendrecv_msg(priv, &msg, &buf); } +static int pd692x0_pi_set_prio(struct pse_controller_dev *pcdev, int id, + unsigned int prio) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf = {0}; + int ret; + + ret = pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM]; + msg.sub[2] = id; + /* Controller priority from 1 to 3 */ + msg.data[4] = prio + 1; + + return pd692x0_sendrecv_msg(priv, &msg, &buf); +} + static const struct pse_controller_ops pd692x0_ops = { .setup_pi_matrix = pd692x0_setup_pi_matrix, .ethtool_get_status = pd692x0_ethtool_get_status, @@ -1070,6 +1091,7 @@ static const struct pse_controller_ops pd692x0_ops = { .pi_get_voltage = pd692x0_pi_get_voltage, .pi_get_current_limit = pd692x0_pi_get_current_limit, .pi_set_current_limit = pd692x0_pi_set_current_limit, + .pi_set_prio = pd692x0_pi_set_prio, }; #define PD692X0_FW_LINE_MAX_SZ 0xff @@ -1486,6 +1508,8 @@ static int pd692x0_i2c_probe(struct i2c_client *client) priv->pcdev.ops = &pd692x0_ops; priv->pcdev.dev = dev; priv->pcdev.types = ETHTOOL_PSE_C33; + priv->pcdev.port_prio_supp_modes = BIT(ETHTOOL_PSE_PORT_PRIO_DYNAMIC); + priv->pcdev.pis_prio_max = 2; ret = devm_pse_controller_register(dev, &priv->pcdev); if (ret) return dev_err_probe(dev, ret,