From patchwork Fri Nov 1 03:19:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13858672 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBBD7E67493 for ; Fri, 1 Nov 2024 03:22:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: Message-ID:Subject:To:From:Date:Reply-To:Cc:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=s2I6YlFqlw9r5aPu3G2TJcp0GCIhfu7jXxMOLgUqixw=; b=2TlB1Y0y9D1nelNlYeCgIdIQtw TolmqDaMwz51+8bI46TSDUAOlBhGZTk/P9CyG+QBj3HXFHRQw/odFW3hUTw9za4HlFKxpjtGaNsSO d3ZruR6Fk9C70RZGIZAlqt6TthWz6Aul0ay++fAGI5EduAbDkGUdUZdLitdnJj49IE7G9aGdypj17 qJuQr2+l5ugJCRmD0R82sjQn2/4g3dxaOnbl2+j4AT+36/hoxe7LDA58qbGweqKRBZu31Z4CjUv0H 86vWX/MTfrzfnuli449iTJgUbmbSQGKJBkgQd8K5jzyLi0bJV/FdZqAybNiQ8LDwxTl3Xr3rfJ1rl nrihXMCg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t6iEj-00000005eX6-12XV; Fri, 01 Nov 2024 03:22:09 +0000 Received: from pidgin.makrotopia.org ([2a07:2ec0:3002::65]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t6iCd-00000005eDU-2wEB; Fri, 01 Nov 2024 03:20:00 +0000 Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98) (envelope-from ) id 1t6iCU-00000000478-2NIb; Fri, 01 Nov 2024 03:19:50 +0000 Date: Fri, 1 Nov 2024 03:19:39 +0000 From: Daniel Golle To: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Uwe =?iso-8859-1?q?Kleine-K=F6nig?= , Sam Shih , Frank Wunderlich , Daniel Golle , AngeloGioacchino Del Regno , Matthias Brugger , Stephen Boyd , Michael Turquette Subject: [PATCH] clk: mediatek: mt7988-infracfg: SPI0 clocks are not critical Message-ID: MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241031_201959_760085_72DEC72F X-CRM114-Status: UNSURE ( 9.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SPI0 clocks have wrongly been marked as critical while, probably due to the SPI driver not requesting them. This can (and should) be addressed in device tree instead. Remove CLK_IS_CRITICAL flag from clocks related to SPI0. Fixes: 4b4719437d85 ("clk: mediatek: add drivers for MT7988 SoC") Signed-off-by: Daniel Golle --- drivers/clk/mediatek/clk-mt7988-infracfg.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt7988-infracfg.c b/drivers/clk/mediatek/clk-mt7988-infracfg.c index ef8267319d91..c40e18c27f12 100644 --- a/drivers/clk/mediatek/clk-mt7988-infracfg.c +++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c @@ -196,12 +196,10 @@ static const struct mtk_gate infra_clks[] = { GATE_INFRA2(CLK_INFRA_SPINFI, "infra_f_fspinfi", "spinfi_sel", 10), GATE_INFRA2_FLAGS(CLK_INFRA_66M_NFI_HCK, "infra_hf_66m_nfi_hck", "sysaxi_sel", 11, CLK_IS_CRITICAL), - GATE_INFRA2_FLAGS(CLK_INFRA_104M_SPI0, "infra_hf_104m_spi0", "infra_mux_spi0_sel", 12, - CLK_IS_CRITICAL), + GATE_INFRA2(CLK_INFRA_104M_SPI0, "infra_hf_104m_spi0", "infra_mux_spi0_sel", 12), GATE_INFRA2(CLK_INFRA_104M_SPI1, "infra_hf_104m_spi1", "infra_mux_spi1_sel", 13), GATE_INFRA2(CLK_INFRA_104M_SPI2_BCK, "infra_hf_104m_spi2_bck", "infra_mux_spi2_sel", 14), - GATE_INFRA2_FLAGS(CLK_INFRA_66M_SPI0_HCK, "infra_hf_66m_spi0_hck", "sysaxi_sel", 15, - CLK_IS_CRITICAL), + GATE_INFRA2(CLK_INFRA_66M_SPI0_HCK, "infra_hf_66m_spi0_hck", "sysaxi_sel", 15), GATE_INFRA2(CLK_INFRA_66M_SPI1_HCK, "infra_hf_66m_spi1_hck", "sysaxi_sel", 16), GATE_INFRA2(CLK_INFRA_66M_SPI2_HCK, "infra_hf_66m_spi2_hck", "sysaxi_sel", 17), GATE_INFRA2(CLK_INFRA_66M_FLASHIF_AXI, "infra_hf_66m_flashif_axi", "sysaxi_sel", 18),