From patchwork Fri Nov 1 06:27:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91364E674A8 for ; Fri, 1 Nov 2024 06:27:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 10CB610E951; Fri, 1 Nov 2024 06:27:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ClEiITaV"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5017C10E1BB; Fri, 1 Nov 2024 06:27:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730442471; x=1761978471; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YXfTYHnqQ9LtDKtQ45O1NK3Dk3pGZXye475kLy7b5io=; b=ClEiITaVh2YRHbTmS4rupvAzQMU7cXPb7AYblwmnvOasvZtp0JXvNXA/ pHujDZBc8gBgRkpWWXCIWQIIZtQwM0cBaJJCpk8huaRH3PMjp3/mp2pJi I0fw3pAy51f01aJg1txQbod+AjrOs98QYD7mVj6jcUar9gE/BUt7XBqMe +LFx2z1XmYF0PVc/co+LTMI5oDeAjuP2D31JyYVf9bp4sQwhsFsiWZRoa 8w5aGZFaZJW+OTktO2+9+eCkT1P2UTX7iAJ8rQwWvkGUt/hiWFXr3xV3Y xRZUv0NGkZDKaKURxq8EZ0ljjV9P9k6qg/n6wy1hD/mcj/OLKlSAWQOZ/ w==; X-CSE-ConnectionGUID: x9iWiHJ3TsCZiJz8fA2P+w== X-CSE-MsgGUID: j06TZYFwRsG9TUmER9njIw== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="41306058" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="41306058" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:50 -0700 X-CSE-ConnectionGUID: mg9CXH6UTfW6FF94AKAU0g== X-CSE-MsgGUID: I15hErYTR3eUDr0d5RJ4hQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="87648567" Received: from ksztyber-mobl2.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:49 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 1/7] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR Date: Fri, 1 Nov 2024 08:27:22 +0200 Message-Id: <20241101062728.3865980-2-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR usage. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h index 6ed0e0dc97e7..50540eac61a3 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h @@ -100,6 +100,7 @@ #define TRANS_PUSH(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A) #define TRANS_PUSH_EN REG_BIT(31) #define TRANS_PUSH_SEND REG_BIT(30) +#define LNL_TRANS_PUSH_PSR_PR_EN REG_BIT(16) #define _TRANS_VRR_VSYNC_A 0x60078 #define TRANS_VRR_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A) From patchwork Fri Nov 1 06:27:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C2DFE674AB for ; Fri, 1 Nov 2024 06:27:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5267910E957; Fri, 1 Nov 2024 06:27:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hFmCwQnh"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF48810E951; Fri, 1 Nov 2024 06:27:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730442472; x=1761978472; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=T8L+mnsYstidVwXc7kFb7njmAwtPDZIXE8ys5ByRe7U=; b=hFmCwQnhuHzojoSXyl8tgwzLz112tHGNcGX39rhxpjpdx4ojRsFt2t6o mk9ihtIay4FZrqNHyRRMvJjuUYU10GKT6PvXnr+Vdv3z7ePOv3n0aurbg tbtF9HGFhmInTag43qORfb6esPrei/2XCmlxMkJqBVhepsPr679W/LvzP dmrkhpC2+Le13INTPGYMXckOnYZdlP7vfER5WPEnZa5CH+hI4Nmr8GRCx xI7/OExq35jTZp4H8UVOfmUE5l8KrJ8lP6tuTj+fmJfwdtHzB6Gf7WoKC U39RIIBGbP7o5/Uy6C1SuRem6RDhnWc/mFJD4xJSdW+I7O2As+nF9afEw Q==; X-CSE-ConnectionGUID: 4BtUOptrTmG7OdksN3wr9w== X-CSE-MsgGUID: vwBSPmHRQEukLrpOc38EDA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="41306059" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="41306059" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:52 -0700 X-CSE-ConnectionGUID: CMLevikYSFaZuzrVka/iTA== X-CSE-MsgGUID: pbN0ZeNuTja0szhdKdx4yQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="87648575" Received: from ksztyber-mobl2.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:50 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 2/7] drm/i915/vrr: Do not overwrite TRANS_PUSH PSR Frame Change Enable Date: Fri, 1 Nov 2024 08:27:23 +0200 Message-Id: <20241101062728.3865980-3-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently vrr code is overwriting possibly set PSR PR Frame Change Enable bit in TRANS_PUSH register. Avoid this by adding trans_push_enabled into struct intel_crtc and use that when writing TRANS_PUSH register. v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw Signed-off-by: Jouni Högander --- .../drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_vrr.c | 24 +++++++++++++++---- 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 2bb1fa64da2f..4ce6a03fe643 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1419,6 +1419,8 @@ struct intel_crtc { #endif bool block_dc_for_vblank; + + u32 trans_push_enabled; }; struct intel_plane { diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 19a5d0076bb8..328cc0a741bf 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -321,13 +321,14 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; if (!crtc_state->vrr.enable) return; intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), - TRANS_PUSH_EN | TRANS_PUSH_SEND); + crtc->trans_push_enabled | TRANS_PUSH_SEND); } bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) @@ -341,16 +342,28 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; } +static void intel_vrr_trans_push_enabled_set_clear(struct intel_crtc *crtc, + enum transcoder cpu_transcoder, + u32 clear, u32 set) +{ + struct intel_display *display = to_intel_display(crtc); + + crtc->trans_push_enabled = (crtc->trans_push_enabled & ~clear) | set; + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), + crtc->trans_push_enabled); +} + void intel_vrr_enable(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; if (!crtc_state->vrr.enable) return; - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), - TRANS_PUSH_EN); + intel_vrr_trans_push_enabled_set_clear(crtc, cpu_transcoder, 0, + TRANS_PUSH_EN); if (HAS_AS_SDP(display)) intel_de_write(display, @@ -371,6 +384,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) { struct intel_display *display = to_intel_display(old_crtc_state); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; if (!old_crtc_state->vrr.enable) @@ -381,7 +395,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) intel_de_wait_for_clear(display, TRANS_VRR_STATUS(display, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); + + intel_vrr_trans_push_enabled_set_clear(crtc, cpu_transcoder, + TRANS_PUSH_EN, 0); if (HAS_AS_SDP(display)) intel_de_write(display, From patchwork Fri Nov 1 06:27:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5DC0E674AD for ; Fri, 1 Nov 2024 06:27:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2ADD110E958; Fri, 1 Nov 2024 06:27:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Lo9GFLwI"; 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d="scan'208";a="41306062" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:53 -0700 X-CSE-ConnectionGUID: kF0ikdcZRaGOw25W/Yi5CA== X-CSE-MsgGUID: 1OAHfzxjRs+BtkEMLM6cwA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="87648580" Received: from ksztyber-mobl2.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:52 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 3/7] drm/i915/vrr: Use TRANS_PUSH mechanism for PSR frame change Date: Fri, 1 Nov 2024 08:27:24 +0200 Message-Id: <20241101062728.3865980-4-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In Lunarlake and onwards it is possible to generate "PSR frame change" event using TRANS_PUSH mechanism. Implement function to enable this and take PSR into account in intel_vrr_send_push. v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++ drivers/gpu/drm/i915/display/intel_vrr.c | 37 ++++++++++++++++++++++-- drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 3 files changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 880ea845207f..a82d75f97c55 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -44,6 +44,7 @@ #include "intel_psr.h" #include "intel_psr_regs.h" #include "intel_snps_phy.h" +#include "intel_vrr.h" #include "skl_universal_plane.h" /** @@ -1934,6 +1935,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_de_rmw(display, CLKGATE_DIS_MISC, 0, CLKGATE_DIS_MISC_DMASC_GATING_DIS); } + + if (DISPLAY_VER(dev_priv) >= 20) + intel_vrr_psr_frame_change_enable(crtc_state); } static bool psr_interrupt_error_check(struct intel_dp *intel_dp) @@ -2170,6 +2174,8 @@ void intel_psr_disable(struct intel_dp *intel_dp, mutex_lock(&intel_dp->psr.lock); + if (DISPLAY_VER(display) >= 20) + intel_vrr_psr_frame_change_disable(old_crtc_state); intel_psr_disable_locked(intel_dp); mutex_unlock(&intel_dp->psr.lock); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 328cc0a741bf..51cf1800ae87 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -324,7 +324,8 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.enable && (DISPLAY_VER(display) < 20 || + !crtc_state->has_psr)) return; intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), @@ -336,7 +337,8 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.enable && (DISPLAY_VER(display) < 20 || + !crtc_state->has_psr)) return false; return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; @@ -381,6 +383,37 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) } } +/** + * intel_vrr_psr_frame_change_enable - Enable PSR frame change mechanism + * @crtc_state: Intel crtc state + * + * This function is for PSR to enable PSR frame change mechanism which is more + * controlled way to generate frame change event. + */ +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + intel_vrr_trans_push_enabled_set_clear(crtc, cpu_transcoder, 0, + LNL_TRANS_PUSH_PSR_PR_EN); +} + +/** + * intel_vrr_psr_frame_change_disable - Disable PSR frame change mechanism + * @crtc_state: Intel crtc state + * + * This function is for PSR to disable PSR frame change mechanism. + */ +void intel_vrr_psr_frame_change_disable(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + intel_vrr_trans_push_enabled_set_clear(crtc, cpu_transcoder, + LNL_TRANS_PUSH_PSR_PR_EN, 0); +} + void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) { struct intel_display *display = to_intel_display(old_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index b3b45c675020..b954a60e1aae 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -25,6 +25,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state); void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state); +void intel_vrr_psr_frame_change_disable(const struct intel_crtc_state *crtc_state); void intel_vrr_get_config(struct intel_crtc_state *crtc_state); int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); From patchwork Fri Nov 1 06:27:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA482E674A7 for ; Fri, 1 Nov 2024 06:27:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A01110E95D; Fri, 1 Nov 2024 06:27:56 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="WEF/2iQ4"; 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([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:53 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 4/7] drm/i915/psr: Rename psr_force_hw_tracking_exit as psr_force_exit Date: Fri, 1 Nov 2024 08:27:25 +0200 Message-Id: <20241101062728.3865980-5-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2 HW tracking and PSR2 selective fetch. Due to this rename it as psr_force_exit. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index a82d75f97c55..c1cf63f55fe6 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2307,7 +2307,7 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME; } -static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) +static void psr_force_exit(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; @@ -2855,7 +2855,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state, /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) - psr_force_hw_tracking_exit(intel_dp); + psr_force_exit(intel_dp); /* * Clear possible busy bits in case we have @@ -3252,10 +3252,10 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) * continuous full frame is disabled, only a single full * frame is required */ - psr_force_hw_tracking_exit(intel_dp); + psr_force_exit(intel_dp); } } else { - psr_force_hw_tracking_exit(intel_dp); + psr_force_exit(intel_dp); if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); From patchwork Fri Nov 1 06:27:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF6B9E674A9 for ; Fri, 1 Nov 2024 06:27:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5508310E95C; Fri, 1 Nov 2024 06:27:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="RuOskQwc"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6C20A10E95C; Fri, 1 Nov 2024 06:27:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730442477; x=1761978477; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z+Kvj084WufoA7lREmuJ3OCf9oyi1v3ezi5jnfrW6LM=; b=RuOskQwcVFWy4+WbLX9GolIZmoznTd6Lakvqoy74NsaVrlu9Tlch4UZE 3y3depjD3BElANm43UBoI4NaOMdMSVU3b2iHbw8N7xwUnJvHDydntoSBj 7+qFE0Y50wMLjpyKkpKWo5Pyb2c4OyoMe20Y+oyB4ugwbNnL0b4g9/0rR gnkvkLlqAYYY3v714jnn6lUFVAzeT/DmyQHG5NdBetQBfyhiDktlOR8wj prONEIPo7tUnvhhmg0oK0tp+GdcG11OKmeG5HVgWStl6YBtIdrHa6lcu0 Mf5YzPZSrNr6bR17hxndm0BbuXa36LYmRkS3C1HbRhMCI/WzxSdh8u0B0 Q==; X-CSE-ConnectionGUID: KXEb+m5RSaWk9Kfui2XYgg== X-CSE-MsgGUID: kRPqZPXHTtGo2sYOZSdNSQ== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="41306075" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="41306075" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:57 -0700 X-CSE-ConnectionGUID: maQAFmPqQhaynsz1WXiFgw== X-CSE-MsgGUID: O1g+OmeoSgGBOYT3PxPsFw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="87648587" Received: from ksztyber-mobl2.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:55 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 5/7] drm/i915/psr: Simplify frontbuffer invalidate/flush callbacks Date: Fri, 1 Nov 2024 08:27:26 +0200 Message-Id: <20241101062728.3865980-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There is unnecessary complexity in frontbuffer tracking invalidate and flush callbacks. Simplify them a bit with some minor changes to sequences: Invalidate: 1. Additionally write single full frame bit when selective fetch is enabled. This should be ok as continuous full frame bit is already set. 2. Rewrite bits in PSR2_MAN_TRK_CTL if two invalidate calls in row without flush in between (psr.psr2_sel_fetch_cff_enabled == true). Flush: 1. intel_dp->psr.psr2_sel_fetch_cff_enabled is clearn also when it is already false. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 66 +++++------------------- 1 file changed, 12 insertions(+), 54 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index c1cf63f55fe6..12ec1ea94b53 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -3119,28 +3119,8 @@ static void intel_psr_work(struct work_struct *work) static void _psr_invalidate_handle(struct intel_dp *intel_dp) { - struct intel_display *display = to_intel_display(intel_dp); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; - if (intel_dp->psr.psr2_sel_fetch_enabled) { - u32 val; - - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { - /* Send one update otherwise lag is observed in screen */ - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); - return; - } - - val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), 0); + psr_force_exit(intel_dp); intel_dp->psr.psr2_sel_fetch_cff_enabled = true; } else { intel_psr_exit(intel_dp); @@ -3222,43 +3202,21 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); struct drm_i915_private *dev_priv = to_i915(display->drm); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; + + psr_force_exit(intel_dp); if (intel_dp->psr.psr2_sel_fetch_enabled) { - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { - /* can we turn CFF off? */ - if (intel_dp->psr.busy_frontbuffer_bits == 0) { - u32 val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - - /* - * Set psr2_sel_fetch_cff_enabled as false to allow selective - * updates. Still keep cff bit enabled as we don't have proper - * SU configuration in case update is sent for any reason after - * sff bit gets cleared by the HW on next vblank. - */ - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); - intel_dp->psr.psr2_sel_fetch_cff_enabled = false; - } - } else { + /* can we turn CFF off? */ + if (intel_dp->psr.busy_frontbuffer_bits == 0) /* - * continuous full frame is disabled, only a single full - * frame is required + * Set psr2_sel_fetch_cff_enabled as false to allow selective + * updates. Still keep cff bit enabled as we don't have proper + * SU configuration in case update is sent for any reason after + * sff bit gets cleared by the HW on next vblank. */ - psr_force_exit(intel_dp); - } - } else { - psr_force_exit(intel_dp); - - if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) - queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); + intel_dp->psr.psr2_sel_fetch_cff_enabled = false; + } else if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) { + queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); } } From patchwork Fri Nov 1 06:27:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45D51E674AC for ; Fri, 1 Nov 2024 06:27:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D33D710E95F; Fri, 1 Nov 2024 06:27:58 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ch9Y5NOQ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 01C1210E95F; Fri, 1 Nov 2024 06:27:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730442478; x=1761978478; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OutsfuRUE4fD7wFEj4NqZFZT42Gl81sTIvwpOGh4pz8=; b=ch9Y5NOQ6cIn7tqvZqE8ZkthviVz/i7UHosYDz6ZFcB+0g0BM/IRiGUf tszX+s0GnyONkUhgy+f/a4lWi8ZD0EIz5JP6v5mZZZSMBquKp+ufR7e05 eZGMTQNL4kfqQ6HjieptJUDuixfrVqideXyNnntHgD6uX240fnjhFbGPL 2Gy1by+Q6T1VocGoUtkHaQyjc0hr+kaJmlzCet5nAtZvbZzzITLPQ3vXD YvVl6yKpESodlnVJrHmpppRqqStFbZbQ59wiMKFlWTqX3tvtWAk21Nwvt nhiSLkF06N9QmnDpVRO3SP+pIbyMXGA6k9A8g4+JFHNsLlxywxZXJqBSc Q==; X-CSE-ConnectionGUID: fbSqdVMwSdiphglOg4THfQ== X-CSE-MsgGUID: PLyC1YUtTYOOKThgWcyttA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="41306086" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="41306086" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:58 -0700 X-CSE-ConnectionGUID: znynkKinRUCVMpr+rU9gHQ== X-CSE-MsgGUID: KsUJIHXFQsaPZ/F0HmBjSg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="87648593" Received: from ksztyber-mobl2.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:56 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 6/7] drm/i915/psr: Add VRR send push interface for PSR usage Date: Fri, 1 Nov 2024 08:27:27 +0200 Message-Id: <20241101062728.3865980-7-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add own interface for PSR usage to perform push on frontbuffer tracking invalidate and flush call backs. Use this new interface from PSR code. v2: - use crtc->trans_push_enabled instead of rmw - intel_vrr_psr_send_push takes struct intel_crtc * and enum transcoder as a parameter Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++++- drivers/gpu/drm/i915/display/intel_vrr.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 4 ++++ 3 files changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 12ec1ea94b53..1fa632d708e7 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2310,6 +2310,7 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) static void psr_force_exit(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); + struct intel_crtc *crtc = to_intel_crtc(intel_dp->attached_connector->base.state->crtc); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; if (intel_dp->psr.psr2_sel_fetch_enabled) @@ -2332,8 +2333,12 @@ static void psr_force_exit(struct intel_dp *intel_dp) * This workaround do not exist for platforms with display 10 or newer * but testing proved that it works for up display 13, for newer * than that testing will be needed. + * + * In Lunarlake we can use TRANS_PUSH mechanism to force sending update + * to sink. */ - intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0); + DISPLAY_VER(display) >= 20 ? intel_vrr_psr_send_push(crtc, cpu_transcoder) : + intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0); } void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 51cf1800ae87..a3fcdc5e9493 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -332,6 +332,26 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) crtc->trans_push_enabled | TRANS_PUSH_SEND); } +/** + * intel_vrr_psr_send_push - Send push interface for PSR code + * @crtc: Intel crtc + * @cpu_transcoder: cpu transcoder + * + * This is for PSR usage to perform push on frontbuffer tracking invalidate and + * flush call back. PSR mutex should be taken by caller. + */ +void +intel_vrr_psr_send_push(struct intel_crtc *crtc, enum transcoder cpu_transcoder) +{ + struct intel_display *display = to_intel_display(crtc); + + if (DISPLAY_VER(display) < 20) + return; + + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), + crtc->trans_push_enabled | TRANS_PUSH_SEND); +} + bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index b954a60e1aae..6095221843ca 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -11,7 +11,10 @@ struct drm_connector_state; struct intel_atomic_state; struct intel_connector; +struct intel_crtc; struct intel_crtc_state; +struct intel_display; +enum transcoder; bool intel_vrr_is_capable(struct intel_connector *connector); bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh); @@ -27,6 +30,7 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state); void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_psr_frame_change_disable(const struct intel_crtc_state *crtc_state); +void intel_vrr_psr_send_push(struct intel_crtc *crtc, enum transcoder cpu_transcoder); void intel_vrr_get_config(struct intel_crtc_state *crtc_state); int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); From patchwork Fri Nov 1 06:27:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13858780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB5B7E674A9 for ; Fri, 1 Nov 2024 06:28:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4C82F10E960; Fri, 1 Nov 2024 06:28:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Q+XA+z40"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 85DAA10E961; Fri, 1 Nov 2024 06:27:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730442480; x=1761978480; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Fy1pWas8xAXQvA2Xqw8cZBAJ/zJPREXvenJ6EGIpFcc=; b=Q+XA+z40iks5PdNx11+TXHH00GzfqJxKvmxoHRvF8cdCzhDRQIbVscqx 1xouBSHytBnf96wEQyp5l02FfK7By4TNp68rkIkbQmNPFvi7oOhwc//BZ KrzYYKYZx4k39l6IAWj+o3qSLG6vZhzSFK9Vbp8fGhF56IUfHQ8q9mD3y d22nTtuMeTTWtNA0JjxDzhP9iWYbF72kWt2D7SzOHKxl+LluaztDAo1Ov Mz4eoDlJwkjyp0B4nUcNNXqKQWVLsvv4JuusU+GhMjrEsI/YhPnObH1bZ 3e+QXoshRRRaIpsWq7ErkZA7VbDiY5WxyODXjQoOlwSGiJtZzhTZvNNJc A==; X-CSE-ConnectionGUID: OMfGTaSpTqmYTiSnkG5FUw== X-CSE-MsgGUID: gyYBqlDrSCS1aXXO0qGDGg== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="41306095" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="41306095" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:28:00 -0700 X-CSE-ConnectionGUID: dOqfpWXmS9CsZsJELH4x0A== X-CSE-MsgGUID: GjQGBsMvQLG+RzpvxcCb7g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="87648599" Received: from ksztyber-mobl2.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.244.3]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2024 23:27:58 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 7/7] drm/i915/display: Generate PSR frame change event on cursor update Date: Fri, 1 Nov 2024 08:27:28 +0200 Message-Id: <20241101062728.3865980-8-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241101062728.3865980-1-jouni.hogander@intel.com> References: <20241101062728.3865980-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On LunarLake and onwards we are using vrr send push mechanism to trigger frame change event. Due to this we need to trigger it using intel_vrr_psr_send_push provided by VRR code on legacy cursor update. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_cursor.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index 9ba77970dab7..5617781e9c58 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -25,6 +25,7 @@ #include "intel_psr.h" #include "intel_psr_regs.h" #include "intel_vblank.h" +#include "intel_vrr.h" #include "skl_watermark.h" /* Cursor formats */ @@ -798,6 +799,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane, to_intel_crtc_state(crtc->base.state); struct intel_crtc_state *new_crtc_state; struct intel_vblank_evade_ctx evade; + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; int ret; /* @@ -917,6 +919,9 @@ intel_legacy_cursor_update(struct drm_plane *_plane, intel_plane_disable_arm(NULL, plane, crtc_state); } + if (crtc_state->has_psr) + intel_vrr_psr_send_push(crtc, cpu_transcoder); + local_irq_enable(); intel_psr_unlock(crtc_state);