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Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" , Perry Yuan , "Bagas Sanjaya" Subject: [PATCH v6 01/12] Documentation: x86: Add AMD Hardware Feedback Interface documentation Date: Mon, 4 Nov 2024 11:53:56 -0600 Message-ID: <20241104175407.19546-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|CY8PR12MB7635:EE_ X-MS-Office365-Filtering-Correlation-Id: 0e83046c-28d5-44bb-f52b-08dcfcf9c1ac X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: 2D/kVzNb0tIcZ6UX7FZ+6fdE9ePrU248kvt8tKqwdxvHzuYXFKKz+/qf0FDc1vWPrsY4Dop8Zo66ojHwyhr4q4SaCPyAlPXjGdBt2tJAdHOeD50KdWBdIcOSnlZRSXnjTuL+6Uz5V64ZMFrVDI4GS9fq2+nr9wUKvqIkbFbFbDikkpSeOv1w1ZlXDjO7jyIl8N8YUm5Sv9zQjE5VGt49lms6MQmz+42Dsgjia25scsP/+0EVIgiyliqaT84nQRXoJGKWKBMNaCGes088RSij2Z0GcCgfEUSa1vegY5voXLDyF3jvPjNFD78ZT978Zwtseb8HrVjVNoP8W1qO2zfEZvnqpZ/NAnjbeJtP/yYKnHqrBQzJYKVwp/v+IlozHq0LkdGbcmiRERMUvIYF0+dVBiCeng3VeQUIMQpwfc7Z5vckqkt9YnYqTqPvZR+yzCagcqz1jeTWK5xjW5guYXyHb+cAiJ/qWqD+9z5jArFc0Zkilw9yL0yKCZHPGfxJDuHZt1v0rwzRXTkiHgrr4RIaGTftD2Pe5hC3sycEhToDZH83b8cK4TRLW30TgSnbY0qdW6FmCJ6ddliF/JDceWEOX88K7jF35Vx4aG7Hv6bP33sxNusN5vkvRgVkaiWZlYvc7XmK8TjzFIQHgieypTRtw6YDbyFTQiOu7tA2ixI1SkxSnizOGAYl/IXJvSldcoE7yBR/e9hnXrolRY1TSg51lxbDCgAF4cjPfZazfhGoHb/Avg/mzqrCedkvy+r2DcH+i3ADlfPwVXp6nUHQAAuINJu+v4F+bxdwnKpfugpulifxjrs1nuFlObm50Xem16spIJEYuO//3F7Zw44Urx2LwKoDuVAwzNt+5Flh9a4f/SIVN1R4Q28OgGTxLgC0q3vwF0KX1a6CauPdjSKQMMj9LxtehTTXATNGdKBf5BPIRnsyANeSIHn0zHvrIPR5N4ncGtIGn0MkS15ui0HcGoJS3Rha7uh9rAAgA1DgnKkAotvtrLf/MZqXG4vcqUWNqU5LGRukkm+tjmTmtdex1sMjLiDkD4BrGsYdZjvkAiewyoba6a2TQZ/0zlFRiKAduhDZy8uO6U17YD+m42I8IBwaZU5N1dOHEU84RqxfA/Gt8F+ZC9Vh5OO30oLaLjlllH9Mb1kDdKmSyDRyHlpNq4TIYvAt6yiajKl1y1IXBzLz+j+I8dJHU4fQ1gG4BU1QkGvNjPM9i6PDoZgzo/4tDiXvDtFhxyVWWPW53W86Lcz98UKLZZwZVa4nMXN9iXljMzffMu6lj/N4EKw5dSKlXhqYS/pxPjppqQs5QdMJfX6VfveKgG4h7Kg7JOaQcZnbmj8fTU8D743jpHwK8hmk1drOjXsvr8JgBKNryDZFV8ZPtYldc7zrdEtUtx4HtcI5Qq7YSW4llLALiQMhJyg80SXAxQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:40.4599 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0e83046c-28d5-44bb-f52b-08dcfcf9c1ac X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7635 From: Perry Yuan Introduce a new documentation file, `amd_hfi.rst`, which delves into the implementation details of the AMD Hardware Feedback Interface and its associated driver, `amd_hfi`. This documentation describes how the driver provides hint to the OS scheduling which depends on the capability of core performance and efficiency ranking data. This documentation describes * The design of the driver * How the driver provides hints to the OS scheduling * How the driver interfaces with the kernel for efficiency ranking data. Reviewed-by: Bagas Sanjaya Signed-off-by: Perry Yuan Reviewed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- v6: * Fix EOF newline --- Documentation/arch/x86/amd-hfi.rst | 127 +++++++++++++++++++++++++++++ Documentation/arch/x86/index.rst | 1 + 2 files changed, 128 insertions(+) create mode 100644 Documentation/arch/x86/amd-hfi.rst base-commit: 110213b8f0e7021819d4db273facb27701bc3381 diff --git a/Documentation/arch/x86/amd-hfi.rst b/Documentation/arch/x86/amd-hfi.rst new file mode 100644 index 0000000000000..5d204688470e3 --- /dev/null +++ b/Documentation/arch/x86/amd-hfi.rst @@ -0,0 +1,127 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================================================== +Hardware Feedback Interface For Hetero Core Scheduling On AMD Platform +====================================================================== + +:Copyright: 2024 Advanced Micro Devices, Inc. All Rights Reserved. + +:Author: Perry Yuan +:Author: Mario Limonciello + +Overview +-------- + +AMD Heterogeneous Core implementations are comprised of more than one +architectural class and CPUs are comprised of cores of various efficiency and +power capabilities: performance-oriented *classic cores* and power-efficient +*dense cores*. As such, power management strategies must be designed to +accommodate the complexities introduced by incorporating different core types. +Heterogeneous systems can also extend to more than two architectural classes as +well. The purpose of the scheduling feedback mechanism is to provide +information to the operating system scheduler in real time such that the +scheduler can direct threads to the optimal core. + +The goal of AMD's heterogeneous architecture is to attain power benefit by sending +background thread to the dense cores while sending high priority threads to the classic +cores. From a performance perspective, sending background threads to dense cores can free +up power headroom and allow the classic cores to optimally service demanding threads. +Furthermore, the area optimized nature of the dense cores allows for an increasing +number of physical cores. This improved core density will have positive multithreaded +performance impact. + +AMD Heterogeneous Core Driver +----------------------------- + +The ``amd_hfi`` driver delivers the operating system a performance and energy efficiency +capability data for each CPU in the system. The scheduler can use the ranking data +from the HFI driver to make task placement decisions. + +Thread Classification and Ranking Table Interaction +---------------------------------------------------- + +The thread classification is used to select into a ranking table that describes +an efficiency and performance ranking for each classification. + +Threads are classified during runtime into enumerated classes. The classes represent +thread performance/power characteristics that may benefit from special scheduling behaviors. +The below table depicts an example of thread classification and a preference where a given thread +should be scheduled based on its thread class. The real time thread classification is consumed +by the operating system and is used to inform the scheduler of where the thread should be placed. + +Thread Classification Example Table +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ ++----------+----------------+-------------------------------+---------------------+---------+ +| class ID | Classification | Preferred scheduling behavior | Preemption priority | Counter | ++----------+----------------+-------------------------------+---------------------+---------+ +| 0 | Default | Performant | Highest | | ++----------+----------------+-------------------------------+---------------------+---------+ +| 1 | Non-scalable | Efficient | Lowest | PMCx1A1 | ++----------+----------------+-------------------------------+---------------------+---------+ +| 2 | I/O bound | Efficient | Lowest | PMCx044 | ++----------+----------------+-------------------------------+---------------------+---------+ + +Thread classification is performed by the hardware each time that the thread is switched out. +Threads that don't meet any hardware specified criteria will be classified as "default". + +AMD Hardware Feedback Interface +-------------------------------- + +The Hardware Feedback Interface provides to the operating system information +about the performance and energy efficiency of each CPU in the system. Each +capability is given as a unit-less quantity in the range [0-255]. A higher +performance value indicates higher performance capability, and a higher +efficiency value indicates more efficiency. Energy efficiency and performance +are reported in separate capabilities in the shared memory based ranking table. + +These capabilities may change at runtime as a result of changes in the +operating conditions of the system or the action of external factors. +Power Management FW is responsible for detecting events that would require +a reordering of the performance and efficiency ranking. Table updates would +happen relatively infrequently and occur on the time scale of seconds or more. + +The following events trigger a table update: + * Thermal Stress Events + * Silent Compute + * Extreme Low Battery Scenarios + +The kernel or a userspace policy daemon can use these capabilities to modify +task placement decisions. For instance, if either the performance or energy +capabilities of a given logical processor becomes zero, it is an indication that +the hardware recommends to the operating system to not schedule any tasks on +that processor for performance or energy efficiency reasons, respectively. + +Implementation details for Linux +-------------------------------- + +The implementation of threads scheduling consists of the following steps: + +1. A thread is spawned and scheduled to the ideal core using the default + heterogeneous scheduling policy. +2. The processor profiles thread execution and assigns an enumerated classification ID. + This classification is communicated to the OS via logical processor scope MSR. +3. During the thread context switch out the operating system consumes the workload(WL) + classification which resides in a logical processor scope MSR. +4. The OS triggers the hardware to clear its history by writing to an MSR, + after consuming the WL classification and before switching in the new thread. +5. If due to the classification, ranking table, and processor availability, + the thread is not on its ideal processor, the OS will then consider scheduling + the thread on its ideal processor (if available). + +Ranking Table +------------- +The ranking table is a shared memory region that is used to communicate the +performance and energy efficiency capabilities of each CPU in the system. + +The ranking table design includes rankings for each APIC ID in the system and +rankings both for performance and efficiency for each workload classification. + +.. kernel-doc:: drivers/platform/x86/amd/hfi/hfi.c + :doc: amd_shmem_info + +Ranking Table update +--------------------------- +The power management firmware issues an platform interrupt after updating the ranking +table and is ready for the operating system to consume it. CPUs receive such interrupt +and read new ranking table from shared memory which PCCT table has provided, then +``amd_hfi`` driver parse the new table to provide new consume data for scheduling decisions. diff --git a/Documentation/arch/x86/index.rst b/Documentation/arch/x86/index.rst index 8ac64d7de4dc9..56f2923f52597 100644 --- a/Documentation/arch/x86/index.rst +++ b/Documentation/arch/x86/index.rst @@ -43,3 +43,4 @@ x86-specific Documentation features elf_auxvec xstate + amd-hfi From patchwork Mon Nov 4 17:53:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861765 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2046.outbound.protection.outlook.com [40.107.244.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9695C1C4A1F; Mon, 4 Nov 2024 17:54:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 4 Nov 2024 11:54:39 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v6 02/12] MAINTAINERS: Add maintainer entry for AMD Hardware Feedback Driver Date: Mon, 4 Nov 2024 11:53:57 -0600 Message-ID: <20241104175407.19546-3-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|PH8PR12MB7422:EE_ X-MS-Office365-Filtering-Correlation-Id: ce65cd0e-be51-4d61-f14b-08dcfcf9c209 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: YmSgx5WRSigOrnNdVv5cfwk4Ww8JL6gO6F6a+xBgEXKYAuGVSuhnqS+qo8UokEVmk1dJKPr5x5JTFldJ8oapDZkoD5+XpYj62ua1rvGybEH8Ey03XyM87O0i9eJ/1LvpvWyfNYjVdMTjJfFNimfC041i9ydKm42J7vdUEZraMjRQImh2BzvQgy/myBhrmFaKIw10HCi5i5zNwML5E6/tmNwFLPsQY7GUa1dz4AWaY3byVbYls9ti+b6VAOXML1pGb958gBGTnt4Gwt92R6J2ZwzSZ+eNOcb06kT2WEG6aHTS4qFaj0D7yqcYaO7u9XNluBzyfr2wLwpQ5LggW57Zdwo0Jumwi9ppKX96n2yzKc9GVYqcsrMBTId6q/2XT4nT/Vfm2qdL1tgK2vXVSRhgY3db2N5TgeWqiy68YAMPi6uMurPp8oj2yWIPI9T/WMBxUqTdvj0sDaKm0Dd2q4nscF8jtZaAoTirGuAzshJYqr9OcnOHjkhTEhc4Fo191KR5dRvTWkjQVD+mPVFpBUkfvzVy9znWwkq5GR2AtLMTUHsyQvwysjG+1F1ujQLC06iS7jMx3GnCXh1HB4rojeJQr2wsV0RCrczeHWX3chT4lMs73bxge+vmTFMUhQ5aJ+Ov8kPO5ZUN2zaEzeVu6UJG7T7yNx646C+8h+whnarXXKvd4TOJboSMvMJQHO0mf8MNwaBFwG2teaoAJBCGiTXVfYmLEVTEXi9kIpAM+V4gj1Biwn897XMME7DVVElCHu+dotIhufU+k9sNJTQTA7uGnq9GegWdL5CMgrH6hzuLxeIxKnCTn/boN6V0tAboSV84X6mNEimVt9/lF+Hn+/L0UUymEhOt0G8MRcvCIN1eZKwWYjsRXuC7kmlfC6S8PeT4ZUN8mO1Xcr4JhkR3p5IXQ3xuL5UpjS/CdKUMu7LO4Kut/LsH1G11WPvd9LVj9gp434F/aOtmSR8gDn4ki/gn+hKvJ+X9fuSd+0+ZnC4VuabGBRBmGOhQEq+4A9CQHdk1J1TMJWtl9RL2k+yIZBhSTsXBzLbz1jq3iQ3n4/Tzz7s4LVyIFPxOQVdOHMkFbbNT7SJilZsRAFSNV4fyjpgLPyybxASLqQu7RZ787VvRkba8gpVAzO4usAFyFN01RkwVxpIFcEvyQXOa4l4hCwH14cUMSrNgTKyJM/oEfwecV7+1WgzO1/pFT2nSAmZqIVWj6dLKlohZCjg7wdEKVkhQTJA3vwM5UBQ+2ozxCiJ6kKlmAZ1qkHqTe0sYuYeFeEc69rLwVidZzh/zUt/Aht5d+JPaqV3T08BsJeBdH0Na4b58jWd7hHRNStjk37AOUOYWQZji10WVXQlZwFgM8gCb0jhz6b1vGYIHmdRK5ThjGI0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:41.0693 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ce65cd0e-be51-4d61-f14b-08dcfcf9c209 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7422 Introduce the `amd_hfi` driver into the MAINTAINERS file. The driver will support AMD Heterogeneous Core design which provides hardware feedback to the OS scheduler. Moving forward, Mario will be responsible for the maintenance and Perry will assist on review of patches related to this driver. Signed-off-by: Mario Limonciello --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c27f3190737f8..4554cbf3dfa16 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1083,6 +1083,15 @@ F: arch/x86/include/asm/amd_hsmp.h F: arch/x86/include/uapi/asm/amd_hsmp.h F: drivers/platform/x86/amd/hsmp.c +AMD HETERO CORE HARDWARE FEEDBACK DRIVER +M: Mario Limonciello +R: Perry Yuan +L: platform-driver-x86@vger.kernel.org +S: Supported +B: https://gitlab.freedesktop.org/drm/amd/-/issues +F: Documentation/arch/x86/amd-hfi.rst +F: drivers/platform/x86/amd/hfi/ + AMD IOMMU (AMD-VI) M: Joerg Roedel R: Suravee Suthikulpanit From patchwork Mon Nov 4 17:53:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861766 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2074.outbound.protection.outlook.com [40.107.223.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEB1F1C9EAF; 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Mon, 4 Nov 2024 11:54:39 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v6 03/12] x86/msr-index: define AMD heterogeneous CPU related MSR Date: Mon, 4 Nov 2024 11:53:58 -0600 Message-ID: <20241104175407.19546-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|PH7PR12MB8121:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d2dcb76-4aed-440a-007b-08dcfcf9c27a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: OPvs9pwOJzoYpEOor8mAtdHwL8rQOrDZv93Bq+J1DHoLYbyvzJCqg5Kyk1krxGmviqE9FCUlG/4RSWPTSyRxN528f3CBFMFOokOqvj8YzXNWI3psUDCtddcJrfrxjKh1CosS6PwJs14qhWandkhbhhLwZYxM+/zNb3hbBpPsNCHwiXXEYBM2iGwlHKQKEAKJ0SNjE0qLeit/8N3ousYBqZJJfP79u2X9/OAipJNQt6GYUjulWrY+qRhMq+huwIev/evLmt0wr4fjji157dfFbr7e+fitcmgW+A5K0lwitpoW7+CLKjlw6o8m4tyTWyi9BQTrSTO6S28WAkvk/fdmqEj/eVQ5TxU5r5YJEptNiGSBi85Z9Qg2Y4njskVZUZnakU9Tfmm6RkEFjg1iJyO+vzTB4g5IaU2oFLP8DCx0U1kp67quzY4Y5Cr2SwTYaQlQ1uDTP9529VaQpvLO0pw9RqUp9WPxlq5lpjpxHmTjvRYgrlIDZ/MpcAjxzeF+wvZOPAslTPqjjai45RjQh5vgcOKpZwoZ8radEPB4IUL4PBKjC2eMY6ums62oV01tafx/pR/vBsn4p4NRuaVUTm7bT4hLcXHcwJXowa4oAu04PHsruGBg/wyGlSlIMksGEM6K7fGCo2n/Z1QYFYQ5H9ZnPogPXewRz4I7zBtfaDcCIUmFlog7LfrMx6YwTpLqJipxmmYnC0IQDXWRUUZJh9hmY7e65aYISjZJtY+55Tapza4RPWg6/7KxJyQ21drWJUWiDw2klpTCaTw9OZUepYz9noN18wKa+alEiZNwqZkS+PaA86uymwq+i5RYXQU0gGPDwp1r3qm5Eiz17+OzcRLWB6QXRf7+/27I9t1ujSjquEQAm9FrlAG/t7KPYgWTwXdQEkYNxj05WYKAQLKXD7jSYpuzwpZhDIeGQwKrBQUdIfMRddh1RpkNT7FS8j9J+SWPO+PrKj+fPh4z9DSGChhSOQ08yG7QrJjEnSaLKt73vCl577cnIt0R4AAFJZFhXEu8ZK0Q/bMTaxuTWcBbrkBL8fvZ/k9xnESPoyIuEcbrXrLNDL1LrxU2plnWkgx5hbVZCgTjfHKEctHcPDVPpQS406mmHEP/i5Ef5US2SsmbJJKRqNZ1TKDnDT0ptetEvkQ7SFz+M9+bsmGS5aF+43QnmEIKY7bj00qjL4mIqD1mj3qVjooGMfgFVzqXz7t+0f6+QiaXFGFydpLrWz/P6prYN0UiYUly43uNxJtDg3v21PshlEqqmbCi/+plIHlVDMgSXfe29WQGr5vjVHRKZi0wy4craMW8Lq69WRozpfLT0NgXSnOdnnlBrObeeN+RcAk801q703uhwhF/BAGHPdKrZodR/FJg6ONogTrHjkC2wLCXpa78zWzdKjmhlWhJ1xjRhIlzc9UdNZpuEckw72TTBw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:41.8036 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d2dcb76-4aed-440a-007b-08dcfcf9c27a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8121 From: Perry Yuan Introduces new MSR registers for AMD hardware feedback support. These registers enable the system to provide workload classification and configuration capabilities. Reviewed-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Signed-off-by: Mario Limonciello --- arch/x86/include/asm/msr-index.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 3ae84c3b8e6db..0cd5ffe50f4a4 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -712,6 +712,11 @@ #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301 #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302 +/* AMD Hardware Feedback Support MSRs */ +#define AMD_WORKLOAD_CLASS_CONFIG 0xc0000500 +#define AMD_WORKLOAD_CLASS_ID 0xc0000501 +#define AMD_WORKLOAD_HRST 0xc0000502 + /* AMD Last Branch Record MSRs */ #define MSR_AMD64_LBR_SELECT 0xc000010e From patchwork Mon Nov 4 17:53:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861769 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2089.outbound.protection.outlook.com [40.107.220.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACA481CB533; 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Mon, 4 Nov 2024 11:54:40 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" , Perry Yuan Subject: [PATCH v6 04/12] platform/x86: hfi: Introduce AMD Hardware Feedback Interface Driver Date: Mon, 4 Nov 2024 11:53:59 -0600 Message-ID: <20241104175407.19546-5-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|PH7PR12MB9151:EE_ X-MS-Office365-Filtering-Correlation-Id: 8abbe449-ac41-43b0-5ee7-08dcfcf9c2d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: M39d5u8jexXr+Uzz0vMlMFUvRiGfdWJy81osV0fFh7hDpTc+iy24sPHjqh/XC0kMNHixhvRyxYs0781Cn8SKitSzuwS2goDyejidumNjJfCcFKgrylbO+ZAAYlFHNIj/nfgyAS2Dt3kevF88twvobm8ps/sYlB55pyCP6OAtJSI6pDwBHmBp3DMggOhCLhsUbWQRDlLGu8NGcmcNF/oy0MB2ohQUoMZZQ6qjiHafZPuBzQYgk7ZrCLVt0Tg0sUXeHVY9Dlxh8sdncxcjtx9TrDPIzUOFncTcQqGoyG+ptPdid74IqQj+0lirKsQqRHhg0vJC3X5KTR/dbg/hnoMi4zSNjEmHvwSgKp0J/du3cSzGN7R8XUi+UPy9t9EVkG+Lpv4Log0fgFskLtHdBqq2wiHXof+NBV5PqYqob1PEkLKqS8dplmS+IhxCVYvESuPCSSl8H68bj3vFwSxsNOHYNbXM/e6XMtggRSkWGtQfmWBzt+OmtAZGi6h6T6ZH6WfCphSKWgzjN2oC4nHydKbOHBO87YVDeN0jctU6dDAwvpp4A4UMZLr6EL731M0RDT5wjIeDJCzqmZ7ZsZV4/A1GkQ3XIGgCEpTRwME1rMtG0w3lChkpt4jvPLQicEnzWeBmEbgEyJTH4voK1XNIo545lqwXlWOBeQNG6b6SK1hd1FKtJNLzhMhgsAoUQXl8zVk4d4oXcy1ZWfJimjcGCqGrPMdmbXsybGA2TihrNrH63zgeHsOr5yC2BlkcMI9TRwh8hAhgDY/1fl66rn15nQK3NanWE3hOWdO1N4YXEyxkw2w1vU2ZvhU/5lTqQJTadk/rEIa13PzzQw06k9ZxBCEov2GddpsE76LBj7YF3MJ1W/SW3OhEmQrSnI0ws4vNX3yA59k6GjE844DfoB2pJ8wYiejVUNE/ZsBhZgIgrm+2SUBNSppmlNcSwgZobo0r7xSJsuVDYRe2zwsfCq1A7XO35UlYyBBfk5n7/f88HmJ8cvpU4NTPdxfxHnyBtATjy7fLHE7ghtMYGRG4Pg091gWvv/gLzlpDUsZBQniATWRKKouaIegwzJKEOXRYH4bOQRl9RK+kltt/vu6dQTtUn+R7CfgmZO5zJjGF33xbRWKPqBguLaltjudXqGM4B6uvCoy86H94+8PQd78KC3AlWwe793T3LE5sELDjxxeNBhUZs5798hA7PTdp5B4XPfiTi6yt0DBV+HkVQ+oX/yqOdxeZS0aSvk6ei40B/TjHYlyvOBhn9VSYEp7AUE9FqRYltMkg15CLRx+wCb6DeVwmynoILdrlE4k8JSfHRFsVaajCbLWw0WxiC3NLZkUxN8AdTvL1k6H/ZRyqJ4anpclSrxaO20bg4KdHuMPZPU5MQQfOwnOVAlPU8TCrsnS2Vw9Sqf+pkJmwODIb+2K76cyFHBFXWg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:42.4287 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8abbe449-ac41-43b0-5ee7-08dcfcf9c2d9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9151 From: Perry Yuan The AMD Heterogeneous core design and Hardware Feedback Interface (HFI) provide behavioral classification and a dynamically updated ranking table for the scheduler to use when choosing cores for tasks. There are two CPU core types defined: `Classic Core` and `Dense Core`. "Classic" cores are the standard performance cores, while "Dense" cores are optimized for area and efficiency. Heterogeneous compute refers to CPU implementations that are comprised of more than one architectural class, each with two capabilities. This means each CPU reports two separate capabilities: "perf" and "eff". Each capability lists all core ranking numbers between 0 and 255, where a higher number represents a higher capability. Heterogeneous systems can also extend to more than two architectural classes. The purpose of the scheduling feedback mechanism is to provide information to the operating system scheduler in real time, allowing the scheduler to direct threads to the optimal core during task scheduling. All core ranking data are provided by the PMFW via a shared memory ranking table, which the driver reads and uses to update core capabilities to the scheduler. When the hardware updates the table, it generates a platform interrupt to notify the OS to read the new ranking table. Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Reviewed-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello Reviewed-by: Shyam Sundar S K --- v5->v6: * Whitespace (Shyam) * Use managed mutex (Shyam) * Remove needless include (Shyam) * Commit message text (Shyam) * Use cpu_feature_enabled (Boris) * Remove EOF newline (Boris) --- drivers/platform/x86/amd/Kconfig | 1 + drivers/platform/x86/amd/Makefile | 1 + drivers/platform/x86/amd/hfi/Kconfig | 18 +++ drivers/platform/x86/amd/hfi/Makefile | 7 ++ drivers/platform/x86/amd/hfi/hfi.c | 161 ++++++++++++++++++++++++++ 5 files changed, 188 insertions(+) create mode 100644 drivers/platform/x86/amd/hfi/Kconfig create mode 100644 drivers/platform/x86/amd/hfi/Makefile create mode 100644 drivers/platform/x86/amd/hfi/hfi.c diff --git a/drivers/platform/x86/amd/Kconfig b/drivers/platform/x86/amd/Kconfig index f88682d36447c..c3f69dbe3037d 100644 --- a/drivers/platform/x86/amd/Kconfig +++ b/drivers/platform/x86/amd/Kconfig @@ -5,6 +5,7 @@ source "drivers/platform/x86/amd/pmf/Kconfig" source "drivers/platform/x86/amd/pmc/Kconfig" +source "drivers/platform/x86/amd/hfi/Kconfig" config AMD_HSMP tristate "AMD HSMP Driver" diff --git a/drivers/platform/x86/amd/Makefile b/drivers/platform/x86/amd/Makefile index dcec0a46f8af1..2676fc81fee54 100644 --- a/drivers/platform/x86/amd/Makefile +++ b/drivers/platform/x86/amd/Makefile @@ -9,3 +9,4 @@ amd_hsmp-y := hsmp.o obj-$(CONFIG_AMD_HSMP) += amd_hsmp.o obj-$(CONFIG_AMD_PMF) += pmf/ obj-$(CONFIG_AMD_WBRF) += wbrf.o +obj-$(CONFIG_AMD_HFI) += hfi/ diff --git a/drivers/platform/x86/amd/hfi/Kconfig b/drivers/platform/x86/amd/hfi/Kconfig new file mode 100644 index 0000000000000..79e3b0073275c --- /dev/null +++ b/drivers/platform/x86/amd/hfi/Kconfig @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# AMD Hardware Feedback Interface Driver +# + +config AMD_HFI + bool "AMD Hetero Core Hardware Feedback Driver" + depends on ACPI + depends on CPU_SUP_AMD + help + Select this option to enable the AMD Heterogeneous Core Hardware Feedback Interface. If + selected, hardware provides runtime thread classification guidance to the operating system + on the performance and energy efficiency capabilities of each heterogeneous CPU core. + These capabilities may vary due to the inherent differences in the core types and can + also change as a result of variations in the operating conditions of the system such + as power and thermal limits. If selected, the kernel relays updates in heterogeneous + CPUs' capabilities to userspace, allowing for more optimal task scheduling and + resource allocation, leveraging the diverse set of cores available. diff --git a/drivers/platform/x86/amd/hfi/Makefile b/drivers/platform/x86/amd/hfi/Makefile new file mode 100644 index 0000000000000..672c6ac106e95 --- /dev/null +++ b/drivers/platform/x86/amd/hfi/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# AMD Hardware Feedback Interface Driver +# + +obj-$(CONFIG_AMD_HFI) += amd_hfi.o +amd_hfi-objs := hfi.o diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c new file mode 100644 index 0000000000000..2cd71d79a22c9 --- /dev/null +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * AMD Hardware Feedback Interface Driver + * + * Copyright (C) 2024 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Authors: Perry Yuan + * Mario Limonciello + */ + +#define pr_fmt(fmt) "amd-hfi: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AMD_HFI_DRIVER "amd_hfi" +#define AMD_HETERO_CPUID_27 0x80000027 +static struct platform_device *device; + +struct amd_hfi_data { + const char *name; + struct device *dev; + struct mutex lock; +}; + +struct amd_hfi_classes { + u32 perf; + u32 eff; +}; + +/** + * struct amd_hfi_cpuinfo - HFI workload class info per CPU + * @cpu: cpu index + * @cpus: mask of cpus associated with amd_hfi_cpuinfo + * @class_index: workload class ID index + * @nr_class: max number of workload class supported + * @amd_hfi_classes: current cpu workload class ranking data + * + * Parameters of a logical processor linked with hardware feedback class + */ +struct amd_hfi_cpuinfo { + int cpu; + cpumask_var_t cpus; + s16 class_index; + u8 nr_class; + struct amd_hfi_classes *amd_hfi_classes; +}; + +static DEFINE_PER_CPU(struct amd_hfi_cpuinfo, amd_hfi_cpuinfo) = {.class_index = -1}; + +static int amd_hfi_alloc_class_data(struct platform_device *pdev) +{ + struct amd_hfi_cpuinfo *hfi_cpuinfo; + struct device *dev = &pdev->dev; + int idx; + int nr_class_id; + + nr_class_id = cpuid_eax(AMD_HETERO_CPUID_27); + if (nr_class_id < 0 || nr_class_id > 255) { + dev_err(dev, "failed to get number of supported classes: %d\n", + nr_class_id); + return -EINVAL; + } + + for_each_present_cpu(idx) { + struct amd_hfi_classes *classes; + + classes = devm_kzalloc(dev, + nr_class_id * sizeof(struct amd_hfi_classes), + GFP_KERNEL); + if (!classes) + return -ENOMEM; + hfi_cpuinfo = per_cpu_ptr(&amd_hfi_cpuinfo, idx); + hfi_cpuinfo->amd_hfi_classes = classes; + hfi_cpuinfo->nr_class = nr_class_id; + } + + return 0; +} + +static const struct acpi_device_id amd_hfi_platform_match[] = { + {"AMDI0104", 0}, + { } +}; +MODULE_DEVICE_TABLE(acpi, amd_hfi_platform_match); + +static int amd_hfi_probe(struct platform_device *pdev) +{ + struct amd_hfi_data *amd_hfi_data; + int ret; + + if (!acpi_match_device(amd_hfi_platform_match, &pdev->dev)) + return -ENODEV; + + amd_hfi_data = devm_kzalloc(&pdev->dev, sizeof(*amd_hfi_data), GFP_KERNEL); + if (!amd_hfi_data) + return -ENOMEM; + + amd_hfi_data->dev = &pdev->dev; + ret = devm_mutex_init(&pdev->dev, &amd_hfi_data->lock); + if (ret) + return ret; + platform_set_drvdata(pdev, amd_hfi_data); + + ret = amd_hfi_alloc_class_data(pdev); + if (ret) + return ret; + + return 0; +} + +static struct platform_driver amd_hfi_driver = { + .driver = { + .name = AMD_HFI_DRIVER, + .owner = THIS_MODULE, + .acpi_match_table = ACPI_PTR(amd_hfi_platform_match), + }, + .probe = amd_hfi_probe, +}; + +static int __init amd_hfi_init(void) +{ + int ret; + + if (acpi_disabled || + !cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES) || + !cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS)) + return -ENODEV; + + device = platform_device_register_simple(AMD_HFI_DRIVER, -1, NULL, 0); + if (IS_ERR(device)) { + pr_err("unable to register HFI platform device\n"); + return PTR_ERR(device); + } + + ret = platform_driver_register(&amd_hfi_driver); + if (ret) + pr_err("failed to register HFI driver\n"); + + return ret; +} + +static __exit void amd_hfi_exit(void) +{ + platform_device_unregister(device); + platform_driver_unregister(&amd_hfi_driver); +} +module_init(amd_hfi_init); +module_exit(amd_hfi_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("AMD Hardware Feedback Interface Driver"); From patchwork Mon Nov 4 17:54:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861768 Received: from NAM02-DM3-obe.outbound.protection.outlook.com (mail-dm3nam02on2072.outbound.protection.outlook.com [40.107.95.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4985D1CACE8; Mon, 4 Nov 2024 17:54:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 4 Nov 2024 11:54:41 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" , Perry Yuan Subject: [PATCH v6 05/12] platform/x86: hfi: parse CPU core ranking data from shared memory Date: Mon, 4 Nov 2024 11:54:00 -0600 Message-ID: <20241104175407.19546-6-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|MW4PR12MB6876:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ac9a8ad-47c1-4d5e-969a-08dcfcf9c331 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: fNVQSSFs7dEQ8vXG6wEyQ3SWN41t+s1/mrea5JtO3AmMKYx+q1ma/vZymOUX1LgCs2kGJLoa/cptkDxdDToQFRtFGeaLcK5imcHS0L2WlZfHhol3QoVO4BEzWAt7IEamVSZyEkhLhgsvVegLeJPED811b+1vta0noqmbId4d76UKd5qpW+t5sm7VWhROMvdzr7pua+mXjDWiOI5XsPd6RZUosaCtF0b/jKrVF5eqlqhLyyAbq9vjDNajtOOjLAbA+wRjGWi6oHyfZwYyReUTOSlnkxyUHbX5ljXla2cnI/Q48MfBscb2gsLYOdCWq69hepqQqF01XGTjiPm/4j+vH+U8vJUTVvtYvlzVl5AY376AZRdmu46b1EfLkPDpIVu+WGzNKqgmKQrxqmzPecaIBMuqvPclMInXdrm0ig95MGzMqHrRinExFgjybVH93GTeXMeT9eAJxZPu0JvgWUxRGphfny3L9Y3YmirkALLafzLXFwQNNrhI0IBI5sJrqoyaL/r1LamePnOF8qvJ62BIVYotMn+qHK629bEvj+3X3jSvED+iIW81UNtw4Zb4RvcNwoRwvnx1nwhlrjod9YIQSu/KFGtYi4x/af3nsI1nbL4dYuVm4ioJn4whaHAaoMN+jSG8VXkhmhx4y31Vu4ocFrsfj/dnytRliUqFOdNfEKtnNiGmIY5sZTWCL0oGwLhq7R/fIJD0rX581CiVIvemSjFSarD6UJBpcAihV5f17/B1dRcP5ykD2KheglVAqcTXBLtczsuDcU09dnAMUPcYin/LM0nJboKEbL85vWBZbOmq1pPtCAvvsCERK+f7f2nZL+zx6rBANMDfrHxZF5czVxmkKEjvETjsDBRwyWkKqwjgoTgtj0uigVW8g9843jZknqljk8qngSJPLvTxsi8Iy5Z5Z6fJ488JEtbfrLOxntAsVF6mC51lfk32goH0vK8npn/m+SkUCrvCxAjqDE/00FRXxdJ3werZHR6CFRme64qhaTSXPq/T/1AUCc9YfYZhNN9VFJKs5njLyoXGp/OMEJKaJjTjHsbUIDrFCpMhWRhC+yCTZff1T/WMfKxJ+m+famcQYiBFAY1Htn4cVdfzIMPv3LmBPXkm+BEjq8OqqopMcLk80xASKs2kvQ88y/m8kETuXtBQ+axkCy7Dx0+Y0//pZ8YN0WyAGg+nJIwl1cmc0ZY4SPYhzHsnYIPlMTnGgMzg6Cn0b/c+gqvesss0t5kRpI1Kb6HOHo7H3DNXDK4e5Ldq35gjGfFHBiTe0Mz/yhW2UcL9kKUuJXBLbXOg/d1f+T9tbnWTkr/WjPqeqEpvxR2yVKDQ94qbf3uG+c7tDr3avzVOzU20qU0tAU7EBaXzQHFUbkPw1bKxBYiRG1Vi2Mtk1U282uHCfNv2Z16H1ldTlTzxBQKU1Kz8eFzfFA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:43.0068 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ac9a8ad-47c1-4d5e-969a-08dcfcf9c331 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6876 From: Perry Yuan When `amd_hfi` driver is loaded, it will use PCCT subspace type 4 table to retrieve the shared memory address which contains the CPU core ranking table. This table includes a header that specifies the number of ranking data entries to be parsed and rank each CPU core with the Performance and Energy Efficiency capability as implemented by the CPU power management firmware. Once the table has been parsed, each CPU is assigned a ranking score within its class. Subsequently, when the scheduler selects cores, it chooses from the ranking list based on the assigned scores in each class, thereby ensuring the optimal selection of CPU cores according to their predefined classifications and priorities. Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello Reviewed-by: Ilpo Järvinen --- drivers/platform/x86/amd/hfi/hfi.c | 196 +++++++++++++++++++++++++++++ 1 file changed, 196 insertions(+) diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c index 2cd71d79a22c9..708d7d18fe2f2 100644 --- a/drivers/platform/x86/amd/hfi/hfi.c +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -18,20 +18,72 @@ #include #include #include +#include #include +#include #include #include +#include +#include + +#include + +#include +#include #define AMD_HFI_DRIVER "amd_hfi" +#define AMD_HFI_MAILBOX_COUNT 1 +#define AMD_HETERO_RANKING_TABLE_VER 2 + #define AMD_HETERO_CPUID_27 0x80000027 + static struct platform_device *device; +/** + * struct amd_shmem_info - Shared memory table for AMD HFI + * + * @header: The PCCT table header including signature, length flags and command. + * @version_number: Version number of the table + * @n_logical_processors: Number of logical processors + * @n_capabilities: Number of ranking dimensions (performance, efficiency, etc) + * @table_update_context: Command being sent over the subspace + * @n_bitmaps: Number of 32-bit bitmaps to enumerate all the APIC IDs + * This is based on the maximum APIC ID enumerated in the system + * @reserved: 24 bit spare + * @table_data: Bit Map(s) of enabled logical processors + * Followed by the ranking data for each logical processor + */ +struct amd_shmem_info { + struct acpi_pcct_ext_pcc_shared_memory header; + u32 version_number :8, + n_logical_processors :8, + n_capabilities :8, + table_update_context :8; + u32 n_bitmaps :8, + reserved :24; + u32 table_data[]; +} __packed; + struct amd_hfi_data { const char *name; struct device *dev; struct mutex lock; + + /* PCCT table related*/ + struct pcc_mbox_chan *pcc_chan; + void __iomem *pcc_comm_addr; + struct acpi_subtable_header *pcct_entry; + struct amd_shmem_info *shmem; }; +/** + * struct amd_hfi_classes - HFI class capabilities per CPU + * @perf: Performance capability + * @eff: Power efficiency capability + * + * Capabilities of a logical processor in the ranking table. These capabilities + * are unitless and specific to each HFI class. + */ struct amd_hfi_classes { u32 perf; u32 eff; @@ -40,23 +92,105 @@ struct amd_hfi_classes { /** * struct amd_hfi_cpuinfo - HFI workload class info per CPU * @cpu: cpu index + * @apic_id: apic id of the current cpu * @cpus: mask of cpus associated with amd_hfi_cpuinfo * @class_index: workload class ID index * @nr_class: max number of workload class supported + * @ipcc_scores: ipcc scores for each class * @amd_hfi_classes: current cpu workload class ranking data * * Parameters of a logical processor linked with hardware feedback class */ struct amd_hfi_cpuinfo { int cpu; + u32 apic_id; cpumask_var_t cpus; s16 class_index; u8 nr_class; + int *ipcc_scores; struct amd_hfi_classes *amd_hfi_classes; }; static DEFINE_PER_CPU(struct amd_hfi_cpuinfo, amd_hfi_cpuinfo) = {.class_index = -1}; +static int find_cpu_index_by_apicid(unsigned int target_apicid) +{ + int cpu_index; + + for_each_present_cpu(cpu_index) { + struct cpuinfo_x86 *info = &cpu_data(cpu_index); + + if (info->topo.apicid == target_apicid) { + pr_debug("match APIC id %d for CPU index: %d\n", + info->topo.apicid, cpu_index); + return cpu_index; + } + } + + return -ENODEV; +} + +static int amd_hfi_fill_metadata(struct amd_hfi_data *amd_hfi_data) +{ + struct acpi_pcct_ext_pcc_slave *pcct_ext = + (struct acpi_pcct_ext_pcc_slave *)amd_hfi_data->pcct_entry; + void __iomem *pcc_comm_addr; + + pcc_comm_addr = acpi_os_ioremap(amd_hfi_data->pcc_chan->shmem_base_addr, + amd_hfi_data->pcc_chan->shmem_size); + if (!pcc_comm_addr) { + pr_err("failed to ioremap PCC common region mem\n"); + return -ENOMEM; + } + + memcpy_fromio(amd_hfi_data->shmem, pcc_comm_addr, pcct_ext->length); + iounmap(pcc_comm_addr); + + if (amd_hfi_data->shmem->header.signature != PCC_SIGNATURE) { + pr_err("invalid signature in shared memory\n"); + return -EINVAL; + } + if (amd_hfi_data->shmem->version_number != AMD_HETERO_RANKING_TABLE_VER) { + pr_err("invalid version %d\n", amd_hfi_data->shmem->version_number); + return -EINVAL; + } + + for (unsigned int i = 0; i < amd_hfi_data->shmem->n_bitmaps; i++) { + u32 bitmap = amd_hfi_data->shmem->table_data[i]; + + for (unsigned int j = 0; j < BITS_PER_TYPE(u32); j++) { + struct amd_hfi_cpuinfo *info; + int apic_id = i * BITS_PER_TYPE(u32) + j; + int cpu_index; + + if (!(bitmap & BIT(j))) + continue; + + cpu_index = find_cpu_index_by_apicid(apic_id); + if (cpu_index < 0) { + pr_warn("APIC ID %d not found\n", apic_id); + continue; + } + + info = per_cpu_ptr(&amd_hfi_cpuinfo, cpu_index); + info->apic_id = apic_id; + + /* Fill the ranking data for each logical processor */ + info = per_cpu_ptr(&amd_hfi_cpuinfo, cpu_index); + for (unsigned int k = 0; k < info->nr_class; k++) { + u32 *table = amd_hfi_data->shmem->table_data + + amd_hfi_data->shmem->n_bitmaps + + i * info->nr_class; + + info->amd_hfi_classes[k].eff = table[apic_id + 2 * k]; + info->amd_hfi_classes[k].perf = table[apic_id + 2 * k + 1]; + } + } + } + + return 0; +} + static int amd_hfi_alloc_class_data(struct platform_device *pdev) { struct amd_hfi_cpuinfo *hfi_cpuinfo; @@ -73,20 +207,78 @@ static int amd_hfi_alloc_class_data(struct platform_device *pdev) for_each_present_cpu(idx) { struct amd_hfi_classes *classes; + int *ipcc_scores; classes = devm_kzalloc(dev, nr_class_id * sizeof(struct amd_hfi_classes), GFP_KERNEL); if (!classes) return -ENOMEM; + ipcc_scores = devm_kcalloc(dev, nr_class_id, sizeof(int), GFP_KERNEL); + if (!ipcc_scores) + return -ENOMEM; hfi_cpuinfo = per_cpu_ptr(&amd_hfi_cpuinfo, idx); hfi_cpuinfo->amd_hfi_classes = classes; + hfi_cpuinfo->ipcc_scores = ipcc_scores; hfi_cpuinfo->nr_class = nr_class_id; } return 0; } +static int amd_hfi_metadata_parser(struct platform_device *pdev, + struct amd_hfi_data *amd_hfi_data) +{ + struct acpi_pcct_ext_pcc_slave *pcct_ext; + struct acpi_subtable_header *pcct_entry; + struct mbox_chan *pcc_mbox_channels; + struct acpi_table_header *pcct_tbl; + struct pcc_mbox_chan *pcc_chan; + acpi_status status; + int ret; + + pcc_mbox_channels = devm_kcalloc(&pdev->dev, AMD_HFI_MAILBOX_COUNT, + sizeof(*pcc_mbox_channels), GFP_KERNEL); + if (!pcc_mbox_channels) + return -ENOMEM; + + pcc_chan = devm_kcalloc(&pdev->dev, AMD_HFI_MAILBOX_COUNT, + sizeof(*pcc_chan), GFP_KERNEL); + if (!pcc_chan) + return -ENOMEM; + + status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl); + if (ACPI_FAILURE(status) || !pcct_tbl) + return -ENODEV; + + /* get pointer to the first PCC subspace entry */ + pcct_entry = (struct acpi_subtable_header *) ( + (unsigned long)pcct_tbl + sizeof(struct acpi_table_pcct)); + + pcc_chan->mchan = &pcc_mbox_channels[0]; + + amd_hfi_data->pcc_chan = pcc_chan; + amd_hfi_data->pcct_entry = pcct_entry; + pcct_ext = (struct acpi_pcct_ext_pcc_slave *)pcct_entry; + + if (pcct_ext->length <= 0) + return -EINVAL; + + amd_hfi_data->shmem = devm_kzalloc(amd_hfi_data->dev, pcct_ext->length, GFP_KERNEL); + if (!amd_hfi_data->shmem) + return -ENOMEM; + + pcc_chan->shmem_base_addr = pcct_ext->base_address; + pcc_chan->shmem_size = pcct_ext->length; + + /* parse the shared memory info from the pcct table */ + ret = amd_hfi_fill_metadata(amd_hfi_data); + + acpi_put_table(pcct_tbl); + + return ret; +} + static const struct acpi_device_id amd_hfi_platform_match[] = { {"AMDI0104", 0}, { } @@ -115,6 +307,10 @@ static int amd_hfi_probe(struct platform_device *pdev) if (ret) return ret; + ret = amd_hfi_metadata_parser(pdev, amd_hfi_data); + if (ret) + return ret; + return 0; } From patchwork Mon Nov 4 17:54:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861770 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2068.outbound.protection.outlook.com [40.107.243.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2CAC1CBA01; Mon, 4 Nov 2024 17:54:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.243.68 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; 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Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" , Perry Yuan Subject: [PATCH v6 06/12] platform/x86: hfi: init per-cpu scores for each class Date: Mon, 4 Nov 2024 11:54:01 -0600 Message-ID: <20241104175407.19546-7-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|MW4PR12MB7167:EE_ X-MS-Office365-Filtering-Correlation-Id: 47cd4d36-f274-43ff-dcdf-08dcfcf9c3f9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: LQR5Wsy98hXLuAErrPJYzrgfeNuQ59KiggRrUgfNzLqrBvuKVHdFncXAjezW1dcpFqFgEP7eeOEfNWGw366pC5M3mSnAkk3AjTFQj8ZIf4cpDyVU24inkLGds89mHbIkCOnMje/yKH2jTZtIVbw/Q4x8c33moUTjHpeDSzTkevkOPs5WnUHvgVCtnvXAV5Qm0bQ2t53k2c8o7anEm1n7L0oOCiFlJP7WjCdwLE6XTmdh2+n4yplLbApMVg9v9u9Pdjk7kBAzpPQpb/8aoS8NusnXj5NPkqBJwcP0L6m7wvvGxz+dFcbV9T/hzmXRvP8FJaDlhkmc7TjPFcCWmUfDSZTtonR0dIJDQ6BBBER8rEYNP5oCSlOt3hDWf+84enUdqpIeTt+wHyhweJkSSuZHKBo0+26Z4gkk9HBu1W+V+6fiumGEO6TrZe43Z289ECNEz8+wpfQGA067p4PJUN7lEKpksoppWdf3wixCOPw2DPPAZ7eEKs/cpQjiEX/6JXI3WHN/KsrfEcqE/lr5cbnCAbHa0yzQLRC3HbGmF9HywGj622NiGVvN8+fXQH/bIt4lUiETsp4AGeuLLXAzUZECWq2DYUb3Gg2MnCKDD38augppcNIyFSc0BDdMkxRkoZjxxDWsX48nfGUb/JaDBpcOi5p60jvA6AhDUrDeiPmtCKUlZQYWRbsCQxF/oVECMkbECG2DybMvpD6Hy08APz0SsBIkkaTfWdX698MceNRYlOQxIP4EPe86nB2VCxVfM40PujcHitrPx04pAH5ag1zhLXnXt6+8wkEyDfeoUTfbhQYQsMHh6ZKFuGj9TzHzYhyI+M8onv8W6IK/1ENGGNJsTGiRLFG/lznXoAhT0FeJH+/aq8ods0nnTlvyNM3EETIcug8ECCxn+NKJwF5FeKgbTi6ex43W1b/1T+7cQT0LssPbSxNkPQAXWUvQaV0Ly7P5ozRxMgoW444r7MZTh9lUfqQo+FkLEziYlX6SQvz+Ey1P4bAGVxfBj/Jruc9Drwxb7WU52lilEjBcXuNoJtOkTwJ3la7X4CCRbNYw4yt0lQS0B11X620Ieu/jh6AHO/hRZP6cgwSizxznePQjcgWs6v8iFJ/1NCu4VpBNay0Uw90uTLJc2zVTusVnn9kjit5lTh7ThY1ypSHpgsTcg18UDGDWKOX7qP5XzOijkKRIdXm6q9M203O44S+S3fEXrltZd/WEis9atNSpCMt4k36hN4KtxUDBG/P28PCiePIS+L8rT8hVq2lpgHmLypXEDkxg4sJx4FkjU5bO52SNRCXJOVU56aMyls94R0pUTVVm2Ffn4+qzWpnWKF6uT2ah4sKzgbZLW3bG4Bw0+6zvjlHvZmaIcs15GBGhkRuqkOCtagHt4OChig6TpzMXHDmyK2bBQllfZm5Wmq+w95NWpBv2jg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:44.3193 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 47cd4d36-f274-43ff-dcdf-08dcfcf9c3f9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7167 From: Perry Yuan Initialize per cpu score `amd_hfi_ipcc_scores` which store energy score and performance score data for each class. `Classic core` and `Dense core` are ranked according to those values as energy efficiency capability or performance capability. OS scheduler will pick cores from the ranking list on each class ID for the thread which provide the class id got from hardware feedback interface. Reviewed-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/hfi/hfi.c | 31 ++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c index 708d7d18fe2f2..9bdd9d9a615b8 100644 --- a/drivers/platform/x86/amd/hfi/hfi.c +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -113,6 +113,8 @@ struct amd_hfi_cpuinfo { static DEFINE_PER_CPU(struct amd_hfi_cpuinfo, amd_hfi_cpuinfo) = {.class_index = -1}; +static DEFINE_MUTEX(hfi_cpuinfo_lock); + static int find_cpu_index_by_apicid(unsigned int target_apicid) { int cpu_index; @@ -226,6 +228,31 @@ static int amd_hfi_alloc_class_data(struct platform_device *pdev) return 0; } +static int amd_set_hfi_ipcc_score(struct amd_hfi_cpuinfo *hfi_cpuinfo, int cpu) +{ + for (int i = 0; i < hfi_cpuinfo->nr_class; i++) + WRITE_ONCE(hfi_cpuinfo->ipcc_scores[i], + hfi_cpuinfo->amd_hfi_classes[i].perf); + + return 0; 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Mon, 4 Nov 2024 11:54:42 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" , Perry Yuan Subject: [PATCH v6 07/12] platform/x86: hfi: add online and offline callback support Date: Mon, 4 Nov 2024 11:54:02 -0600 Message-ID: <20241104175407.19546-8-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|IA0PR12MB8254:EE_ X-MS-Office365-Filtering-Correlation-Id: bbd38a14-13b3-4eb6-b1fa-08dcfcf9c44f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: wscaMnVEa4FSypf16fM3NIJZSNsAeZxB9cxwOdSJyZtYtZpQwAdu7a3o0v2ynmq7UDaJUWoFt7pEmjet7MOJYBTXED7pBzoStS8AVlQg7UHZ6cIXJN8wYWVbnJPLXDoEFcHHqaYMTjFqEEhn3V36WBAzX55V80q1UV+SAdpvdT2CEPgscXIUcvgdwPHo0tIaRONG8kFaE8B3NInqQJAyVOmlPHK2Zi4h7HfpVe5M9q9lcelydRIHiYOXcBYJnZmHhDzLZd614IOpCt04eA01DiHWDZnD6AKmBLUf2lsZ5avQklsmKL1jSTWxpBquHYIvp/RL7zS0ZobLIeDQY5ugxAf98DPovd3iIhzC4j9PQRRS/D8HZu2eu0RQWz4RnZaySOeoV5I0CaU/q6ZQ2fE1iLg8wo8K+ihOYeS12Mb5dSAWNcPbz6YVi+/z0bQYQzWv842Xt8+Jg1eYhKjkGnV5dYuyFbHr/2CswN2bH58ED4rTuOLBfNHECxKiGpNqcShfk/LW2I0+wpHL0wvQZy2SHsOhjnjttEGSPiWlKlD+o4qLxQjna71xpQodrpbqN0nfF4wJny8mPoq8xS2GccEIYNfA59hJd5/5I43/r8Hao7F7Bw1guJs5zCq1DQnLF1dkQE6fpKjS5TrYc83ymp86upe8rQGiGy+LHi4PRQJw1V1Obvp5gwB/RMkB8Vc865eHKASp+gdr5xnIcDHsOqJksRo1FFyf0Vk8ks8ngGZbuSop4cNrZCneCZis2XFTzdkgAvF5gy5WJ9+iEh7l7QsTJhqxQXaupJMp1OyERMhha3OFycsyFS43pl4DCQIRIzNrHBxNCvS014ruryVT93Y3Owy8+1P9Q3SgRTzE5ADtdbWnOPEI4vyXTPQKgikDaYchA20ZJHBovOmRm4/OYx8Pr85YbI78Ok0PpiAVdUQjk/o3z4dKFaiAjt7JSFzr1Z4i9pDqdSALs5/aOWxGbg9LR3tZxBLIZOnTlgDgmvF+0xwParVp+ZVrEZBMbmgHxbTjRV/FP15SbC4Q0jm8vDFPb9DR25BIEeE9dl3DHfbrr4UmispBK7PE7WUH9eg2SjxN1vtiZdUokvMIl6up5kwH15WyeottueK3h9eHkvMCME4jRJVHmJLsaOXgYp66U03Z1+QObYWA0cUnpph/a30DIp5VldiOZbJ3KZZUc1E3I9gi136IQnnugwsELh79CFMjhaFbxc2Hv0p+P6czoP9OEE5OwNuPgo7J35WDo1RRlR7/w46ojtMVujjjiBqPxLRnBkRtFhRoQqr6hDR/QVPITmo99Mc3UP3QmSQm4WEAtUm3wiUyP4bITsCRHUGqTFQrX1P1UW69asjZKRjKS9Jx4MycNp39X3398uU4/aQCFqlVNF5lC/+O4t8iXtVznxt0mxdyoyj01PT/Sd12KIGnWA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:44.8818 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbd38a14-13b3-4eb6-b1fa-08dcfcf9c44f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8254 From: Perry Yuan There are some firmware parameters that need to be configured when a CPU core is brought online or offline. when CPU is online, it will initialize the workload classification parameters to CPU firmware which will trigger the workload class ID updating function. Once the CPU is going to offline, it will need to disable the workload classification function and clear the history. Reviewed-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/hfi/hfi.c | 79 ++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c index 9bdd9d9a615b8..cb85a538f8168 100644 --- a/drivers/platform/x86/amd/hfi/hfi.c +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -237,6 +237,80 @@ static int amd_set_hfi_ipcc_score(struct amd_hfi_cpuinfo *hfi_cpuinfo, int cpu) return 0; } +static int amd_hfi_set_state(unsigned int cpu, bool state) +{ + int ret; + + ret = wrmsrl_on_cpu(cpu, AMD_WORKLOAD_CLASS_CONFIG, state); + if (ret) + return ret; + + return wrmsrl_on_cpu(cpu, AMD_WORKLOAD_HRST, 0x1); +} + +/** + * amd_hfi_online() - Enable workload classification on @cpu + * @cpu: CPU in which the workload classification will be enabled + * + * Return: 0 on success, negative error code on failure + */ +static int amd_hfi_online(unsigned int cpu) +{ + struct amd_hfi_cpuinfo *hfi_info = per_cpu_ptr(&amd_hfi_cpuinfo, cpu); + struct amd_hfi_classes *hfi_classes; + int ret; + + if (WARN_ON_ONCE(!hfi_info)) + return -EINVAL; + + /* + * Check if @cpu as an associated, initialized and ranking data must be filled + */ + hfi_classes = hfi_info->amd_hfi_classes; + if (!hfi_classes) + return -EINVAL; + + guard(mutex)(&hfi_cpuinfo_lock); + + if (!zalloc_cpumask_var(&hfi_info->cpus, GFP_KERNEL)) + return -ENOMEM; + + cpumask_set_cpu(cpu, hfi_info->cpus); + + ret = amd_hfi_set_state(cpu, true); + if (ret) + pr_err("WCT enable failed for CPU %d\n", cpu); + + return ret; +} + +/** + * amd_hfi_offline() - Disable workload classification on @cpu + * @cpu: CPU in which the workload classification will be disabled + * + * Remove @cpu from those covered by its HFI instance. + * + * Return: 0 on success, negative error code on failure + */ +static int amd_hfi_offline(unsigned int cpu) +{ + struct amd_hfi_cpuinfo *hfi_info = &per_cpu(amd_hfi_cpuinfo, cpu); + int ret; + + if (WARN_ON_ONCE(!hfi_info)) + return -EINVAL; + + guard(mutex)(&hfi_cpuinfo_lock); + + ret = amd_hfi_set_state(cpu, false); + if (ret) + pr_err("WCT disable failed for CPU %d\n", cpu); + + free_cpumask_var(hfi_info->cpus); + + return ret; +} + static int update_hfi_ipcc_scores(void) { int cpu; @@ -342,6 +416,11 @@ static int amd_hfi_probe(struct platform_device *pdev) if (ret) return ret; + ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/amd_hfi:online", + amd_hfi_online, amd_hfi_offline); + if (ret < 0) + return ret; + return 0; } From patchwork Mon Nov 4 17:54:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861772 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2065.outbound.protection.outlook.com [40.107.223.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76F0B1D0942; Mon, 4 Nov 2024 17:54:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 4 Nov 2024 11:54:43 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" , Perry Yuan Subject: [PATCH v6 08/12] platform/x86: hfi: add power management callback Date: Mon, 4 Nov 2024 11:54:03 -0600 Message-ID: <20241104175407.19546-9-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|CY5PR12MB6551:EE_ X-MS-Office365-Filtering-Correlation-Id: 846245ec-8538-4465-0b5c-08dcfcf9c52b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: hrQ2xPu7bdsRepSG8pQ09fqTjCHz1eWEiAHIY2Tzf3CcvTquaxbXijGRio+vbc9GDTRw0Xv7QxehgZ48akLbIqpcFAIAhwQzfMX9lChsKbbF78PBMTqr3RQ/xX7K1dVJ7/xoFMhTikb+vSdkNAJaz1sQBajjDo3SkFcyHH4UQDMSoUJtw+ihrLzqPYfPQ1Q+moNfJcyRjCYSXevkqWpde77MNLzXYSYFn1tssSHmDDA8uegXRVG373F/95mjehAFSFr4VHLJTVPGccznfivUwVGRsNSXoc5rwJQdujH4u48Y4X3tmENbI2G1Mzf2XlTdnqiEhaPEdJ1CORUZxQ5zMaaoECb2rf0msNrJQGCdU9d8UTl/UO+XYKHFlarIgT4p+8SfnFLu8DflXX2DxYwqcuvzyKy8wAJk7Ktvwqd7d18BAdTLI29/3J0KklgQ37Ps3EgfdTMuG+78SG34B2OJG1UTdAoTQ5Ag/kNurGBM0a1qaPpZ3agTG51pT+jU4kbJpoBIhiONT7p4SPvBtIU9opXyd1YcTQjEKZk8JPjUpl2ucg2V78dJtKXubnox+d/vXZaqSGumCLk6KcEaGZlKTMc6cocL2kDKnQmjtKm2ZCKKC1VMdV4iNHwfIXieY3axPUvB/XV+0gDeCvJyjRvg6PoF1Ew1G5r1AnU03jaHlKeqrX0sJcwuCRCxNkVDNqPBHa57mlbCc4rjC8g/xo2iJq+gxX9IcXQuvYgbaSNGPJIK0kg3qDgkzAs6isApF/WkSeUHMRIZX1WBKq82sXyr6HYOVug4s0N0uHL1FxesiC6EGJvZ//kiKSelbzrReaT8KzcxT9nOUz9KOb6w3FobYxE5JPBIvquZ3BO8K1s+T6NS2slRAS8GZ50Rt/7ce5MH/rwty9beL81LuRJG6riPvAC41vrc49SRzO5HGJVzh94FQyJky2oM16zAphtAUjHsLABhlhKi52TmmlI8qJMiFPUl6jhGIKFIrRIQteinKBilyjD60zT+o9xxnT9EwiAQ4PTg1KzVykOHLtXprZ64n8wogjXiLwIRH9LErqhSQwKxukr13kbRD2RePzDNB4305c+5Z8F4aVgg6o/JIuc+FAksedk2HylNn94QoBOv2+lUhUUcltdgKS8Pi6A3N3nt2wF34Rj2IBsT64T1ujhjBkwb4ZYal+h+QJ156c6Xef6lWtST8c4jToF5kPIInJOF5FYUkcSLgpOOjEyNRJ+p8I4dkr5fF9Oyfd+M0dBjhnkK2Z6UQotOywWeF785Q4ReBTOfDM9ND8vgiiope6OEtzTZPdcl63d15JeoDaatluWsuaFiKOcDd3pI9sS5uAwa5WsODJ2+5TE7y5SNdMQEJ4hNjZAs3nzXBtbQo8Q7HLEW4U/ZtE86CarWNP3Za8ZHOFN7h7EP2vk8xy/4fD2d+A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:46.3819 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 846245ec-8538-4465-0b5c-08dcfcf9c52b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6551 From: Perry Yuan Introduces power management callbacks for the `amd_hfi` driver. Specifically, the `suspend` and `resume` callbacks have been added to handle the necessary operations during system low power states and wake-up. Reviewed-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/hfi/hfi.c | 33 ++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c index cb85a538f8168..cef6aa84bd85e 100644 --- a/drivers/platform/x86/amd/hfi/hfi.c +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -380,6 +380,38 @@ static int amd_hfi_metadata_parser(struct platform_device *pdev, return ret; } +static int amd_hfi_pm_resume(struct device *dev) +{ + int ret, cpu; + + for_each_online_cpu(cpu) { + ret = amd_hfi_set_state(cpu, true); + if (ret < 0) { + dev_err(dev, "failed to enable workload class config: %d\n", ret); + return ret; + } + } + + return 0; +} + +static int amd_hfi_pm_suspend(struct device *dev) +{ + int ret, cpu; + + for_each_online_cpu(cpu) { + ret = amd_hfi_set_state(cpu, false); + if (ret < 0) { + dev_err(dev, "failed to disable workload class config: %d\n", ret); + return ret; + } + } + + return 0; +} + +static DEFINE_SIMPLE_DEV_PM_OPS(amd_hfi_pm_ops, amd_hfi_pm_suspend, amd_hfi_pm_resume); + static const struct acpi_device_id amd_hfi_platform_match[] = { {"AMDI0104", 0}, { } @@ -428,6 +460,7 @@ static struct platform_driver amd_hfi_driver = { .driver = { .name = AMD_HFI_DRIVER, .owner = THIS_MODULE, + .pm = &amd_hfi_pm_ops, .acpi_match_table = ACPI_PTR(amd_hfi_platform_match), }, .probe = amd_hfi_probe, From patchwork Mon Nov 4 17:54:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861773 Received: from NAM02-BN1-obe.outbound.protection.outlook.com (mail-bn1nam02on2058.outbound.protection.outlook.com [40.107.212.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC2A91D0BA0; Mon, 4 Nov 2024 17:54:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 4 Nov 2024 11:54:43 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v6 09/12] x86/process: Clear hardware feedback history for AMD processors Date: Mon, 4 Nov 2024 11:54:04 -0600 Message-ID: <20241104175407.19546-10-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|SA0PR12MB7464:EE_ X-MS-Office365-Filtering-Correlation-Id: 426026ec-ba40-43c0-adeb-08dcfcf9c690 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: Ydc6xCSzCHICID9q0XXgAgkWFhfr7bqpuwECWq3TghETtVW2DhPs5ZoOYuDMcNrqM/h8hwaWbQ0lhJ2RlpF6nRvSNMCB44nBF0rGs+o1Kik714Qwsk5J0DPsSGnt7fT905lVXFfA3kRA4c3n3Zw4hHLdUfikTEwoTdSsUDzyWTN3q1AJ51HhtJAOk/N9OvszqbSyCX2tjG1IJhgKY+ZCafDELdVm2L7R23Eu03d+jZmFVJITt3v07j5zCsLKP3KtzYMwC9BgMj+oNIZx9IhE5WOufwwWkYEQotUhJ1YRXdVYFd9lcE7XfROUSPNMpsArWfUE4CeTr20K9qfzZfMV1RCqVtDt6xueXFb3xVdcEC4+OZX1RgWDEEnxUwQYqtrEv075AJIvlugeYk+KTzhte7mZzcudtgzkVsgg/dDPklQcidxLidTKV/fXgX5k6gPKB9tjTE7bMQSwyb5SPKzwqM1YqOpjTbwvmfSxmznl8W4vGo3zevvw9Chz2uzxHaG26085mBj49zsXwL9ZkbYhYMS5DaAVEJ3glyCkhfQ6mEQ+OAUFgQpWXBwJ7HbpmlRe88+PWUOTRj/WL12ZUltPm0PxtUMTMII1T4dD6go2l37nemNmgyeu4+mMbd4eZIm50JEDccjPsRNGE+Ubx3Vk9jDi2O2qU/2+Z8DITiYWbST6EjqlEchS+jiI4AI6uW0FiyEjqhIbjcoy3UK0sj7qNStRSMDIv0psQiWZWokv2tpbMxcWGHAX+OAps43aPUwciwkbsq0S2bCj3RFWdvny2Lt45UMYXFrZj++QZT5+539hfw4gCLXt9fF3gp8+x3Rz6jc4qKBIpBnTgQ0E+2JCTvJjOcEiIix82StewAU0UjhnC7pW5+WsmJIi2snL2izfPJckAphlfc1XDDd4nXb7Stb/cc4/Cgx8f4czOIluF+bU/mSwZj3Gu65gZUY7elQbaK+6hr8H055IwoYSi2FTXRpn05f7e8UWn38TwxNBg/flyC25evAowDA0OPjj4Bq7p2eCsC20l31Jf52rMcCk6x/VylmUJSK5/r/FkoN55rHG3dv7vFZa9YHxQgywDbYn1rYvljS68Tg+dwr6V6snqIRvr4ePmaxECSNkw4Kydu0Be4ifXrkGEyu7wZr+9QwfC6T2Vl8X6lWTXSF+YGk6yd0lpIUB+0JkJ8qiST+szkfcPNPjJx2XIpwnZsNFNh4uAy4hM+vhhXBcPVvKpwgf639evWNfm7ZhtedJgdsYbilSfdkMPiPZNjs6bbpQadJvEkaq5cUp/20SQqQ+DU7RKDHDykXrjkm1lMUys+dVol6JugVfHpixKoMHKgGug1Pb0IDPfN7eU2gPPJyqEB5jFINNvgeF4gW3IJHqeX1UJoBTxNa+EoMzblS8YL5hiIxISm41cDvx/AlK0aDl3TBHnA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:48.6631 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 426026ec-ba40-43c0-adeb-08dcfcf9c690 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7464 From: Perry Yuan Incorporate a mechanism within the context switching code to reset the hardware history for AMD processors. Specifically, when a task is switched in, the class ID was read and reset the hardware workload classification history of CPU firmware and then it start to trigger workload classification for the next running thread. Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- v6: * Drop all static key stuff and just call in __switch_to when cpu feature enabled (Boris) --- arch/x86/kernel/process_32.c | 4 ++++ arch/x86/kernel/process_64.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index 0917c7f25720b..0bb6391b9089b 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c @@ -213,6 +213,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) /* Load the Intel cache allocation PQR MSR. */ resctrl_sched_in(next_p); + /* Reset hw history on AMD CPUs */ + if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS)) + wrmsrl(AMD_WORKLOAD_HRST, 0x1); + return prev_p; } diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 226472332a70d..371e0e8f987fa 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -709,6 +709,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) /* Load the Intel cache allocation PQR MSR. */ resctrl_sched_in(next_p); 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Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v6 10/12] cpufreq/amd-pstate: Disable preferred cores on designs with workload classification Date: Mon, 4 Nov 2024 11:54:05 -0600 Message-ID: <20241104175407.19546-11-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|BY5PR12MB4212:EE_ X-MS-Office365-Filtering-Correlation-Id: 7f5d05bb-9fd4-4c00-f70a-08dcfcf9c71a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: I9B2Wt5CceGHO6bv4gYlinzOyPNGRQRH2+k2RacPrT53AlWyKRw2LvsXXzvLwRNlvi0lv/83TqubP/2YSAb1ed3ftqhoShaqXl2RdMZuqVnxaZ5ByjqKgckkKFkpTRRZ2bKMywalftQXUjUcdd7sag+qBUaPFZj4Hy9FYKuOAsqWMCaQ3gOOVIKjbO/434NQcpXbSx3zr1jq3iYwv8Li2HGQJtZ1dsM2t3YCLgMNCwFC/RbSCkBmN28le3KKie1C6u3oKG+ktmLD/oddBUz3GxDt3tNB8gm96IsHGWOz0GFChBl2DOkEjm9DjixieBPZGAtBh70vGwfh68N2MGfcRlSIrcSADqmdwOMrjsrMZjTBnH/jFPCD4CcOfWuyfNgYRg74+svxVyT1nmYqAYNEeT77aGJdgZO831/msYkdGtnGOiFYvg/hd3O36K8KNCRmQb8AXLHvk3EvusvpndokCpsPolER1HKet4Z1Wk2Atq6YSDmecLNayquIM06VHoHd8SX5p0TLw8J5dSl+ZiYIYDjQcrYi0XCUcs+m26V4SVzvR2jM8mYbcgMYI8hQVmwJY8sjI6HLPd4fHc5/QXt6sfNjf05Lt10mUsvtW8LedM5avQyM8xz6t4cDDYWJvAoUVwx3dvQbZVAdjfTdqVNjCQPdp+ZBotbJEUOk72uA67802xRlqjl68pnWsLUBbrZcPWRbkPoa11ghq4QNlDKsZXggTPzjXL3uDSKKjth1xOOOMuUePXtLFyE7zFD7f1bGsNCz5sV42vnhDMFspXO85T2829Gd3xyt1MgZd7zIYFvNxMg0WKOKVRCKhtEPtb893hude7Szln1jchsAbKiIGsojGYN+1AMIKUKH/GoSyhG/+1V3Qp5yvnCPt+pG8nC8P/puASvimMg2xTQoIUcVXNszYawSK37jngQm6nW+Z6KQqwcPAvi6gxPsxM9JPT6nm7ws9dsy8DWxCHNUo424sbCk+2mYMQrg1HIJ91r+wn9EOfr7rYqIkzIG0GCfSILBpguXCwIOF1UHRUR8xJ/Q1SpngEx+4tJqTDZ5iXuQLT0vKKyDC+dM9vDyFHApMxFFpWq2Ki7WiMpFC+cNq8wRQMjOX88dlrzTZg5k7vEkeh+SOxppM2AeYHBNvcphP/f5eCB4xhy2Zo0tWPI0MhraIDwn7JlZ1WfuAL2apcsvGg7eCve+aoDFMC6y8EBOkpcWfmT4oJaJvam+vq7coAoA/PkBtkukpdY9Izx96PqfEZDlmjdbezX/Pqbira+BUr5FXDU5G7EKXhZxs+kgDExx4NQSYc4FBFdNp40I+kO1vtKHN2qv6mG25kPHL8mnNjgsqJvKR2Qi6TQIw95uml6oupvCB/PKUXxSC34n0j1WAGcWYdYHOe2gWkbdwJlchuzb/G386SUN1mXk0D2tqaHkiA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:49.5694 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7f5d05bb-9fd4-4c00-f70a-08dcfcf9c71a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4212 On designs that have workload classification, it's preferred that the amd-hfi driver is used to provide hints to the scheduler of which cores to use instead of the amd-pstate driver. Reviewed-by: Gautham R. Shenoy Reviewed-by: Perry Yuan Signed-off-by: Mario Limonciello --- v6: * Use cpu_feature_enabled --- drivers/cpufreq/amd-pstate.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 32ddbf37a9f0a..84840666f1d3e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -780,6 +780,12 @@ static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) /* user disabled or not detected */ if (!amd_pstate_prefcore) return; + /* should use amd-hfi instead */ + if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS) && + IS_ENABLED(CONFIG_AMD_HFI)) { + amd_pstate_prefcore = false; + return; + } cpudata->hw_prefcore = true; From patchwork Mon Nov 4 17:54:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13861774 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2084.outbound.protection.outlook.com [40.107.236.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5FFD1D173E; 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Mon, 4 Nov 2024 11:54:44 -0600 From: Mario Limonciello To: Borislav Petkov , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= CC: , "Gautham R . Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v6 11/12] platform/x86/amd: hfi: Set ITMT priority from ranking data Date: Mon, 4 Nov 2024 11:54:06 -0600 Message-ID: <20241104175407.19546-12-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|PH7PR12MB7968:EE_ X-MS-Office365-Filtering-Correlation-Id: d8de2f22-52ee-4bb2-0746-08dcfcf9c76c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: suZauJVZ+FPD8E7xPCi6xsfJ6j7Sk0pX085AHT9S+mj8r6yRefVilVncmqloxP1foIdDEVShk0UhmC4lpbTgjAnY8TvUsMT80IyNJzipod8rLzgNhXQ4ZnOnK198ts21bx65JyzxCnqQLp1ynI6cCtKushufisR5SkN6LxGfkIBeha3xUL/U7bMqgNp2UiUYpBh5vw/E7k7I4WYdMLTI0uTO9GcVbPTcDVk/YV607CBsguUTPg30P2DDWnER2HPyd4A1IL+PSL0YE8VUMy372P0JidXM5oddxYPaioxKGnso8BmkjFLLXmDcO8jGNcpqUykYq9+ikaPyFrMe6Ms7tVXVY1EG0Q2+LY9vkuojdFGHsLrp+Lq1LecSmCuzYnx5O+aeB/AGreGv7YbZv4YinsV5TAM2hZ239YALguJdYfxBsoICiUZrrxwOTstb+HjBKk0sSln2cYBOVbqtSy83qe5ocRGvTjnUAHnyclrSyoovlMTeMV1/r98TXuAO/2DYKKAlkZfiiS4C9AnTVfKvhogrIc7sR3BsHYLSpzaTfr7ax3nkfJrkfriwILxKCKQPQTunTgt/4YaJkZgVoy90zXWbGl/TkRM+tn6UNscTQNDuEX+9dMs375SnxA44wuFO70q4lIWYJ7oICeBABHtjgvpfJtLPXDKkdh7NIkQXSK/J8fbrrIHtBhaXE3PX+93mrpvYcmrmPTuTnqibc/34F3bD9jbiREXd2x/62MTq5aRJpdyke1gXee6avqBYCAPrLry0vgwH3NkNtB2cpbb8SdkEMhOy+ZsTNXUVkKeDWUDP2keB8n5eTnYW4TK1NGSdu15bPKxkj6M2fVouLVw6gvJmRYU5Sz8jIlk14Ixx3IT0fIcUwr8Yt8dlA0a+3PSFQ0zP2V4Zel3BjZHxFxL3Jx1y/gMU9CsbX39PNRnh2S4ksk5+mCdIIKcbRiY48RROHLLtu2n3oByBU1Hw6+18pl1gw6TYvTBHFosBy8+kZbcMMWqhEOMOCbUPjx1vo8bLaJIrh51I1DNZ4nJjQia4dPimNgA2TM+v63BpQoUrGYUugUd7/TlhS4abCtixvmhSRtMK3VYY3rYjIuG32ln/vFcrTItFpGKnZzvu6jmQQe/4nXCuS4QRy5crcklXRvHPUZvCEan31u/z/MdsF9WoDUPL+zCSSkpZlx/UoGPch2YPEZoFW3DH/uzt0cBD3U8TAwwkFO6umaeJwYIg/+ODLxe+1+pPzCu8n4i9d8tAFYXp46Vf8lRnCARr9ZDuvNq0MegH4LRS62+v1VlB5qWtE1qmjBigQyCLV/3iWE3jx6ehZ20p5qEdaL1N1nfPCkJCwH6wtPZn/3yjOoMxWnxmxd/2WTmRkLGloI0juB1b1mfX/71FMfTsw3osTR6Cjv52ST5W8+pqmVn+QKKyRbVwKg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:50.1007 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8de2f22-52ee-4bb2-0746-08dcfcf9c76c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7968 The static ranking data that is read at module load should be used to set up the priorities for the cores relative to the performance values. Signed-off-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy --- drivers/platform/x86/amd/hfi/Kconfig | 1 + drivers/platform/x86/amd/hfi/hfi.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/platform/x86/amd/hfi/Kconfig b/drivers/platform/x86/amd/hfi/Kconfig index 79e3b0073275c..5b7c2865f4aa9 100644 --- a/drivers/platform/x86/amd/hfi/Kconfig +++ b/drivers/platform/x86/amd/hfi/Kconfig @@ -7,6 +7,7 @@ config AMD_HFI bool "AMD Hetero Core Hardware Feedback Driver" depends on ACPI depends on CPU_SUP_AMD + depends on SCHED_MC_PRIO help Select this option to enable the AMD Heterogeneous Core Hardware Feedback Interface. If selected, hardware provides runtime thread classification guidance to the operating system diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c index cef6aa84bd85e..09905a354efdd 100644 --- a/drivers/platform/x86/amd/hfi/hfi.c +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -115,6 +115,12 @@ static DEFINE_PER_CPU(struct amd_hfi_cpuinfo, amd_hfi_cpuinfo) = {.class_index = static DEFINE_MUTEX(hfi_cpuinfo_lock); +static void amd_hfi_sched_itmt_work(struct work_struct *work) +{ + sched_set_itmt_support(); +} +static DECLARE_WORK(sched_amd_hfi_itmt_work, amd_hfi_sched_itmt_work); + static int find_cpu_index_by_apicid(unsigned int target_apicid) { int cpu_index; @@ -234,6 +240,8 @@ static int amd_set_hfi_ipcc_score(struct amd_hfi_cpuinfo *hfi_cpuinfo, int cpu) WRITE_ONCE(hfi_cpuinfo->ipcc_scores[i], hfi_cpuinfo->amd_hfi_classes[i].perf); + sched_set_itmt_core_prio(hfi_cpuinfo->ipcc_scores[0], cpu); + return 0; } @@ -453,6 +461,8 @@ static int amd_hfi_probe(struct platform_device *pdev) if (ret < 0) return ret; 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Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v6 12/12] platform/x86/amd: hfi: Add debugfs support Date: Mon, 4 Nov 2024 11:54:07 -0600 Message-ID: <20241104175407.19546-13-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241104175407.19546-1-mario.limonciello@amd.com> References: <20241104175407.19546-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|IA1PR12MB6386:EE_ X-MS-Office365-Filtering-Correlation-Id: 979fcc7a-23db-4826-f07a-08dcfcf9c7b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: 1yk9PKVVNptE/trC+pckgYevm1qDQjHsWodHMwTGNQ5nJYGX2kxd4Llz2TfDMoxEKoUrCZJZkZ25/j2C3zH4H8nNUfgiAO7TawoEEhzHGQFuVzAnjIgXygMiMMPkhZ8MzkSwjgADQTbzC2I0i4zjBplQY/uDWkkvXmwFljO/UK+sFcCEbZErtZ/m/ytUjDZhdyOcDzYf/5u9IHtufT+5boCpt7UWCu4UCDwy1rumRy4/aLcqgdgXXilINzhjrmoKy40FZPQlHZED6hh7Hw0ysvfw1wp+wmQzBtwOTJIiaONGDVY6bw8LgvDWMXBtG8Etu4BGou3IG4lwg/E0etDFQE2en2ZSlANjYUA/PwNzbXrIl+WkGr+Kem3z8c8p8VvpGgr9UTbdnqmp5Zmi5D0KlblG7BE1NtOIayzJ7CfXC1Zy0nNIpFgJu8PmaHuIWjpMBgt6fXVHntAWKI/QE1iss18FLmPZYonYGDrMz2Kh/dz3rDRL5lhueYIvKgR2Zd3QMn8NwWfvKFfcRyVq+1TkSL+BLdJ5n4ddKMHnQ2E7bomalSbxFhAg0zvKG9j8LkDur3vfMcMSI7yghelevZbu5sUAjIQD/qXydJ44crA14J/kTubgj05z/JBqSSeVlfopXFMq+c64YUHmwPF0md4QAHVfKHiXUGEyHJEtU03fYCmtD68rC4hFEgu2x3ZYsxJv/rewuCCmtHQze4JDrGN5VOH26gTdtezTEYRh6Wo4gPWVzTrTrGTAyQGhdx1mOI1Gl/tgOpMmGqQ4wel2VOrjoKNCkbD9ZjOszLqoYQQepBO5o87avTXcDIQv3HXePDRJ+FNQH8f0fSAEUtP8MC8EcWWwW57kGJgWc79fwHc5ZavwLxDhL80iitrNINSqAt274Vd4/akQFyEDY5cbrpSaNHzvD/GYletOum4tXo1OZcaC5CIJCEuEli7+bwYJ2aaHOuryOPUbQq985vjie5Tq3CZgmSPf3kXcJt9VS/6QHXU/0tpq/v0UDRaDMhIy0yr2h4MQyZokM2tuKt+pIRpenNAJBtskkBx3yxTiR+6ovic1SXpHUuCtDGEWLnNR44ZSdCS8iPE3PnZu0IVfW512nqRfVrWJWNB+1cs9N98m1OqmOAXajQKhUJzwuaaXokOu21nj5NeThAkM6wRjSGCsVB6Pg4KAwUtLq3GYeQVGoZztYrMDBUh3d5mWIFg/0HJx25FEeRhs8V/ee9aw+vQahuo1r4DHGi5DYlZ3grMxD4KWpYbO6x4O+Brsy+1e2qEGd9O8pYfgoEEyaDz4OspbcBUJElCN3ffVZ6HcgHXmKKZBwyhPujYvyZ5lDAJTVwp+MmTbw5JOQNCarepzo+xdehhfh8fcm3dYu1Adab0WB0/n56R108amdwv+l+VIfjvGwoF+r08l8HOa1FiCDkc9Lw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2024 17:54:50.5851 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 979fcc7a-23db-4826-f07a-08dcfcf9c7b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6386 Add a dump of the class and capabilities table to debugfs to assist with debugging scheduler issues. Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/hfi/hfi.c | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c index 09905a354efdd..840a6a277d062 100644 --- a/drivers/platform/x86/amd/hfi/hfi.c +++ b/drivers/platform/x86/amd/hfi/hfi.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -74,6 +75,8 @@ struct amd_hfi_data { void __iomem *pcc_comm_addr; struct acpi_subtable_header *pcct_entry; struct amd_shmem_info *shmem; + + struct dentry *dbgfs_dir; }; /** @@ -234,6 +237,13 @@ static int amd_hfi_alloc_class_data(struct platform_device *pdev) return 0; } +static void amd_hfi_remove(struct platform_device *pdev) +{ + struct amd_hfi_data *dev = platform_get_drvdata(pdev); + + debugfs_remove_recursive(dev->dbgfs_dir); +} + static int amd_set_hfi_ipcc_score(struct amd_hfi_cpuinfo *hfi_cpuinfo, int cpu) { for (int i = 0; i < hfi_cpuinfo->nr_class; i++) @@ -388,6 +398,27 @@ static int amd_hfi_metadata_parser(struct platform_device *pdev, return ret; } +static int class_capabilities_show(struct seq_file *s, void *unused) +{ + int cpu, idx; + + seq_puts(s, "CPU #\tWLC\tPerf\tEff\n"); + for_each_present_cpu(cpu) { + struct amd_hfi_cpuinfo *hfi_cpuinfo = per_cpu_ptr(&amd_hfi_cpuinfo, cpu); + + seq_printf(s, "%d", cpu); + for (idx = 0; idx < hfi_cpuinfo->nr_class; idx++) { + seq_printf(s, "\t%d\t%d\t%d\n", + idx, + hfi_cpuinfo->amd_hfi_classes[idx].perf, + hfi_cpuinfo->amd_hfi_classes[idx].eff); + } + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(class_capabilities); + static int amd_hfi_pm_resume(struct device *dev) { int ret, cpu; @@ -463,6 +494,10 @@ static int amd_hfi_probe(struct platform_device *pdev) schedule_work(&sched_amd_hfi_itmt_work); + amd_hfi_data->dbgfs_dir = debugfs_create_dir("amd_hfi", arch_debugfs_dir); + debugfs_create_file("class_capabilities", 0644, amd_hfi_data->dbgfs_dir, pdev, + &class_capabilities_fops); + return 0; } @@ -474,6 +509,7 @@ static struct platform_driver amd_hfi_driver = { .acpi_match_table = ACPI_PTR(amd_hfi_platform_match), }, .probe = amd_hfi_probe, + .remove = amd_hfi_remove, }; static int __init amd_hfi_init(void)