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a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE The Thinkpad T14s has 2 USB-A ports, both connected to the USB multiport controller, each one via a separate NXP PTN3222 eUSB2-to-USB2 redriver to the eUSB2 PHY for High-Speed support, with a dedicated QMP PHY for SuperSpeed support. Describe each redriver and then enable each pair of PHYs and the USB controller itself, in order to enable support for the 2 USB-A ports. Signed-off-by: Abel Vesa --- .../dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts index 975550139e1024420ed335a2a46e4d54df7ee423..7468ae443ecdac28fa0c0a42e72454907935a5a9 100644 --- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts +++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts @@ -495,6 +495,40 @@ keyboard@3a { }; }; +&i2c5 { + clock-frequency = <400000>; + + status = "okay"; + + eusb3_repeater: redriver@47 { + compatible = "nxp,ptn3222"; + reg = <0x47>; + #phy-cells = <0>; + + vdd3v3-supply = <&vreg_l13b_3p0>; + vdd1v8-supply = <&vreg_l4b_1p8>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&eusb3_reset_n>; + pinctrl-names = "default"; + }; + + eusb6_repeater: redriver@4f { + compatible = "nxp,ptn3222"; + reg = <0x4f>; + #phy-cells = <0>; + + vdd3v3-supply = <&vreg_l13b_3p0>; + vdd1v8-supply = <&vreg_l4b_1p8>; + + reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&eusb6_reset_n>; + pinctrl-names = "default"; + }; +}; + &i2c8 { clock-frequency = <400000>; @@ -651,6 +685,22 @@ &tlmm { <72 2>, /* Secure EC I2C connection (?) */ <238 1>; /* UFS Reset */ + eusb3_reset_n: eusb3-reset-n-state { + pins = "gpio6"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; + + eusb6_reset_n: eusb6-reset-n-state { + pins = "gpio184"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; + tpad_default: tpad-default-state { pins = "gpio3"; function = "gpio"; @@ -808,3 +858,39 @@ &usb_1_ss1_dwc3_hs { &usb_1_ss1_qmpphy_out { remote-endpoint = <&pmic_glink_ss1_ss_in>; }; + +&usb_mp { + status = "okay"; +}; + +&usb_mp_hsphy0 { + vdd-supply = <&vreg_l2e_0p8>; + vdda12-supply = <&vreg_l3e_1p2>; + + phys = <&eusb6_repeater>; + + status = "okay"; +}; + +&usb_mp_qmpphy0 { + vdda-phy-supply = <&vreg_l3e_1p2>; + vdda-pll-supply = <&vreg_l3c_0p8>; + + status = "okay"; +}; + +&usb_mp_hsphy1 { + vdd-supply = <&vreg_l2e_0p8>; + vdda12-supply = <&vreg_l3e_1p2>; + + phys = <&eusb3_repeater>; + + status = "okay"; +}; + +&usb_mp_qmpphy1 { + vdda-phy-supply = <&vreg_l3e_1p2>; + vdda-pll-supply = <&vreg_l3c_0p8>; + + status = "okay"; +}; From patchwork Tue Nov 5 11:37:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13862857 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE6C01D47C7 for ; Tue, 5 Nov 2024 11:37:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730806678; cv=none; b=Uvxer0sxl+u/6HsqHj8PTCX+SYxo/fIQTQplcqAmIneJv0ItJKFbYLABueO6NJCsS46N2VEO8MO2tcipRQpHgbh9ErxpZXds6SNSKdjS0foc13pDoav7jgeuycYM9UHrBLQVquby5k3aOy3VUOPO0nAszQ2YDwarvrhidsLuqfk= ARC-Message-Signature: i=1; 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Tue, 05 Nov 2024 03:37:54 -0800 (PST) From: Abel Vesa Date: Tue, 05 Nov 2024 13:37:33 +0200 Subject: [PATCH 2/2] arm64: dts: qcom: x1e78100-qcp: Enable Type-A USB ports labeled 3 and 4/6 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241105-x1e80100-qcp-t14-enable-usb-type-a-ports-v1-2-b4386def91d8@linaro.org> References: <20241105-x1e80100-qcp-t14-enable-usb-type-a-ports-v1-0-b4386def91d8@linaro.org> In-Reply-To: <20241105-x1e80100-qcp-t14-enable-usb-type-a-ports-v1-0-b4386def91d8@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Dmitry Baryshkov , Johan Hovold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; a=openpgp-sha256; l=2920; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=snuUtiSL/ybuiG1jJeB441EEojxXeaRAIydWFUMluW0=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBnKgON/c3tJ21JZAcD05ny6D5svRT1ag7gP1jYo eDbroaNCASJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZyoDjQAKCRAbX0TJAJUV Vgl5EACQmgNQNAVeAr8lf7jB2+lTK2V/okejH7egi+6z5DqD6FcQ8BHCfG5yNCuXi1muVYFNprr SGqgU4wzTRnPpq2/CLjeKhy18+c2BsB3z7Xurcoq/at9LorHpXa9+ncDUgYasXgwyXMXEbEahRt U9yfxxRxF668as4EZos13CuTgNkP5IGB4Wb8lKPKylohC0S+KShvfoJ20kNRniV/pCjnVIbhLB/ H4zHuoMXh/mxhh/j5q6eBoAEBnVt9wa1Y6GhhkJhgnpbA4mCNZJCr9kihCYCYnI/jpFmIM8JQ2o CdK3kVOK34HTOOzzURd3ZmlkXot58CkXFR8Gk5gvEUDSvNP5FyCvCTEdjmWNfe2lIbsboy/Oebh nQSvnsao+LkGPAHd5no7UZGk7pVVGVeA0tKRYXNsASCfOlxFvfkfxf6ZfNyfhk9lI8kYoVPiquL j9QRFuhr7AO+Sj0fimVvkHx7kYAn9Zkr6tVu2L47skA8Ag6TyvaGj4UPnKckgflkSP+falKfipE By0PNknB9QiVHjAmfd0sZw5PLhBp/Wo+CxyjFaf90SSHsiUswq4sXFRe5I+tys8SCaGWhSS9WNH W1bZPHvyAiosJdQUzhnSS5hm+JsR5QJMmq+mcPlmlmyufAg5QbzvfEdcuzsR6uaqmPr+gBfsBzK EVxLa8arCijgoLg== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE The X Elite QCP board has 3 USB-A ports. The ones labed as USB3 and USB4/6 are both connected to the multiport controller, each one via a separate NXP PTN3222 eUSB2-to-USB2 redriver to the eUSB2 PHY for High-Speed support, with a dedicated QMP PHY for SuperSpeed support. Describe these two redrivers and enable each pair of PHYs along with the USB controller, all in order to enable support for these 2 USB-A ports. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 86 +++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts index 5ef030c60abe2998d093ee60a6754a90cd5aaf72..f52ead28eb7d16847f5049185ea5ff0d8edb10e7 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts @@ -616,6 +616,40 @@ zap-shader { }; }; +&i2c5 { + clock-frequency = <400000>; + + status = "okay"; + + eusb3_repeater: redriver@47 { + compatible = "nxp,ptn3222"; + reg = <0x47>; + #phy-cells = <0>; + + vdd3v3-supply = <&vreg_l13b_3p0>; + vdd1v8-supply = <&vreg_l4b_1p8>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&eusb3_reset_n>; + pinctrl-names = "default"; + }; + + eusb6_repeater: redriver@4f { + compatible = "nxp,ptn3222"; + reg = <0x4f>; + #phy-cells = <0>; + + vdd3v3-supply = <&vreg_l13b_3p0>; + vdd1v8-supply = <&vreg_l4b_1p8>; + + reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&eusb6_reset_n>; + pinctrl-names = "default"; + }; +}; + &lpass_tlmm { spkr_01_sd_n_active: spkr-01-sd-n-active-state { pins = "gpio12"; @@ -819,6 +853,22 @@ edp_reg_en: edp-reg-en-state { bias-disable; }; + eusb3_reset_n: eusb3-reset-n-state { + pins = "gpio6"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; + + eusb6_reset_n: eusb6-reset-n-state { + pins = "gpio184"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; + nvme_reg_en: nvme-reg-en-state { pins = "gpio18"; function = "gpio"; @@ -981,3 +1031,39 @@ &usb_1_ss2_dwc3_hs { &usb_1_ss2_qmpphy_out { remote-endpoint = <&pmic_glink_ss2_ss_in>; }; + +&usb_mp { + status = "okay"; +}; + +&usb_mp_hsphy0 { + vdd-supply = <&vreg_l2e_0p8>; + vdda12-supply = <&vreg_l3e_1p2>; + + phys = <&eusb6_repeater>; + + status = "okay"; +}; + +&usb_mp_qmpphy0 { + vdda-phy-supply = <&vreg_l3e_1p2>; + vdda-pll-supply = <&vreg_l3c_0p8>; + + status = "okay"; +}; + +&usb_mp_hsphy1 { + vdd-supply = <&vreg_l2e_0p8>; + vdda12-supply = <&vreg_l3e_1p2>; + + phys = <&eusb3_repeater>; + + status = "okay"; +}; + +&usb_mp_qmpphy1 { + vdda-phy-supply = <&vreg_l3e_1p2>; + vdda-pll-supply = <&vreg_l3c_0p8>; + + status = "okay"; +};