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[82.218.84.190]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6a9a41bsm1467773a12.14.2024.11.05.08.00.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 08:00:54 -0800 (PST) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, pbonzini@redhat.com, Phil Dennis-Jordan Subject: [PATCH 1/5] i386/hvf: Integrates x2APIC support with hvf accel Date: Tue, 5 Nov 2024 16:57:56 +0100 Message-Id: <20241105155800.5461-2-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20241105155800.5461-1-phil@philjordan.eu> References: <20241105155800.5461-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::52b; envelope-from=phil@philjordan.eu; helo=mail-ed1-x52b.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Support for x2APIC mode was recently introduced in the software emulated APIC implementation for TCG. Enabling it when using macOS’s hvf accelerator is useful and significantly helps performance, as Qemu currently uses the emulated APIC when running on hvf as well. This change wires up the read & write operations for the MSR VM exits and allow-lists the CPUID flag in the x86 hvf runtime. Signed-off-by: Phil Dennis-Jordan --- v2: * Fixed merge conflict due to recent upstream CPUID code change. target/i386/hvf/x86_cpuid.c | 2 +- target/i386/hvf/x86_emu.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c index 3a116548a3d..ac922d7fd16 100644 --- a/target/i386/hvf/x86_cpuid.c +++ b/target/i386/hvf/x86_cpuid.c @@ -77,7 +77,7 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, ecx &= CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSSE3 | CPUID_EXT_FMA | CPUID_EXT_CX16 | CPUID_EXT_PCID | CPUID_EXT_SSE41 | CPUID_EXT_SSE42 | CPUID_EXT_MOVBE | - CPUID_EXT_POPCNT | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_AES | CPUID_EXT_X2APIC | (supported_xcr0 ? CPUID_EXT_XSAVE : 0) | CPUID_EXT_AVX | CPUID_EXT_F16C | CPUID_EXT_RDRAND; ecx |= CPUID_EXT_HYPERVISOR; diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 38c782b8e3b..be675bcfb71 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -663,6 +663,15 @@ static void exec_lods(CPUX86State *env, struct x86_decode *decode) env->eip += decode->len; } +static void raise_exception(CPUX86State *env, int exception_index, + int error_code) +{ + env->exception_nr = exception_index; + env->error_code = error_code; + env->has_error_code = true; + env->exception_injected = 1; +} + void simulate_rdmsr(CPUX86State *env) { X86CPU *cpu = env_archcpu(env); @@ -677,6 +686,17 @@ void simulate_rdmsr(CPUX86State *env) case MSR_IA32_APICBASE: val = cpu_get_apic_base(cpu->apic_state); break; + case MSR_APIC_START ... MSR_APIC_END: { + int ret; + int index = (uint32_t)env->regs[R_ECX] - MSR_APIC_START; + + ret = apic_msr_read(index, &val); + if (ret < 0) { + raise_exception(env, EXCP0D_GPF, 0); + } + + break; + } case MSR_IA32_UCODE_REV: val = cpu->ucode_rev; break; @@ -777,6 +797,17 @@ void simulate_wrmsr(CPUX86State *env) case MSR_IA32_APICBASE: cpu_set_apic_base(cpu->apic_state, data); break; + case MSR_APIC_START ... MSR_APIC_END: { + int ret; + int index = (uint32_t)env->regs[R_ECX] - MSR_APIC_START; + + ret = apic_msr_write(index, data); + if (ret < 0) { + raise_exception(env, EXCP0D_GPF, 0); + } + + break; + } case MSR_FSBASE: wvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE, data); break; From patchwork Tue Nov 5 15:57:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Dennis-Jordan X-Patchwork-Id: 13863146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 961A3D2B944 for ; Tue, 5 Nov 2024 16:01:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8LzM-0006j7-Ad; Tue, 05 Nov 2024 11:01:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8LzI-0006ge-27 for qemu-devel@nongnu.org; Tue, 05 Nov 2024 11:01:00 -0500 Received: from mail-ed1-x52e.google.com ([2a00:1450:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t8LzF-0007OK-7m for qemu-devel@nongnu.org; Tue, 05 Nov 2024 11:00:59 -0500 Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-5cebcf96fabso5244401a12.3 for ; Tue, 05 Nov 2024 08:00:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=philjordan-eu.20230601.gappssmtp.com; s=20230601; t=1730822456; x=1731427256; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HyCrwL3QUsP9ACprYAhuYoLh1NHjzeMYZLQmtIO85Lg=; b=dHbsWXwdFKash0sWTIlyqDtuDHyM5SCenig2CiFfiTGVhhgvMGbaKO8P+bfGRyrZlX SLR3f2ScRcpEyexllDU3nf/jLOvHBi1bvNCUbLaSmYiykm50icMkH+Wn8vp9XvGwzSsx emm7NwZWFyTy1iTM5aQcjfO/3myqM8frj/qqb9sGwAoBct1NJXIqydq0vulxuviPNKSt eGn7eg1pH8kmyrG3h+/2Q9JsOueHe0c92d1T7156g8TIe5/2lLghLNfIkDnkE7XK+MRd DRmv2P5dzTW2L3woe/vRpsKIOxPVD3b4DK4Barf+ml4HoboZCkGK+FLApmZXoEndN8WK 7SEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730822456; x=1731427256; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HyCrwL3QUsP9ACprYAhuYoLh1NHjzeMYZLQmtIO85Lg=; b=xEMlSiA+QzxPmHoYBTEPh6jpqTm9sMqxWG4tNvIkNWiN97Zg9v5LrQs/IeBZ4Mrrob tzZgmrludRv7PL82vFIRvGg/MEifcrpulIYgXPTvi59usWvJ8MThckwPemmQnFU050b/ 5/VJgibIuEVQgS1qqmUd9M1vtEQN22id0W8WC9tf+edUgTDYBmjLE1/nf9MROIpdWop4 9DoZS1AVQrcjFSCCYY6STfHhKGp9Xn5II64uff0JeuTQao9whmdE6Klggo1ThOd7k1NX DRxYoMmxVnJChXPbmWVXwUbrDO021aAEHucNL2Ln5YFo9pyWApeM0466uRMYdOqtuN0m LKNw== X-Gm-Message-State: AOJu0YzyJxEyo3wVZxVLMLuQqLKAzqjxoPgEfQXkfufe8CB3isRj/dpr bDhVzNxiQzCdePoOTdb9OQB878aMqnjWpTBgBkeJiZSB5YmnuZGTKEbux4rDKSjke5RAHeeUO6S FOQ== X-Google-Smtp-Source: AGHT+IGVrjrX1vlRd2uG7oRQwie7RyQ5UOTKHCjgIWdFbAeyGVFShvSMO95vZxX6XL1f+wTeBj1FJg== X-Received: by 2002:a05:6402:4405:b0:5ce:df46:7087 with SMTP id 4fb4d7f45d1cf-5cedf4670a0mr4390457a12.4.1730822455509; Tue, 05 Nov 2024 08:00:55 -0800 (PST) Received: from localhost.localdomain (h082218084190.host.wavenet.at. [82.218.84.190]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6a9a41bsm1467773a12.14.2024.11.05.08.00.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 08:00:55 -0800 (PST) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, pbonzini@redhat.com, Phil Dennis-Jordan Subject: [PATCH 2/5] i386/hvf: Fix for UB in handling CPUID function 0xD Date: Tue, 5 Nov 2024 16:57:57 +0100 Message-Id: <20241105155800.5461-3-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20241105155800.5461-1-phil@philjordan.eu> References: <20241105155800.5461-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::52e; envelope-from=phil@philjordan.eu; helo=mail-ed1-x52e.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The handling for CPUID function 0xD (supported XSAVE features) was improved in a recent patch. Unfortunately, this appears to have introduced undefined behaviour for cases where ecx > 30, as the result of (1 << idx) is undefined if idx > 30. Per Intel SDM section 13.2, the behaviour for ecx values up to and including 62 are specified. This change therefore specifically sets all registers returned by the CPUID instruction to 0 for 63 and higher. Furthermore, the bit shift uses uint64_t, where behaviour for the entire range of 2..62 is safe and correct. Signed-off-by: Phil Dennis-Jordan --- target/i386/hvf/x86_cpuid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c index ac922d7fd16..9d9ccaa815d 100644 --- a/target/i386/hvf/x86_cpuid.c +++ b/target/i386/hvf/x86_cpuid.c @@ -119,8 +119,8 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, eax = 0; break; case 0xD: - if (!supported_xcr0 || - (idx > 1 && !(supported_xcr0 & (1 << idx)))) { + if (!supported_xcr0 || idx >= 63 || + (idx > 1 && !(supported_xcr0 & (UINT64_C(1) << idx)))) { eax = ebx = ecx = edx = 0; break; } From patchwork Tue Nov 5 15:57:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Dennis-Jordan X-Patchwork-Id: 13863148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 477C7D2B956 for ; Tue, 5 Nov 2024 16:02:28 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8LzM-0006j6-9G; Tue, 05 Nov 2024 11:01:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8LzI-0006hC-PD for qemu-devel@nongnu.org; Tue, 05 Nov 2024 11:01:00 -0500 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t8LzH-0007OR-0k for qemu-devel@nongnu.org; Tue, 05 Nov 2024 11:01:00 -0500 Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-5cedf5fe237so2457159a12.3 for ; Tue, 05 Nov 2024 08:00:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=philjordan-eu.20230601.gappssmtp.com; s=20230601; t=1730822457; x=1731427257; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ULV6js8+Kl+ICVkJYfpF5H1/0wNopvSfTu+wRnziPlo=; b=Sa2Ap5SrILV86YGcDEz124rmfRbnp+h2RWWfkomzJfBEwXC+Dfxlp4PZNeoIkoJAUb 3wQ7nZPAhrZDGjn23EpvEjlSpbGOyJvvONXDQH7oJFQctAUy0/yoLKBCYoD9k1xUGV6j eE0fepTAKYsxFJl0j+j98SS87991iVzMbvf1gfQ0TmREeTWwcITYk5+KVfX/KBQKadGz 0xPZDuM/0eDLaJ1mWkcZ0CGfwtwVEDqDUjVPr75pSmB46tQrdIbEwGGlP/zWLJgt13Dq ++8pI9VnqOJit/AEzP/QQ6W6Gc6ucvkJWGg7Zr8gMt7mUxpp3DWSV7BhqoLYRM2kqUI+ litQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730822457; x=1731427257; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ULV6js8+Kl+ICVkJYfpF5H1/0wNopvSfTu+wRnziPlo=; b=ttUhXSQl0aHs/k3yPhBSs7A0IJjVrKqGntyFF3nKtqa+EzDCXGwKaP56GxNO+gXHbi B9XaGJoqQvb/gBLQchCkhsxmT4b2M3CkIhPZ7xJ2DsvNcAu6ZTczGyXNoqf0QNXpo6hC CZv9YHSKivnQpRLvwJ3kVZ/1vyH4t9fFMynrpjvUzXFUef0btUKnnJuNXzRPoV/PAIh3 vPwj/4F0lt1mM81UVJZzSfjiXeUriOkJc+3oN8h7cqSPEbiKTzdDSSoTuJD78vnRmA/l DwVijSIbkmOSxwOPNgyj11Hr3dCX0/0jqcMcAKzPfUnzBD7WCD/1mtwDiMWSN2w1WMyj LJ3w== X-Gm-Message-State: AOJu0YxtNXJxqjupxyG3+itTxBi4ZEKl1AcjZbit4lLtwz2Rnmi9ASJK qTF4h2tQ86uCG0vucCqGvPfTXE2CnQfoEVS40WykAjmJdqjbIvHHuc+inJ/sZ6atEIi4RytGCsy IMQ== X-Google-Smtp-Source: AGHT+IF0I962jVv//zYvrqp12V/bHhVuDuGOk3Ch/xohzHRVWmFkfNO6iaUpeA3ISojmbyMxKOWhMQ== X-Received: by 2002:a05:6402:3491:b0:5c9:1d7f:4fd9 with SMTP id 4fb4d7f45d1cf-5ceb9263cacmr13559835a12.8.1730822456465; Tue, 05 Nov 2024 08:00:56 -0800 (PST) Received: from localhost.localdomain (h082218084190.host.wavenet.at. [82.218.84.190]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6a9a41bsm1467773a12.14.2024.11.05.08.00.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 08:00:56 -0800 (PST) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, pbonzini@redhat.com, Phil Dennis-Jordan Subject: [PATCH 3/5] i386/hvf: Fixes startup memory leak (vmcs caps) Date: Tue, 5 Nov 2024 16:57:58 +0100 Message-Id: <20241105155800.5461-4-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20241105155800.5461-1-phil@philjordan.eu> References: <20241105155800.5461-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::52d; envelope-from=phil@philjordan.eu; helo=mail-ed1-x52d.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The hvf_caps data structure only exists once as part of the hvf accelerator state, but it is initialised during vCPU initialisation. This change therefore adds a check to ensure memory for it is only allocated once. Signed-off-by: Phil Dennis-Jordan --- target/i386/hvf/hvf.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 68dc5d9cf75..8527bce6eef 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -239,7 +239,9 @@ int hvf_arch_init_vcpu(CPUState *cpu) init_emu(); init_decoder(); - hvf_state->hvf_caps = g_new0(struct hvf_vcpu_caps, 1); + if (hvf_state->hvf_caps == NULL) { + hvf_state->hvf_caps = g_new0(struct hvf_vcpu_caps, 1); + } env->hvf_mmio_buf = g_new(char, 4096); if (x86cpu->vmware_cpuid_freq) { From patchwork Tue Nov 5 15:57:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Dennis-Jordan X-Patchwork-Id: 13863144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6722CD2B950 for ; Tue, 5 Nov 2024 16:01:39 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8LzP-0006jk-Tf; Tue, 05 Nov 2024 11:01:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8LzN-0006jP-MG for qemu-devel@nongnu.org; Tue, 05 Nov 2024 11:01:05 -0500 Received: from mail-ed1-x530.google.com ([2a00:1450:4864:20::530]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t8LzJ-0007Os-Rw for qemu-devel@nongnu.org; Tue, 05 Nov 2024 11:01:04 -0500 Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-5c937b5169cso794826a12.1 for ; Tue, 05 Nov 2024 08:01:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=philjordan-eu.20230601.gappssmtp.com; s=20230601; t=1730822459; x=1731427259; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DQg34qAwXV1dkoltfasHGRhCwLkvl9EuX77LcykV+9c=; b=HHZj1xGF3SCsyn7oDmN6htoRkX9v8OAFQLF6r39t1y31c3vm4kpCBaHPSe3fuKTTMb HHdOPhjR6Hbsn9U0paO26cCXlWhiGwJswqXOY+PS9sRVhm+q1vHS9jWC6KgCgmPQGiwM dzLWn7nIhTTR5s6ho0WvgtQZhIelH5YdDLOkc/OfqhaF/oJsy1tbBHwCJrDsIdvdorXG H3H5qtJR7z61dxKQL0v/wno9l6dig77DoV17YjI+3iUroO1Jivztp6fAAJG+CMT+FHef u4MKeTOh1vRS6JM3eJCEG9zBjFDITO1nWN4w/QeZDXEs57Xv36tcAV8NdqFWsiWix5qf 32+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730822459; x=1731427259; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DQg34qAwXV1dkoltfasHGRhCwLkvl9EuX77LcykV+9c=; b=vDle391VTr1kMwHB5pBPdIV7naCUzzLeeSFNXaxuYeVFBAYXv7Wbn0dtYSw2/R5/40 572V14XyXN5xjsGzGCZG4QnqfkcAvXG3n5gY/FQCHoEj77XJnlaMVdBHWvYfhEf86mSg s/ky0Uc/XdAuCvxWtJnusBK0DAqeO7hhqnZLCMbxi2zJrr3RdZhlBbaF85qSJNyGjIld ytKTdl0cVvsm5G6wf9Ad6MkvOMes79vjFKiHNvvQP5Ni5ZMq4mEHQBkdV3ugGt3PoEHr VToyoEwIITec130/VN778q1e+k/lT0UPjkp9Q8+YShu3+ABjCnKvz+jJOgqCq+5rVuDI td6A== X-Gm-Message-State: AOJu0YwmqPzaytXOISBYD8ziZcJjm/DkkqPbglkHLTWevYMjdPV3FFWn IaLM9Nfc/tZigcn903N/pnZPi4gFcMPhMUB4lCQ+Qrv+Rp82INv2HLalfBO2j3EANU3ueeME1JH QkA== X-Google-Smtp-Source: AGHT+IFrtJt8vU6w+QZF6jAz0BpW3FewtCVaWYGz9QUlUYb3vV+bJdnYKBpM9c3YJguoV5eNhkap/g== X-Received: by 2002:a05:6402:27c8:b0:5ce:deb2:6a8d with SMTP id 4fb4d7f45d1cf-5cedeb26affmr6647262a12.0.1730822457335; Tue, 05 Nov 2024 08:00:57 -0800 (PST) Received: from localhost.localdomain (h082218084190.host.wavenet.at. [82.218.84.190]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6a9a41bsm1467773a12.14.2024.11.05.08.00.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 08:00:56 -0800 (PST) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, pbonzini@redhat.com, Phil Dennis-Jordan Subject: [PATCH 4/5] i386/hvf: Raise exception on error setting APICBASE Date: Tue, 5 Nov 2024 16:57:59 +0100 Message-Id: <20241105155800.5461-5-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20241105155800.5461-1-phil@philjordan.eu> References: <20241105155800.5461-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::530; envelope-from=phil@philjordan.eu; helo=mail-ed1-x530.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org When setting the APICBASE MSR to an illegal value, the APIC implementation will return an error. This change forwards that report to the guest as an exception rather than ignoring it when using the hvf accelerator. Signed-off-by: Phil Dennis-Jordan --- target/i386/hvf/x86_emu.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index be675bcfb71..015f760acb3 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -794,9 +794,16 @@ void simulate_wrmsr(CPUX86State *env) switch (msr) { case MSR_IA32_TSC: break; - case MSR_IA32_APICBASE: - cpu_set_apic_base(cpu->apic_state, data); + case MSR_IA32_APICBASE: { + int r; + + r = cpu_set_apic_base(cpu->apic_state, data); + if (r < 0) { + raise_exception(env, EXCP0D_GPF, 0); + } + break; + } case MSR_APIC_START ... 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[82.218.84.190]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6a9a41bsm1467773a12.14.2024.11.05.08.00.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 08:00:57 -0800 (PST) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, pbonzini@redhat.com, Phil Dennis-Jordan Subject: [PATCH 5/5] i386/hvf: Removes duplicate/shadowed variables in hvf_vcpu_exec Date: Tue, 5 Nov 2024 16:58:00 +0100 Message-Id: <20241105155800.5461-6-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20241105155800.5461-1-phil@philjordan.eu> References: <20241105155800.5461-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::52b; envelope-from=phil@philjordan.eu; helo=mail-ed1-x52b.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Pointers to the x86 CPU state already exist at the function scope, no need to re-obtain them in individual exit reason cases. Signed-off-by: Phil Dennis-Jordan --- target/i386/hvf/hvf.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 8527bce6eef..c5d025d5576 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -586,8 +586,6 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case EXIT_REASON_XSETBV: { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUX86State *env = &x86_cpu->env; uint32_t eax = (uint32_t)rreg(cpu->accel->fd, HV_X86_RAX); uint32_t ecx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RCX); uint32_t edx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RDX); @@ -644,7 +642,6 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case 8: { - X86CPU *x86_cpu = X86_CPU(cpu); if (exit_qual & 0x10) { RRX(env, reg) = cpu_get_apic_tpr(x86_cpu->apic_state); } else {