From patchwork Tue Nov 5 18:30:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haris Okanovic X-Patchwork-Id: 13863350 Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 955D11D2B2C; Tue, 5 Nov 2024 18:31:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=52.119.213.154 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730831505; cv=none; b=aNbGz2Ci/zkITleRJTtfmjjTG8ZQCPXMgLRk/WKv32wpZKbsdM3rvwVJjrUqvJkLOycjZ5pmPTGEtcYqv4nndMqHuQDege+CF5Pw0xr3d8paihc5dgzxW0GwSUEm1WQhdBKR7aMyzAIWe1gsBtap3UM8DtqBxhnJtAWarldV5wU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730831505; c=relaxed/simple; bh=SagvYHKJt5auxGJRJjhhxBCccjHkSwJYzBlZUkeQVJw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PIeyGhIQt9urIf/9a3wwRTtKjnPTz5gpOE3+938tvpGPSHb3eVoYgR/ggfjlakQqGbY9GN1o59eUcnVOkpqc2bia2yAJBVHtbDQB8LnupQgXIhGQ4H624LZ+DpdAz82+4fe+lsCYzQAvHEvHTY1NMxmZj1+4HHJd52eZbxu3cpE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com; spf=pass smtp.mailfrom=amazon.com; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b=q4/6g4yV; arc=none smtp.client-ip=52.119.213.154 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amazon.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b="q4/6g4yV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1730831504; x=1762367504; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bT6rRx7a7sWccvBSdvoPKKTuXoItJoU+EpMvF26uVsc=; b=q4/6g4yVcoJJcEP3lmqXJIY+zo/mB3ptDXxMj0EdHC9cbw2crAbBM6Rb FL/xqn2Na+EZie6vKU+Vvl4pkLEr+C+yarE8i/hpLf2BTrEeM660eDyBt tQm0n3e6pgVyZDE+gfDkfKolxhj0+T56rBjNwOL9lo5tfnAY/ePOhuebU Q=; X-IronPort-AV: E=Sophos;i="6.11,260,1725321600"; d="scan'208";a="245128567" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Nov 2024 18:31:40 +0000 Received: from EX19MTAUWA001.ant.amazon.com [10.0.21.151:50603] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.28.125:2525] with esmtp (Farcaster) id 39bb5814-4f48-4caf-ba41-fae750bfbae2; Tue, 5 Nov 2024 18:31:40 +0000 (UTC) X-Farcaster-Flow-ID: 39bb5814-4f48-4caf-ba41-fae750bfbae2 Received: from EX19D001UWA003.ant.amazon.com (10.13.138.211) by EX19MTAUWA001.ant.amazon.com (10.250.64.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Tue, 5 Nov 2024 18:31:39 +0000 Received: from u34cccd802f2d52.amazon.com (10.106.239.17) by EX19D001UWA003.ant.amazon.com (10.13.138.211) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Tue, 5 Nov 2024 18:31:34 +0000 From: Haris Okanovic To: , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 1/5] asm-generic: add smp_vcond_load_relaxed() Date: Tue, 5 Nov 2024 12:30:37 -0600 Message-ID: <20241105183041.1531976-2-harisokn@amazon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105183041.1531976-1-harisokn@amazon.com> References: <20240925232425.2763385-1-ankur.a.arora@oracle.com> <20241105183041.1531976-1-harisokn@amazon.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EX19D033UWA004.ant.amazon.com (10.13.139.85) To EX19D001UWA003.ant.amazon.com (10.13.138.211) Relaxed poll until desired mask/value is observed at the specified address or timeout. This macro is a specialization of the generic smp_cond_load_relaxed(), which takes a simple mask/value condition (vcond) instead of an arbitrary expression. It allows architectures to better specialize the implementation, e.g. to enable wfe() polling of the address on arm. Signed-off-by: Haris Okanovic --- include/asm-generic/barrier.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h index d4f581c1e21d..112027eabbfc 100644 --- a/include/asm-generic/barrier.h +++ b/include/asm-generic/barrier.h @@ -256,6 +256,31 @@ do { \ }) #endif +/** + * smp_vcond_load_relaxed() - (Spin) wait until an expected value at address + * with no ordering guarantees. Spins until `(*addr & mask) == val` or + * `nsecs` elapse, and returns the last observed `*addr` value. + * + * @nsecs: timeout in nanoseconds + * @addr: pointer to an integer + * @mask: a bit mask applied to read values + * @val: Expected value with mask + */ +#ifndef smp_vcond_load_relaxed +#define smp_vcond_load_relaxed(nsecs, addr, mask, val) ({ \ + const u64 __start = local_clock_noinstr(); \ + u64 __nsecs = (nsecs); \ + typeof(addr) __addr = (addr); \ + typeof(*__addr) __mask = (mask); \ + typeof(*__addr) __val = (val); \ + typeof(*__addr) __cur; \ + smp_cond_load_relaxed(__addr, ( \ + (VAL & __mask) == __val || \ + local_clock_noinstr() - __start > __nsecs \ + )); \ +}) +#endif + /** * smp_cond_load_acquire() - (Spin) wait for cond with ACQUIRE ordering * @ptr: pointer to the variable to wait on From patchwork Tue Nov 5 18:30:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haris Okanovic X-Patchwork-Id: 13863351 Received: from smtp-fw-33001.amazon.com (smtp-fw-33001.amazon.com [207.171.190.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDDCC1DA62E; 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05 Nov 2024 18:31:56 +0000 Received: from EX19MTAUWB001.ant.amazon.com [10.0.38.20:51046] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.10.37:2525] with esmtp (Farcaster) id 3cfefb00-6800-4172-8693-375f47215f5a; Tue, 5 Nov 2024 18:31:55 +0000 (UTC) X-Farcaster-Flow-ID: 3cfefb00-6800-4172-8693-375f47215f5a Received: from EX19D001UWA003.ant.amazon.com (10.13.138.211) by EX19MTAUWB001.ant.amazon.com (10.250.64.248) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Tue, 5 Nov 2024 18:31:55 +0000 Received: from u34cccd802f2d52.amazon.com (10.106.239.17) by EX19D001UWA003.ant.amazon.com (10.13.138.211) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Tue, 5 Nov 2024 18:31:50 +0000 From: Haris Okanovic To: , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 2/5] arm64: add __READ_ONCE_EX() Date: Tue, 5 Nov 2024 12:30:38 -0600 Message-ID: <20241105183041.1531976-3-harisokn@amazon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105183041.1531976-1-harisokn@amazon.com> References: <20240925232425.2763385-1-ankur.a.arora@oracle.com> <20241105183041.1531976-1-harisokn@amazon.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EX19D033UWA004.ant.amazon.com (10.13.139.85) To EX19D001UWA003.ant.amazon.com (10.13.138.211) Perform an exclusive load, which atomically loads a word and arms the exclusive monitor to enable wfet()/wfe() accelerated polling. https://developer.arm.com/documentation/dht0008/a/arm-synchronization-primitives/exclusive-accesses/exclusive-monitors Signed-off-by: Haris Okanovic --- arch/arm64/include/asm/readex.h | 46 +++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 arch/arm64/include/asm/readex.h diff --git a/arch/arm64/include/asm/readex.h b/arch/arm64/include/asm/readex.h new file mode 100644 index 000000000000..51963c3107e1 --- /dev/null +++ b/arch/arm64/include/asm/readex.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Based on arch/arm64/include/asm/rwonce.h + * + * Copyright (C) 2020 Google LLC. + * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. + */ + +#ifndef __ASM_READEX_H +#define __ASM_READEX_H + +#define __LOAD_EX(sfx, regs...) "ldaxr" #sfx "\t" #regs + +#define __READ_ONCE_EX(x) \ +({ \ + typeof(&(x)) __x = &(x); \ + int atomic = 1; \ + union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \ + switch (sizeof(x)) { \ + case 1: \ + asm volatile(__LOAD_EX(b, %w0, %1) \ + : "=r" (*(__u8 *)__u.__c) \ + : "Q" (*__x) : "memory"); \ + break; \ + case 2: \ + asm volatile(__LOAD_EX(h, %w0, %1) \ + : "=r" (*(__u16 *)__u.__c) \ + : "Q" (*__x) : "memory"); \ + break; \ + case 4: \ + asm volatile(__LOAD_EX(, %w0, %1) \ + : "=r" (*(__u32 *)__u.__c) \ + : "Q" (*__x) : "memory"); \ + break; \ + case 8: \ + asm volatile(__LOAD_EX(, %0, %1) \ + : "=r" (*(__u64 *)__u.__c) \ + : "Q" (*__x) : "memory"); \ + break; \ + default: \ + atomic = 0; \ + } \ + atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(__x))__x);\ +}) + +#endif From patchwork Tue Nov 5 18:30:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haris Okanovic X-Patchwork-Id: 13863352 Received: from smtp-fw-9106.amazon.com (smtp-fw-9106.amazon.com [207.171.188.206]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3812A1E3DE6; Tue, 5 Nov 2024 18:32:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=207.171.188.206 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730831535; cv=none; b=WJuxbhr76KoOEGahWSuve12GaRQ5JMjAHW2tpS+69njxANIn92Q7pEU1roVtCEy5S+gG34u2Z6pTnZHx8sEHnz1YrNUpmYT9aelPHDWcKavSNUKRXTREeOhzkuj2wvbyrH9r7Kv0t/IZ2qMxhPivkj48sjs/1Uh2l78CGyqT1YA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730831535; c=relaxed/simple; bh=fBp3cBImyKuDZ79nZuK4LWeumA4FRziZpF4LixBVSag=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=A9OA3ZPwV0eAVnp1+AcrBonWGGYXPTjonhSdmM/iWRJFs28g5UiFdnHmd+Vr8iiPwEAa3j5FBCakMX4dPnfQ0ohhxNRdSQtJFXjvIVgfc6O4EQJ/TwD525Jt3Kg5jIm45P8s5MqrpTVIJUP6z325RS8jCmPjseU2ouudX7frVUw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com; spf=pass smtp.mailfrom=amazon.com; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b=accik1HK; arc=none smtp.client-ip=207.171.188.206 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amazon.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b="accik1HK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1730831534; x=1762367534; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jU1idzmOqOXlXb1t2IMpZrPTuLA9eFztDBmS3LLVVOw=; b=accik1HKQzUKKKqjDWXwXHuwoB92Oc5ZKGojZTYK/l3c82kwqFmkIJIP zlR2qB8DacEKx0IVFBAd8mqq32YufSA3YfNbztdnMMTuIrYlaMp/5sbFi KfVXUdfbBpKZDAWO5WjygmZQCBR53OQdXPgn4Oxh2kzl3M7NHA8paiGpc M=; X-IronPort-AV: E=Sophos;i="6.11,260,1725321600"; d="scan'208";a="773030717" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-9106.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Nov 2024 18:32:13 +0000 Received: from EX19MTAUWA001.ant.amazon.com [10.0.21.151:34625] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.28.125:2525] with esmtp (Farcaster) id f9c0b0d1-8be1-4e25-ab5f-c68efeaab89c; Tue, 5 Nov 2024 18:32:12 +0000 (UTC) X-Farcaster-Flow-ID: f9c0b0d1-8be1-4e25-ab5f-c68efeaab89c Received: from EX19D001UWA003.ant.amazon.com (10.13.138.211) by EX19MTAUWA001.ant.amazon.com (10.250.64.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Tue, 5 Nov 2024 18:32:12 +0000 Received: from u34cccd802f2d52.amazon.com (10.106.239.17) by EX19D001UWA003.ant.amazon.com (10.13.138.211) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Tue, 5 Nov 2024 18:32:06 +0000 From: Haris Okanovic To: , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 3/5] arm64: refactor delay() to enable polling for value Date: Tue, 5 Nov 2024 12:30:39 -0600 Message-ID: <20241105183041.1531976-4-harisokn@amazon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105183041.1531976-1-harisokn@amazon.com> References: <20240925232425.2763385-1-ankur.a.arora@oracle.com> <20241105183041.1531976-1-harisokn@amazon.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EX19D033UWA004.ant.amazon.com (10.13.139.85) To EX19D001UWA003.ant.amazon.com (10.13.138.211) Refactor arm64's delay() to poll for a mask/value condition (vcond) in it's wfet(), wfe(), and relaxed polling loops. Signed-off-by: Haris Okanovic --- arch/arm64/lib/delay.c | 70 ++++++++++++++++++++++++++++++------------ 1 file changed, 50 insertions(+), 20 deletions(-) diff --git a/arch/arm64/lib/delay.c b/arch/arm64/lib/delay.c index cb2062e7e234..a7c3040af316 100644 --- a/arch/arm64/lib/delay.c +++ b/arch/arm64/lib/delay.c @@ -14,43 +14,73 @@ #include #include +#include -#define USECS_TO_CYCLES(time_usecs) \ - xloops_to_cycles((time_usecs) * 0x10C7UL) - -static inline unsigned long xloops_to_cycles(unsigned long xloops) +static inline u64 xloops_to_cycles(u64 xloops) { return (xloops * loops_per_jiffy * HZ) >> 32; } -void __delay(unsigned long cycles) +#define USECS_TO_XLOOPS(time_usecs) \ + ((time_usecs) * 0x10C7UL) + +#define USECS_TO_CYCLES(time_usecs) \ + xloops_to_cycles(USECS_TO_XLOOPS(time_usecs)) + +#define NSECS_TO_XLOOPS(time_nsecs) \ + ((time_nsecs) * 0x10C7UL) + +#define NSECS_TO_CYCLES(time_nsecs) \ + xloops_to_cycles(NSECS_TO_XLOOPS(time_nsecs)) + +static unsigned long __delay_until_ul(u64 cycles, unsigned long* addr, unsigned long mask, unsigned long val) { - cycles_t start = get_cycles(); + u64 start = get_cycles(); + unsigned long cur; if (alternative_has_cap_unlikely(ARM64_HAS_WFXT)) { u64 end = start + cycles; - /* - * Start with WFIT. If an interrupt makes us resume - * early, use a WFET loop to complete the delay. - */ - wfit(end); - while ((get_cycles() - start) < cycles) + do { + cur = __READ_ONCE_EX(*addr); + if ((cur & mask) == val) { + break; + } wfet(end); - } else if (arch_timer_evtstrm_available()) { - const cycles_t timer_evt_period = + } while ((get_cycles() - start) < cycles); + } else if (arch_timer_evtstrm_available()) { + const u64 timer_evt_period = USECS_TO_CYCLES(ARCH_TIMER_EVT_STREAM_PERIOD_US); - while ((get_cycles() - start + timer_evt_period) < cycles) + do { + cur = __READ_ONCE_EX(*addr); + if ((cur & mask) == val) { + break; + } wfe(); + } while ((get_cycles() - start + timer_evt_period) < cycles); + } else { + do { + cur = __READ_ONCE_EX(*addr); + if ((cur & mask) == val) { + break; + } + cpu_relax(); + } while ((get_cycles() - start) < cycles); } - while ((get_cycles() - start) < cycles) - cpu_relax(); + return cur; +} + +void __delay(unsigned long cycles) +{ + /* constant word for wfet()/wfe() to poll */ + unsigned long dummy ____cacheline_aligned = 0; + __delay_until_ul(cycles, &dummy, 0, 1); } EXPORT_SYMBOL(__delay); -inline void __const_udelay(unsigned long xloops) +void __const_udelay(unsigned long xloops) { __delay(xloops_to_cycles(xloops)); } @@ -58,12 +88,12 @@ EXPORT_SYMBOL(__const_udelay); void __udelay(unsigned long usecs) { - __const_udelay(usecs * 0x10C7UL); /* 2**32 / 1000000 (rounded up) */ + __delay(USECS_TO_CYCLES(usecs)); } EXPORT_SYMBOL(__udelay); void __ndelay(unsigned long nsecs) { - __const_udelay(nsecs * 0x5UL); /* 2**32 / 1000000000 (rounded up) */ + __delay(NSECS_TO_CYCLES(nsecs)); } EXPORT_SYMBOL(__ndelay); From patchwork Tue Nov 5 18:30:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haris Okanovic X-Patchwork-Id: 13863353 Received: from smtp-fw-52003.amazon.com (smtp-fw-52003.amazon.com [52.119.213.152]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96E751E883C; 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05 Nov 2024 18:32:22 +0000 Received: from EX19MTAUWC001.ant.amazon.com [10.0.7.35:25778] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.63.130:2525] with esmtp (Farcaster) id fb722a64-c7d9-4601-a9fb-a5752e9890eb; Tue, 5 Nov 2024 18:32:20 +0000 (UTC) X-Farcaster-Flow-ID: fb722a64-c7d9-4601-a9fb-a5752e9890eb Received: from EX19D001UWA003.ant.amazon.com (10.13.138.211) by EX19MTAUWC001.ant.amazon.com (10.250.64.174) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Tue, 5 Nov 2024 18:32:20 +0000 Received: from u34cccd802f2d52.amazon.com (10.106.239.17) by EX19D001UWA003.ant.amazon.com (10.13.138.211) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Tue, 5 Nov 2024 18:32:15 +0000 From: Haris Okanovic To: , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 4/5] arm64: add smp_vcond_load_relaxed() Date: Tue, 5 Nov 2024 12:30:40 -0600 Message-ID: <20241105183041.1531976-5-harisokn@amazon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105183041.1531976-1-harisokn@amazon.com> References: <20240925232425.2763385-1-ankur.a.arora@oracle.com> <20241105183041.1531976-1-harisokn@amazon.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EX19D033UWA004.ant.amazon.com (10.13.139.85) To EX19D001UWA003.ant.amazon.com (10.13.138.211) Implement smp_vcond_load_relaxed() atop __delay_until_ul() on arm64, to reduce number of busy loops while waiting for a value condition. This implementation only support unsigned long words. It can be extended via the enclosed case structure in barrier.h as needed. Signed-off-by: Haris Okanovic --- arch/arm64/include/asm/barrier.h | 18 ++++++++++++++++++ arch/arm64/lib/delay.c | 16 ++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 1ca947d5c939..188327e3ce72 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -203,6 +203,24 @@ do { \ (typeof(*ptr))VAL; \ }) +extern unsigned long __smp_vcond_load_relaxed_ul( + u64 nsecs, unsigned long* addr, unsigned long mask, unsigned long val); + +#define smp_vcond_load_relaxed(nsecs, addr, mask, val) ({ \ + u64 __nsecs = (nsecs); \ + typeof(addr) __addr = (addr); \ + typeof(*__addr) __mask = (mask); \ + typeof(*__addr) __val = (val); \ + typeof(*__addr) __cur; \ + switch (sizeof(*__addr)) { \ + case sizeof(unsigned long): \ + __cur = __smp_vcond_load_relaxed_ul( \ + __nsecs, __addr, __mask, __val); \ + break; \ + } \ + (__cur); \ +}) + #define smp_cond_load_acquire(ptr, cond_expr) \ ({ \ typeof(ptr) __PTR = (ptr); \ diff --git a/arch/arm64/lib/delay.c b/arch/arm64/lib/delay.c index a7c3040af316..a61a13b04439 100644 --- a/arch/arm64/lib/delay.c +++ b/arch/arm64/lib/delay.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -97,3 +98,18 @@ void __ndelay(unsigned long nsecs) __delay(NSECS_TO_CYCLES(nsecs)); } EXPORT_SYMBOL(__ndelay); + +unsigned long __smp_vcond_load_relaxed_ul( + u64 nsecs, unsigned long* addr, unsigned long mask, unsigned long val) +{ + const u64 start = local_clock_noinstr(); + const u64 cycles = NSECS_TO_CYCLES(nsecs); + unsigned long cur; + + do { + cur = __delay_until_ul(cycles, addr, mask, val); + } while((cur & mask) != val && local_clock_noinstr() - start < nsecs); + + return cur; +} +EXPORT_SYMBOL(__smp_vcond_load_relaxed_ul); From patchwork Tue Nov 5 18:30:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haris Okanovic X-Patchwork-Id: 13863354 Received: from smtp-fw-2101.amazon.com (smtp-fw-2101.amazon.com [72.21.196.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BB401DA62E; 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05 Nov 2024 18:32:39 +0000 Received: from EX19MTAUWA002.ant.amazon.com [10.0.7.35:4506] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.17.170:2525] with esmtp (Farcaster) id 3e5bd2bb-9e63-4844-b995-362add075696; Tue, 5 Nov 2024 18:32:39 +0000 (UTC) X-Farcaster-Flow-ID: 3e5bd2bb-9e63-4844-b995-362add075696 Received: from EX19D001UWA003.ant.amazon.com (10.13.138.211) by EX19MTAUWA002.ant.amazon.com (10.250.64.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Tue, 5 Nov 2024 18:32:37 +0000 Received: from u34cccd802f2d52.amazon.com (10.106.239.17) by EX19D001UWA003.ant.amazon.com (10.13.138.211) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Tue, 5 Nov 2024 18:32:32 +0000 From: Haris Okanovic To: , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 5/5] cpuidle: implement poll_idle() using smp_vcond_load_relaxed() Date: Tue, 5 Nov 2024 12:30:41 -0600 Message-ID: <20241105183041.1531976-6-harisokn@amazon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105183041.1531976-1-harisokn@amazon.com> References: <20240925232425.2763385-1-ankur.a.arora@oracle.com> <20241105183041.1531976-1-harisokn@amazon.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EX19D033UWA004.ant.amazon.com (10.13.139.85) To EX19D001UWA003.ant.amazon.com (10.13.138.211) Implement poll_idle() using smp_vcond_load_relaxed() function. Signed-off-by: Haris Okanovic --- drivers/cpuidle/poll_state.c | 36 +++++------------------------------- 1 file changed, 5 insertions(+), 31 deletions(-) diff --git a/drivers/cpuidle/poll_state.c b/drivers/cpuidle/poll_state.c index 61df2395585e..5553e6f31702 100644 --- a/drivers/cpuidle/poll_state.c +++ b/drivers/cpuidle/poll_state.c @@ -7,46 +7,20 @@ #include #include #include - -#ifdef CONFIG_ARM64 -/* - * POLL_IDLE_RELAX_COUNT determines how often we check for timeout - * while polling for TIF_NEED_RESCHED in thread_info->flags. - * - * Set this to a low value since arm64, instead of polling, uses a - * event based mechanism. - */ -#define POLL_IDLE_RELAX_COUNT 1 -#else -#define POLL_IDLE_RELAX_COUNT 200 -#endif +#include static int __cpuidle poll_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - u64 time_start; - - time_start = local_clock_noinstr(); + unsigned long flags; dev->poll_time_limit = false; raw_local_irq_enable(); if (!current_set_polling_and_test()) { - u64 limit; - - limit = cpuidle_poll_time(drv, dev); - - while (!need_resched()) { - unsigned int loop_count = 0; - if (local_clock_noinstr() - time_start > limit) { - dev->poll_time_limit = true; - break; - } - - smp_cond_load_relaxed(¤t_thread_info()->flags, - VAL & _TIF_NEED_RESCHED || - loop_count++ >= POLL_IDLE_RELAX_COUNT); - } + u64 limit = cpuidle_poll_time(drv, dev); + flags = smp_vcond_load_relaxed(limit, ¤t_thread_info()->flags, _TIF_NEED_RESCHED, _TIF_NEED_RESCHED); + dev->poll_time_limit = !(flags & _TIF_NEED_RESCHED); } raw_local_irq_disable();