From patchwork Wed Nov 6 22:20:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Davey X-Patchwork-Id: 13865584 X-Patchwork-Delegate: kuba@kernel.org Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 008F3824A3 for ; Wed, 6 Nov 2024 22:21:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730931673; cv=none; b=nup7sPruel2svNSTFizMGloqhMxAcGUwVuFWO2PSY8d/cx6JuudOaZ916fNBKylhPk80PXbmTauxsIT1AjmgEnYy/MC/0mjFbGDH2iGeqbks1xoXycJ36DiFxMQ3ahPgbtVVMdUz8xonRZnOeHctq0aP4mYkWNIzaOY8JG+07fE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730931673; c=relaxed/simple; bh=/ltJRxxeRqhazNb+BzXmlDc1/j1rX/Q0zzTl/znvvaY=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=TLI9IUO88KHdEtzQNOo3GG2iLxacj7LoNOqtnXSgMp7YFtcxQMe/bQ9QBb/L+uOn+hGlFyFwPnkjLx6tfZqwgwzznvn2WaxIFp9L8uvZwSx9QfZrtiEYy/RLZaJ0ZW8UOixgvP5kfmsCV15iTj23UynAmC3wq7Rgxsz8NyYNslw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=nY4hwt+D; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="nY4hwt+D" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 9590C2C01F6; Thu, 7 Nov 2024 11:21:00 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1730931660; bh=c36n9aUbpZTu085KuVii6yBbMfoXLQ3MCyUi3chLmZ0=; h=From:To:Cc:Subject:Date:From; b=nY4hwt+DijYY1bHY/1DJBt/z9rX5lkQzEjUGtmwjju7V4ErhjGzZYDnRCvdmSeIZ1 KHVsp00A1hnpknygyQSoUcT/2zEs61kJ9M1c9gebOC7LafP2Uo10KeugCYeMHrqccu C/zN7maQjKs489xTvhGlnH6W7bkzBDMiWonrASfEYPJYyaEOn8l59kr5tqhHpXwb28 0HQx00aOMex8GWZoR3IJLFEf4RtkVH7B/+KaDip1eUcIEAI2Q2cBumELHW3kw13OXr TRoNnYcnkaXao3GDweKXmSmN5paTmuq5f/Cs766VtCW+sVWQQAXSI/4/x1Lw0eYWpT zIF0ttTjYuf0Q== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 07 Nov 2024 11:21:00 +1300 Received: from pauld2-dl.ws.atlnz.lc (pauld-dl.ws.atlnz.lc [10.33.23.30]) by pat.atlnz.lc (Postfix) with ESMTP id 7C6E913ED6B; Thu, 7 Nov 2024 11:21:00 +1300 (NZDT) Received: by pauld2-dl.ws.atlnz.lc (Postfix, from userid 1684) id 7886540758; Thu, 7 Nov 2024 11:21:00 +1300 (NZDT) From: Paul Davey To: Andrew Lunn Cc: Daniel Golle , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Davey Subject: [PATCH net-next v2] net: phy: aquantia: Add mdix config and reporting Date: Thu, 7 Nov 2024 11:20:57 +1300 Message-ID: <20241106222057.3965379-1-paul.davey@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ca1xrWDM c=1 sm=1 tr=0 ts=672bebcc a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=VlfZXiiP6vEA:10 a=VwQbUJbxAAAA:8 a=ZB1B0HUU6VUEMc52-JgA:9 a=3ZKOabzyN94A:10 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Patchwork-Delegate: kuba@kernel.org Add support for configuring MDI-X state of PHY. Add reporting of resolved MDI-X state in status information. Tested on AQR113C. Signed-off-by: Paul Davey --- v2: - Renamed aqr_set_polarity to aqr_set_mdix - Guard MDI-X state reporting on genphy_c45_aneg_done - Link to v1: https://lore.kernel.org/netdev/20241017015407.256737-1-paul.davey@alliedtelesis.co.nz/ --- drivers/net/phy/aquantia/aquantia_main.c | 52 ++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c index 38d0dd5c80a4..bb56a66d2a48 100644 --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -54,6 +54,12 @@ #define MDIO_AN_VEND_PROV_DOWNSHIFT_MASK GENMASK(3, 0) #define MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT 4 +#define MDIO_AN_RESVD_VEND_PROV 0xc410 +#define MDIO_AN_RESVD_VEND_PROV_MDIX_AUTO 0 +#define MDIO_AN_RESVD_VEND_PROV_MDIX_MDI 1 +#define MDIO_AN_RESVD_VEND_PROV_MDIX_MDIX 2 +#define MDIO_AN_RESVD_VEND_PROV_MDIX_MASK GENMASK(1, 0) + #define MDIO_AN_TX_VEND_STATUS1 0xc800 #define MDIO_AN_TX_VEND_STATUS1_RATE_MASK GENMASK(3, 1) #define MDIO_AN_TX_VEND_STATUS1_10BASET 0 @@ -64,6 +70,9 @@ #define MDIO_AN_TX_VEND_STATUS1_5000BASET 5 #define MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX BIT(0) +#define MDIO_AN_RESVD_VEND_STATUS1 0xc810 +#define MDIO_AN_RESVD_VEND_STATUS1_MDIX BIT(8) + #define MDIO_AN_TX_VEND_INT_STATUS1 0xcc00 #define MDIO_AN_TX_VEND_INT_STATUS1_DOWNSHIFT BIT(1) @@ -155,12 +164,40 @@ static void aqr107_get_stats(struct phy_device *phydev, } } +static int aqr_set_mdix(struct phy_device *phydev, int mdix) +{ + u16 val = 0; + + switch (mdix) { + case ETH_TP_MDI: + val = MDIO_AN_RESVD_VEND_PROV_MDIX_MDI; + break; + case ETH_TP_MDI_X: + val = MDIO_AN_RESVD_VEND_PROV_MDIX_MDIX; + break; + case ETH_TP_MDI_AUTO: + case ETH_TP_MDI_INVALID: + default: + val = MDIO_AN_RESVD_VEND_PROV_MDIX_AUTO; + break; + } + + return phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_RESVD_VEND_PROV, + MDIO_AN_RESVD_VEND_PROV_MDIX_MASK, val); +} + static int aqr_config_aneg(struct phy_device *phydev) { bool changed = false; u16 reg; int ret; + ret = aqr_set_mdix(phydev, phydev->mdix_ctrl); + if (ret < 0) + return ret; + if (ret > 0) + changed = true; + if (phydev->autoneg == AUTONEG_DISABLE) return genphy_c45_pma_setup_forced(phydev); @@ -278,6 +315,21 @@ static int aqr_read_status(struct phy_device *phydev) val & MDIO_AN_RX_LP_STAT1_1000BASET_HALF); } + val = genphy_c45_aneg_done(phydev); + if (val < 0) + return val; + if (val) { + val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RESVD_VEND_STATUS1); + if (val < 0) + return val; + if (val & MDIO_AN_RESVD_VEND_STATUS1_MDIX) + phydev->mdix = ETH_TP_MDI_X; + else + phydev->mdix = ETH_TP_MDI; + } else { + phydev->mdix = ETH_TP_MDI_INVALID; + } + return genphy_c45_read_status(phydev); }