From patchwork Sat Nov 9 00:07:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 13869085 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE12BD64076 for ; Sat, 9 Nov 2024 00:09:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t9Z1i-0006av-I7; Fri, 08 Nov 2024 19:08:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t9Z1d-0006a5-Jy; Fri, 08 Nov 2024 19:08:25 -0500 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t9Z1b-0004RT-4x; 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envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org list changed files in tests/qtest/bios-tables-test-allowed-diff.h Suggested-by: Igor Mammedov Message-ID: <20241106100047.18901c9d@imammedo.users.ipa.redhat.com> Signed-off-by: Salil Mehta --- tests/qtest/bios-tables-test-allowed-diff.h | 41 +++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..512d40665d 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,42 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/x86/pc/DSDT", +"tests/data/acpi/x86/pc/DSDT.acpierst", +"tests/data/acpi/x86/pc/DSDT.acpihmat", +"tests/data/acpi/x86/pc/DSDT.bridge", +"tests/data/acpi/x86/pc/DSDT.cphp", +"tests/data/acpi/x86/pc/DSDT.dimmpxm", +"tests/data/acpi/x86/pc/DSDT.hpbridge", +"tests/data/acpi/x86/pc/DSDT.hpbrroot", +"tests/data/acpi/x86/pc/DSDT.ipmikcs", +"tests/data/acpi/x86/pc/DSDT.memhp", +"tests/data/acpi/x86/pc/DSDT.nohpet", +"tests/data/acpi/x86/pc/DSDT.numamem", +"tests/data/acpi/x86/pc/DSDT.roothp", +"tests/data/acpi/x86/q35/DSDT", +"tests/data/acpi/x86/q35/DSDT.acpierst", +"tests/data/acpi/x86/q35/DSDT.acpihmat", +"tests/data/acpi/x86/q35/DSDT.acpihmat-noinitiator", +"tests/data/acpi/x86/q35/DSDT.applesmc", +"tests/data/acpi/x86/q35/DSDT.bridge", +"tests/data/acpi/x86/q35/DSDT.core-count", +"tests/data/acpi/x86/q35/DSDT.core-count2", +"tests/data/acpi/x86/q35/DSDT.cphp", +"tests/data/acpi/x86/q35/DSDT.cxl", +"tests/data/acpi/x86/q35/DSDT.dimmpxm", +"tests/data/acpi/x86/q35/DSDT.ipmibt", +"tests/data/acpi/x86/q35/DSDT.ipmismbus", +"tests/data/acpi/x86/q35/DSDT.ivrs", +"tests/data/acpi/x86/q35/DSDT.memhp", +"tests/data/acpi/x86/q35/DSDT.mmio64", +"tests/data/acpi/x86/q35/DSDT.multi-bridge", +"tests/data/acpi/x86/q35/DSDT.noacpihp", +"tests/data/acpi/x86/q35/DSDT.nohpet", +"tests/data/acpi/x86/q35/DSDT.numamem", +"tests/data/acpi/x86/q35/DSDT.pvpanic-isa", +"tests/data/acpi/x86/q35/DSDT.thread-count", +"tests/data/acpi/x86/q35/DSDT.thread-count2", +"tests/data/acpi/x86/q35/DSDT.tis.tpm12", +"tests/data/acpi/x86/q35/DSDT.tis.tpm2", +"tests/data/acpi/x86/q35/DSDT.type4-count", +"tests/data/acpi/x86/q35/DSDT.viot", +"tests/data/acpi/x86/q35/DSDT.xapic", From patchwork Sat Nov 9 00:07:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 13869084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E239D64076 for ; Sat, 9 Nov 2024 00:09:41 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t9Z1m-0006cT-IH; Fri, 08 Nov 2024 19:08:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t9Z1j-0006az-KC; Fri, 08 Nov 2024 19:08:31 -0500 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t9Z1g-0004T3-T0; Fri, 08 Nov 2024 19:08:31 -0500 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XlbkC6MJWz67D3M; Sat, 9 Nov 2024 08:08:19 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id 043E6140517; Sat, 9 Nov 2024 08:08:26 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.48.150.69) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Sat, 9 Nov 2024 01:08:11 +0100 To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH V2 2/3] Fix: CPUs presence logic in _STA for x86 backward compatability Date: Sat, 9 Nov 2024 00:07:27 +0000 Message-ID: <20241109000728.206825-3-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241109000728.206825-1-salil.mehta@huawei.com> References: <20241109000728.206825-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.48.150.69] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Checking `is_present` first can break x86 migration from new Qemu version to old Qemu. This is because CPRS Bit is not defined in the older Qemu register block and will always be 0 resulting in check always failing. Remove CPU_PRESENT Bit to preserve older ABI. - If ((\_SB.PCI0.PRES.CPEN == One)) - { - Local0 = 0x0F + If ((\_SB.PCI0.PRES.CPRS == One)) + { + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + Else + { + Local0 = 0x0D + } } Reported-by: Igor Mammedov Message-ID: <20241106100047.18901c9d@imammedo.users.ipa.redhat.com> Signed-off-by: Salil Mehta --- hw/acpi/cpu.c | 49 ++++++++++++++++--------------------------- include/hw/acpi/cpu.h | 1 + include/hw/core/cpu.h | 1 - 3 files changed, 19 insertions(+), 32 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 23443f09a5..7b0badd08a 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -23,6 +23,8 @@ enum { CPHP_CMD_MAX }; +static bool always_present_cpus; + static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev) { ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1); @@ -79,7 +81,6 @@ static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) val |= cdev->is_inserting ? 2 : 0; val |= cdev->is_removing ? 4 : 0; val |= cdev->fw_remove ? 16 : 0; - val |= cdev->cpu ? 32 : 0; trace_cpuhp_acpi_read_flags(cpu_st->selector, val); break; case ACPI_CPU_CMD_DATA_OFFSET_RW: @@ -246,15 +247,9 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, memory_region_add_subregion(as, base_addr, &state->ctrl_reg); } -static bool should_remain_acpi_present(DeviceState *dev) +static inline bool should_remain_acpi_present(DeviceState *dev) { - CPUClass *k = CPU_GET_CLASS(dev); - /* - * A system may contain CPUs that are always present on one die, NUMA node, - * or socket, yet may be non-present on another simultaneously. Check from - * architecture specific code. - */ - return k->cpu_persistent_status && k->cpu_persistent_status(CPU(dev)); + return always_present_cpus; } static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) @@ -362,7 +357,6 @@ const VMStateDescription vmstate_cpu_hotplug = { #define CPU_REMOVE_EVENT "CRMV" #define CPU_EJECT_EVENT "CEJ0" #define CPU_FW_EJECT_EVENT "CEJF" -#define CPU_PRESENT "CPRS" void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, build_madt_cpu_fn build_madt_cpu, hwaddr base_addr, @@ -423,9 +417,7 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); /* tell firmware to do device eject, write only */ aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1)); - /* 1 if present, read only */ - aml_append(field, aml_named_field(CPU_PRESENT, 1)); - aml_append(field, aml_reserved_field(2)); + aml_append(field, aml_reserved_field(3)); aml_append(field, aml_named_field(CPU_COMMAND, 8)); aml_append(cpu_ctrl_dev, field); @@ -455,7 +447,6 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); - Aml *is_present = aml_name("%s.%s", cphp_res_path, CPU_PRESENT); Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); @@ -482,28 +473,24 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); { - Aml *idx = aml_arg(0); + Aml *default_sta = aml_int(opts.always_present_cpus ? 0xD : 0); Aml *sta = aml_local(0); - Aml *ifctx2; - Aml *else_ctx; + Aml *idx = aml_arg(0); + + always_present_cpus = opts.always_present_cpus; aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(idx, cpu_selector)); - aml_append(method, aml_store(zero, sta)); - ifctx = aml_if(aml_equal(is_present, one)); + /* + * Default case: + * _STA(0xD) = cpu is present and disabled OR + * _STA(0x0) = cpu is not present (and hence disabled) + */ + aml_append(method, aml_store(default_sta, sta)); + ifctx = aml_if(aml_equal(is_enabled, one)); { - ifctx2 = aml_if(aml_equal(is_enabled, one)); - { - /* cpu is present and enabled */ - aml_append(ifctx2, aml_store(aml_int(0xF), sta)); - } - aml_append(ifctx, ifctx2); - else_ctx = aml_else(); - { - /* cpu is present but disabled */ - aml_append(else_ctx, aml_store(aml_int(0xD), sta)); - } - aml_append(ifctx, else_ctx); + /* _STA(0xF) = cpu is present and enabled */ + aml_append(ifctx, aml_or(aml_int(0xF), sta, sta)); } aml_append(method, ifctx); aml_append(method, aml_release(ctrl_lock)); diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h index 32654dc274..4a3e591120 100644 --- a/include/hw/acpi/cpu.h +++ b/include/hw/acpi/cpu.h @@ -55,6 +55,7 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, typedef struct CPUHotplugFeatures { bool acpi_1_compatible; bool has_legacy_cphp; + bool always_present_cpus; bool fw_unplugs_cpu; const char *smi_path; } CPUHotplugFeatures; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index db8a6fbc6e..e936b67675 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -158,7 +158,6 @@ struct CPUClass { void (*dump_state)(CPUState *cpu, FILE *, int flags); void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value); int64_t (*get_arch_id)(CPUState *cpu); - bool (*cpu_persistent_status)(CPUState *cpu); bool (*cpu_enabled_status)(CPUState *cpu); void (*set_pc)(CPUState *cpu, vaddr value); vaddr (*get_pc)(CPUState *cpu); From patchwork Sat Nov 9 00:07:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 13869083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7A10D64097 for ; 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Sat, 9 Nov 2024 01:08:26 +0100 To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH V2 3/3] tests/qtest/bios-tables-test: Fix DSDT golden masters for x86/{pc, q35} Date: Sat, 9 Nov 2024 00:07:28 +0000 Message-ID: <20241109000728.206825-4-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241109000728.206825-1-salil.mehta@huawei.com> References: <20241109000728.206825-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.48.150.69] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Update the DSDT golden master files for the x86/pc and x86/q35 platforms to address recent changes in the architecture-agnostic CPU AML code, which impacted the backward compatibility of the migration feature on the x86 platform. Additionally, initialize CPU's presence statically within the CPU AML to avoid the need for extending the ACPI ABI for dynamic CPU presence checks. The following is a diff of the changes in the .dsl file generated with IASL: * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/x86/pc/DSDT, Fri Nov 8 23:03:54 2024 + * Disassembly of /tmp/aml-FONNW2, Fri Nov 8 23:03:54 2024 * * Original Table Header: * Signature "DSDT" - * Length 0x00002171 (8561) + * Length 0x00002150 (8528) * Revision 0x01 **** 32-bit table (V1), no 64-bit math support - * Checksum 0xAA + * Checksum 0xF6 * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -1480,7 +1480,6 @@ CRMV, 1, CEJ0, 1, CEJF, 1, - CPRS, 1, Offset (0x05), CCMD, 8 } @@ -1515,16 +1514,9 @@ Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) \_SB.PCI0.PRES.CSEL = Arg0 Local0 = Zero - If ((\_SB.PCI0.PRES.CPRS == One)) - { - If ((\_SB.PCI0.PRES.CPEN == One)) - { - Local0 = 0x0F - } - Else - { - Local0 = 0x0D - } + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 |= 0x0F } Release (\_SB.PCI0.PRES.CPLK) Reported-by: Igor Mammedov Message-ID: <20241106100047.18901c9d@imammedo.users.ipa.redhat.com> Signed-off-by: Salil Mehta --- tests/data/acpi/x86/pc/DSDT | Bin 8561 -> 8528 bytes tests/data/acpi/x86/pc/DSDT.acpierst | Bin 8472 -> 8439 bytes tests/data/acpi/x86/pc/DSDT.acpihmat | Bin 9886 -> 9853 bytes tests/data/acpi/x86/pc/DSDT.bridge | Bin 15432 -> 15399 bytes tests/data/acpi/x86/pc/DSDT.cphp | Bin 9025 -> 8992 bytes tests/data/acpi/x86/pc/DSDT.dimmpxm | Bin 10215 -> 10182 bytes tests/data/acpi/x86/pc/DSDT.hpbridge | Bin 8512 -> 8479 bytes tests/data/acpi/x86/pc/DSDT.hpbrroot | Bin 5068 -> 5035 bytes tests/data/acpi/x86/pc/DSDT.ipmikcs | Bin 8633 -> 8600 bytes tests/data/acpi/x86/pc/DSDT.memhp | Bin 9920 -> 9887 bytes tests/data/acpi/x86/pc/DSDT.nohpet | Bin 8419 -> 8386 bytes tests/data/acpi/x86/pc/DSDT.numamem | Bin 8567 -> 8534 bytes tests/data/acpi/x86/pc/DSDT.roothp | Bin 12354 -> 12321 bytes tests/data/acpi/x86/q35/DSDT | Bin 8389 -> 8356 bytes tests/data/acpi/x86/q35/DSDT.acpierst | Bin 8406 -> 8373 bytes tests/data/acpi/x86/q35/DSDT.acpihmat | Bin 9714 -> 9681 bytes .../acpi/x86/q35/DSDT.acpihmat-noinitiator | Bin 8668 -> 8635 bytes tests/data/acpi/x86/q35/DSDT.applesmc | Bin 8435 -> 8402 bytes tests/data/acpi/x86/q35/DSDT.bridge | Bin 12002 -> 11969 bytes tests/data/acpi/x86/q35/DSDT.core-count | Bin 12947 -> 12914 bytes tests/data/acpi/x86/q35/DSDT.core-count2 | Bin 33804 -> 33771 bytes tests/data/acpi/x86/q35/DSDT.cphp | Bin 8853 -> 8820 bytes tests/data/acpi/x86/q35/DSDT.cxl | Bin 13182 -> 13149 bytes tests/data/acpi/x86/q35/DSDT.dimmpxm | Bin 10043 -> 10010 bytes tests/data/acpi/x86/q35/DSDT.ipmibt | Bin 8464 -> 8431 bytes tests/data/acpi/x86/q35/DSDT.ipmismbus | Bin 8477 -> 8444 bytes tests/data/acpi/x86/q35/DSDT.ivrs | Bin 8406 -> 8373 bytes tests/data/acpi/x86/q35/DSDT.memhp | Bin 9748 -> 9715 bytes tests/data/acpi/x86/q35/DSDT.mmio64 | Bin 9519 -> 9486 bytes tests/data/acpi/x86/q35/DSDT.multi-bridge | Bin 13242 -> 13209 bytes tests/data/acpi/x86/q35/DSDT.noacpihp | Bin 8269 -> 8236 bytes tests/data/acpi/x86/q35/DSDT.nohpet | Bin 8247 -> 8214 bytes tests/data/acpi/x86/q35/DSDT.numamem | Bin 8395 -> 8362 bytes tests/data/acpi/x86/q35/DSDT.pvpanic-isa | Bin 8490 -> 8457 bytes tests/data/acpi/x86/q35/DSDT.thread-count | Bin 12947 -> 12914 bytes tests/data/acpi/x86/q35/DSDT.thread-count2 | Bin 33804 -> 33771 bytes tests/data/acpi/x86/q35/DSDT.tis.tpm12 | Bin 8995 -> 8962 bytes tests/data/acpi/x86/q35/DSDT.tis.tpm2 | Bin 9021 -> 8988 bytes tests/data/acpi/x86/q35/DSDT.type4-count | Bin 18623 -> 18590 bytes tests/data/acpi/x86/q35/DSDT.viot | Bin 14649 -> 14616 bytes tests/data/acpi/x86/q35/DSDT.xapic | Bin 35752 -> 35719 bytes tests/qtest/bios-tables-test-allowed-diff.h | 41 ------------------ 42 files changed, 41 deletions(-) diff --git a/tests/data/acpi/x86/pc/DSDT b/tests/data/acpi/x86/pc/DSDT index 46c8ffda011e71ce0a0ee707d320f13e9afd74f8..330c37242582c766fbb25cb75cd826df1675a319 100644 GIT binary patch delta 99 zcmV-p0G$8vLeN4AL{mgmP$2*S0rs&9x(o?GKVMTqUt5Amlg$iX0VtC!4Ilyl1Cvt? zC<0D1lYI>~21y1(Q&d5dKMpP(0AQdSlUy$ZUsFO~P(w*DP*O!xLr_Id0euP&V6z|& FQ4^Mb8z2Ax delta 125 zcmV-@0D}L}Lh(WhL{mgmaUlQz0jjYIx(o?HL0?lsUt5Arlg$iX0WFg(4Il?YP*PI? z00NUv4JZOiHIsM^HUdQmldugnHaC-8F9csxLSIlrNia}SMN>miQd0q-8k1Zv1Yc7^ fUr<9yFi=uOQ$tWiP62QV4`87Ma0(5x{|!+S)S)9< diff --git a/tests/data/acpi/x86/pc/DSDT.acpierst b/tests/data/acpi/x86/pc/DSDT.acpierst index 8332df33f33ddaa4241752dcc2cf83ebd1cccd80..850a1ac380d0c2e0155aa23bcd2551912aebff60 100644 GIT binary patch delta 99 zcmV-p0G$7rLia%mL{mgm_aFcO0Y9+{x(o?GKVMTqUt5Amlg$iX0VtC!4Ilyl1Cvt? zC<0D1lYI>~21y1(Q&d5dKMpP(0AQdSlUy$ZUsFO~P(w*DP*O!xLr_Id0euP&V6z|& F_!5C)8-f4; delta 125 zcmV-@0D}MbL6|}cL{mgm7$E=v0rIg5x(o?HL0?lsUt5Arlg$iX0WFg(4Il?YP*PI? z00NUv4JZOiHIsM^HUdQmldugnHaC-8F9csxLSIlrNia}SMN>miQd0q-8k1Zv1Yc7^ fUr<9yFi=uOQ$tWiP62QV4`87Ma0(5x{|)#Ow4Nip diff --git a/tests/data/acpi/x86/pc/DSDT.acpihmat b/tests/data/acpi/x86/pc/DSDT.acpihmat index bf093f6d8290a10a0823299238d5196d19b8e77d..09f486a880e6637c23c1467232e0c8ef9615bbf8 100644 GIT binary patch delta 92 zcmV-i0Hgn&P5n#?L{mgmeI@_^0i>}Cx(o?VL|;=vUt5Amlg$iX0VtC!4Ilyl1Cvt? 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U4`87Ma0(4zlW`Cgvmg##7+5nO!~g&Q diff --git a/tests/data/acpi/x86/pc/DSDT.bridge b/tests/data/acpi/x86/pc/DSDT.bridge index c0bf671621348f698d2535cfd734dc05a9c7256a..af1957c0e4b12ae16692cb0093b404ca83239893 100644 GIT binary patch delta 99 zcmV-p0G$8Gc&B&@L{mgmCp-WE0R*uMx(o?GKVMTqUt5Amlg$iX0VtC!4Ilyl1Cvt? zC<0D1lYI>~21y1(Q&d5dKMpP(0AQdSlUy$ZUsFO~P(w*DP*O!xLr_Id0euP&V6z|& FC@xBG8Y}<+ delta 125 zcmV-@0D}Lgc*uAPL{mgmNIU=l0l2XWx(o?HL0?lsUt5Arlg$iX0WFg(4Il?YP*PI? z00NUv4JZOiHIsM^HUdQmldugnHaC-8F9csxLSIlrNia}SMN>miQd0q-8k1Zv1Yc7^ fUr<9yFi=uOQ$tWiP62QV4`87Ma0(5x{|zWE;58#= diff --git a/tests/data/acpi/x86/pc/DSDT.cphp b/tests/data/acpi/x86/pc/DSDT.cphp index e72a2df567d28b08b17051dd5612fb77abaf6e20..f3507e8b63a30951c70ff5b6e1aa2b6403d128d5 100644 GIT binary patch delta 92 zcmV-i0HgoGMxaItL{mgmAR_<(0a~#Nx(o?GTwhZ{Ut5Amlg$iX0VtC!4Ilyl1Cvt? yC<0DUlYI?x0!apw@eMT^8VWx(o?HUSCr}Ut5Arlg$iX0WFg(4Il?YP*PI? z00NUv4JZOiQj>TMasovNlk5#OHaC-8F9csxLSIlrNia}SMN>miQd0q-8k1Zv1Yc7^ fUr<9yFi=uOQ$tWiP62QV4`87Ma0(5xI}YU(f;%F- diff --git a/tests/data/acpi/x86/pc/DSDT.dimmpxm b/tests/data/acpi/x86/pc/DSDT.dimmpxm index 17a53d9ef714c973c934fdbd2021b2c03fa08a87..be083ea5ebe9557b2d042e97428396f8ac286508 100644 GIT binary patch delta 97 zcmV-n0G|KnPsUFQL{mgm#wP#(0T;0f&I}1jP+wC*Ut5Amli>_r0VtC|4Ilyl1CwVB zC;~@ClaUQs0!apw>_r0WFh24Il?YP*PI? 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