From patchwork Mon Nov 11 09:11:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8E1AD2E9CA for ; Mon, 11 Nov 2024 09:09:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4E38210E449; Mon, 11 Nov 2024 09:09:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ftj1GzhG"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9DEBD10E443; Mon, 11 Nov 2024 09:09:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316195; x=1762852195; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RkUAfGh95Qf59oNuXCZbP+YYWn+WxFUoCefFLASsl2k=; b=ftj1GzhG1SESFqTd5GCljTtGpWbxycQXhcI2fQhyB0WO4hbWIbXU8nBM uYXwSLOK0bsCjS38zhB4HGYVKqS+mbxsLg0bqZ22vyFaUyiHvJV5ciiPU VGeIMgGEBtQRXvbx4Sq4VS8QrE8wxtJwBZact4jLvC9c0wl58L0UymMA1 iIvGSEqtaX9Hnydi6hu/a2e0QMuwt55NYek/4a8Gpqrl7Qgga1ojAvizM KN45aOI0uDxV5aDs+1TvUDCdmgNVoJiqCHYWaZ9U3tikqFh2jKaov6Y0i IQRxwfiu8wx+b0b7Rk4NbxMO6tik6HuACxA8G/mhMZiYlY2fs0RhlmZlp Q==; X-CSE-ConnectionGUID: JKrzuQqKQZODkoaDyyChPw== X-CSE-MsgGUID: QYn5IT3DQJmfE/dMqGhMoA== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052303" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052303" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:55 -0800 X-CSE-ConnectionGUID: frknHWkYQ/KUIg2XgqqOoA== X-CSE-MsgGUID: 85BZBcrhSlK09K+V7xa6yg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762533" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:52 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 01/23] drm/i915/vrr: Refactor VRR Timing Computation Date: Mon, 11 Nov 2024 14:41:59 +0530 Message-ID: <20241111091221.2992818-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Introduce helper functions to compute timins gfor different mode of operation of VRR timing generator. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 115 +++++++++++++++-------- 1 file changed, 75 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 19a5d0076bb8..defe346b0261 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -161,6 +161,73 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) return vtotal; } +static +void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) +{ + crtc_state->vrr.enable = true; + crtc_state->cmrr.enable = true; + /* + * TODO: Compute precise target refresh rate to determine + * if video_mode_required should be true. Currently set to + * false due to uncertainty about the precise target + * refresh Rate. + */ + crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false); + crtc_state->vrr.vmin = crtc_state->vrr.vmax; + crtc_state->vrr.flipline = crtc_state->vrr.vmin; + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; +} + +static +int intel_vrr_compute_vmin(struct intel_connector *connector, + struct drm_display_mode *adjusted_mode) +{ + int vmin; + const struct drm_display_info *info = &connector->base.display_info; + + vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, + adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq); + vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal); + + return vmin; +} + +static +int intel_vrr_compute_vmax(struct intel_connector *connector, + struct drm_display_mode *adjusted_mode) +{ + int vmax; + const struct drm_display_info *info = &connector->base.display_info; + + vmax = adjusted_mode->crtc_clock * 1000 / + (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq); + + vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal); + + return vmax; +} + +static +void intel_vrr_prepare_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax) +{ + /* + * flipline determines the min vblank length the hardware will + * generate, and flipline>=vmin+1, hence we reduce vmin by one + * to make sure we can get the actual min vblank length. + */ + crtc_state->vrr.vmin = vmin - 1; + crtc_state->vrr.vmax = vmax; + crtc_state->vrr.flipline = crtc_state->vrr.vmin + 1; +} + +static +void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax) +{ + intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); + crtc_state->vrr.enable = true; + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; +} + void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -171,7 +238,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct intel_dp *intel_dp = intel_attached_dp(connector); bool is_edp = intel_dp_is_edp(intel_dp); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - const struct drm_display_info *info = &connector->base.display_info; int vmin, vmax; /* @@ -192,49 +258,18 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, if (HAS_LRR(display)) crtc_state->update_lrr = true; - vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, - adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq); - vmax = adjusted_mode->crtc_clock * 1000 / - (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq); - - vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal); - vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal); + vmin = intel_vrr_compute_vmin(connector, adjusted_mode); + vmax = intel_vrr_compute_vmax(connector, adjusted_mode); if (vmin >= vmax) return; - /* - * flipline determines the min vblank length the hardware will - * generate, and flipline>=vmin+1, hence we reduce vmin by one - * to make sure we can get the actual min vblank length. - */ - crtc_state->vrr.vmin = vmin - 1; - crtc_state->vrr.vmax = vmax; - - crtc_state->vrr.flipline = crtc_state->vrr.vmin + 1; - - /* - * When panel is VRR capable and userspace has - * not enabled adaptive sync mode then Fixed Average - * Vtotal mode should be enabled. - */ - if (crtc_state->uapi.vrr_enabled) { - crtc_state->vrr.enable = true; - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; - } else if (is_cmrr_frac_required(crtc_state) && is_edp) { - crtc_state->vrr.enable = true; - crtc_state->cmrr.enable = true; - /* - * TODO: Compute precise target refresh rate to determine - * if video_mode_required should be true. Currently set to - * false due to uncertainty about the precise target - * refresh Rate. - */ - crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false); - crtc_state->vrr.vmin = crtc_state->vrr.vmax; - crtc_state->vrr.flipline = crtc_state->vrr.vmin; - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; - } + if (crtc_state->uapi.vrr_enabled) + intel_vrr_compute_vrr_timings(crtc_state, vmin, vmax); + else if (is_cmrr_frac_required(crtc_state) && is_edp) + intel_vrr_compute_cmrr_timings(crtc_state); + else + intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); if (intel_dp->as_sdp_supported && crtc_state->vrr.enable) { crtc_state->vrr.vsync_start = From patchwork Mon Nov 11 09:12:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBCB9D2E9CC for ; Mon, 11 Nov 2024 09:10:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 933C010E452; Mon, 11 Nov 2024 09:10:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JceImtEj"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id D714610E449; Mon, 11 Nov 2024 09:09:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316197; x=1762852197; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1JTZZqZWw79o9BYSENptqUbhJyEEAW7Njlmuli0bWDo=; b=JceImtEjBg2powFks4cGEtWrQdwgNkYp0eCG4N/D3qHk+FLyvyQydzWo 6AHBbi6vuyhoYdVyEadokN0haivPzXZ+Kt51GfXXiV/pL3IfDSbXcjzB7 bj0gU43qIwIaPw61UfbjRuzFteHZIP7MCWTD7osrytQdF1mMXVJYkEU64 8jiBM8ctqf3El7IYH+x6UNWZVKyPxSSiUm7rTNJS9/w2dv4d+OjsLFtog GvkpxWDmNlblIU8LBNPwR9iInlnGY/l0GoX00Iork+SfowGwXX8QRw4ic 3oz8j+T391LyCvbIbCxVOVgHGcL4wFJPrQYiAobQd15WtEWwRdja1FOsQ A==; X-CSE-ConnectionGUID: l7q4QrroTWib+T4ESF4gLQ== X-CSE-MsgGUID: YaLQFXSiStOlgW9Fz42DBQ== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052307" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052307" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:57 -0800 X-CSE-ConnectionGUID: Zhf8LiWAQua1wd35rbVl5w== X-CSE-MsgGUID: mLhaNUwiRF+peQFPt+UqfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762539" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:54 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 02/23] drm/i915/vrr: Simplify CMRR Enable Check in intel_vrr_get_config Date: Mon, 11 Nov 2024 14:42:00 +0530 Message-ID: <20241111091221.2992818-3-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Combine the CMRR capability and enable check into a single condition. Set crtc_state->cmrr.enable directly within the combined condition. This will make way to absorb cmrr members in vrr struct. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index defe346b0261..72169346f6b6 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -433,10 +433,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_CTL(display, cpu_transcoder)); crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; - if (HAS_CMRR(display)) - crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE); - if (crtc_state->cmrr.enable) { + if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { + crtc_state->cmrr.enable = true; crtc_state->cmrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); From patchwork Mon Nov 11 09:12:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73DE3D2E9C9 for ; Mon, 11 Nov 2024 09:10:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1378A10E45C; Mon, 11 Nov 2024 09:10:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="KbLBQGR4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id E6B3010E452; Mon, 11 Nov 2024 09:09:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316199; x=1762852199; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oxmFBzfaB2qOvQdEeLLdxWoHDWckDh42JKZoS76ii/0=; b=KbLBQGR4h3KyO9imhp/hJpF1HHRbs1ueshKHqOqK/lYJAjHRYcuKbpTK aPhLqeqB0TJQRMMMbY3xWU4jOWJcCtQFx0EB+uzaQWTRg3G8ENRUTCam6 vgrx2RATammhPx/HaW5lLVRxA5CCeWusDtDWDyUlCiwITvaH26tO69ZGy QoivTG+L3IQqRfF1HbP9qlZ7yIWqWLjDjZVIVLMl2G2AczUcIcp+qlV/c 35sfxkXEyHBtz3PwVe2UZmng4l64NJ8XoRLAA0G9dxkK3JVsJeAgZQ+eG Bvy7Dmeags3YN7jtKkdW+PXxUf1PuRHNwwwtQVYk+mQan1MaaOz8xf4yw A==; X-CSE-ConnectionGUID: 8IwkBzBQTPudQIorHJghWw== X-CSE-MsgGUID: AH4m2kFaRpO9tpGlHGjimw== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052313" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052313" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:59 -0800 X-CSE-ConnectionGUID: 2v3unmJ8TpOGRMzsL/EK2g== X-CSE-MsgGUID: 5MKORYJNT6ac0vxehZbEvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762545" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:57 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 03/23] drm/i915/vrr: Introduce new field for VRR mode Date: Mon, 11 Nov 2024 14:42:01 +0530 Message-ID: <20241111091221.2992818-4-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR timing generator can be used in multiple modes: dynamic vrr, fixed refresh rate and content matched refresh rate (cmrr). Currently we support dynamic vrr mode and cmrr mode, so add a new member to track in which mode the VRR timing generator is used. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index d3a1aa7c919f..a1b67e76d91c 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -913,6 +913,12 @@ void intel_io_mmio_fw_write(void *ctx, i915_reg_t reg, u32 val); typedef void (*intel_io_reg_write)(void *ctx, i915_reg_t reg, u32 val); +enum intel_vrrtg_mode { + INTEL_VRRTG_MODE_NONE, + INTEL_VRRTG_MODE_VRR, + INTEL_VRRTG_MODE_CMRR, +}; + struct intel_crtc_state { /* * uapi (drm) state. This is the software state shown to userspace. @@ -1286,6 +1292,7 @@ struct intel_crtc_state { u8 pipeline_full; u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; + enum intel_vrrtg_mode mode; } vrr; /* Content Match Refresh Rate state */ From patchwork Mon Nov 11 09:12:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AD04D2E9C9 for ; Mon, 11 Nov 2024 09:10:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B9D410E453; Mon, 11 Nov 2024 09:10:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="K79U5aIV"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A57010E451; Mon, 11 Nov 2024 09:10:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316201; x=1762852201; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=63oZ4J/jo9Ykzk37qKr87HQ3As404mViTDH7GWaCIJk=; b=K79U5aIVMqBYByrPT8dIC3pdMEgxAyIbcM+UMYwjiDUe5bOZwm1KCJa4 GVYRxgk2U7EsgljuqM81/AaXJBXKFUHjZa+e55OFp7bk9hQELa+wl7zSt 9qp1IIPIN+VulglQ4sfIwmfPdECmK/hM5dfpmsfxr4npcvRXYBkUUrGLG m5q6duwFqTCdAseDm1OQqlDBBSynPF3gxgJk48bDziyIQuC51tzWgJD1i K/bDr0xcD0RIVGmpi8KbntQ0l7FJaZSrgCK5Gz8vnrCV3SyVERrQy8HVZ Jq+Axw9H6CxlJU52ci68G/aTbGssUl/Pa4V0QBUWvMCTfWuL/F5pzGuXW Q==; X-CSE-ConnectionGUID: E4hmEI1xR2eYllD/DhtiYA== X-CSE-MsgGUID: qJXv/RyXRdyVbZtz4HpQwQ== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052316" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052316" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:01 -0800 X-CSE-ConnectionGUID: UmdOcipVTqKfJ42CuMtiQw== X-CSE-MsgGUID: GgStIJwNQBOpOZTazDeu0A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762552" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:09:59 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 04/23] drm/i915/vrr: Fill VRR mode for CMRR and dynamic VRR Date: Mon, 11 Nov 2024 14:42:02 +0530 Message-ID: <20241111091221.2992818-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Fill vrr.mode during compute_config and update intel_vrr_get_config() to read vrr.mode based on CMRR and VRR enable conditions. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 14aa171a9eb2..1a933bdb16a2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5752,6 +5752,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, if (!fastset) { PIPE_CONF_CHECK_BOOL(vrr.enable); + PIPE_CONF_CHECK_X(vrr.mode); PIPE_CONF_CHECK_I(vrr.vmin); PIPE_CONF_CHECK_I(vrr.vmax); PIPE_CONF_CHECK_I(vrr.flipline); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 72169346f6b6..02160aacd8ee 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -166,6 +166,7 @@ void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) { crtc_state->vrr.enable = true; crtc_state->cmrr.enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; /* * TODO: Compute precise target refresh rate to determine * if video_mode_required should be true. Currently set to @@ -225,6 +226,7 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, int vmin { intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); crtc_state->vrr.enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } @@ -436,12 +438,15 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { crtc_state->cmrr.enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; crtc_state->cmrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); crtc_state->cmrr.cmrr_m = intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder), TRANS_CMRR_M_HI(display, cpu_transcoder)); + } else if (trans_vrr_ctl & VRR_CTL_VRR_ENABLE) { + crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; } if (DISPLAY_VER(display) >= 13) From patchwork Mon Nov 11 09:12:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18E38D2E9C8 for ; Mon, 11 Nov 2024 09:10:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1BC3E10E44D; Mon, 11 Nov 2024 09:10:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XaSupzWN"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5564210E451; Mon, 11 Nov 2024 09:10:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316204; x=1762852204; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=okMWQnvxmwj2rKmVlNNKy0NaF29rVkF1ksfRtLfDRbw=; b=XaSupzWNh7QS4v7lcAT+NkmLCA+ooZkZVkH5QufoLGt/7T99A3O2hWjT fLcdeUim4tP5bAauGLTafQ78/3e/mJle6pc9VOBe9uYbBD1TUyRynkej/ OfAqPFcoLQxoDdoOOpWD2P9BCdATV8LRXf94GV7lohKOXGOBmq+mxCkHz F39ewcsGqzh2pnDYREaLdz9FEh+roc5kJyZMbg+lgnbPwASSQoQBwb8IE 4ZkhOsUVB3IpFpJcKDd8iSVI69y7YpHEdnwnR65WiJ1UWFyOxHYlOjQqD FudxOYEG69a3pZwNZOFOq3lrFdKGPVIBPOXiiu5y+3ffNxDj/xA/36Ivs Q==; X-CSE-ConnectionGUID: 8BpDalaSTdm/8UpGmfkXgw== X-CSE-MsgGUID: 2l/TrJlgSwuluVBO7NCVmA== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052328" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052328" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:03 -0800 X-CSE-ConnectionGUID: mhF1DUNBSC+857GvnVNADg== X-CSE-MsgGUID: JZHnhciQR8aS3VWFi2H/Hg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762575" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:01 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 05/23] drm/i915/vrr: Rename vrr.enable to vrr.tg_enable Date: Mon, 11 Nov 2024 14:42:03 +0530 Message-ID: <20241111091221.2992818-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" vrr.enable field is actually used to track if vrr timing generator is used or not. Rename the field to reflect the same. Signed-off-by: Ankit Nautiyal --- .../drm/i915/display/intel_crtc_state_dump.c | 4 ++-- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 14 +++++++------- .../gpu/drm/i915/display/intel_display_types.h | 3 ++- drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- drivers/gpu/drm/i915/display/intel_dsb.c | 2 +- .../gpu/drm/i915/display/intel_modeset_setup.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- drivers/gpu/drm/i915/display/intel_vrr.c | 18 +++++++++--------- drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- 10 files changed, 28 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 705ec5ad385c..e2ce417b1990 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -296,8 +296,8 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, intel_dump_buffer("ELD: ", pipe_config->eld, drm_eld_size(pipe_config->eld)); - drm_printf(&p, "vrr: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n", - str_yes_no(pipe_config->vrr.enable), + drm_printf(&p, "vrr_tg: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n", + str_yes_no(pipe_config->vrr.tg_enable), pipe_config->vrr.vmin, pipe_config->vrr.vmax, pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband, pipe_config->vrr.flipline, diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 769bd1f26db2..3c0640efde21 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2230,7 +2230,7 @@ static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel { struct intel_display *display = to_intel_display(intel_dp); - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.tg_enable) return; if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL, diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1a933bdb16a2..05afcf6b21bf 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1129,8 +1129,8 @@ static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state, if (!new_crtc_state->hw.active) return false; - return is_enabling(vrr.enable, old_crtc_state, new_crtc_state) || - (new_crtc_state->vrr.enable && + return is_enabling(vrr.tg_enable, old_crtc_state, new_crtc_state) || + (new_crtc_state->vrr.tg_enable && (new_crtc_state->update_m_n || new_crtc_state->update_lrr || vrr_params_changed(old_crtc_state, new_crtc_state))); } @@ -1146,8 +1146,8 @@ bool intel_crtc_vrr_disabling(struct intel_atomic_state *state, if (!old_crtc_state->hw.active) return false; - return is_disabling(vrr.enable, old_crtc_state, new_crtc_state) || - (old_crtc_state->vrr.enable && + return is_disabling(vrr.tg_enable, old_crtc_state, new_crtc_state) || + (old_crtc_state->vrr.tg_enable && (new_crtc_state->update_m_n || new_crtc_state->update_lrr || vrr_params_changed(old_crtc_state, new_crtc_state))); } @@ -5751,7 +5751,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(splitter.pixel_overlap); if (!fastset) { - PIPE_CONF_CHECK_BOOL(vrr.enable); + PIPE_CONF_CHECK_BOOL(vrr.tg_enable); PIPE_CONF_CHECK_X(vrr.mode); PIPE_CONF_CHECK_I(vrr.vmin); PIPE_CONF_CHECK_I(vrr.vmax); @@ -7237,7 +7237,7 @@ static void intel_update_crtc(struct intel_atomic_state *state, if (intel_crtc_vrr_enabling(state, crtc) || new_crtc_state->update_m_n || new_crtc_state->update_lrr) intel_crtc_update_active_timings(new_crtc_state, - new_crtc_state->vrr.enable); + new_crtc_state->vrr.tg_enable); /* * We usually enable FIFO underrun interrupts as part of the @@ -7653,7 +7653,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, /* FIXME deal with everything */ new_crtc_state->use_dsb = new_crtc_state->update_planes && - !new_crtc_state->vrr.enable && + !new_crtc_state->vrr.tg_enable && !new_crtc_state->do_async_flip && !new_crtc_state->has_psr && !new_crtc_state->scaler_state.scaler_users && diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index a1b67e76d91c..48a12007bce1 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1288,7 +1288,8 @@ struct intel_crtc_state { /* Variable Refresh Rate state */ struct { - bool enable, in_range; + bool tg_enable; /* Timing generator enable */ + bool in_range; u8 pipeline_full; u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 5b918363df16..eed92f83d429 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2799,7 +2799,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!crtc_state->vrr.enable || !intel_dp->as_sdp_supported) + if (!crtc_state->vrr.tg_enable || !intel_dp->as_sdp_supported) return; crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC); @@ -2898,7 +2898,7 @@ static bool can_enable_drrs(struct intel_connector *connector, { struct drm_i915_private *i915 = to_i915(connector->base.dev); - if (pipe_config->vrr.enable) + if (pipe_config->vrr.tg_enable) return false; /* diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index b7b44399adaa..02ee00735a52 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -106,7 +106,7 @@ static bool pre_commit_is_vrr_active(struct intel_atomic_state *state, return false; /* VRR will have been disabled during intel_pre_plane_update() */ - return old_crtc_state->vrr.enable && !intel_crtc_vrr_disabling(state, crtc); + return old_crtc_state->vrr.tg_enable && !intel_crtc_vrr_disabling(state, crtc); } static const struct intel_crtc_state * diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index 2c8668b1ebae..0efeed4d89e1 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -855,7 +855,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) crtc_state->inherited = true; intel_crtc_update_active_timings(crtc_state, - crtc_state->vrr.enable); + crtc_state->vrr.tg_enable); intel_crtc_copy_hw_to_uapi_state(crtc_state); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index ed5b4d110fba..bf005daa7bb2 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1479,7 +1479,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, } /* Wa_16011303918:adl-p */ - if (crtc_state->vrr.enable && + if (crtc_state->vrr.tg_enable && IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)) { drm_dbg_kms(display->drm, "PSR2 not enabled, not compatible with HW stepping + VRR\n"); @@ -1675,7 +1675,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, /* * Currently PSR/PR doesn't work reliably with VRR enabled. */ - if (crtc_state->vrr.enable) + if (crtc_state->vrr.tg_enable) return; crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp, diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 02160aacd8ee..23c3b555279b 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -164,7 +164,7 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) static void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) { - crtc_state->vrr.enable = true; + crtc_state->vrr.tg_enable = true; crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; /* @@ -225,7 +225,7 @@ static void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax) { intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); - crtc_state->vrr.enable = true; + crtc_state->vrr.tg_enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } @@ -273,7 +273,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, else intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); - if (intel_dp->as_sdp_supported && crtc_state->vrr.enable) { + if (intel_dp->as_sdp_supported && crtc_state->vrr.tg_enable) { crtc_state->vrr.vsync_start = (crtc_state->hw.adjusted_mode.crtc_vtotal - crtc_state->hw.adjusted_mode.vsync_start); @@ -360,7 +360,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.tg_enable) return; intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), @@ -372,7 +372,7 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.tg_enable) return false; return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; @@ -383,7 +383,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!crtc_state->vrr.tg_enable) return; intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), @@ -410,7 +410,7 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) struct intel_display *display = to_intel_display(old_crtc_state); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; - if (!old_crtc_state->vrr.enable) + if (!old_crtc_state->vrr.tg_enable) return; intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), @@ -434,7 +434,7 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) trans_vrr_ctl = intel_de_read(display, TRANS_VRR_CTL(display, cpu_transcoder)); - crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; + crtc_state->vrr.tg_enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { crtc_state->cmrr.enable = true; @@ -466,7 +466,7 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_VMIN(display, cpu_transcoder)) + 1; } - if (crtc_state->vrr.enable) { + if (crtc_state->vrr.tg_enable) { crtc_state->mode_flags |= I915_MODE_FLAG_VRR; if (HAS_AS_SDP(display)) { diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index d3bbf335c749..92274c916d70 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2909,7 +2909,7 @@ skl_compute_wm(struct intel_atomic_state *state) if ((new_crtc_state->vrr.vmin == new_crtc_state->vrr.vmax && new_crtc_state->vrr.vmin == new_crtc_state->vrr.flipline) || - !new_crtc_state->vrr.enable) + !new_crtc_state->vrr.tg_enable) enable_dpkgc = true; } From patchwork Mon Nov 11 09:12:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82AF1D2E9C9 for ; Mon, 11 Nov 2024 09:10:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 11E6C10E44C; Mon, 11 Nov 2024 09:10:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MZr2lvcu"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6767710E44D; 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11 Nov 2024 01:10:05 -0800 X-CSE-ConnectionGUID: PbyY4qSXSr2IR2mGhMuk0Q== X-CSE-MsgGUID: 4RFIdup4T5mJ0XoEZXC6YA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762590" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:03 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 06/23] drm/i915/display: Absorb cmrr attributes into vrr Date: Mon, 11 Nov 2024 14:42:04 +0530 Message-ID: <20241111091221.2992818-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Since cmrr is now as a mode of operation of VRR timing generator, move its elements in the vrr struct. Replace cmrr.enable with vrr.mode INTEL_VRRTG_MODE_CMRR and move cmrr_m and cmrr_n in vrr struct. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 19 +++++--------- .../drm/i915/display/intel_display_types.h | 7 +---- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_vrr.c | 26 +++++++++---------- 4 files changed, 20 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 05afcf6b21bf..4b39692f57f6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1108,14 +1108,9 @@ static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state, old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin || old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax || old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband || - old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full; -} - -static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state, - const struct intel_crtc_state *new_crtc_state) -{ - return old_crtc_state->cmrr.cmrr_m != new_crtc_state->cmrr.cmrr_m || - old_crtc_state->cmrr.cmrr_n != new_crtc_state->cmrr.cmrr_n; + old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full || + old_crtc_state->vrr.cmrr_m != new_crtc_state->vrr.cmrr_m || + old_crtc_state->vrr.cmrr_n != new_crtc_state->vrr.cmrr_n; } static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state, @@ -5760,9 +5755,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(vrr.guardband); PIPE_CONF_CHECK_I(vrr.vsync_start); PIPE_CONF_CHECK_I(vrr.vsync_end); - PIPE_CONF_CHECK_LLI(cmrr.cmrr_m); - PIPE_CONF_CHECK_LLI(cmrr.cmrr_n); - PIPE_CONF_CHECK_BOOL(cmrr.enable); + PIPE_CONF_CHECK_LLI(vrr.cmrr_m); + PIPE_CONF_CHECK_LLI(vrr.cmrr_n); } #undef PIPE_CONF_CHECK_X @@ -7183,8 +7177,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, intel_crtc_needs_fastset(new_crtc_state)) icl_set_pipe_chicken(new_crtc_state); - if (vrr_params_changed(old_crtc_state, new_crtc_state) || - cmrr_params_changed(old_crtc_state, new_crtc_state)) + if (vrr_params_changed(old_crtc_state, new_crtc_state)) intel_vrr_set_transcoder_timings(new_crtc_state); } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 48a12007bce1..2ff75d70ccda 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1294,14 +1294,9 @@ struct intel_crtc_state { u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; enum intel_vrrtg_mode mode; + u64 cmrr_n, cmrr_m; /* Content Match Refresh Rate M and N */ } vrr; - /* Content Match Refresh Rate state */ - struct { - bool enable; - u64 cmrr_n, cmrr_m; - } cmrr; - /* Stream Splitter for eDP MSO */ struct { bool enable; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index eed92f83d429..fec720bcd296 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2809,7 +2809,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->length = 0x9; as_sdp->duration_incr_ms = 0; - if (crtc_state->cmrr.enable) { + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; as_sdp->vtotal = adjusted_mode->vtotal; as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 23c3b555279b..83b11f3d5eb5 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -151,12 +151,12 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) multiplier_n = 1000; } - crtc_state->cmrr.cmrr_n = mul_u32_u32(desired_refresh_rate * adjusted_mode->crtc_htotal, - multiplier_n); + crtc_state->vrr.cmrr_n = mul_u32_u32(desired_refresh_rate * adjusted_mode->crtc_htotal, + multiplier_n); vtotal = DIV_ROUND_UP_ULL(mul_u32_u32(adjusted_mode->crtc_clock * 1000, multiplier_n), - crtc_state->cmrr.cmrr_n); + crtc_state->vrr.cmrr_n); adjusted_pixel_rate = mul_u32_u32(adjusted_mode->crtc_clock * 1000, multiplier_m); - crtc_state->cmrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->cmrr.cmrr_n); + crtc_state->vrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->vrr.cmrr_n); return vtotal; } @@ -165,7 +165,6 @@ static void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) { crtc_state->vrr.tg_enable = true; - crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; /* * TODO: Compute precise target refresh rate to determine @@ -334,15 +333,15 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) return; } - if (crtc_state->cmrr.enable) { + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), - upper_32_bits(crtc_state->cmrr.cmrr_m)); + upper_32_bits(crtc_state->vrr.cmrr_m)); intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), - lower_32_bits(crtc_state->cmrr.cmrr_m)); + lower_32_bits(crtc_state->vrr.cmrr_m)); intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), - upper_32_bits(crtc_state->cmrr.cmrr_n)); + upper_32_bits(crtc_state->vrr.cmrr_n)); intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), - lower_32_bits(crtc_state->cmrr.cmrr_n)); + lower_32_bits(crtc_state->vrr.cmrr_n)); } intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), @@ -395,7 +394,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) VRR_VSYNC_END(crtc_state->vrr.vsync_end) | VRR_VSYNC_START(crtc_state->vrr.vsync_start)); - if (crtc_state->cmrr.enable) { + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE | trans_vrr_ctl(crtc_state)); @@ -437,12 +436,11 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) crtc_state->vrr.tg_enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { - crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; - crtc_state->cmrr.cmrr_n = + crtc_state->vrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); - crtc_state->cmrr.cmrr_m = + crtc_state->vrr.cmrr_m = intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder), TRANS_CMRR_M_HI(display, cpu_transcoder)); } else if (trans_vrr_ctl & VRR_CTL_VRR_ENABLE) { From patchwork Mon Nov 11 09:12:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8EE4ED2E9C3 for ; Mon, 11 Nov 2024 09:10:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D70810E443; Mon, 11 Nov 2024 09:10:09 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="35052334" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052334" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:07 -0800 X-CSE-ConnectionGUID: VWjJdxweQn22cwmwYFPrVg== X-CSE-MsgGUID: eMAvUg1aTzqvVfGOJNErXw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762604" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:05 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 07/23] drm/i915/display: Add vrr mode to crtc_state dump Date: Mon, 11 Nov 2024 14:42:05 +0530 Message-ID: <20241111091221.2992818-8-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Print Vrr mode along with other vrr members in crtc_state dump. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index e2ce417b1990..abec61bb4334 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -296,8 +296,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, intel_dump_buffer("ELD: ", pipe_config->eld, drm_eld_size(pipe_config->eld)); - drm_printf(&p, "vrr_tg: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n", + drm_printf(&p, "vrr_tg: %s, mode: %d vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n", str_yes_no(pipe_config->vrr.tg_enable), + pipe_config->vrr.mode, pipe_config->vrr.vmin, pipe_config->vrr.vmax, pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband, pipe_config->vrr.flipline, From patchwork Mon Nov 11 09:12:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AE9DD2E9CB for ; Mon, 11 Nov 2024 09:10:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1177C10E448; Mon, 11 Nov 2024 09:10:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="bkGgCXKw"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9D94E10E44C; Mon, 11 Nov 2024 09:10:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316210; x=1762852210; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wuJQYu8I4tlscB8o9bpwo6jfK0cGyL/B+D1XYLny1UQ=; b=bkGgCXKwmPxW+8BssBV7Sc0N6CxqndynuvP8AFIGpme+F8jsRI3OG9qf ATdWuy+ob6+8KtQQcyqohA7EAR0FHQQ0jPK9sEaysCrW9IwSz4NEx7MxE iy0BSBAOouAfkJQuiJO4OFq4eJreokyKm5oVe60cUByX4zRJiGy6s7qWi znTop4t2IKN0/5Tw7vb3uiLzt0Zop6XUlBBBMquqPda+pzIkhb0h0ajOO 4O8lAt1JZbDrYbyKQp41rfWtU+rGOBDUT+7aSfx41seohmwwCRYCACcxJ cgg7bfQl1yz2aY+VkcBPeHlRG4oZoxm287NQ1WvgVXDcXm8WZa/32bA47 w==; X-CSE-ConnectionGUID: wTUYwhAyTyKOYgHIsM47/g== X-CSE-MsgGUID: E1OkIF4LQfyiRhx2DYWXmw== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052342" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052342" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:10 -0800 X-CSE-ConnectionGUID: AVPa3lWfTT+pELrnkFYCLQ== X-CSE-MsgGUID: xn8HQq3DTHiXgeChPBoH4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762619" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:07 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 08/23] drm/i915/vrr: Remove condition flipline > vmin for LNL Date: Mon, 11 Nov 2024 14:42:06 +0530 Message-ID: <20241111091221.2992818-9-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For LNL+ the condition that flipline > vmin is no more required. Only for platforms before LNL, set the vmin - 1 to have flipline > vmin. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 83b11f3d5eb5..0c0e78622073 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -210,12 +210,18 @@ int intel_vrr_compute_vmax(struct intel_connector *connector, static void intel_vrr_prepare_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax) { + struct intel_display *display = to_intel_display(crtc_state); + /* * flipline determines the min vblank length the hardware will - * generate, and flipline>=vmin+1, hence we reduce vmin by one + * generate. For pre LNL flipline>=vmin+1, hence we reduce vmin by one * to make sure we can get the actual min vblank length. + * For LNL+ there is no such restrictions. */ - crtc_state->vrr.vmin = vmin - 1; + if (DISPLAY_VER(display) >= 20) + crtc_state->vrr.vmin = vmin; + else + crtc_state->vrr.vmin = vmin - 1; crtc_state->vrr.vmax = vmax; crtc_state->vrr.flipline = crtc_state->vrr.vmin + 1; } From patchwork Mon Nov 11 09:12:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D24F6D2E9CA for ; Mon, 11 Nov 2024 09:10:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7742E10E458; Mon, 11 Nov 2024 09:10:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="W3iUIQh+"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id A8EBB10E455; Mon, 11 Nov 2024 09:10:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316212; x=1762852212; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zncuaAMmtH+9OuWwILGNDw1WtqbblCggUX1AX498fDQ=; b=W3iUIQh+h9e/P6vWH2pUjawahrdAF388tE6J2asZ6q/Z5DFevxYKMsUH GkuBc/SVKbOvfAzx0YIEh0APcQTm6msl7/TaFf08QRT/TM325RtNkcWe3 a4oGk3nGz8wcePMS/ONdBVSX0HqLbB0LdNzPma8akD0jlqDxjWj3PUn14 9YjmzYTG1jRIP9jcd3nBB0b31jiVTgw0heUlwxos71s53SYpaGU/2hlI5 Tu7XDM2gMJL9toQV8fNqVxTOxLcrEABUcQfOcRLqCb49iDmtETQj48FqP 8eXH4LSUoxoRRO2o6fmfJpQGvfQtP9a/Qxsm0jP7wHq41Aq04NLajBllI w==; X-CSE-ConnectionGUID: syokIN+9Sl2R4jeFB2MDHA== X-CSE-MsgGUID: 2rs/F50zRcSWb7cFjg4aGQ== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052347" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052347" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:12 -0800 X-CSE-ConnectionGUID: tE7esOzOTGW2ygFMaE1taw== X-CSE-MsgGUID: fBTYG6IqSWWd98xbhi3SLQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762632" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:09 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 09/23] drm/i915/vrr: Compute vrr vsync if platforms support it Date: Mon, 11 Nov 2024 14:42:07 +0530 Message-ID: <20241111091221.2992818-10-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Previously, TRANS_VRR_VSYNC was exclusively used for panels with adaptive-sync SDP support in VRR scenarios. However, to drive fixed refresh rates using the VRR Timing generator, we now need to program TRANS_VRR_VSYNC regardless of adaptive sync SDP support. Therefore, let's remove the adaptive sync SDP check and program TRANS_VRR_VSYNC for platforms that support the register. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 0c0e78622073..5a7a4dbf699c 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -278,7 +278,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, else intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); - if (intel_dp->as_sdp_supported && crtc_state->vrr.tg_enable) { + if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = (crtc_state->hw.adjusted_mode.crtc_vtotal - crtc_state->hw.adjusted_mode.vsync_start); From patchwork Mon Nov 11 09:12:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81909D2E9C9 for ; Mon, 11 Nov 2024 09:10:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E7D110E456; Mon, 11 Nov 2024 09:10:15 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IAifuo9S"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id B220610E451; Mon, 11 Nov 2024 09:10:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316214; x=1762852214; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iwkhJw2+1NQ4sG6A6bgymwWEGGxCIJcogydoXc840Y8=; b=IAifuo9SY/rWmrYjCXB+yd6DV7qfA8wFEr3bjy6VWj96/yxGYOEkuZ4r q/lzQtgxEPW9YR3sy06NcN42S18grBSK3jOQmkzAm3/Eu6b9d/VgFT9BN pQP4Cf65JHggauxF9a6TBmPiKQl/U8d9vXaGBdeEABUM9+Tu46FmqrpFE 6PY5naLUSvXocutiNrl5G86HySSTqQpFk9rTWI0bKi73WkvhbddoNu5mm 7JJDRtNwff5ULVgbwmm5D+t2ytwhZ1dcMPnblOBJMEn6cgq1R+WFuUE8B eV7rIpzvrjOPsjPi2OTJR1IU2XWLVdSd6QT9XvglV+2mrJh9AB0YTH3es A==; X-CSE-ConnectionGUID: yoesAN7VTEK4kEt51MXsFw== X-CSE-MsgGUID: hJvsj57LRlSF7wDoroEi4Q== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052353" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052353" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:14 -0800 X-CSE-ConnectionGUID: lidx0qhDQNiE/L7TmVBMlA== X-CSE-MsgGUID: b5Wo3yZvTm2yJhWeODmXNQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762639" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:11 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 10/23] drm/i915/dp: Avoid vrr compute config for HDMI sink Date: Mon, 11 Nov 2024 14:42:08 +0530 Message-ID: <20241111091221.2992818-11-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently we do not support VRR with HDMI so skip vrr compute config step for DP with HDMI sink. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index fec720bcd296..2db631ccf8ac 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3178,7 +3178,12 @@ intel_dp_compute_config(struct intel_encoder *encoder, if (!HAS_DDI(dev_priv)) g4x_dp_set_clock(encoder, pipe_config); - intel_vrr_compute_config(pipe_config, conn_state); + /* + * VRR via PCON is currently unsupported. + * TODO: Add support for VRR for DP HDMI2.1 PCON. + */ + if (!intel_dp_has_hdmi_sink(intel_dp)) + intel_vrr_compute_config(pipe_config, conn_state); intel_dp_compute_as_sdp(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config, conn_state); intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state); From patchwork Mon Nov 11 09:12:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1CC42D2E9C9 for ; Mon, 11 Nov 2024 09:10:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B729A10E45D; Mon, 11 Nov 2024 09:10:17 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mxU1reL3"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id C427310E45A; Mon, 11 Nov 2024 09:10:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316216; x=1762852216; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1rFZEppnKfZwsmUcLDNvWMPv8NBoLoHiPCd+OiZpueU=; b=mxU1reL3rVUjx8XhVu9z64DUfB9eV65NUKB5ywIxKJKJeTUhzdP8JpuI W/uIGVFFxKL82O3EAo65dMYff2ZLvEe44W3hoodoStG7CrYhuOOUTORiM QwFgvVeR0771l1Tw8uUVhfIOTPdY2p84XIQLl1NXTYO/TKBiVx9jUFSrm icYHN4ihUZxjj+s9wso/RRQmC+MPGSr/M90gIDmAlaygJp4/Pft35y1lp E9BiwXqlHndte9XOCu3Oay0nUOHbAX0JqRkT/1VKel0AXXecFjOnLQNRG Ua2v2w1FSOoqxH7jfBzc8Ur5VCoxZnwyjl9EyBNmSdT2xlGF0lyChGlth g==; X-CSE-ConnectionGUID: ms8xMBquQm6XLIYaVNoa0w== X-CSE-MsgGUID: 8XumhUNkTqewb8fnjkWylA== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052365" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052365" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:16 -0800 X-CSE-ConnectionGUID: scC2/Wh8RcWwtmey6Babng== X-CSE-MsgGUID: mM0xa8rqSCWIihD7JKcPJw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762648" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:14 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 11/23] drm/i915/dp: fix the Adaptive sync Operation mode for SDP Date: Mon, 11 Nov 2024 14:42:09 +0530 Message-ID: <20241111091221.2992818-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently we support Adaptive sync operation mode with dynamic frame rate, but instead the operation mode with fixed rate is set. This was initially set correctly in the earlier version of changes but later got changed, while defining a macro for the same. Fixes: a5bd5991cb8a ("drm/i915/display: Compute AS SDP parameters") Cc: Mitul Golani Cc: Ankit Nautiyal Cc: Jani Nikula Reviewed-by: Mitul Golani Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2db631ccf8ac..73fe2e8dd1f3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2804,7 +2804,6 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC); - /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */ as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; as_sdp->length = 0x9; as_sdp->duration_incr_ms = 0; @@ -2815,7 +2814,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); as_sdp->target_rr_divider = true; } else { - as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; + as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; as_sdp->vtotal = adjusted_mode->vtotal; as_sdp->target_rr = 0; } From patchwork Mon Nov 11 09:12:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A24FD2E9CA for ; Mon, 11 Nov 2024 09:10:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C5F6F10E454; Mon, 11 Nov 2024 09:10:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="GLAGUV6t"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id D7D4010E454; Mon, 11 Nov 2024 09:10:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316218; x=1762852218; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7fHdmHLYHB6kD0ak4tocGkICf9NGTLGYbHDXg5PDE2Q=; b=GLAGUV6tm6i7ahsvEhyl2nTqXZ+m9mCqXDC0YcJeEjlBPh4zTY4UMG76 kWfrPDZ7FJU8dQCmMpsKfAXE+HRbb9VyHgY9rfd3YTlD5eEbDA8rTIauz LwjDC5AY6oeh7TZQsbGyWojFNcda9YNFdCB8NkUugYj+KUcVXLmJI2IOv B1+tieadXNxRJnyBuci++OX8zJS8KcLY2JB428DsrxEVfyuM0NCPX6b3V lHsesKZnU5MTkmnVcso03Cz5YhRrCc1iqRIDMyuRyxPe0LzBaDbTTZfbf u967KR5NwXzcnCy5nPhm6p4H8JEl4ba+RaBvGvRVsQUIS8Es99VKDgZFv Q==; X-CSE-ConnectionGUID: El6wHSVzT2aPK1L2z2gxfw== X-CSE-MsgGUID: +ecQ8JAXRXep3kzE7ETl9g== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052382" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052382" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:18 -0800 X-CSE-ConnectionGUID: eMKHgvAgSMO+tox4c8Refg== X-CSE-MsgGUID: E1WcqKvJTS+iW1IRxiUQmQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762658" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:16 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 12/23] drm/i915/hdmi: Use VRR Timing generator for HDMI Date: Mon, 11 Nov 2024 14:42:10 +0530 Message-ID: <20241111091221.2992818-13-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add support for using VRR Timing generator for HDMI panels. Signed-off-by: Ankit Nautiyal Reviewed-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index c6ce6bb88d7c..8582f23a514f 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -64,6 +64,7 @@ #include "intel_panel.h" #include "intel_pfit.h" #include "intel_snps_phy.h" +#include "intel_vrr.h" static void assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi) @@ -2399,6 +2400,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder, } } + intel_vrr_compute_config(pipe_config, conn_state); + intel_hdmi_compute_gcp_infoframe(encoder, pipe_config, conn_state); From patchwork Mon Nov 11 09:12:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76AF8D2E9C7 for ; Mon, 11 Nov 2024 09:10:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D0F710E447; Mon, 11 Nov 2024 09:10:21 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="d7TAO6wj"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id EB0F610E45B; Mon, 11 Nov 2024 09:10:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316220; x=1762852220; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SnndnHidnWah7kAjnEtb7qQbeDRdeOWHJDDxYPUFrhQ=; b=d7TAO6wja41AxksvrrG1n4zxnd49udnRy4rRufc/qDWFXwKJKTmEaTH4 o7I6kd1yq+o63DgaasCym3VI+cHW3SwK4hsl6b7xW/Mh3+uiqJ3GoNP9a q9pliHo7Y55YhyMyuDH+haRx6KEztxx1epO6QFv6kDyN4FvASPughw0Me NxrOg5vMdOojw4edg+PKoh5Kfc0qiqrMaokW7DsaNFLYw7/8/sjkyxkoe Ac+v1pwHdFbwhtSDLuWNdcdZEEObZ/rXnuFEyUwzItMD9X9DmZUOV6A3P hyDNkM5sWdbwqG9+I/kL7rxUH3W8c9wrVjIJhaYWX+HXj/W7MZ6sq/Czy Q==; X-CSE-ConnectionGUID: 4GJ0cphFRRSbot1on50beQ== X-CSE-MsgGUID: WonqqHW+Qbm+7o3sexV61g== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052388" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052388" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:20 -0800 X-CSE-ConnectionGUID: VaaPcg7zTLqK8czjIoZp9w== X-CSE-MsgGUID: O3Y5cy4sSQ6zFjqVnnqi+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762667" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:18 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 13/23] drm/i915/vrr: Handle joiner with vrr Date: Mon, 11 Nov 2024 14:42:11 +0530 Message-ID: <20241111091221.2992818-14-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Do not program transcoder registers for VRR for the secondary pipe of the joiner. Remove check to skip VRR for joiner case. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5a7a4dbf699c..ecd4b06cb273 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -247,13 +247,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; int vmin, vmax; - /* - * FIXME all joined pipes share the same transcoder. - * Need to account for that during VRR toggle/push/etc. - */ - if (crtc_state->joiner_pipes) - return; - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) return; @@ -324,6 +317,9 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + /* * This bit seems to have two meanings depending on the platform: * TGL: generate VRR "safe window" for DSB vblank waits @@ -365,6 +361,9 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + if (!crtc_state->vrr.tg_enable) return; @@ -388,6 +387,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + if (!crtc_state->vrr.tg_enable) return; @@ -415,6 +417,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) struct intel_display *display = to_intel_display(old_crtc_state); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(old_crtc_state)) + return; + if (!old_crtc_state->vrr.tg_enable) return; From patchwork Mon Nov 11 09:12:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFF2FD2E9CA for ; Mon, 11 Nov 2024 09:10:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5EA9210E44F; Mon, 11 Nov 2024 09:10:23 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="CabcrD8+"; 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d="scan'208";a="35052394" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:22 -0800 X-CSE-ConnectionGUID: lBiyEbewQjyTbu2XosawAQ== X-CSE-MsgGUID: m8PVNIY5Qy+V2K5qywtiVg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762674" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:20 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 14/23] drm/i915/display: Handle transcoder timings for joiner Date: Mon, 11 Nov 2024 14:42:12 +0530 Message-ID: <20241111091221.2992818-15-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make sure the timing changes happen in the correct spot in the sequence for both primary and secondary pipes. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4b39692f57f6..6d7f54804542 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1783,7 +1783,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; struct intel_crtc *pipe_crtc; int i; @@ -1819,8 +1818,14 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, bdw_set_pipe_misc(NULL, pipe_crtc_state); } - if (!transcoder_is_dsi(cpu_transcoder)) - hsw_configure_cpu_transcoder(new_crtc_state); + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) { + const struct intel_crtc_state *pipe_crtc_state = + intel_atomic_get_new_crtc_state(state, pipe_crtc); + enum transcoder cpu_transcoder = pipe_crtc_state->cpu_transcoder; + + if (!transcoder_is_dsi(cpu_transcoder)) + hsw_configure_cpu_transcoder(pipe_crtc_state); + } for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) { const struct intel_crtc_state *pipe_crtc_state = From patchwork Mon Nov 11 09:12:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EE165D2E9C3 for ; Mon, 11 Nov 2024 09:10:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9370910E460; Mon, 11 Nov 2024 09:10:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VN2EfONH"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 340A210E45E; Mon, 11 Nov 2024 09:10:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316224; x=1762852224; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tviS/J3i8++XoV9oNccIcIGiRl0QxbJe/GxpWAfao/g=; b=VN2EfONHgPHCY4/SqiGOnARUvZENVErGhdGUEvMyhoJjNDnUvCq9+GDt /+CKobZyUbqdzj7by7ltcGmbB8tnKrvNtuLurUeuziZc4xVAnPZFO+9Dt MLlCz4NslEq742Y7UDOOK3FjKofSMMfU6J99+YlvRt0fhL8INOusJFUj/ vXMxy2xkPxC42BLtkFNmk0yNzhnHMxBCFSbncLcPf6iXGX/HREC8Kxp5B lLlvgs0aQXwvctsxZDVgcnsRgy7pAZK8GBtjlxgcEour+8wSIfePWat1L RhZ/BOoZSooAFfsFwS0TLTizAgaQWmqxm+hOJ0SzQLb1psTlF47kKxtG7 Q==; X-CSE-ConnectionGUID: lvux8C7pRECDA+wu7zZB7w== X-CSE-MsgGUID: RwMba8YYQBGm7EbfrcaP7A== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052396" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052396" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:24 -0800 X-CSE-ConnectionGUID: YemLm8YnRmOYb7aFU6rYNA== X-CSE-MsgGUID: IBbnaZrMRbWnP+6C93VNfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762679" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:22 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 15/23] drm/i915/vrr: Introduce VRR mode Fixed RR Date: Mon, 11 Nov 2024 14:42:13 +0530 Message-ID: <20241111091221.2992818-16-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR timing generator can be used even with fixed refresh rate. With this the legacy timing generator can be phased out and VRR timing generator can be used for all cases, whether panels support VRR or not. Add the enum value for representing the VRR timing generator with fixed refresh rate mode. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display_types.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 2ff75d70ccda..f2fd2ddb4472 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -917,6 +917,7 @@ enum intel_vrrtg_mode { INTEL_VRRTG_MODE_NONE, INTEL_VRRTG_MODE_VRR, INTEL_VRRTG_MODE_CMRR, + INTEL_VRRTG_MODE_FIXED_RR, }; struct intel_crtc_state { From patchwork Mon Nov 11 09:12:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B08DED2E9C9 for ; Mon, 11 Nov 2024 09:10:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A6E210E45B; Mon, 11 Nov 2024 09:10:27 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YA+boHvl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 431D510E462; Mon, 11 Nov 2024 09:10:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316226; x=1762852226; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TmoVsO63wRvIu/AFQ1Sx646xgQjFuN3VmNP5zMQaEPw=; b=YA+boHvlUic4ch0w8qeN6HzIzScoGxk3PAnMSPl1iXAP0ZZYUcBFCKdP AQh+Hcbkx/atpMFkMQRqoKIKZLiLfHz4pK2jhsavEuL7AAhrSvoAaarW0 bAQlQVfPe4LLwL+B+2lXeg0v6HOgd5Vtr5rNA2aXw365A+1LlrfgL8i+5 5MNP8FiPSu5oYbu+0VTKBoe3l80A9jT6YQ+j/i/XxYanYmy3ZHNKLW+2b GjkVpeaFMoOIrKpGUgY4XH9nUpX6fqT29//JPQhWGD01zqr6XpUO/dOfE 2QsqnUC3OWhxhf+i9/KL+2IXUfM3lmgajT9R71f76kEkZDX4JZpOigeUa w==; X-CSE-ConnectionGUID: 3Va9EAePQhiRYJx0qp0gow== X-CSE-MsgGUID: 1uASj2LYQ6SNa8DPaQDW1w== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052402" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052402" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:26 -0800 X-CSE-ConnectionGUID: /tjHR8GUQSGrapavFUBH9Q== X-CSE-MsgGUID: 5b55oxzFRHyKXWU/aKozWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762687" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:24 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 16/23] drm/i915/vrr: Fill fixed refresh mode in vrr_get_compute_config Date: Mon, 11 Nov 2024 14:42:14 +0530 Message-ID: <20241111091221.2992818-17-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Read the vrr fixed refresh rate mode. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index ecd4b06cb273..bc3b78a6bf8b 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -473,6 +473,10 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_VMAX(display, cpu_transcoder)) + 1; crtc_state->vrr.vmin = intel_de_read(display, TRANS_VRR_VMIN(display, cpu_transcoder)) + 1; + if (crtc_state->vrr.mode != INTEL_VRRTG_MODE_CMRR && + crtc_state->vrr.vmax == crtc_state->vrr.flipline && + crtc_state->vrr.vmin == crtc_state->vrr.flipline) + crtc_state->vrr.mode = INTEL_VRRTG_MODE_FIXED_RR; } if (crtc_state->vrr.tg_enable) { From patchwork Mon Nov 11 09:12:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10C45D2E9C8 for ; Mon, 11 Nov 2024 09:10:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4BCE10E45E; Mon, 11 Nov 2024 09:10:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="iZmzK3Uj"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6B2C910E461; Mon, 11 Nov 2024 09:10:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316229; x=1762852229; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nGR9PtcYtkl1OjtHjJdyspkx5uMCeleAylDt1yUiB6k=; b=iZmzK3UjO7NLz4QKXEB9cT6QtVYqIwqqggkD0/yeoHqx7MgxD40slGqL VzhbkUQtEa/aLiVBDadlxwVYf+zaC6jn4MHpVaTjCLsynpo606VtHJmgC DaDmitXtl7ma747pE+PpfvNQWiYm/UbRnhdhL+Dx6CxOa1BSXO0SaTlfP jc0BDHY7nTTjEO4NF/oYXRbkg89QvHKImgpAVVgHmesLJbfXZK88xJ/R+ r7TryfRR5vCq8uxLUaNUtbtlBaIiNNuc7kDFHV25DqtDVm5AlQHo39+4Q XdA/h3nfgBRkXm/k16zO5rlcdb5IXeuZVwXl7Dj0LCXJYbPb76NGeGePC Q==; X-CSE-ConnectionGUID: 3HpufBaOTGW2/gOZfhcdbQ== X-CSE-MsgGUID: 7yqJT2LHTsG0jj0WgxQraQ== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052410" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052410" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:28 -0800 X-CSE-ConnectionGUID: 2q7tehyFTkCkzjVhMBJdUg== X-CSE-MsgGUID: cZT+PSuaS22RKHHIE4euzA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762695" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:26 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 17/23] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode Date: Mon, 11 Nov 2024 14:42:15 +0530 Message-ID: <20241111091221.2992818-18-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" MSA Ignore Timing PAR enable is set in the DP sink when we enable variable refresh rate. When using VRR timing generator for fixed refresh rate we do not want to ignore the mode timings, as the refresh rate is still fixed. Modify the checks to enable MSA Ignore Timing PAR only when not in fixed_rr mode. v2: Initialize enable_msa_timing_par_ignore to false. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 3c0640efde21..33ecd2a13016 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2230,7 +2230,7 @@ static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel { struct intel_display *display = to_intel_display(intel_dp); - if (!crtc_state->vrr.tg_enable) + if (!crtc_state->vrr.tg_enable || crtc_state->vrr.mode == INTEL_VRRTG_MODE_FIXED_RR) return; if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL, diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 397cc4ebae52..193c906f36a3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -726,8 +726,14 @@ void intel_dp_link_training_set_mode(struct intel_dp *intel_dp, int link_rate, b static void intel_dp_update_downspread_ctrl(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { + bool enable_msa_timing_par_ignore = false; + + /* Enable MSA TIMING PAR IGNORE only in non fixed_rr mode */ + if (crtc_state->vrr.flipline && crtc_state->vrr.mode != INTEL_VRRTG_MODE_FIXED_RR) + enable_msa_timing_par_ignore = true; + intel_dp_link_training_set_mode(intel_dp, - crtc_state->port_clock, crtc_state->vrr.flipline); + crtc_state->port_clock, enable_msa_timing_par_ignore); } void intel_dp_link_training_set_bw(struct intel_dp *intel_dp, From patchwork Mon Nov 11 09:12:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20095D2E9C3 for ; Mon, 11 Nov 2024 09:10:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C4D6910E45F; Mon, 11 Nov 2024 09:10:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="k/I3Fjbg"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 702F910E461; Mon, 11 Nov 2024 09:10:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316231; x=1762852231; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B9L9SyYG8kbeEP1Q1NwWHGu10sbF2NwyVC4f8Pica+Y=; b=k/I3FjbgnPjIfOUgD5jsTOIF/TgWeKX3wHdz/I4If3uUMIbVIC3MLvAN N0L54Sllg95dmlEimtLcVB+3b6Tc5Vll20EzwSc+NAxN+PRses348kR2u UiJhnPmkIjKcrcrcbvZjb0dF5jOCo6upAf+r6uSr4Oess3MUDm8k0nVNm F35JkH6L9Z/LzHXMs3RBILSxbXu+zHy8r8RFpF3uQJy1IMuzJTaGi+RJr LX8BCMUs6Pdckoat3XZpVZ+ibQtvu69oYRpMFRsPMvLyGgMJMgJxnaNF1 CYkt2Eyf5kVgz7x3iwvBb+MdQPI5xfJj2p3eOiiKwrWQLjDEOGGuKO2Xc w==; X-CSE-ConnectionGUID: 2aNGibu9SVuGmGIPGviTBA== X-CSE-MsgGUID: b3Odde7lT3ylcNPC8QrU2Q== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052417" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052417" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:30 -0800 X-CSE-ConnectionGUID: WZ1c2BcnStWnunPIlz0QsQ== X-CSE-MsgGUID: WZCuMVD7SUa7Vti8dolVEw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762705" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:28 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 18/23] drm/i915/dp: Set FAVT mode in DP SDP with fixed refresh rate Date: Mon, 11 Nov 2024 14:42:16 +0530 Message-ID: <20241111091221.2992818-19-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" While running with fixed refresh rate and VRR timing generator set FAVT mode (Fixed Vtotal) in DP Adaptive Sync SDP to intimate the panel about Fixed refresh rate. Signed-off-by: Ankit Nautiyal Reviewed-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 73fe2e8dd1f3..7e7cc208cbaa 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2814,7 +2814,10 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); as_sdp->target_rr_divider = true; } else { - as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_FIXED_RR) + as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; + else + as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; as_sdp->vtotal = adjusted_mode->vtotal; as_sdp->target_rr = 0; } From patchwork Mon Nov 11 09:12:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6A5ADD2E9CA for ; Mon, 11 Nov 2024 09:10:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0444410E461; Mon, 11 Nov 2024 09:10:34 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="gBTVsYwT"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B30810E461; Mon, 11 Nov 2024 09:10:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316233; x=1762852233; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8W9K4QP99GbFnCuGfZd9MKtMQsx0zC1eROPJoFPVOYo=; b=gBTVsYwTc2Kc0JbMAzqRw8yv9b8VPbU0jPdFSeQu+h7DXADkqhJER9Xd 4rKhoFAamdIqNSz4K1yTN+lxzx1RCYcUzf9KAtfmVhmg6g6m5nL5ItCjV 5q3qGMmIdnm2xsVv0OsDTQRl78VnnKpCPXMbw6CxeOecB8Af7H2QOCykB igOH3h+GvoeFrwiGenOusp7+efb28xoodMeGoWtFDUFFqwcgrXem4EI6D ndc5uKAtDPaPbyyi2Yrs13CtMYfcHfYLuxmLNKz1f+ce3+ox8PblHgs4y w7o957DbBkRYX+eurIzUI77d6+NSN/pH2fEg6GhM8MwqvJAwTxC650GgK g==; X-CSE-ConnectionGUID: DAyHviPxReGa7Ahjkujk9A== X-CSE-MsgGUID: c+7MHFEBSA6gnKgxFUTvWA== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052420" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052420" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:33 -0800 X-CSE-ConnectionGUID: 61VeJTLaSle7t6YTpORGFw== X-CSE-MsgGUID: Ht0+mtScTgWUNfMVgrNQ7A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762713" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:30 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 19/23] drm/i915/vrr: Avoid sending PUSH when VRR TG is used with Fixed refresh rate Date: Mon, 11 Nov 2024 14:42:17 +0530 Message-ID: <20241111091221.2992818-20-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As per Bspec:68925: Push enable must be set if not configuring for a fixed refresh rate (i.e Vmin == Flipline == Vmax is not true). v2: Use helper intel_vrr_use_push(). (Ville) Signed-off-by: Ankit Nautiyal Reviewed-by: Mitul Golani (v1) --- drivers/gpu/drm/i915/display/intel_vrr.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index bc3b78a6bf8b..c27886ace0a9 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -356,6 +356,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) crtc_state->vrr.flipline - 1); } +static bool intel_vrr_use_push(const struct intel_crtc_state *crtc_state) +{ + return crtc_state->vrr.tg_enable && + crtc_state->vrr.mode != INTEL_VRRTG_MODE_FIXED_RR; +} + void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); @@ -364,7 +370,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) if (intel_crtc_is_joiner_secondary(crtc_state)) return; - if (!crtc_state->vrr.tg_enable) + if (!intel_vrr_use_push(crtc_state)) return; intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), @@ -376,7 +382,7 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.tg_enable) + if (!intel_vrr_use_push(crtc_state)) return false; return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; @@ -393,8 +399,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) if (!crtc_state->vrr.tg_enable) return; - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), - TRANS_PUSH_EN); + if (intel_vrr_use_push(crtc_state)) + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), + TRANS_PUSH_EN); if (HAS_AS_SDP(display)) intel_de_write(display, From patchwork Mon Nov 11 09:12:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 854BBD2E9CC for ; Mon, 11 Nov 2024 09:10:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E8AE10E462; Mon, 11 Nov 2024 09:10:35 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Baw1cRxq"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id A9F7B10E462; Mon, 11 Nov 2024 09:10:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316235; x=1762852235; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i2cgQYwCzHkJZ6li6uIrE+jvmoZmX9ru1cQv2MG7goE=; b=Baw1cRxqdSISVlQU9FolrNsq9YiooVQkK/r9Wrq/dc9tLnKZ3ObFE7V5 k9k4xiRUQli5sDt6HXIV7sVblmp64fwWBqRvPzPKDLz8Yay6IJTMkErhe 6fsfujDb/lqk/umEWXgymXKVT95fi+E5SksabZpXo55wVIIwRlPHvocIx l3MNsezMEV9nmJ/Mkj0p7kZebNzjnkJoBCfKnC9MxG7yu+DH+iPIp6SF7 bSl91ZqTiNBCMktFpYWN8kFPvE1NH8IjUJcOtKlFlV6QhzGILrlXGKYzA yU6KAvkQvMIRARualSWh1Spt0H21odyq+yquCXZb7EN7g7q5dGQ0Pl02S w==; X-CSE-ConnectionGUID: kR51x3VFT5yulIrCaWkiXA== X-CSE-MsgGUID: UDCQdpjNTvSUcqlo9KrYZA== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052429" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052429" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:35 -0800 X-CSE-ConnectionGUID: sriNzN6bQS+ywDfJ0qariw== X-CSE-MsgGUID: reHRZ0sbSHKWHVCzSFAzvQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762719" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:32 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 20/23] drm/i915/display: Disable PSR before disabling VRR Date: Mon, 11 Nov 2024 14:42:18 +0530 Message-ID: <20241111091221.2992818-21-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6d7f54804542..a62353948686 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1306,6 +1306,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1316,8 +1318,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc); From patchwork Mon Nov 11 09:12:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D178D2E9C3 for ; Mon, 11 Nov 2024 09:10:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09F1210E450; Mon, 11 Nov 2024 09:10:46 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VyjshuBH"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id C158710E468; Mon, 11 Nov 2024 09:10:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316245; x=1762852245; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=82x9Y9EKtdy8nwicUC/V3G0QgrAqKVsVokfpdEPZ1Kc=; b=VyjshuBHZ7tfXJ3tvVs7s6LDG3BXrOzIe4M1urHPlNdtw4NhV3JzqK1/ 9mcGtu7qy42otg8q0XhO5UTyBZAlGXthGWhb++095yEeRcRjzLbuiL+/L tIWR7DUHN5gnCGeQ7Xhw4huObyBv75G4DRLtQbc5OadrYL6OIMAdFKLG4 6RaRcySkfQi6euUV5C6NoRgncUyoZ5XKNZBY5byMRf1pOToNk5vNdZDEZ 4JU6qny1abKTIJ77LsYQ1+ja7mi+C433KdccPM2rGkeGUV7bxVHBhZab3 LyleadVOB/153zSsykNsonRpK5S0ilYKD8ggiStXrCK8tbEY3Fy6huOWo Q==; X-CSE-ConnectionGUID: rX+j3CwrQ82jE36rtr3b6w== X-CSE-MsgGUID: Kq9rWksWTsW1L2wVF0N+Yg== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052500" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052500" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:42 -0800 X-CSE-ConnectionGUID: aGX0mlpDQkeHVSDhT7DiwQ== X-CSE-MsgGUID: l0qL29gISSyEBho0yGAhrA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762727" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:34 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 21/23] drm/i915/psr: Allow PSR for fixed refrsh rate with VRR TG Date: Mon, 11 Nov 2024 14:42:19 +0530 Message-ID: <20241111091221.2992818-22-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" At the moment PSR/PSR2 are not supported with variable refresh rate. However it can be supported with fixed refresh rate while running with VRR timing generator. Enable PSR for fixed refresh rate when using the VRR timing generator. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_psr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index bf005daa7bb2..2b200a6fd685 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1674,8 +1674,9 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, /* * Currently PSR/PR doesn't work reliably with VRR enabled. + * Avoid PSR/PR when not in fixed refresh rate mode. */ - if (crtc_state->vrr.tg_enable) + if (crtc_state->vrr.tg_enable && crtc_state->vrr.mode != INTEL_VRRTG_MODE_FIXED_RR) return; crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp, From patchwork Mon Nov 11 09:12:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBBE3D2E9C3 for ; Mon, 11 Nov 2024 09:10:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5ACDB10E457; Mon, 11 Nov 2024 09:10:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="irwtdXK5"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id C79A810E44E; Mon, 11 Nov 2024 09:10:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731316247; x=1762852247; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PGHC0LWeK/uoH+g8xfaPO/gb7o6hPmbj9Xjs2sP5KOA=; b=irwtdXK59QTnQ7EvoTWsL4xEWAuEOhJWoRM4fI0uVL2YTB2aK10FVoLl V8EOeuV9v6RMTEz0Enna+JFpO342Am5S+1CfFwsQ3FJYa1c9TxTr1ucBe VyC0DgX7AN5bIGpQJ1j9IRuBdh3i9RiPlg8UwShDd3Q0Bb4eN3PSa1sr3 4Z3mowZDxqktxOdz/q2USxDp7UMVarTP+U5slYHeX7TVeUq22ZzOmE7zB +jiagVbGYsXN9q+0I+F1PLjGebUyAmGEIOyhhggZh9iXmGWFBzviHs2E/ TaWqSCwYLQWoqfadCeJMWlh1o+x5mIK5QHBMxc3Evv8kSb5ohX/65GxNq w==; X-CSE-ConnectionGUID: bPZkXAL6QVCgR98ne5ltiA== X-CSE-MsgGUID: JzQPENIWSgawQ4gXQsxIpw== X-IronPort-AV: E=McAfee;i="6700,10204,11252"; a="35052504" X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="35052504" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:42 -0800 X-CSE-ConnectionGUID: yN1kEfGlR929wo6VycsMBQ== X-CSE-MsgGUID: NXkwj2eMSdayYzCBafjUXA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762740" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:38 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 22/23] drm/i915/vrr: Always use VRR timing generator for XE2LPD+ Date: Mon, 11 Nov 2024 14:42:20 +0530 Message-ID: <20241111091221.2992818-23-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently VRR timing generator is used only when VRR is enabled by userspace. From XE2LPD+, gradually move away from older timing generator and use VRR timing generator for fixed refresh rate also. In such a case, Flipline Vmin and Vmax all are set to the Vtotal of the mode, which effectively makes the VRR timing generator work in fixed refresh rate mode. The MSA Vtotal is derived from Vmax register. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 78 +++++++++++++++++++++--- 1 file changed, 70 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index c27886ace0a9..a2798a7ab9dc 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -235,9 +235,27 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, int vmin crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } -void -intel_vrr_compute_config(struct intel_crtc_state *crtc_state, - struct drm_connector_state *conn_state) +static +void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state) +{ + /* + * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to + * Vtotal value. The sink uses MSA timings for the fixed refresh rate + * mode. The HW prepares the Vtotal for the MSA from the VMAX register. + * Since the MSA Vtotal is one-based while Vmax is zero-based we need to + * take care of this while setting Vmax value. + */ + crtc_state->vrr.vmax = crtc_state->hw.adjusted_mode.vtotal - 1; + crtc_state->vrr.vmin = crtc_state->vrr.vmax; + crtc_state->vrr.flipline = crtc_state->vrr.vmax; + crtc_state->vrr.tg_enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_FIXED_RR; + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; +} + +static +void intel_vrr_compute_xe2lpd_timings(struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) { struct intel_display *display = to_intel_display(crtc_state); struct intel_connector *connector = @@ -245,13 +263,36 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct intel_dp *intel_dp = intel_attached_dp(connector); bool is_edp = intel_dp_is_edp(intel_dp); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - int vmin, vmax; + int vmin = 0, vmax = 0; - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) - return; + if (crtc_state->vrr.in_range) { + if (HAS_LRR(display)) + crtc_state->update_lrr = true; + + vmin = intel_vrr_compute_vmin(connector, adjusted_mode); + vmax = intel_vrr_compute_vmax(connector, adjusted_mode); + } + + if (vmin < vmax && crtc_state->uapi.vrr_enabled) + intel_vrr_compute_vrr_timings(crtc_state, vmin, vmax); + else if (vmin < vmax && is_cmrr_frac_required(crtc_state) && is_edp) + intel_vrr_compute_cmrr_timings(crtc_state); + else + intel_vrr_compute_fixed_rr_timings(crtc_state); +} + +static +void intel_vrr_compute_xelpd_timings(struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + struct intel_connector *connector = + to_intel_connector(conn_state->connector); + struct intel_dp *intel_dp = intel_attached_dp(connector); + bool is_edp = intel_dp_is_edp(intel_dp); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + int vmin, vmax; - crtc_state->vrr.in_range = - intel_vrr_is_in_range(connector, drm_mode_vrefresh(adjusted_mode)); if (!crtc_state->vrr.in_range) return; @@ -270,6 +311,27 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, intel_vrr_compute_cmrr_timings(crtc_state); else intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax); +} + +void +intel_vrr_compute_config(struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + struct intel_connector *connector = + to_intel_connector(conn_state->connector); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + + if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) + return; + + crtc_state->vrr.in_range = + intel_vrr_is_in_range(connector, drm_mode_vrefresh(adjusted_mode)); + + if (DISPLAY_VER(display) >= 20) + intel_vrr_compute_xe2lpd_timings(crtc_state, conn_state); + else + intel_vrr_compute_xelpd_timings(crtc_state, conn_state); if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = From patchwork Mon Nov 11 09:12:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13870453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E67EAD2E9CB for ; Mon, 11 Nov 2024 09:10:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8187510E44E; Mon, 11 Nov 2024 09:10:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ehq9sq0X"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6F2B810E44E; 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11 Nov 2024 01:10:42 -0800 X-CSE-ConnectionGUID: ATdzpGvqSZ68smfLHLiNNQ== X-CSE-MsgGUID: bbfKtXgrQfqd++2wjY6hOg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,144,1728975600"; d="scan'208";a="86762756" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 01:10:40 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 23/23] drm/i915/display: Use VRR timings for XE2LPD+ in modeset sequence Date: Mon, 11 Nov 2024 14:42:21 +0530 Message-ID: <20241111091221.2992818-24-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> References: <20241111091221.2992818-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" While enabling pipe currently we use the non vrr timings first and then enable the VRR timings later. From XE2LPD+ we will always have VRR timing generarator in use, so start the transcoder in vrr mode. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++-- drivers/gpu/drm/i915/display/intel_vblank.c | 8 +++++--- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a62353948686..6d12a9b620be 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7142,8 +7142,16 @@ static void intel_enable_crtc(struct intel_atomic_state *state, const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); - /* VRR will be enable later, if required */ - intel_crtc_update_active_timings(pipe_crtc_state, false); + /* + * For XE2LPD+ we are always using VRR TG. + * For previous platforms VRR will be enable later, if required + */ + if (DISPLAY_VER(dev_priv) >= 20) + intel_crtc_update_active_timings(pipe_crtc_state, + pipe_crtc_state->vrr.tg_enable); + else + intel_crtc_update_active_timings(pipe_crtc_state, false); + } dev_priv->display.funcs.display->crtc_enable(state, crtc); diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c index a95fb3349eba..ca4a6add6926 100644 --- a/drivers/gpu/drm/i915/display/intel_vblank.c +++ b/drivers/gpu/drm/i915/display/intel_vblank.c @@ -626,9 +626,11 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state, adjusted_mode = &crtc_state->hw.adjusted_mode; if (crtc->mode_flags & I915_MODE_FLAG_VRR) { - /* timing changes should happen with VRR disabled */ - drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) || - new_crtc_state->update_m_n || new_crtc_state->update_lrr); + /* Prior to XE2LPD+, timing changes should happen with VRR disabled */ + if (DISPLAY_VER(display) < 20) { + drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) || + new_crtc_state->update_m_n || new_crtc_state->update_lrr); + } if (intel_vrr_is_push_sent(crtc_state)) evade->vblank_start = intel_vrr_vmin_vblank_start(crtc_state);