From patchwork Tue Nov 12 17:01:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872570 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D15E3D42BB3 for ; Tue, 12 Nov 2024 17:03:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuHw-0003K0-Hk; Tue, 12 Nov 2024 12:02:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHV-00039G-KY; Tue, 12 Nov 2024 12:02:21 -0500 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tAuHT-0001SD-Lm; Tue, 12 Nov 2024 12:02:21 -0500 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-71e592d7f6eso4436772b3a.3; Tue, 12 Nov 2024 09:02:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1731430936; x=1732035736; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:from:to:cc:subject:date :message-id:reply-to; bh=/hZzxUmUzbT/8mTdrh3yFpC6EpDXg/pxic3wE6lH+qI=; b=e7VcE7Tgt18IwbqKKo+NTeICTeHe72/34yB5WVnnpN2imN7wmUQ1le1rz3RZpa77Dq hnlUzXJr4YCT7ZxQZDQv+gBIqMdkWJaZLwlyb0CyMU0qK2nOhLEV9wGR93FMPz53eIOc 2AauGn11tAfSEj5LOxhN3NmJtgJPxtO5Kv1ObajAvdLWynLwDmp4srhAATA/RaBNalRK +JRytB67g/uv0YROtae45b7Cdy0EOyvkdrjo9eL6Jh5qbeWbquIXz0+6BNniy/3cmGYT xK5RPM6HLkhvUvnUtFEi0lbsd4hkvoR0xSk8krPBPcjzgVY1MoEvjdDzNcl+JqQ/wzqo f34Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731430936; x=1732035736; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=/hZzxUmUzbT/8mTdrh3yFpC6EpDXg/pxic3wE6lH+qI=; b=X9uzIim9MoQwzzBTCjFITqcqDomMcf7VKDeaui8QfwGzPBncNNxeXWWCh9vyYwsy78 fDNfguHlltTEXsU4cU8qbX4aWE+GkyuTmwLOMWMx6ImjK1M6fXzX5VOgMnRG31gt66x2 /4n+DXEfbfw6YJg4f9FpTyEkr31FngGx2w7A0mgSwz/WxwZcT2JUCwxo0mabUdk9PFSO lZJSUS73zw/3yh1pTHV7c2Mk1rAPqeQcB2mrNt8jGsNFIrFT/wcr2lILYD8H7J4z67eQ QXN/cOriNexJdZTwcGrJ6bQNPoF9o3/MCNU+QMmEbG4vEXWsL/PBYvHD+FJG08i6xvtS a/UQ== X-Forwarded-Encrypted: i=1; AJvYcCUCbDJn5+ywiGYr8TUR5IqblrUZWmgKzesEyZ8qXo4VURcyW4hsyavHznle5ec8ZWKjjZplwHvdCQ==@nongnu.org X-Gm-Message-State: AOJu0YwVTlDmgJBVebyIVYuHV2gh0mFI1voMBJCcou2RjVSThsZrYzKu Jyug9uMvtUU+wIrNm4UwtzE7/1TjjMai1QlRbYwpiIzDisp+b/DHQjMEhg== X-Google-Smtp-Source: AGHT+IHmhWPRSXUhXDwuPksFamVQySmGIr64c/IPcoWyl5j8xgkRJnFXgRWleFpjNt/eBBIw43eVuw== X-Received: by 2002:a05:6a00:c89:b0:71e:6eb:786e with SMTP id d2e1a72fcca58-724132cd14amr22086885b3a.13.1731430936539; Tue, 12 Nov 2024 09:02:16 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7f41f5bee9asm10768956a12.28.2024.11.12.09.02.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:15 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [RESEND PATCH 01/10] usb/uhci: checkpatch cleanup Date: Tue, 12 Nov 2024 09:01:43 -0800 Message-ID: <20241112170152.217664-2-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=groeck7@gmail.com; helo=mail-pf1-x430.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Fix reported checkpatch issues to prepare for next patches in the series. No functional change. Reviewed-by: Cédric Le Goater Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 - Added Reviewed-by: tag hw/usb/hcd-uhci.c | 90 +++++++++++++++++++++++++++++------------------ 1 file changed, 56 insertions(+), 34 deletions(-) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 3d0339af7b..50d488d6fb 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -67,7 +67,7 @@ struct UHCIPCIDeviceClass { UHCIInfo info; }; -/* +/* * Pending async transaction. * 'packet' must be the first field because completion * handler does "(UHCIAsync *) pkt" cast. @@ -220,8 +220,9 @@ static void uhci_async_cancel(UHCIAsync *async) uhci_async_unlink(async); trace_usb_uhci_packet_cancel(async->queue->token, async->td_addr, async->done); - if (!async->done) + if (!async->done) { usb_cancel_packet(&async->packet); + } uhci_async_free(async); } @@ -322,7 +323,7 @@ static void uhci_reset(DeviceState *dev) s->fl_base_addr = 0; s->sof_timing = 64; - for(i = 0; i < UHCI_PORTS; i++) { + for (i = 0; i < UHCI_PORTS; i++) { port = &s->ports[i]; port->ctrl = 0x0080; if (port->port.dev && port->port.dev->attached) { @@ -387,7 +388,7 @@ static void uhci_port_write(void *opaque, hwaddr addr, trace_usb_uhci_mmio_writew(addr, val); - switch(addr) { + switch (addr) { case 0x00: if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) { /* start frame processing */ @@ -404,7 +405,7 @@ static void uhci_port_write(void *opaque, hwaddr addr, int i; /* send reset on the USB bus */ - for(i = 0; i < UHCI_PORTS; i++) { + for (i = 0; i < UHCI_PORTS; i++) { port = &s->ports[i]; usb_device_reset(port->port.dev); } @@ -425,10 +426,13 @@ static void uhci_port_write(void *opaque, hwaddr addr, break; case 0x02: s->status &= ~val; - /* XXX: the chip spec is not coherent, so we add a hidden - register to distinguish between IOC and SPD */ - if (val & UHCI_STS_USBINT) + /* + * XXX: the chip spec is not coherent, so we add a hidden + * register to distinguish between IOC and SPD + */ + if (val & UHCI_STS_USBINT) { s->status2 = 0; + } uhci_update_irq(s); break; case 0x04: @@ -436,8 +440,9 @@ static void uhci_port_write(void *opaque, hwaddr addr, uhci_update_irq(s); break; case 0x06: - if (s->status & UHCI_STS_HCHALTED) + if (s->status & UHCI_STS_HCHALTED) { s->frnum = val & 0x7ff; + } break; case 0x08: s->fl_base_addr &= 0xffff0000; @@ -464,8 +469,8 @@ static void uhci_port_write(void *opaque, hwaddr addr, dev = port->port.dev; if (dev && dev->attached) { /* port reset */ - if ( (val & UHCI_PORT_RESET) && - !(port->ctrl & UHCI_PORT_RESET) ) { + if ((val & UHCI_PORT_RESET) && + !(port->ctrl & UHCI_PORT_RESET)) { usb_device_reset(dev); } } @@ -487,7 +492,7 @@ static uint64_t uhci_port_read(void *opaque, hwaddr addr, unsigned size) UHCIState *s = opaque; uint32_t val; - switch(addr) { + switch (addr) { case 0x00: val = s->cmd; break; @@ -533,12 +538,13 @@ static uint64_t uhci_port_read(void *opaque, hwaddr addr, unsigned size) } /* signal resume if controller suspended */ -static void uhci_resume (void *opaque) +static void uhci_resume(void *opaque) { UHCIState *s = (UHCIState *)opaque; - if (!s) + if (!s) { return; + } if (s->cmd & UHCI_CMD_EGSM) { s->cmd |= UHCI_CMD_FGR; @@ -674,7 +680,8 @@ static int uhci_handle_td_error(UHCIState *s, UHCI_TD *td, uint32_t td_addr, return ret; } -static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, uint32_t *int_mask) +static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, + uint32_t *int_mask) { int len = 0, max_len; uint8_t pid; @@ -682,8 +689,9 @@ static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, uint32_ max_len = ((td->token >> 21) + 1) & 0x7ff; pid = td->token & 0xff; - if (td->ctrl & TD_CTRL_IOS) + if (td->ctrl & TD_CTRL_IOS) { td->ctrl &= ~TD_CTRL_ACTIVE; + } if (async->packet.status != USB_RET_SUCCESS) { return uhci_handle_td_error(s, td, async->td_addr, @@ -693,12 +701,15 @@ static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, uint32_ len = async->packet.actual_length; td->ctrl = (td->ctrl & ~0x7ff) | ((len - 1) & 0x7ff); - /* The NAK bit may have been set by a previous frame, so clear it - here. The docs are somewhat unclear, but win2k relies on this - behavior. */ + /* + * The NAK bit may have been set by a previous frame, so clear it + * here. The docs are somewhat unclear, but win2k relies on this + * behavior. + */ td->ctrl &= ~(TD_CTRL_ACTIVE | TD_CTRL_NAK); - if (td->ctrl & TD_CTRL_IOC) + if (td->ctrl & TD_CTRL_IOC) { *int_mask |= 0x01; + } if (pid == USB_TOKEN_IN) { pci_dma_write(&s->dev, td->buffer, async->buf, len); @@ -780,9 +791,11 @@ static int uhci_handle_td(UHCIState *s, UHCIQueue *q, uint32_t qh_addr, if (async) { if (queuing) { - /* we are busy filling the queue, we are not prepared - to consume completed packages then, just leave them - in async state */ + /* + * we are busy filling the queue, we are not prepared + * to consume completed packages then, just leave them + * in async state + */ return TD_RESULT_ASYNC_CONT; } if (!async->done) { @@ -832,7 +845,7 @@ static int uhci_handle_td(UHCIState *s, UHCIQueue *q, uint32_t qh_addr, } usb_packet_addbuf(&async->packet, async->buf, max_len); - switch(pid) { + switch (pid) { case USB_TOKEN_OUT: case USB_TOKEN_SETUP: pci_dma_read(&s->dev, td->buffer, async->buf, max_len); @@ -911,12 +924,15 @@ static void qhdb_reset(QhDb *db) static int qhdb_insert(QhDb *db, uint32_t addr) { int i; - for (i = 0; i < db->count; i++) - if (db->addr[i] == addr) + for (i = 0; i < db->count; i++) { + if (db->addr[i] == addr) { return 1; + } + } - if (db->count >= UHCI_MAX_QUEUES) + if (db->count >= UHCI_MAX_QUEUES) { return 1; + } db->addr[db->count++] = addr; return 0; @@ -970,8 +986,10 @@ static void uhci_process_frame(UHCIState *s) for (cnt = FRAME_MAX_LOOPS; is_valid(link) && cnt; cnt--) { if (!s->completions_only && s->frame_bytes >= s->frame_bandwidth) { - /* We've reached the usb 1.1 bandwidth, which is - 1280 bytes/frame, stop processing */ + /* + * We've reached the usb 1.1 bandwidth, which is + * 1280 bytes/frame, stop processing + */ trace_usb_uhci_frame_stop_bandwidth(); break; } @@ -1120,8 +1138,10 @@ static void uhci_frame_timer(void *opaque) uhci_async_validate_begin(s); uhci_process_frame(s); uhci_async_validate_end(s); - /* The spec says frnum is the frame currently being processed, and - * the guest must look at frnum - 1 on interrupt, so inc frnum now */ + /* + * The spec says frnum is the frame currently being processed, and + * the guest must look at frnum - 1 on interrupt, so inc frnum now + */ s->frnum = (s->frnum + 1) & 0x7ff; s->expire_time += frame_t; } @@ -1174,7 +1194,7 @@ void usb_uhci_common_realize(PCIDevice *dev, Error **errp) if (s->masterbus) { USBPort *ports[UHCI_PORTS]; - for(i = 0; i < UHCI_PORTS; i++) { + for (i = 0; i < UHCI_PORTS; i++) { ports[i] = &s->ports[i].port; } usb_register_companion(s->masterbus, ports, UHCI_PORTS, @@ -1200,8 +1220,10 @@ void usb_uhci_common_realize(PCIDevice *dev, Error **errp) memory_region_init_io(&s->io_bar, OBJECT(s), &uhci_ioport_ops, s, "uhci", 0x20); - /* Use region 4 for consistency with real hardware. BSD guests seem - to rely on this. */ + /* + * Use region 4 for consistency with real hardware. BSD guests seem + * to rely on this. + */ pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar); } From patchwork Tue Nov 12 17:01:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872604 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E8EAD42BAF for ; Tue, 12 Nov 2024 17:04:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuIc-0003UN-AU; Tue, 12 Nov 2024 12:03:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHW-0003Bo-8h; Tue, 12 Nov 2024 12:02:22 -0500 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tAuHU-0001SK-IR; Tue, 12 Nov 2024 12:02:21 -0500 Received: by mail-pg1-x52f.google.com with SMTP id 41be03b00d2f7-7ed9c16f687so4038401a12.0; Tue, 12 Nov 2024 09:02:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1731430938; x=1732035738; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:from:to:cc:subject:date :message-id:reply-to; bh=XnAhVVFjjEa9AE7qgj063mddus/nht38lXKcvLgTu8c=; b=k9R8IPfLQdy5F0tA2ZuMTVRUuW7P0+ouZ/RqL/JyDXzhF3w1gfvD7C+7dTCbEaG0mu GDBfbNPpPD3gQYQiWiPdeND1oLE6/MDV/k7YV1sDNyBJBIkwnokfGf04R1JEUUXjOopM iBBnoA0F9cjoZ4b8asKMAwMjyEMhuluZN/RIM/pPcTOIgxvmCpbcemGROyS+8IEPNCEc rRAl91MR9ANwvv6Xg8FFy2fkslYyUj76Ntyd08cDPSu3DkBNjao2cQILaNlb140pgeh1 HMXL3tibq1XLyZyaqpgfv5w38HJkQl2i7wLi23MaoWuylXTbJt8CLUftzJX0BF7SSJ8y OaWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731430938; x=1732035738; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XnAhVVFjjEa9AE7qgj063mddus/nht38lXKcvLgTu8c=; b=RkKX6+3RoIfId0leg+DNFHb6NrE5gIYtCcedwJmRo2Ye9Je+37vUCYF5fZKtE0uEBc mDk+rNRv11WPkrFvB9Z5o2vhVEQnKVbC6Tv7H3KDrjeyijC4BtG+NzgDkl4hFmOzm6u0 0wbY31mVwOi9barRMhjG4+yEEmAf3lQdtEO19gVa3l+e7FvwQlLusxBPE0jH3QIxUuoB fuHP/BgseBkUCUExnDaV8ESggf4HvDXJPLputCX64sXYN3v6tP3lnnK32IYX4PjARFoT cIf8mVf6BTXESJqqrId8jlcYesgEbrsAytepw9uEhAtCLSsyO8D+fEaXQYZ549EKwKFj /HiA== X-Forwarded-Encrypted: i=1; AJvYcCWF/4Hnkt7L9Y41PeSHs6yRIbsA0AvZhcFNHoovPHe4DS4WDfBAsWmESDREFvzX5fvXaGd1ff8ZsA==@nongnu.org X-Gm-Message-State: AOJu0Yw1n5SiM9uYMbOcUVBYq1Bt3Y0whFejxpyTcVeqHTqpe1F4SAbg D3UJkstWJGptxWHQJAnslJF/MnTMSXkSAcRZ8YxZN/R1AkHiMpvhBULBWQ== X-Google-Smtp-Source: AGHT+IGgYYQI8KlJMqEzFAH3CsDlipTWZfKiEE/YZFOQ3zPM1bxzLqZ6//cIjp1USr7onKoSw1108w== X-Received: by 2002:a17:90b:3a90:b0:2e2:cd80:4d44 with SMTP id 98e67ed59e1d1-2e9b172b03amr22530782a91.28.1731430938259; Tue, 12 Nov 2024 09:02:18 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e9a5f5e57fsm10814294a91.14.2024.11.12.09.02.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:17 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [RESEND PATCH 02/10] usb/uhci: Introduce and use register defines Date: Tue, 12 Nov 2024 09:01:44 -0800 Message-ID: <20241112170152.217664-3-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=groeck7@gmail.com; helo=mail-pg1-x52f.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce defines for UHCI registers to simplify adding register access in subsequent patches of the series. No functional change. Reviewed-by: Cédric Le Goater Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 - Added Reviewed-by: tag hw/usb/hcd-uhci.c | 32 ++++++++++++++++---------------- include/hw/usb/uhci-regs.h | 11 +++++++++++ 2 files changed, 27 insertions(+), 16 deletions(-) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 50d488d6fb..bdab9ac37e 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -389,7 +389,7 @@ static void uhci_port_write(void *opaque, hwaddr addr, trace_usb_uhci_mmio_writew(addr, val); switch (addr) { - case 0x00: + case UHCI_USBCMD: if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) { /* start frame processing */ trace_usb_uhci_schedule_start(); @@ -424,7 +424,7 @@ static void uhci_port_write(void *opaque, hwaddr addr, } } break; - case 0x02: + case UHCI_USBSTS: s->status &= ~val; /* * XXX: the chip spec is not coherent, so we add a hidden @@ -435,27 +435,27 @@ static void uhci_port_write(void *opaque, hwaddr addr, } uhci_update_irq(s); break; - case 0x04: + case UHCI_USBINTR: s->intr = val; uhci_update_irq(s); break; - case 0x06: + case UHCI_USBFRNUM: if (s->status & UHCI_STS_HCHALTED) { s->frnum = val & 0x7ff; } break; - case 0x08: + case UHCI_USBFLBASEADD: s->fl_base_addr &= 0xffff0000; s->fl_base_addr |= val & ~0xfff; break; - case 0x0a: + case UHCI_USBFLBASEADD + 2: s->fl_base_addr &= 0x0000ffff; s->fl_base_addr |= (val << 16); break; - case 0x0c: + case UHCI_USBSOF: s->sof_timing = val & 0xff; break; - case 0x10 ... 0x1f: + case UHCI_USBPORTSC1 ... UHCI_USBPORTSC4: { UHCIPort *port; USBDevice *dev; @@ -493,28 +493,28 @@ static uint64_t uhci_port_read(void *opaque, hwaddr addr, unsigned size) uint32_t val; switch (addr) { - case 0x00: + case UHCI_USBCMD: val = s->cmd; break; - case 0x02: + case UHCI_USBSTS: val = s->status; break; - case 0x04: + case UHCI_USBINTR: val = s->intr; break; - case 0x06: + case UHCI_USBFRNUM: val = s->frnum; break; - case 0x08: + case UHCI_USBFLBASEADD: val = s->fl_base_addr & 0xffff; break; - case 0x0a: + case UHCI_USBFLBASEADD + 2: val = (s->fl_base_addr >> 16) & 0xffff; break; - case 0x0c: + case UHCI_USBSOF: val = s->sof_timing; break; - case 0x10 ... 0x1f: + case UHCI_USBPORTSC1 ... UHCI_USBPORTSC4: { UHCIPort *port; int n; diff --git a/include/hw/usb/uhci-regs.h b/include/hw/usb/uhci-regs.h index fd45d29db0..5b81714e5c 100644 --- a/include/hw/usb/uhci-regs.h +++ b/include/hw/usb/uhci-regs.h @@ -1,6 +1,17 @@ #ifndef HW_USB_UHCI_REGS_H #define HW_USB_UHCI_REGS_H +#define UHCI_USBCMD 0 +#define UHCI_USBSTS 2 +#define UHCI_USBINTR 4 +#define UHCI_USBFRNUM 6 +#define UHCI_USBFLBASEADD 8 +#define UHCI_USBSOF 0x0c +#define UHCI_USBPORTSC1 0x10 +#define UHCI_USBPORTSC2 0x12 +#define UHCI_USBPORTSC3 0x14 +#define UHCI_USBPORTSC4 0x16 + #define UHCI_CMD_FGR (1 << 4) #define UHCI_CMD_EGSM (1 << 3) #define UHCI_CMD_GRESET (1 << 2) From patchwork Tue Nov 12 17:01:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872616 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF1FED42BAF for ; Tue, 12 Nov 2024 17:07:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuJ5-00041H-LX; Tue, 12 Nov 2024 12:04:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHf-0003K5-Mg; Tue, 12 Nov 2024 12:02:42 -0500 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tAuHX-0001Sx-0h; Tue, 12 Nov 2024 12:02:30 -0500 Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-720aa3dbda5so4270652b3a.1; Tue, 12 Nov 2024 09:02:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1731430940; x=1732035740; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:from:to:cc:subject:date :message-id:reply-to; bh=B+TH8uDCTgTLX/QaHsjWAcbNQxza0LHPrr0Ee+Jl498=; b=EAVWhsOG7oilFbWMX8CPS3Thy4brQBvgogEo/d3OjsUzOfpgD8j+3SKx85ZM4Gm5SD k1r6yNf87rjdhgGK/Io5rhwseJXM2DnMWxu6erYvczIeWgHKxxUqwWZO8KW/YdciCLnM pqFhbI4DICUxUMhamEXU/hOKt8k6wV3pF/KjILHZBbpxhcATAav+dhFeXO5Xri6IQU/P c4BX/P/Q8nmMlZKkTbQg3HStwWmWLT24gFc89FTlfcROTnKvHAedgoT6JyFLolRAl1zf CI3oj159sooFcH+3GdJlVo10+24PUjR4Iow6enQC4zI6EGYUuB4nmgu/IUcsFrq9xaqp E0lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731430940; x=1732035740; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=B+TH8uDCTgTLX/QaHsjWAcbNQxza0LHPrr0Ee+Jl498=; b=F7yZX0mb9R1hChLoFlxGZQMBPBwwjBRhjQAiNgZkHqe2CgYghWL1On91gDCM94mnbv vUHi5RE2cZHm2QIxou23DDadheKj3NdP0BC5MK1zeX72nnv09jraW3kVJ7t7cD7YrY1A UR2HlluFZvMfeC6snJ5qAtVyV0zjA5pC9B6lmQcGeb3vAfh3djhc/Rb0RsI2/n70QHgx 4YY7HU2sdPB/8W9IY0LR8KVrP7LPXXcAY8g5X/uqxVX6DjTMYLstdBuB/Pv9xWusM70Q GjUOCSEOBBp2JNHk2te8yDAetACoZaun5EhqmG4ZXJ09vVDXe8sK/4GL76qnH3/cyHBI 5Q7g== X-Forwarded-Encrypted: i=1; AJvYcCV9+4qSErBaQXsnhN2x+IKa/HAm94K8VzhVsSTZhRnNrEcTjn9ekG2Ygk1ghZFjXSiGScU2uJ9E/g==@nongnu.org X-Gm-Message-State: AOJu0YxdtNnRzJE69RfpJfb+c2UuAK66I+k6XBsTJUEc/yu7Ui6w2rz2 qMSLA0wQ0L+ncVyt/bbdAeggGrTe8JoOkbn5L9whzDYYce4Y2K7uzOap+g== X-Google-Smtp-Source: AGHT+IGJsRIMqyf6i+sfqLkgALEXy+5Q7l7OCpu6HBTmuFX/WDxKckfyvE4Ni7ZgUNpAthLIVlek5w== X-Received: by 2002:a05:6a21:3941:b0:1da:2e7c:e510 with SMTP id adf61e73a8af0-1dc5f8cedf3mr4486944637.1.1731430940261; Tue, 12 Nov 2024 09:02:20 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7240785ffe3sm11478801b3a.2.2024.11.12.09.02.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:19 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 03/10] usb/uhci: Move PCI-related code into a separate file Date: Tue, 12 Nov 2024 09:01:45 -0800 Message-ID: <20241112170152.217664-4-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=groeck7@gmail.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Some machines (like Aspeed ARM) only have a sysbus UHCI controller. The current UHCI implementation only supports PCI based UHCI controllers. Move the UHCI-PCI device code into a separate file so that it is possible to create a sysbus UHCI device without PCI dependency. Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 - Fixed bug in interrupt initialization hw/isa/Kconfig | 4 +- hw/isa/vt82c686.c | 4 +- hw/usb/Kconfig | 6 +- hw/usb/hcd-uhci-pci.c | 255 ++++++++++++++++++++++++++++++++++ hw/usb/hcd-uhci-pci.h | 63 +++++++++ hw/usb/hcd-uhci.c | 221 +++++------------------------ hw/usb/hcd-uhci.h | 30 ++-- hw/usb/meson.build | 1 + hw/usb/vt82c686-uhci-pci.c | 18 +-- include/hw/southbridge/piix.h | 4 +- 10 files changed, 386 insertions(+), 220 deletions(-) create mode 100644 hw/usb/hcd-uhci-pci.c create mode 100644 hw/usb/hcd-uhci-pci.h diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 73c6470805..b0e536fad9 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -47,7 +47,7 @@ config PIIX select IDE_PIIX select ISA_BUS select MC146818RTC - select USB_UHCI + select USB_UHCI_PCI config VT82C686 bool @@ -55,7 +55,7 @@ config VT82C686 select ISA_SUPERIO select ACPI select ACPI_SMBUS - select USB_UHCI + select USB_UHCI_PCI select APM select I8254 select I8257 diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 6f44b381a5..a47cbd6191 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -26,7 +26,7 @@ #include "hw/intc/i8259.h" #include "hw/irq.h" #include "hw/dma/i8257.h" -#include "hw/usb/hcd-uhci.h" +#include "hw/usb/hcd-uhci-pci.h" #include "hw/timer/i8254.h" #include "hw/rtc/mc146818rtc.h" #include "migration/vmstate.h" @@ -600,7 +600,7 @@ struct ViaISAState { ViaSuperIOState via_sio; MC146818RtcState rtc; PCIIDEState ide; - UHCIState uhci[2]; + UHCIPCIState uhci[2]; ViaPMState pm; ViaAC97State ac97; PCIDevice mc97; diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index 5fbecd2f43..bab4d2d67d 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -2,10 +2,14 @@ config USB bool config USB_UHCI + bool + select USB + +config USB_UHCI_PCI bool default y if PCI_DEVICES depends on PCI - select USB + select USB_UHCI config USB_OHCI bool diff --git a/hw/usb/hcd-uhci-pci.c b/hw/usb/hcd-uhci-pci.c new file mode 100644 index 0000000000..ed9b5f6121 --- /dev/null +++ b/hw/usb/hcd-uhci-pci.c @@ -0,0 +1,255 @@ +/* + * USB UHCI controller emulation + * PCI code + * + * Copyright (c) 2005 Fabrice Bellard + * + * Copyright (c) 2008 Max Krasnyansky + * Magor rewrite of the UHCI data structures parser and frame processor + * Support for fully async operation and multiple outstanding transactions + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/irq.h" +#include "hw/usb.h" +#include "migration/vmstate.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "qapi/error.h" +#include "qemu/main-loop.h" +#include "qemu/module.h" +#include "qom/object.h" +#include "hcd-uhci-pci.h" + +struct UHCIPCIDeviceClass { + PCIDeviceClass parent_class; + UHCIPCIInfo info; +}; + +static const VMStateDescription vmstate_uhci = { + .name = "pci_uhci", + .version_id = 1, + .minimum_version_id = 1, + .fields = (const VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, UHCIPCIState), + VMSTATE_STRUCT(state, UHCIPCIState, 1, vmstate_uhci_state, UHCIState), + VMSTATE_END_OF_LIST() + } +}; + +static void uhci_pci_reset(UHCIState *uhci) +{ + UHCIPCIState *pstate = container_of(uhci, UHCIPCIState, state); + PCIDevice *d = &pstate->dev; + + d->config[0x6a] = 0x01; /* usb clock */ + d->config[0x6b] = 0x00; + + uhci_state_reset(uhci); +} + +void usb_uhci_common_realize_pci(PCIDevice *dev, Error **errp) +{ + Error *err = NULL; + UHCIPCIDeviceClass *u = UHCI_PCI_GET_CLASS(dev); + UHCIPCIState *uhci = UHCI_PCI(dev); + UHCIState *s = &uhci->state; + uint8_t *pci_conf = dev->config; + + pci_conf[PCI_CLASS_PROG] = 0x00; + /* TODO: reset value should be 0. */ + pci_conf[USB_SBRN] = USB_RELEASE_1; /* release number */ + pci_config_set_interrupt_pin(pci_conf, u->info.irq_pin + 1); + + s->irq = pci_allocate_irq(dev); + s->masterbus = uhci->masterbus; + s->firstport = uhci->firstport; + s->maxframes = uhci->maxframes; + s->frame_bandwidth = uhci->frame_bandwidth; + s->as = pci_get_address_space(dev); + s->uhci_reset = uhci_pci_reset; + + usb_uhci_init(s, DEVICE(dev), &err); + + /* + * Use region 4 for consistency with real hardware. BSD guests seem + * to rely on this. + */ + pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &s->mem); +} + +static void uhci_pci_reset_pci(DeviceState *dev) +{ + PCIDevice *d = PCI_DEVICE(dev); + UHCIPCIState *uhci = UHCI_PCI(d); + + uhci_pci_reset(&uhci->state); +} + +static void usb_uhci_pci_exit(PCIDevice *dev) +{ + UHCIPCIState *uhci = UHCI_PCI(dev); + UHCIState *s = &uhci->state; + + usb_uhci_exit(s); + + qemu_free_irq(s->irq); +} + +static Property uhci_properties_companion[] = { + DEFINE_PROP_STRING("masterbus", UHCIPCIState, masterbus), + DEFINE_PROP_UINT32("firstport", UHCIPCIState, firstport, 0), + DEFINE_PROP_UINT32("bandwidth", UHCIPCIState, frame_bandwidth, 1280), + DEFINE_PROP_UINT32("maxframes", UHCIPCIState, maxframes, 128), + DEFINE_PROP_END_OF_LIST(), +}; +static Property uhci_properties_standalone[] = { + DEFINE_PROP_UINT32("bandwidth", UHCIPCIState, frame_bandwidth, 1280), + DEFINE_PROP_UINT32("maxframes", UHCIPCIState, maxframes, 128), + DEFINE_PROP_END_OF_LIST(), +}; + +static void uhci_pci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->class_id = PCI_CLASS_SERIAL_USB; + dc->vmsd = &vmstate_uhci; + device_class_set_legacy_reset(dc, uhci_pci_reset_pci); + set_bit(DEVICE_CATEGORY_USB, dc->categories); +} + +static const TypeInfo uhci_pci_type_info = { + .name = TYPE_UHCI_PCI, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(UHCIPCIState), + .class_size = sizeof(UHCIPCIDeviceClass), + .class_init = uhci_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +void uhci_pci_data_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + UHCIPCIDeviceClass *u = UHCI_PCI_CLASS(klass); + UHCIPCIInfo *info = data; + + k->realize = info->realize ? info->realize : usb_uhci_common_realize_pci; + k->exit = info->unplug ? usb_uhci_pci_exit : NULL; + k->vendor_id = info->vendor_id; + k->device_id = info->device_id; + k->revision = info->revision; + if (!info->unplug) { + /* uhci controllers in companion setups can't be hotplugged */ + dc->hotpluggable = false; + device_class_set_props(dc, uhci_properties_companion); + } else { + device_class_set_props(dc, uhci_properties_standalone); + } + if (info->notuser) { + dc->user_creatable = false; + } + u->info = *info; +} + +static UHCIPCIInfo uhci_pci_info[] = { + { + .name = TYPE_PIIX3_USB_UHCI, + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82371SB_2, + .revision = 0x01, + .irq_pin = 3, + .unplug = true, + },{ + .name = TYPE_PIIX4_USB_UHCI, + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82371AB_2, + .revision = 0x01, + .irq_pin = 3, + .unplug = true, + },{ + .name = TYPE_ICH9_USB_UHCI(1), /* 00:1d.0 */ + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI1, + .revision = 0x03, + .irq_pin = 0, + .unplug = false, + },{ + .name = TYPE_ICH9_USB_UHCI(2), /* 00:1d.1 */ + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI2, + .revision = 0x03, + .irq_pin = 1, + .unplug = false, + },{ + .name = TYPE_ICH9_USB_UHCI(3), /* 00:1d.2 */ + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI3, + .revision = 0x03, + .irq_pin = 2, + .unplug = false, + },{ + .name = TYPE_ICH9_USB_UHCI(4), /* 00:1a.0 */ + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI4, + .revision = 0x03, + .irq_pin = 0, + .unplug = false, + },{ + .name = TYPE_ICH9_USB_UHCI(5), /* 00:1a.1 */ + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI5, + .revision = 0x03, + .irq_pin = 1, + .unplug = false, + },{ + .name = TYPE_ICH9_USB_UHCI(6), /* 00:1a.2 */ + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI6, + .revision = 0x03, + .irq_pin = 2, + .unplug = false, + } +}; + +static void uhci_pci_register_types(void) +{ + TypeInfo type_info = { + .parent = TYPE_UHCI_PCI, + .class_init = uhci_pci_data_class_init, + }; + int i; + + type_register_static(&uhci_pci_type_info); + + for (i = 0; i < ARRAY_SIZE(uhci_pci_info); i++) { + type_info.name = uhci_pci_info[i].name; + type_info.class_data = uhci_pci_info + i; + type_register(&type_info); + } +} + +type_init(uhci_pci_register_types) diff --git a/hw/usb/hcd-uhci-pci.h b/hw/usb/hcd-uhci-pci.h new file mode 100644 index 0000000000..25d3e0eb97 --- /dev/null +++ b/hw/usb/hcd-uhci-pci.h @@ -0,0 +1,63 @@ +/* + * USB UHCI controller emulation + * + * Copyright (c) 2005 Fabrice Bellard + * + * Copyright (c) 2008 Max Krasnyansky + * Magor rewrite of the UHCI data structures parser and frame processor + * Support for fully async operation and multiple outstanding transactions + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef HW_USB_HCD_UHCI_PCI_H +#define HW_USB_HCD_UHCI_PCI_H + +#include "hcd-uhci.h" + +#define TYPE_UHCI_PCI "pci-uhci" + +struct UHCIPCIState { + PCIDevice dev; + UHCIState state; + + /* Properties */ + char *masterbus; + uint32_t firstport; + uint32_t frame_bandwidth; + uint32_t maxframes; + uint32_t num_ports; +}; + +OBJECT_DECLARE_TYPE(UHCIPCIState, UHCIPCIDeviceClass, UHCI_PCI) + +typedef struct UHCIPCIInfo { + const char *name; + uint16_t vendor_id; + uint16_t device_id; + uint8_t revision; + uint8_t irq_pin; + void (*realize)(PCIDevice *dev, Error **errp); + bool unplug; + bool notuser; /* disallow user_creatable */ +} UHCIPCIInfo; + +void usb_uhci_common_realize_pci(PCIDevice *dev, Error **errp); +void uhci_pci_data_class_init(ObjectClass *klass, void *data); + +#endif /* HW_USB_HCD_UHCI_PCI_H */ diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index bdab9ac37e..68b72f8d3b 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -30,7 +30,6 @@ #include "hw/usb.h" #include "hw/usb/uhci-regs.h" #include "migration/vmstate.h" -#include "hw/pci/pci.h" #include "hw/irq.h" #include "hw/qdev-properties.h" #include "qapi/error.h" @@ -62,11 +61,6 @@ enum { typedef struct UHCIAsync UHCIAsync; -struct UHCIPCIDeviceClass { - PCIDeviceClass parent_class; - UHCIInfo info; -}; - /* * Pending async transaction. * 'packet' must be the first field because completion @@ -302,20 +296,13 @@ static void uhci_update_irq(UHCIState *s) qemu_set_irq(s->irq, level); } -static void uhci_reset(DeviceState *dev) +void uhci_state_reset(UHCIState *s) { - PCIDevice *d = PCI_DEVICE(dev); - UHCIState *s = UHCI(d); - uint8_t *pci_conf; int i; UHCIPort *port; trace_usb_uhci_reset(); - pci_conf = s->dev.config; - - pci_conf[0x6a] = 0x01; /* usb clock */ - pci_conf[0x6b] = 0x00; s->cmd = 0; s->status = UHCI_STS_HCHALTED; s->status2 = 0; @@ -336,6 +323,11 @@ static void uhci_reset(DeviceState *dev) uhci_update_irq(s); } +static void uhci_reset(UHCIState *s) +{ + s->uhci_reset(s); +} + static const VMStateDescription vmstate_uhci_port = { .name = "uhci port", .version_id = 1, @@ -357,13 +349,12 @@ static int uhci_post_load(void *opaque, int version_id) return 0; } -static const VMStateDescription vmstate_uhci = { +const VMStateDescription vmstate_uhci_state = { .name = "uhci", - .version_id = 3, + .version_id = 4, .minimum_version_id = 1, .post_load = uhci_post_load, .fields = (const VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, UHCIState), VMSTATE_UINT8_EQUAL(num_ports_vmstate, UHCIState, NULL), VMSTATE_STRUCT_ARRAY(ports, UHCIState, UHCI_PORTS, 1, vmstate_uhci_port, UHCIPort), @@ -409,11 +400,11 @@ static void uhci_port_write(void *opaque, hwaddr addr, port = &s->ports[i]; usb_device_reset(port->port.dev); } - uhci_reset(DEVICE(s)); + uhci_reset(s); return; } if (val & UHCI_CMD_HCRESET) { - uhci_reset(DEVICE(s)); + uhci_reset(s); return; } s->cmd = val; @@ -628,9 +619,21 @@ static USBDevice *uhci_find_device(UHCIState *s, uint8_t addr) return NULL; } +static void uhci_dma_read(UHCIState *s, dma_addr_t addr, void *buf, + dma_addr_t len) +{ + dma_memory_read(s->as, addr, buf, len, MEMTXATTRS_UNSPECIFIED); +} + +static void uhci_dma_write(UHCIState *s, dma_addr_t addr, void *buf, + dma_addr_t len) +{ + dma_memory_write(s->as, addr, buf, len, MEMTXATTRS_UNSPECIFIED); +} + static void uhci_read_td(UHCIState *s, UHCI_TD *td, uint32_t link) { - pci_dma_read(&s->dev, link & ~0xf, td, sizeof(*td)); + uhci_dma_read(s, link & ~0xf, td, sizeof(*td)); le32_to_cpus(&td->link); le32_to_cpus(&td->ctrl); le32_to_cpus(&td->token); @@ -712,7 +715,7 @@ static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, } if (pid == USB_TOKEN_IN) { - pci_dma_write(&s->dev, td->buffer, async->buf, len); + uhci_dma_write(s, td->buffer, async->buf, len); if ((td->ctrl & TD_CTRL_SPD) && len < max_len) { *int_mask |= 0x02; /* short packet: do not update QH */ @@ -848,7 +851,7 @@ static int uhci_handle_td(UHCIState *s, UHCIQueue *q, uint32_t qh_addr, switch (pid) { case USB_TOKEN_OUT: case USB_TOKEN_SETUP: - pci_dma_read(&s->dev, td->buffer, async->buf, max_len); + uhci_dma_read(s, td->buffer, async->buf, max_len); usb_handle_packet(q->ep->dev, &async->packet); if (async->packet.status == USB_RET_SUCCESS) { async->packet.actual_length = max_len; @@ -976,7 +979,7 @@ static void uhci_process_frame(UHCIState *s) frame_addr = s->fl_base_addr + ((s->frnum & 0x3ff) << 2); - pci_dma_read(&s->dev, frame_addr, &link, 4); + uhci_dma_read(s, frame_addr, &link, 4); le32_to_cpus(&link); int_mask = 0; @@ -1016,7 +1019,7 @@ static void uhci_process_frame(UHCIState *s) } } - pci_dma_read(&s->dev, link & ~0xf, &qh, sizeof(qh)); + uhci_dma_read(s, link & ~0xf, &qh, sizeof(qh)); le32_to_cpus(&qh.link); le32_to_cpus(&qh.el_link); @@ -1041,7 +1044,7 @@ static void uhci_process_frame(UHCIState *s) if (old_td_ctrl != td.ctrl) { /* update the status bits of the TD */ val = cpu_to_le32(td.ctrl); - pci_dma_write(&s->dev, (link & ~0xf) + 4, &val, sizeof(val)); + uhci_dma_write(s, (link & ~0xf) + 4, &val, sizeof(val)); } switch (ret) { @@ -1069,7 +1072,7 @@ static void uhci_process_frame(UHCIState *s) /* update QH element link */ qh.el_link = link; val = cpu_to_le32(qh.el_link); - pci_dma_write(&s->dev, (curr_qh & ~0xf) + 4, &val, sizeof(val)); + uhci_dma_write(s, (curr_qh & ~0xf) + 4, &val, sizeof(val)); if (!depth_first(link)) { /* done with this QH */ @@ -1178,20 +1181,11 @@ static USBPortOps uhci_port_ops = { static USBBusOps uhci_bus_ops = { }; -void usb_uhci_common_realize(PCIDevice *dev, Error **errp) +void usb_uhci_init(UHCIState *s, DeviceState *dev, Error **errp) { Error *err = NULL; - UHCIPCIDeviceClass *u = UHCI_GET_CLASS(dev); - UHCIState *s = UHCI(dev); - uint8_t *pci_conf = s->dev.config; int i; - pci_conf[PCI_CLASS_PROG] = 0x00; - /* TODO: reset value should be 0. */ - pci_conf[USB_SBRN] = USB_RELEASE_1; /* release number */ - pci_config_set_interrupt_pin(pci_conf, u->info.irq_pin + 1); - s->irq = pci_allocate_irq(dev); - if (s->masterbus) { USBPort *ports[UHCI_PORTS]; for (i = 0; i < UHCI_PORTS; i++) { @@ -1212,25 +1206,17 @@ void usb_uhci_common_realize(PCIDevice *dev, Error **errp) USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL); } } - s->bh = qemu_bh_new_guarded(uhci_bh, s, &DEVICE(dev)->mem_reentrancy_guard); + s->bh = qemu_bh_new_guarded(uhci_bh, s, &dev->mem_reentrancy_guard); s->frame_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, uhci_frame_timer, s); s->num_ports_vmstate = UHCI_PORTS; QTAILQ_INIT(&s->queues); - memory_region_init_io(&s->io_bar, OBJECT(s), &uhci_ioport_ops, s, + memory_region_init_io(&s->mem, OBJECT(s), &uhci_ioport_ops, s, "uhci", 0x20); - - /* - * Use region 4 for consistency with real hardware. BSD guests seem - * to rely on this. - */ - pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar); } -static void usb_uhci_exit(PCIDevice *dev) +void usb_uhci_exit(UHCIState *s) { - UHCIState *s = UHCI(dev); - trace_usb_uhci_exit(); if (s->frame_timer) { @@ -1248,144 +1234,3 @@ static void usb_uhci_exit(PCIDevice *dev) usb_bus_release(&s->bus); } } - -static Property uhci_properties_companion[] = { - DEFINE_PROP_STRING("masterbus", UHCIState, masterbus), - DEFINE_PROP_UINT32("firstport", UHCIState, firstport, 0), - DEFINE_PROP_UINT32("bandwidth", UHCIState, frame_bandwidth, 1280), - DEFINE_PROP_UINT32("maxframes", UHCIState, maxframes, 128), - DEFINE_PROP_END_OF_LIST(), -}; -static Property uhci_properties_standalone[] = { - DEFINE_PROP_UINT32("bandwidth", UHCIState, frame_bandwidth, 1280), - DEFINE_PROP_UINT32("maxframes", UHCIState, maxframes, 128), - DEFINE_PROP_END_OF_LIST(), -}; - -static void uhci_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->class_id = PCI_CLASS_SERIAL_USB; - dc->vmsd = &vmstate_uhci; - device_class_set_legacy_reset(dc, uhci_reset); - set_bit(DEVICE_CATEGORY_USB, dc->categories); -} - -static const TypeInfo uhci_pci_type_info = { - .name = TYPE_UHCI, - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(UHCIState), - .class_size = sizeof(UHCIPCIDeviceClass), - .abstract = true, - .class_init = uhci_class_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - -void uhci_data_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - DeviceClass *dc = DEVICE_CLASS(klass); - UHCIPCIDeviceClass *u = UHCI_CLASS(klass); - UHCIInfo *info = data; - - k->realize = info->realize ? info->realize : usb_uhci_common_realize; - k->exit = info->unplug ? usb_uhci_exit : NULL; - k->vendor_id = info->vendor_id; - k->device_id = info->device_id; - k->revision = info->revision; - if (!info->unplug) { - /* uhci controllers in companion setups can't be hotplugged */ - dc->hotpluggable = false; - device_class_set_props(dc, uhci_properties_companion); - } else { - device_class_set_props(dc, uhci_properties_standalone); - } - if (info->notuser) { - dc->user_creatable = false; - } - u->info = *info; -} - -static UHCIInfo uhci_info[] = { - { - .name = TYPE_PIIX3_USB_UHCI, - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82371SB_2, - .revision = 0x01, - .irq_pin = 3, - .unplug = true, - },{ - .name = TYPE_PIIX4_USB_UHCI, - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82371AB_2, - .revision = 0x01, - .irq_pin = 3, - .unplug = true, - },{ - .name = TYPE_ICH9_USB_UHCI(1), /* 00:1d.0 */ - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI1, - .revision = 0x03, - .irq_pin = 0, - .unplug = false, - },{ - .name = TYPE_ICH9_USB_UHCI(2), /* 00:1d.1 */ - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI2, - .revision = 0x03, - .irq_pin = 1, - .unplug = false, - },{ - .name = TYPE_ICH9_USB_UHCI(3), /* 00:1d.2 */ - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI3, - .revision = 0x03, - .irq_pin = 2, - .unplug = false, - },{ - .name = TYPE_ICH9_USB_UHCI(4), /* 00:1a.0 */ - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI4, - .revision = 0x03, - .irq_pin = 0, - .unplug = false, - },{ - .name = TYPE_ICH9_USB_UHCI(5), /* 00:1a.1 */ - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI5, - .revision = 0x03, - .irq_pin = 1, - .unplug = false, - },{ - .name = TYPE_ICH9_USB_UHCI(6), /* 00:1a.2 */ - .vendor_id = PCI_VENDOR_ID_INTEL, - .device_id = PCI_DEVICE_ID_INTEL_82801I_UHCI6, - .revision = 0x03, - .irq_pin = 2, - .unplug = false, - } -}; - -static void uhci_register_types(void) -{ - TypeInfo uhci_type_info = { - .parent = TYPE_UHCI, - .class_init = uhci_data_class_init, - }; - int i; - - type_register_static(&uhci_pci_type_info); - - for (i = 0; i < ARRAY_SIZE(uhci_info); i++) { - uhci_type_info.name = uhci_info[i].name; - uhci_type_info.class_data = uhci_info + i; - type_register(&uhci_type_info); - } -} - -type_init(uhci_register_types) diff --git a/hw/usb/hcd-uhci.h b/hw/usb/hcd-uhci.h index 6d26b94e92..1ffa93f703 100644 --- a/hw/usb/hcd-uhci.h +++ b/hw/usb/hcd-uhci.h @@ -32,6 +32,7 @@ #include "qemu/timer.h" #include "hw/pci/pci_device.h" #include "hw/usb.h" +#include "hw/sysbus.h" typedef struct UHCIQueue UHCIQueue; @@ -42,9 +43,12 @@ typedef struct UHCIPort { uint16_t ctrl; } UHCIPort; -typedef struct UHCIState { - PCIDevice dev; - MemoryRegion io_bar; +typedef struct UHCIState UHCIState; + +struct UHCIState { + MemoryRegion mem; + AddressSpace *as; + void (*uhci_reset)(UHCIState *); USBBus bus; /* Note unused when we're a companion controller */ uint16_t cmd; /* cmd register */ uint16_t status; @@ -72,24 +76,18 @@ typedef struct UHCIState { char *masterbus; uint32_t firstport; uint32_t maxframes; -} UHCIState; +}; -#define TYPE_UHCI "pci-uhci-usb" -OBJECT_DECLARE_TYPE(UHCIState, UHCIPCIDeviceClass, UHCI) +#define TYPE_UHCI "uhci-usb" +OBJECT_DECLARE_TYPE(UHCIState, UHCIDeviceClass, UHCI) -typedef struct UHCIInfo { - const char *name; - uint16_t vendor_id; - uint16_t device_id; - uint8_t revision; - uint8_t irq_pin; - void (*realize)(PCIDevice *dev, Error **errp); - bool unplug; - bool notuser; /* disallow user_creatable */ -} UHCIInfo; +extern const VMStateDescription vmstate_uhci_state; void uhci_data_class_init(ObjectClass *klass, void *data); void usb_uhci_common_realize(PCIDevice *dev, Error **errp); +void usb_uhci_init(UHCIState *s, DeviceState *dev, Error **errp); +void uhci_state_reset(UHCIState *s); +void usb_uhci_exit(UHCIState *s); #define TYPE_PIIX3_USB_UHCI "piix3-usb-uhci" #define TYPE_PIIX4_USB_UHCI "piix4-usb-uhci" diff --git a/hw/usb/meson.build b/hw/usb/meson.build index 1b4d1507e4..dc36e2d490 100644 --- a/hw/usb/meson.build +++ b/hw/usb/meson.build @@ -13,6 +13,7 @@ system_ss.add(when: 'CONFIG_USB', if_true: files( # usb host adapters system_ss.add(when: 'CONFIG_USB_UHCI', if_true: files('hcd-uhci.c')) +system_ss.add(when: 'CONFIG_USB_UHCI_PCI', if_true: files('hcd-uhci-pci.c')) system_ss.add(when: 'CONFIG_USB_OHCI', if_true: files('hcd-ohci.c')) system_ss.add(when: 'CONFIG_USB_OHCI_PCI', if_true: files('hcd-ohci-pci.c')) system_ss.add(when: 'CONFIG_USB_OHCI_SYSBUS', if_true: files('hcd-ohci-sysbus.c')) diff --git a/hw/usb/vt82c686-uhci-pci.c b/hw/usb/vt82c686-uhci-pci.c index 6162806172..fe757c59dd 100644 --- a/hw/usb/vt82c686-uhci-pci.c +++ b/hw/usb/vt82c686-uhci-pci.c @@ -1,17 +1,17 @@ #include "qemu/osdep.h" #include "hw/irq.h" #include "hw/isa/vt82c686.h" -#include "hcd-uhci.h" +#include "hcd-uhci-pci.h" static void uhci_isa_set_irq(void *opaque, int irq_num, int level) { - UHCIState *s = opaque; + UHCIPCIState *s = opaque; via_isa_set_irq(&s->dev, 0, level); } static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) { - UHCIState *s = UHCI(dev); + UHCIPCIState *s = UHCI_PCI(dev); uint8_t *pci_conf = s->dev.config; /* USB misc control 1/2 */ @@ -21,12 +21,12 @@ static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) /* USB legacy support */ pci_set_long(pci_conf + 0xc0, 0x00002000); - usb_uhci_common_realize(dev, errp); - object_unref(s->irq); - s->irq = qemu_allocate_irq(uhci_isa_set_irq, s, 0); + usb_uhci_common_realize_pci(dev, errp); + object_unref(s->state.irq); + s->state.irq = qemu_allocate_irq(uhci_isa_set_irq, s, 0); } -static UHCIInfo uhci_info[] = { +static UHCIPCIInfo uhci_info[] = { { .name = TYPE_VT82C686B_USB_UHCI, .vendor_id = PCI_VENDOR_ID_VIA, @@ -41,9 +41,9 @@ static UHCIInfo uhci_info[] = { }; static const TypeInfo vt82c686b_usb_uhci_type_info = { - .parent = TYPE_UHCI, + .parent = TYPE_UHCI_PCI, .name = TYPE_VT82C686B_USB_UHCI, - .class_init = uhci_data_class_init, + .class_init = uhci_pci_data_class_init, .class_data = uhci_info, }; diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 86709ba2e4..ceb05548fe 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -16,7 +16,7 @@ #include "hw/acpi/piix4.h" #include "hw/ide/pci.h" #include "hw/rtc/mc146818rtc.h" -#include "hw/usb/hcd-uhci.h" +#include "hw/usb/hcd-uhci-pci.h" /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60 @@ -57,7 +57,7 @@ struct PIIXState { MC146818RtcState rtc; PCIIDEState ide; - UHCIState uhci; + UHCIPCIState uhci; PIIX4PMState pm; uint32_t smb_io_base; From patchwork Tue Nov 12 17:01:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23F70D42BB3 for ; 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Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 04/10] usb/uhci: enlarge uhci memory space Date: Tue, 12 Nov 2024 09:01:46 -0800 Message-ID: <20241112170152.217664-5-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=groeck7@gmail.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org hcd-uhci-sysbus will require more memory than hcd-uhci-pci since registers for some hardware (specifically Aspeed) don't map 1:1. Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 hw/usb/hcd-uhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 68b72f8d3b..d2993a98b8 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -1212,7 +1212,7 @@ void usb_uhci_init(UHCIState *s, DeviceState *dev, Error **errp) QTAILQ_INIT(&s->queues); memory_region_init_io(&s->mem, OBJECT(s), &uhci_ioport_ops, s, - "uhci", 0x20); + "uhci", 0x100); } void usb_uhci_exit(UHCIState *s) From patchwork Tue Nov 12 17:01:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C3E2D42BAF for ; Tue, 12 Nov 2024 17:07:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuKW-0005j8-Jj; Tue, 12 Nov 2024 12:05:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHd-0003Jw-RC; Tue, 12 Nov 2024 12:02:32 -0500 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tAuHa-0001Tv-5Y; Tue, 12 Nov 2024 12:02:29 -0500 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-2110a622d76so52164985ad.3; Tue, 12 Nov 2024 09:02:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1731430944; x=1732035744; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:from:to:cc:subject:date :message-id:reply-to; bh=i3odCHCWhA+GQA7jNI4gUL8tsAQ9mYVU/wGNl+NW4Yw=; b=Rt/zDa/wy77DVkfatvtf3lNrfuz8x6W2B14X1aD3PfPLqDsmox0rKRdxFWUnuLTaYm zoJY2V+aREDQj/A7t7SBTBygwYU63qQ+wW0flBt+xjPEZ0MSKo7Cw2+C67Ub7zoJVgJ6 2KNocxnYT5N+1lMiI7y3t/nRG8RUAfj5LxWjVPROipUTq4wQqto0cH7Cy2lSP4elkVLt V+D2oupgN/zIUzrQehr4IYqt+NMs8oS0gXCdXLGTb1ebqN9J5vtueOBwJ/2ocq7s0eKz 1EzQ0l6TKfuUIPOCm8m3ZkeymM4EeBGdohPFJognYi3qS2ungdWeD6yC0PHLpXqYwXNn kGFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731430944; x=1732035744; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=i3odCHCWhA+GQA7jNI4gUL8tsAQ9mYVU/wGNl+NW4Yw=; b=IJn3s/N/gRSyNmwQhhPJw81putONtPhvUI3DeyNHy7cjmuGVjCAOI5VKMC2cn/YNKj s4IMmgnl3O695a5A+kzbZpF7Cuq/eV2GBrDtY2P5TbJrIAy/4X4kGA1u8KdKimZFzdKA eWVzaGL8bTXgMXEPrVN00hrocerjQuMsCgCwRVkujVZDr+CohtP09e/u8yvQw0YRzixY wVDqVIfcEhTlppkCFF2TKKfmeQbdN/Yh5rbTGF/1T6R1I3Mc8WNT/JB9eIVMykqsVDxS 1oTdJ/M0fkmKd3SxqVG5Jpf8+qyuQBWGTcGCD7/Cefc3C9+jzO5pRo8GUwH9XPNhxMhF Q1MA== X-Forwarded-Encrypted: i=1; AJvYcCVYb5auGAdLVc5SdmrdOkIOaRWfUsAYUZAaHJ33z7PhJE+f7GoaoBLYmf+z/mEkDtcSdZLqyyLSww==@nongnu.org X-Gm-Message-State: AOJu0YziWiVFqNP85sqh/LaVL+yQGYwxRe3Unogbr/LB+Gna278YmVBl RZIuGsY9ALXK+S9XPCe3bGSPZ1uvOsN0w+IBxpI6u2YRDYYXElhnxiOr9A== X-Google-Smtp-Source: AGHT+IEnnHZoZcdF3uE6zrCwwgdXbpIz9YT2W07VZCTkxd40dqLtSI4EQPUmmzKjws36BuW+Hlvjrw== X-Received: by 2002:a17:902:ec8d:b0:20c:c9db:7c45 with SMTP id d9443c01a7336-21183c9b37fmr241893075ad.20.1731430943999; Tue, 12 Nov 2024 09:02:23 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21177e6b74bsm95792965ad.247.2024.11.12.09.02.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:23 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 05/10] usb/uhci: Add support for usb-uhci-sysbus Date: Tue, 12 Nov 2024 09:01:47 -0800 Message-ID: <20241112170152.217664-6-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=groeck7@gmail.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 hw/arm/Kconfig | 1 + hw/usb/Kconfig | 4 ++ hw/usb/hcd-uhci-sysbus.c | 100 +++++++++++++++++++++++++++++++++++++++ hw/usb/hcd-uhci-sysbus.h | 23 +++++++++ hw/usb/meson.build | 1 + 5 files changed, 129 insertions(+) create mode 100644 hw/usb/hcd-uhci-sysbus.c create mode 100644 hw/usb/hcd-uhci-sysbus.h diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 1b25e73578..3f92ae429a 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -540,6 +540,7 @@ config ASPEED_SOC select MAX31785 select FSI_APB2OPB_ASPEED select AT24C + select USB_UHCI_SYSBUS config MPS2 bool diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index bab4d2d67d..f51aa82370 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -11,6 +11,10 @@ config USB_UHCI_PCI depends on PCI select USB_UHCI +config USB_UHCI_SYSBUS + bool + select USB_UHCI + config USB_OHCI bool select USB diff --git a/hw/usb/hcd-uhci-sysbus.c b/hw/usb/hcd-uhci-sysbus.c new file mode 100644 index 0000000000..3a6c56c3df --- /dev/null +++ b/hw/usb/hcd-uhci-sysbus.c @@ -0,0 +1,100 @@ +/* + * QEMU USB UHCI Emulation + * Copyright (c) 2006 Openedhand Ltd. + * Copyright (c) 2010 CodeSourcery + * Copyright (c) 2024 Red Hat, Inc. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/irq.h" +#include "qapi/error.h" +#include "qemu/module.h" +#include "qemu/timer.h" +#include "hw/usb.h" +#include "migration/vmstate.h" +#include "hw/sysbus.h" +#include "hw/qdev-dma.h" +#include "hw/qdev-properties.h" +#include "trace.h" +#include "hcd-uhci.h" +#include "hcd-uhci-sysbus.h" + +static void uhci_sysbus_reset(UHCIState *uhci) +{ + uhci_state_reset(uhci); +} + +static void uhci_sysbus_realize(DeviceState *dev, Error **errp) +{ + UHCISysBusState *s = SYSBUS_UHCI(dev); + UHCIState *uhci = &s->uhci; + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + Error *err = NULL; + + uhci->masterbus = s->masterbus; + uhci->firstport = s->firstport; + uhci->maxframes = s->maxframes; + uhci->frame_bandwidth = s->frame_bandwidth; + uhci->as = &address_space_memory; + uhci->uhci_reset = uhci_sysbus_reset; + + usb_uhci_init(uhci, dev, &err); + + if (err) { + error_propagate(errp, err); + return; + } + sysbus_init_irq(sbd, &uhci->irq); + sysbus_init_mmio(sbd, &uhci->mem); +} + +static void uhci_sysbus_reset_sysbus(DeviceState *dev) +{ + UHCISysBusState *s = SYSBUS_UHCI(dev); + UHCIState *uhci = &s->uhci; + + uhci_sysbus_reset(uhci); +} + +static Property uhci_sysbus_properties[] = { + DEFINE_PROP_STRING("masterbus", UHCISysBusState, masterbus), + DEFINE_PROP_UINT32("firstport", UHCISysBusState, firstport, 0), + DEFINE_PROP_UINT32("bandwidth", UHCISysBusState, frame_bandwidth, 1280), + DEFINE_PROP_UINT32("maxframes", UHCISysBusState, maxframes, 128), + DEFINE_PROP_END_OF_LIST(), +}; + +static void uhci_sysbus_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = uhci_sysbus_realize; + set_bit(DEVICE_CATEGORY_USB, dc->categories); + dc->desc = "UHCI USB Controller"; + device_class_set_props(dc, uhci_sysbus_properties); + device_class_set_legacy_reset(dc, uhci_sysbus_reset_sysbus); +} + +static const TypeInfo uhci_sysbus_types[] = { + { + .name = TYPE_SYSBUS_UHCI, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(UHCISysBusState), + .class_init = uhci_sysbus_class_init, + }, +}; + +DEFINE_TYPES(uhci_sysbus_types); diff --git a/hw/usb/hcd-uhci-sysbus.h b/hw/usb/hcd-uhci-sysbus.h new file mode 100644 index 0000000000..c491b9fc92 --- /dev/null +++ b/hw/usb/hcd-uhci-sysbus.h @@ -0,0 +1,23 @@ +#ifndef HW_USB_HCD_UHCI_SYSBUS_H +#define HW_USB_HCD_UHCI_SYSBUS_H + +#include "hcd-uhci.h" + +#define TYPE_SYSBUS_UHCI "sysbus-uhci" + +OBJECT_DECLARE_SIMPLE_TYPE(UHCISysBusState, SYSBUS_UHCI) + +struct UHCISysBusState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + UHCIState uhci; + + char *masterbus; + uint32_t firstport; + uint32_t frame_bandwidth; + uint32_t maxframes; + uint32_t num_ports; +}; + +#endif /* HW_USB_HCD_UHCI_SYSBUS_H */ diff --git a/hw/usb/meson.build b/hw/usb/meson.build index dc36e2d490..ff27aa7d04 100644 --- a/hw/usb/meson.build +++ b/hw/usb/meson.build @@ -14,6 +14,7 @@ system_ss.add(when: 'CONFIG_USB', if_true: files( # usb host adapters system_ss.add(when: 'CONFIG_USB_UHCI', if_true: files('hcd-uhci.c')) system_ss.add(when: 'CONFIG_USB_UHCI_PCI', if_true: files('hcd-uhci-pci.c')) +system_ss.add(when: 'CONFIG_USB_UHCI_SYSBUS', if_true: files('hcd-uhci-sysbus.c')) system_ss.add(when: 'CONFIG_USB_OHCI', if_true: files('hcd-ohci.c')) system_ss.add(when: 'CONFIG_USB_OHCI_PCI', if_true: files('hcd-ohci-pci.c')) system_ss.add(when: 'CONFIG_USB_OHCI_SYSBUS', if_true: files('hcd-ohci-sysbus.c')) From patchwork Tue Nov 12 17:01:48 2024 Content-Type: text/plain; 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Tue, 12 Nov 2024 09:02:24 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 06/10] usb/uhci: Add aspeed specific read and write functions Date: Tue, 12 Nov 2024 09:01:48 -0800 Message-ID: <20241112170152.217664-7-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=groeck7@gmail.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Aspeed uses non-standard UHCI register addresses. On top of that, registers are 32 bit wide instead of 16 bit. Map Aspeed UHCI addresses to standard UHCI addresses and where needed combine/split 32 bit accesses to solve the problem. In addition to that, Aspeed SoCs starting with AST2600 support and use EHCI companion mode on the second EHCI interface. Support this by moving the property initialization to the Aspeed class initialization code. Since the USB ports are part of the SoC and always present, set user_creatable to false for the Aspeed UHCI controller. Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 - Added support for EHCI companion mode hw/usb/hcd-uhci-sysbus.c | 104 ++++++++++++++++++++++++++++++++++++++- hw/usb/hcd-uhci-sysbus.h | 11 +++++ 2 files changed, 114 insertions(+), 1 deletion(-) diff --git a/hw/usb/hcd-uhci-sysbus.c b/hw/usb/hcd-uhci-sysbus.c index 3a6c56c3df..628b6601a1 100644 --- a/hw/usb/hcd-uhci-sysbus.c +++ b/hw/usb/hcd-uhci-sysbus.c @@ -20,7 +20,9 @@ #include "qemu/osdep.h" #include "hw/irq.h" +#include "hw/usb/uhci-regs.h" #include "qapi/error.h" +#include "qemu/log.h" #include "qemu/module.h" #include "qemu/timer.h" #include "hw/usb.h" @@ -84,10 +86,104 @@ static void uhci_sysbus_class_init(ObjectClass *klass, void *data) dc->realize = uhci_sysbus_realize; set_bit(DEVICE_CATEGORY_USB, dc->categories); dc->desc = "UHCI USB Controller"; - device_class_set_props(dc, uhci_sysbus_properties); device_class_set_legacy_reset(dc, uhci_sysbus_reset_sysbus); } +static hwaddr aspeed_uhci_chip_to_uhci(hwaddr addr) +{ + switch (addr) { + case 0x00: + return UHCI_USBCMD; + case 0x04: + return UHCI_USBSTS; + case 0x08: + return UHCI_USBINTR; + case 0x0c: + return UHCI_USBFLBASEADD; + case 0x80: + return UHCI_USBFRNUM; + case 0x84: + return UHCI_USBSOF; + case 0x88: + return UHCI_USBPORTSC1; + case 0x8c: + return UHCI_USBPORTSC2; + case 0x90: + return UHCI_USBPORTSC3; + case 0x94: + return UHCI_USBPORTSC4; + default: /* unimplemented */ + qemu_log_mask(LOG_UNIMP, "Unimplemented Aspeed UHCI register 0x%lx\n", + addr); + return 0x20; + } +} + +/* + * Aspeed UHCI registers are 32 bit wide. + * Convert to 16 bit to access standard UHCI code. + */ +static uint64_t aspeed_uhci_port_read(void *opaque, hwaddr addr, unsigned size) +{ + UHCIState *uhci = opaque; + MemoryRegion *mr = &uhci->mem; + hwaddr uaddr = aspeed_uhci_chip_to_uhci(addr); + + if (uaddr == UHCI_USBFLBASEADD) { + return mr->ops->read(opaque, uaddr, 2) | + mr->ops->read(opaque, uaddr + 2, 2) << 16; + } + return mr->ops->read(opaque, uaddr, 2); +} + +static void aspeed_uhci_port_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + UHCIState *uhci = opaque; + MemoryRegion *mr = &uhci->mem; + hwaddr uaddr = aspeed_uhci_chip_to_uhci(addr); + + if (uaddr == UHCI_USBFLBASEADD) { + mr->ops->write(opaque, uaddr, val & 0xffff, 2); + mr->ops->write(opaque, uaddr + 2, val >> 16, 2); + } else { + mr->ops->write(opaque, uaddr, val, 2); + } +} + +static const MemoryRegionOps aspeed_uhci_mmio_ops = { + .read = aspeed_uhci_port_read, + .write = aspeed_uhci_port_write, + .valid.min_access_size = 4, + .valid.max_access_size = 4, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static void uhci_sysbus_aspeed_realize(DeviceState *dev, Error **errp) +{ + UHCISysBusState *s = SYSBUS_UHCI(dev); + ASPEEDUHCIState *f = ASPEED_UHCI(dev); + UHCIState *uhci = &s->uhci; + + uhci_sysbus_realize(dev, errp); + + memory_region_init_io(&f->mem_aspeed, OBJECT(f), &aspeed_uhci_mmio_ops, + uhci, "aspeed", 0x100); + memory_region_add_subregion(&uhci->mem, 0, &f->mem_aspeed); +} + +static void uhci_sysbus_aspeed_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = uhci_sysbus_aspeed_realize; + set_bit(DEVICE_CATEGORY_USB, dc->categories); + dc->desc = "ASPEED UHCI USB Controller"; + device_class_set_legacy_reset(dc, uhci_sysbus_reset_sysbus); + device_class_set_props(dc, uhci_sysbus_properties); + dc->user_creatable = false; +} + static const TypeInfo uhci_sysbus_types[] = { { .name = TYPE_SYSBUS_UHCI, @@ -95,6 +191,12 @@ static const TypeInfo uhci_sysbus_types[] = { .instance_size = sizeof(UHCISysBusState), .class_init = uhci_sysbus_class_init, }, + { + .name = TYPE_ASPEED_UHCI, + .parent = TYPE_SYSBUS_UHCI, + .instance_size = sizeof(ASPEEDUHCIState), + .class_init = uhci_sysbus_aspeed_class_init, + }, }; DEFINE_TYPES(uhci_sysbus_types); diff --git a/hw/usb/hcd-uhci-sysbus.h b/hw/usb/hcd-uhci-sysbus.h index c491b9fc92..75c4716c40 100644 --- a/hw/usb/hcd-uhci-sysbus.h +++ b/hw/usb/hcd-uhci-sysbus.h @@ -4,6 +4,7 @@ #include "hcd-uhci.h" #define TYPE_SYSBUS_UHCI "sysbus-uhci" +#define TYPE_ASPEED_UHCI "aspeed-uhci" OBJECT_DECLARE_SIMPLE_TYPE(UHCISysBusState, SYSBUS_UHCI) @@ -20,4 +21,14 @@ struct UHCISysBusState { uint32_t num_ports; }; +OBJECT_DECLARE_SIMPLE_TYPE(ASPEEDUHCIState, ASPEED_UHCI) + +struct ASPEEDUHCIState { + /*< private >*/ + UHCISysBusState parent_obj; + /*< public >*/ + + MemoryRegion mem_aspeed; +}; + #endif /* HW_USB_HCD_UHCI_SYSBUS_H */ From patchwork Tue Nov 12 17:01:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05217D42BB3 for ; Tue, 12 Nov 2024 17:08:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuJ4-0003xH-F9; Tue, 12 Nov 2024 12:03:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHg-0003KG-Bw; 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Tue, 12 Nov 2024 09:02:27 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21177e42782sm95357005ad.157.2024.11.12.09.02.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:26 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 07/10] aspeed: Add uhci support for ast2600 Date: Tue, 12 Nov 2024 09:01:49 -0800 Message-ID: <20241112170152.217664-8-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=groeck7@gmail.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add UHCI support for the ast2600 SoC. With this patch, UHCI support is successfully enabled on the rainier-bmc and ast2600-evb machines. Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 - Use EHCI companion mode hw/arm/aspeed_ast2600.c | 20 ++++++++++++++++++++ include/hw/arm/aspeed_soc.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index be3eb70cdd..0592bfb2bf 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -33,6 +33,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { [ASPEED_DEV_SPI2] = 0x1E631000, [ASPEED_DEV_EHCI1] = 0x1E6A1000, [ASPEED_DEV_EHCI2] = 0x1E6A3000, + [ASPEED_DEV_UHCI] = 0x1E6B0000, [ASPEED_DEV_MII1] = 0x1E650000, [ASPEED_DEV_MII2] = 0x1E650008, [ASPEED_DEV_MII3] = 0x1E650010, @@ -110,6 +111,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_DEV_SDHCI] = 43, [ASPEED_DEV_EHCI1] = 5, [ASPEED_DEV_EHCI2] = 9, + [ASPEED_DEV_UHCI] = 10, [ASPEED_DEV_EMMC] = 15, [ASPEED_DEV_GPIO] = 40, [ASPEED_DEV_GPIO_1_8V] = 11, @@ -206,6 +208,8 @@ static void aspeed_soc_ast2600_init(Object *obj) TYPE_PLATFORM_EHCI); } + object_initialize_child(obj, "uhci", &s->uhci, TYPE_ASPEED_UHCI); + snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); object_initialize_child(obj, "sdmc", &s->sdmc, typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), @@ -294,6 +298,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); qemu_irq irq; g_autofree char *sram_name = NULL; + g_autofree char *usb_bus = g_strdup_printf("usb-bus.%u", sc->ehcis_num - 1); /* Default boot region (SPI memory or ROMs) */ memory_region_init(&s->spi_boot_container, OBJECT(s), @@ -472,6 +477,10 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* EHCI */ for (i = 0; i < sc->ehcis_num; i++) { + if (i == sc->ehcis_num - 1) { + object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable", + true, &error_fatal); + } if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) { return; } @@ -481,6 +490,17 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); } + /* UHCI */ + object_property_set_str(OBJECT(&s->uhci), "masterbus", usb_bus, + &error_fatal); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->uhci), errp)) { + return; + } + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->uhci), 0, + sc->memmap[ASPEED_DEV_UHCI]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->uhci), 0, + aspeed_soc_get_irq(s, ASPEED_DEV_UHCI)); + /* SDMC - SDRAM Memory Controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { return; diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 689f52dae8..e579911ced 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -34,6 +34,7 @@ #include "hw/gpio/aspeed_gpio.h" #include "hw/sd/aspeed_sdhci.h" #include "hw/usb/hcd-ehci.h" +#include "hw/usb/hcd-uhci-sysbus.h" #include "qom/object.h" #include "hw/misc/aspeed_lpc.h" #include "hw/misc/unimp.h" @@ -72,6 +73,7 @@ struct AspeedSoCState { AspeedSMCState fmc; AspeedSMCState spi[ASPEED_SPIS_NUM]; EHCISysBusState ehci[ASPEED_EHCIS_NUM]; + ASPEEDUHCIState uhci; AspeedSBCState sbc; AspeedSLIState sli; AspeedSLIState sliio; @@ -193,6 +195,7 @@ enum { ASPEED_DEV_SPI2, ASPEED_DEV_EHCI1, ASPEED_DEV_EHCI2, + ASPEED_DEV_UHCI, ASPEED_DEV_VIC, ASPEED_DEV_INTC, ASPEED_DEV_SDMC, From patchwork Tue Nov 12 17:01:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 329B3D42BB3 for ; Tue, 12 Nov 2024 17:04:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuJC-00045i-4i; Tue, 12 Nov 2024 12:04:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHh-0003Kg-8r; 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Tue, 12 Nov 2024 09:02:28 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21177cfb0ecsm95635775ad.0.2024.11.12.09.02.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:28 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [RESEND PATCH 08/10] aspeed: Add uhci support for ast2400 and ast2500 Date: Tue, 12 Nov 2024 09:01:50 -0800 Message-ID: <20241112170152.217664-9-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=groeck7@gmail.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add UHCI support for ast2400 and ast2500 SoCs. With this patch, the UHCI port is successfully enabled on the ast2500-evb machine. Note that the EHCI controller on AST2400 and AST2500 does not support companion mode, so the UHCI controller is instantiated as stand-alone device and creates an additional USB bus. Reviewed-by: Cédric Le Goater Signed-off-by: Guenter Roeck --- Changes since RFC: - Rebased to v9.1.0-1673-g134b443512 - Added Reviewed-by: tag - Added explanation for not using EHCI companion mode hw/arm/aspeed_ast2400.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/arm/aspeed_ast2400.c b/hw/arm/aspeed_ast2400.c index ecc81ecc79..8a5d21459d 100644 --- a/hw/arm/aspeed_ast2400.c +++ b/hw/arm/aspeed_ast2400.c @@ -31,6 +31,7 @@ static const hwaddr aspeed_soc_ast2400_memmap[] = { [ASPEED_DEV_FMC] = 0x1E620000, [ASPEED_DEV_SPI1] = 0x1E630000, [ASPEED_DEV_EHCI1] = 0x1E6A1000, + [ASPEED_DEV_UHCI] = 0x1E6B0000, [ASPEED_DEV_VIC] = 0x1E6C0000, [ASPEED_DEV_SDMC] = 0x1E6E0000, [ASPEED_DEV_SCU] = 0x1E6E2000, @@ -68,6 +69,7 @@ static const hwaddr aspeed_soc_ast2500_memmap[] = { [ASPEED_DEV_SPI2] = 0x1E631000, [ASPEED_DEV_EHCI1] = 0x1E6A1000, [ASPEED_DEV_EHCI2] = 0x1E6A3000, + [ASPEED_DEV_UHCI] = 0x1E6B0000, [ASPEED_DEV_VIC] = 0x1E6C0000, [ASPEED_DEV_SDMC] = 0x1E6E0000, [ASPEED_DEV_SCU] = 0x1E6E2000, @@ -107,6 +109,7 @@ static const int aspeed_soc_ast2400_irqmap[] = { [ASPEED_DEV_FMC] = 19, [ASPEED_DEV_EHCI1] = 5, [ASPEED_DEV_EHCI2] = 13, + [ASPEED_DEV_UHCI] = 14, [ASPEED_DEV_SDMC] = 0, [ASPEED_DEV_SCU] = 21, [ASPEED_DEV_ADC] = 31, @@ -199,6 +202,8 @@ static void aspeed_ast2400_soc_init(Object *obj) TYPE_PLATFORM_EHCI); } + object_initialize_child(obj, "uhci", &s->uhci, TYPE_ASPEED_UHCI); + snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); object_initialize_child(obj, "sdmc", &s->sdmc, typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), @@ -393,6 +398,15 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); } + /* UHCI */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->uhci), errp)) { + return; + } + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->uhci), 0, + sc->memmap[ASPEED_DEV_UHCI]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->uhci), 0, + aspeed_soc_get_irq(s, ASPEED_DEV_UHCI)); + /* SDMC - SDRAM Memory Controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { return; From patchwork Tue Nov 12 17:01:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872608 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7CD64D42BAF for ; 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Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 09/10] usb-hub: Add support for v2.0 hubs Date: Tue, 12 Nov 2024 09:01:51 -0800 Message-ID: <20241112170152.217664-10-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=groeck7@gmail.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org When adding a high speed USB device to the USB hub supported by qemu, it is added in full speed mode. Here is an example for a storage device. /: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=platform-uhci/2p, 12M |__ Port 002: Dev 002, If 0, Class=Hub, Driver=hub/8p, 12M |__ Port 001: Dev 003, If 0, Class=Human Interface Device, Driver=usbhid, 12M |__ Port 002: Dev 004, If 0, Class=Human Interface Device, Driver=usbhid, 12M |__ Port 003: Dev 005, If 0, Class=Mass Storage, Driver=usb-storage, 12M This also triggers messages such as usb 1-2.3: new full-speed USB device number 5 using platform-uhci usb 1-2.3: not running at top speed; connect to a high speed hub when such devices are instantiated in the host (example from Linux). Add basic support for USB v2.0 hubs to solve the problem. The usb_version device parameter configures the USB version; version 1 is default for compatibility reasons. Example: -device usb-hub,bus=usb-bus.1,port=1,usb_version=2 This command line parameter can be used to attach devices to the hub in high speed mode, as seen in the following example. /: Bus 002.Port 001: Dev 001, Class=root_hub, Driver=ehci-platform/6p, 480M |__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/8p, 480M |__ Port 002: Dev 004, If 0, Class=Mass Storage, Driver=usb-storage, 480M and usb 2-1.2: new high-speed USB device number 4 using ehci-platform usb 2-1.2: New USB device found, idVendor=46f4, idProduct=0001, bcdDevice= 0.00 To distinguish v1 from v2 instantiated hubs, the device version is set to 2.01 (from 1.01) if the hub ist instantiated as USB v2 hub. The product name is set to "QEMU USB v2.0 Hub". Signed-off-by: Guenter Roeck --- Changes since RFC: - New patch hw/usb/dev-hub.c | 84 +++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 76 insertions(+), 8 deletions(-) diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index 06e9537d03..4da91d151c 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -46,6 +46,7 @@ struct USBHubState { USBDevice dev; USBEndpoint *intr; uint32_t num_ports; + uint32_t usb_version; bool port_power; QEMUTimer *port_timer; USBHubPort ports[MAX_PORTS]; @@ -100,12 +101,14 @@ OBJECT_DECLARE_SIMPLE_TYPE(USBHubState, USB_HUB) enum { STR_MANUFACTURER = 1, STR_PRODUCT, + STR_PRODUCT_V2, STR_SERIALNUMBER, }; static const USBDescStrings desc_strings = { [STR_MANUFACTURER] = "QEMU", [STR_PRODUCT] = "QEMU USB Hub", + [STR_PRODUCT_V2] = "QEMU USB v2.0 Hub", [STR_SERIALNUMBER] = "314159", }; @@ -123,6 +126,20 @@ static const USBDescIface desc_iface_hub = { } }; +static const USBDescIface desc_iface_hub_v2 = { + .bInterfaceNumber = 0, + .bNumEndpoints = 1, + .bInterfaceClass = USB_CLASS_HUB, + .eps = (USBDescEndpoint[]) { + { + .bEndpointAddress = USB_DIR_IN | 0x01, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .wMaxPacketSize = 512, + .bInterval = 10, + }, + } +}; + static const USBDescDevice desc_device_hub = { .bcdUSB = 0x0110, .bDeviceClass = USB_CLASS_HUB, @@ -140,6 +157,23 @@ static const USBDescDevice desc_device_hub = { }, }; +static const USBDescDevice desc_device_hub_v2 = { + .bcdUSB = 0x0200, + .bDeviceClass = USB_CLASS_HUB, + .bMaxPacketSize0 = 64, + .bNumConfigurations = 1, + .confs = (USBDescConfig[]) { + { + .bNumInterfaces = 1, + .bConfigurationValue = 1, + .bmAttributes = USB_CFG_ATT_ONE | USB_CFG_ATT_SELFPOWER | + USB_CFG_ATT_WAKEUP, + .nif = 1, + .ifs = &desc_iface_hub_v2, + }, + }, +}; + static const USBDesc desc_hub = { .id = { .idVendor = 0x0409, @@ -153,6 +187,20 @@ static const USBDesc desc_hub = { .str = desc_strings, }; +static const USBDesc desc_hub_v2 = { + .id = { + .idVendor = 0x0409, + .idProduct = 0x55aa, + .bcdDevice = 0x0201, + .iManufacturer = STR_MANUFACTURER, + .iProduct = STR_PRODUCT_V2, + .iSerialNumber = STR_SERIALNUMBER, + }, + .full = &desc_device_hub, + .high = &desc_device_hub_v2, + .str = desc_strings, +}; + static const uint8_t qemu_hub_hub_descriptor[] = { 0x00, /* u8 bLength; patched in later */ @@ -195,15 +243,20 @@ static bool usb_hub_port_clear(USBHubPort *port, uint16_t status) return usb_hub_port_change(port, status); } -static bool usb_hub_port_update(USBHubPort *port) +static bool usb_hub_port_update(USBHubState *s, USBHubPort *port) { bool notify = false; if (port->port.dev && port->port.dev->attached) { notify = usb_hub_port_set(port, PORT_STAT_CONNECTION); - if (port->port.dev->speed == USB_SPEED_LOW) { + if (s->usb_version == 2 && port->port.dev->speed == USB_SPEED_HIGH) { + usb_hub_port_clear(port, PORT_STAT_LOW_SPEED); + usb_hub_port_set(port, PORT_STAT_HIGH_SPEED); + } else if (port->port.dev->speed == USB_SPEED_LOW) { + usb_hub_port_clear(port, PORT_STAT_HIGH_SPEED); usb_hub_port_set(port, PORT_STAT_LOW_SPEED); } else { + usb_hub_port_clear(port, PORT_STAT_HIGH_SPEED); usb_hub_port_clear(port, PORT_STAT_LOW_SPEED); } } @@ -217,7 +270,7 @@ static void usb_hub_port_update_timer(void *opaque) int i; for (i = 0; i < s->num_ports; i++) { - notify |= usb_hub_port_update(&s->ports[i]); + notify |= usb_hub_port_update(s, &s->ports[i]); } if (notify) { usb_wakeup(s->intr, 0); @@ -230,7 +283,7 @@ static void usb_hub_attach(USBPort *port1) USBHubPort *port = &s->ports[port1->index]; trace_usb_hub_attach(s->dev.addr, port1->index + 1); - usb_hub_port_update(port); + usb_hub_port_update(s, port); usb_wakeup(s->intr, 0); } @@ -318,7 +371,7 @@ static void usb_hub_handle_reset(USBDevice *dev) port->wPortStatus = 0; port->wPortChange = 0; usb_hub_port_set(port, PORT_STAT_POWER); - usb_hub_port_update(port); + usb_hub_port_update(s, port); } } @@ -593,6 +646,19 @@ static void usb_hub_realize(USBDevice *dev, Error **errp) USBHubPort *port; int i; + switch (s->usb_version) { + case 1: + dev->usb_desc = &desc_hub; + break; + case 2: + dev->usb_desc = &desc_hub_v2; + break; + default: + error_setg(errp, "Unsupported usb version %d for usb hub", + s->usb_version); + return; + } + if (s->num_ports < 1 || s->num_ports > MAX_PORTS) { error_setg(errp, "num_ports (%d) out of range (1..%d)", s->num_ports, MAX_PORTS); @@ -613,7 +679,8 @@ static void usb_hub_realize(USBDevice *dev, Error **errp) port = &s->ports[i]; usb_register_port(usb_bus_from_device(dev), &port->port, s, i, &usb_hub_port_ops, - USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL); + USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL | + ((s->usb_version == 2) ? USB_SPEED_MASK_HIGH : 0)); usb_port_location(&port->port, dev->port, i+1); } usb_hub_handle_reset(dev); @@ -650,7 +717,7 @@ static const VMStateDescription vmstate_usb_hub_port_timer = { static const VMStateDescription vmstate_usb_hub = { .name = "usb-hub", - .version_id = 1, + .version_id = 2, .minimum_version_id = 1, .fields = (const VMStateField[]) { VMSTATE_USB_DEVICE(dev, USBHubState), @@ -667,6 +734,7 @@ static const VMStateDescription vmstate_usb_hub = { static Property usb_hub_properties[] = { DEFINE_PROP_UINT32("ports", USBHubState, num_ports, 8), DEFINE_PROP_BOOL("port-power", USBHubState, port_power, false), + DEFINE_PROP_UINT32("usb_version", USBHubState, usb_version, 1), DEFINE_PROP_END_OF_LIST(), }; @@ -677,12 +745,12 @@ static void usb_hub_class_initfn(ObjectClass *klass, void *data) uc->realize = usb_hub_realize; uc->product_desc = "QEMU USB Hub"; - uc->usb_desc = &desc_hub; uc->find_device = usb_hub_find_device; uc->handle_reset = usb_hub_handle_reset; uc->handle_control = usb_hub_handle_control; uc->handle_data = usb_hub_handle_data; uc->unrealize = usb_hub_unrealize; + uc->handle_attach = usb_desc_attach; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); dc->fw_name = "hub"; dc->vmsd = &vmstate_usb_hub; From patchwork Tue Nov 12 17:01:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 13872607 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BBFAD42BB4 for ; Tue, 12 Nov 2024 17:05:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAuJT-0004NJ-SE; Tue, 12 Nov 2024 12:04:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAuHk-0003L6-J8; Tue, 12 Nov 2024 12:02:48 -0500 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tAuHj-0001Vf-4Q; Tue, 12 Nov 2024 12:02:36 -0500 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-7ae3d7222d4so4275040a12.3; Tue, 12 Nov 2024 09:02:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1731430952; x=1732035752; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:from:to:cc:subject:date :message-id:reply-to; bh=fcTg55TVLZf6OfSuBaidjAn4zuepTjhmMHoIrKI/Xb4=; b=Fb4xriYcGpyCCSmMags/421Dozpn2UaIw2I8jNA80R2zIzPZKQ+CZo2rrBrcHbfx8L RnCVHmwytguLQPEPvV3PXIcFA87+0qyaa5z7sgwkGZ9XbZ+eKk3VpbCyP2hKp7jvPNgb OOiHFt5u1PgdykNneAwdQhosjREleGexg+Tdcr+ySCsLsfEOBlDg+AXsdAX2Hxg5HhC6 JRbhjGSSVviowakAp5p3P+EQCgvJH3p3BKy+0rcduiVwlZGf2fgMKyNRzdpdN9PiJJlF D5FPELENmuIXUOvbuczOeNGzKkveqs+R/NGJgM4S/hfyJhdyYfxL496PnzZOzfx50AuL Skpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731430952; x=1732035752; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=fcTg55TVLZf6OfSuBaidjAn4zuepTjhmMHoIrKI/Xb4=; b=MVX8Iav1VdWS0DmvB2tWwFd7Cu2BkGEvNcsSd+xSlGtnGwQbDjGeBytH9WU72EMqz9 ri34nCq2QVDlkPTLzKi4Nr+y2u0FxB/EJT1uJeEPFAvJ0tNnpDXeIYf1IZRD0ERgEB/G w3ys7/3Gm8X612BIHpoerDBFbQcnjGwI1+S9SclyY4+cys0V4t3Yh4R+80iZFtaOxbz/ es6xsbYR+fAQYJ7nsfRvpiC04Q2Utl6Ipww64sVDOW20OCBFyD6rlfiXcb65jHDSO1Ho H5fn8tEPEzcx1PYXReQaXbAW4iNDeFTj0MQwHWLRSImmN8qns8Mj+gKq86pQIwVJpLRV 0zBg== X-Forwarded-Encrypted: i=1; AJvYcCWCLfr0yMt0NbG8oZ8qmTLFiXSWzd2Xyzbt/bqdcdqS6vIQGpUEsyVj6Tz+GrRttMTItqQcNWC3Hg==@nongnu.org X-Gm-Message-State: AOJu0YyVQMiYHtYFnQ1Nnbao7S1Zj38eJ92trMUpdbAZXK31t6ZnPyr6 7ej/bWpnegY7FsRHOBKFPyDTX1MG1eg/pEu+ToyHK4+VRXQAcyOVvXgHuw== X-Google-Smtp-Source: AGHT+IEo0iBRS8PRdHLawG2F8k7ytxnHA6MKmimMdTNLSR/HGwzY1IKpyhxTro1TN3tvLPQvi0i04w== X-Received: by 2002:a17:90b:4c4c:b0:2e2:cf6d:33fd with SMTP id 98e67ed59e1d1-2e9b174821bmr22673530a91.31.1731430952418; Tue, 12 Nov 2024 09:02:32 -0800 (PST) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e9a5f8f4e2sm12046793a91.26.2024.11.12.09.02.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:02:31 -0800 (PST) From: Guenter Roeck To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , Andrew Jeffery , Joel Stanley , BALATON Zoltan , "Michael S . Tsirkin" , Marcel Apfelbaum , =?utf-8?q?Herv=C3=A9_Poussin?= =?utf-8?q?eau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Thomas Huth , qemu-arm@nongnu.org, Guenter Roeck Subject: [RESEND PATCH 10/10] usb-hub: Fix handling port power control messages Date: Tue, 12 Nov 2024 09:01:52 -0800 Message-ID: <20241112170152.217664-11-linux@roeck-us.net> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112170152.217664-1-linux@roeck-us.net> References: <20241112170152.217664-1-linux@roeck-us.net> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=groeck7@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The ClearPortFeature control message fails for PORT_POWER because there is no break; at the end of the case statement, causing it to fall through to the failure handler. Add the missing break; to solve the problem. Signed-off-by: Guenter Roeck --- Change from RFC: New patch hw/usb/dev-hub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index 4da91d151c..2872c6712a 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -532,6 +532,7 @@ static void usb_hub_handle_control(USBDevice *dev, USBPacket *p, usb_hub_port_clear(port, PORT_STAT_SUSPEND); port->wPortChange = 0; } + break; default: goto fail; }