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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724079aaa01sm12644376b3a.100.2024.11.12.21.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 21:20:01 -0800 (PST) From: Joey Lu To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, richardcochran@gmail.com Cc: alexandre.torgue@foss.st.com, joabreu@synopsys.com, ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, Joey Lu Subject: [PATCH v2 1/3] dt-bindings: net: nuvoton: Add schema for MA35 family GMAC Date: Wed, 13 Nov 2024 13:18:55 +0800 Message-Id: <20241113051857.12732-2-a0987203069@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241113051857.12732-1-a0987203069@gmail.com> References: <20241113051857.12732-1-a0987203069@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Create initial schema for Nuvoton MA35 family Gigabit MAC. Signed-off-by: Joey Lu --- .../bindings/net/nuvoton,ma35d1-dwmac.yaml | 170 ++++++++++++++++++ 1 file changed, 170 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml b/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml new file mode 100644 index 000000000000..45eaf13467b3 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml @@ -0,0 +1,170 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton DWMAC glue layer controller + +maintainers: + - Joey Lu + +description: + Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on + Synopsys DesignWare MAC (version 3.73a). + +# We need a select here so we don't match all nodes with 'snps,dwmac' +select: + properties: + compatible: + contains: + enum: + - nuvoton,ma35d1-dwmac + required: + - compatible + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + - items: + - enum: + - nuvoton,ma35d1-dwmac + - const: snps,dwmac-3.70a + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + items: + - description: MAC clock + - description: PTP clock + + clock-names: + minItems: 2 + items: + - const: stmmaceth + - const: ptp_ref + + nuvoton,sys: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to access syscon registers. + - description: GMAC interface ID. + enum: [0, 1] + description: + A phandle to the syscon with one argument that configures system registers + for MA35D1's two GMACs. The argument specifies the GMAC interface ID. + + resets: + maxItems: 1 + + reset-names: + items: + - const: stmmaceth + + phy-mode: + enum: + - rmii + - rgmii + - rgmii-id + - rgmii-txid + - rgmii-rxid + + phy-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Specifies a reference to a node representing a PHY device. + + tx-internal-delay-ps: + enum: [0, 2000] + default: 0 + description: + RGMII TX path delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. + + rx-internal-delay-ps: + enum: [0, 2000] + default: 0 + description: + RGMII RX path delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. + + mdio: + $ref: /schemas/net/mdio.yaml# + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - nuvoton,sys + - resets + - reset-names + - phy-mode + +examples: + - | + #include + #include + #include + //Example 1 + gmac0: ethernet@40120000 { + compatible = "nuvoton,ma35d1-dwmac"; + reg = <0x0 0x40120000 0x0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 0>; + resets = <&sys MA35D1_RESET_GMAC0>; + reset-names = "stmmaceth"; + + phy-mode = "rgmii-id"; + phy-handle = <ð_phy0>; + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + }; + + - | + //Example 2 + gmac1: ethernet@40130000 { + compatible = "nuvoton,ma35d1-dwmac"; + reg = <0x0 0x40130000 0x0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC1_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 1>; + resets = <&sys MA35D1_RESET_GMAC1>; + reset-names = "stmmaceth"; + + phy-mode = "rmii"; + phy-handle = <ð_phy1>; + mdio1 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy1: ethernet-phy@1 { + reg = <1>; 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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724079aaa01sm12644376b3a.100.2024.11.12.21.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 21:20:05 -0800 (PST) From: Joey Lu To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, richardcochran@gmail.com Cc: alexandre.torgue@foss.st.com, joabreu@synopsys.com, ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, Joey Lu Subject: [PATCH v2 2/3] arm64: dts: nuvoton: Add Ethernet nodes Date: Wed, 13 Nov 2024 13:18:56 +0800 Message-Id: <20241113051857.12732-3-a0987203069@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241113051857.12732-1-a0987203069@gmail.com> References: <20241113051857.12732-1-a0987203069@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add GMAC nodes for our MA35D1 development boards: two RGMII interfaces for SOM board, and one RGMII and one RMII interface for IoT board. Signed-off-by: Joey Lu --- .../boot/dts/nuvoton/ma35d1-iot-512m.dts | 12 +++++ .../boot/dts/nuvoton/ma35d1-som-256m.dts | 10 ++++ arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 52 +++++++++++++++++++ 3 files changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts index 9482bec1aa57..5cc712ae92d8 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts @@ -18,6 +18,8 @@ aliases { serial12 = &uart12; serial13 = &uart13; serial14 = &uart14; + ethernet0 = &gmac0; + ethernet1 = &gmac1; }; chosen { @@ -126,3 +128,13 @@ &uart14 { pinctrl-0 = <&pinctrl_uart14>; status = "okay"; }; + +&gmac0 { + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rmii"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts index f6f20a17e501..08f5a7b5b507 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts @@ -18,6 +18,8 @@ aliases { serial12 = &uart12; serial14 = &uart14; serial16 = &uart16; + ethernet0 = ð0; + ethernet1 = ð1; }; chosen { @@ -129,3 +131,11 @@ &uart16 { pinctrl-0 = <&pinctrl_uart16>; status = "okay"; }; + +&gmac0 { + status = "okay"; +}; + +&gmac1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi index e51b98f5bdce..7f7c7f8b7ad3 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi @@ -379,5 +379,57 @@ uart16: serial@40880000 { clocks = <&clk UART16_GATE>; status = "disabled"; }; + + gmac0: ethernet@40120000 { + compatible = "nuvoton,ma35d1-dwmac"; + reg = <0x0 0x40120000 0x0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 0>; + resets = <&sys MA35D1_RESET_GMAC0>; + reset-names = "stmmaceth"; + status = "disabled"; + + phy-mode = "rgmii-id"; + phy-handle = <ð_phy0>; + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + }; + + gmac1: ethernet@40130000 { + compatible = "nuvoton,ma35d1-dwmac"; + reg = <0x0 0x40130000 0x0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC1_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 1>; + resets = <&sys MA35D1_RESET_GMAC1>; + reset-names = "stmmaceth"; + status = "disabled"; + + phy-mode = "rgmii-id"; + phy-handle = <ð_phy1>; + mdio1 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + }; }; }; From patchwork Wed Nov 13 05:18:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Lu X-Patchwork-Id: 13873161 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-oa1-f42.google.com (mail-oa1-f42.google.com [209.85.160.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29EB5172BCE; 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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724079aaa01sm12644376b3a.100.2024.11.12.21.20.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 21:20:08 -0800 (PST) From: Joey Lu To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, richardcochran@gmail.com Cc: alexandre.torgue@foss.st.com, joabreu@synopsys.com, ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, Joey Lu Subject: [PATCH v2 3/3] net: stmmac: dwmac-nuvoton: Add dwmac support for MA35 family Date: Wed, 13 Nov 2024 13:18:57 +0800 Message-Id: <20241113051857.12732-4-a0987203069@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241113051857.12732-1-a0987203069@gmail.com> References: <20241113051857.12732-1-a0987203069@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add support for Gigabit Ethernet on Nuvoton MA35 series using dwmac driver. Signed-off-by: Joey Lu --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-nuvoton.c | 179 ++++++++++++++++++ 3 files changed, 191 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 05cc07b8f48c..55d94f669be3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -121,6 +121,17 @@ config DWMAC_MESON the stmmac device driver. This driver is used for Meson6, Meson8, Meson8b and GXBB SoCs. +config DWMAC_NUVOTON + tristate "Nuvoton MA35 dwmac support" + default ARCH_MA35 + depends on OF && (ARCH_MA35 || COMPILE_TEST) + select MFD_SYSCON + help + Support for Ethernet controller on Nuvoton MA35 series SoC. + + This selects the Nuvoton MA35 series SoC glue layer support + for the stmmac device driver. + config DWMAC_QCOM_ETHQOS tristate "Qualcomm ETHQOS support" default ARCH_QCOM diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index c2f0e91f6bf8..c08fcfdd7b31 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o obj-$(CONFIG_DWMAC_MEDIATEK) += dwmac-mediatek.o obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o +obj-$(CONFIG_DWMAC_NUVOTON) += dwmac-nuvoton.o obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o obj-$(CONFIG_DWMAC_RZN1) += dwmac-rzn1.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c new file mode 100644 index 000000000000..68c71d2b46f4 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c @@ -0,0 +1,179 @@ +// SPDX-License-Identifier: GPL-2.0-only +/** + * dwmac-nuvoton.c - Nuvoton MA35 series DWMAC specific glue layer + * + * Copyright (C) 2024 Nuvoton Technology Corp. + * + * Author: Joey Lu + */ + +#include +#include +#include +#include +#include +#include + +#include "stmmac.h" +#include "stmmac_platform.h" + +#define PATHDLY_DEC 134 +#define TXDLY_OFST 16 +#define TXDLY_MSK GENMASK(19, 16) +#define RXDLY_OFST 20 +#define RXDLY_MSK GENMASK(23, 20) + +#define REG_SYS_GMAC0MISCR 0x108 +#define REG_SYS_GMAC1MISCR 0x10C + +#define MISCR_RMII BIT(0) + +struct nvt_priv_data { + struct platform_device *pdev; + struct regmap *regmap; +}; + +static struct nvt_priv_data * +nuvoton_gmac_setup(struct platform_device *pdev, struct plat_stmmacenet_data *plat) +{ + struct device *dev = &pdev->dev; + struct nvt_priv_data *bsp_priv; + phy_interface_t phy_mode; + u32 tx_delay, rx_delay; + u32 macid, arg, reg; + + bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL); + if (!bsp_priv) + return ERR_PTR(-ENOMEM); + + bsp_priv->regmap = + syscon_regmap_lookup_by_phandle_args(dev->of_node, "nuvoton,sys", 1, &macid); + if (IS_ERR(bsp_priv->regmap)) { + dev_err(dev, "Failed to get sys register\n"); + return ERR_PTR(-ENODEV); + } + if (macid > 1) { + dev_err(dev, "Invalid sys arguments\n"); + return ERR_PTR(-EINVAL); + } + + if (of_property_read_u32(dev->of_node, "tx-internal-delay-ps", &arg)) { + tx_delay = 0; /* Default value is 0 */ + } else { + if (arg > 0 && arg <= 2000) { + tx_delay = (arg == 2000) ? 0xF : (arg / PATHDLY_DEC); + dev_dbg(dev, "Set Tx path delay to 0x%x\n", tx_delay); + } else { + tx_delay = 0; + dev_err(dev, "Invalid Tx path delay argument. Setting to default.\n"); + } + } + if (of_property_read_u32(dev->of_node, "rx-internal-delay-ps", &arg)) { + rx_delay = 0; /* Default value is 0 */ + } else { + if (arg > 0 && arg <= 2000) { + rx_delay = (arg == 2000) ? 0xF : (arg / PATHDLY_DEC); + dev_dbg(dev, "Set Rx path delay to 0x%x\n", rx_delay); + } else { + rx_delay = 0; + dev_err(dev, "Invalid Rx path delay argument. Setting to default.\n"); + } + } + + regmap_read(bsp_priv->regmap, + macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, ®); + reg &= ~(TXDLY_MSK | RXDLY_MSK); + + if (of_get_phy_mode(pdev->dev.of_node, &phy_mode)) { + dev_err(dev, "missing phy mode property\n"); + return ERR_PTR(-EINVAL); + } + + switch (phy_mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + reg &= ~MISCR_RMII; + break; + case PHY_INTERFACE_MODE_RMII: + reg |= MISCR_RMII; + break; + default: + dev_err(dev, "Unsupported phy-mode (%d)\n", phy_mode); + return ERR_PTR(-EINVAL); + } + + if (!(reg & MISCR_RMII)) { + reg |= tx_delay << TXDLY_OFST; + reg |= rx_delay << RXDLY_OFST; + } + + regmap_write(bsp_priv->regmap, + macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, reg); + + bsp_priv->pdev = pdev; + + return bsp_priv; +} + +static int nuvoton_gmac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return ret; + + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return PTR_ERR(plat_dat); + + /* Nuvoton DWMAC configs */ + plat_dat->has_gmac = 1; + plat_dat->tx_fifo_size = 2048; + plat_dat->rx_fifo_size = 4096; + plat_dat->multicast_filter_bins = 0; + plat_dat->unicast_filter_entries = 8; + plat_dat->flags &= ~STMMAC_FLAG_USE_PHY_WOL; + + plat_dat->bsp_priv = nuvoton_gmac_setup(pdev, plat_dat); + if (IS_ERR(plat_dat->bsp_priv)) { + ret = PTR_ERR(plat_dat->bsp_priv); + return ret; + } + + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) + return ret; + + /* We support WoL by magic packet, override pmt to make it work! */ + plat_dat->pmt = 1; + dev_info(&pdev->dev, "Wake-Up On Lan supported\n"); + device_set_wakeup_capable(&pdev->dev, 1); + + return 0; +} + +static const struct of_device_id nuvoton_dwmac_match[] = { + { .compatible = "nuvoton,ma35d1-dwmac"}, + { } +}; +MODULE_DEVICE_TABLE(of, nuvoton_dwmac_match); + +static struct platform_driver nuvoton_dwmac_driver = { + .probe = nuvoton_gmac_probe, + .remove_new = stmmac_pltfr_remove, + .driver = { + .name = "nuvoton-dwmac", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = nuvoton_dwmac_match, + }, +}; +module_platform_driver(nuvoton_dwmac_driver); + +MODULE_AUTHOR("Joey Lu "); +MODULE_DESCRIPTION("Nuvoton DWMAC specific glue layer"); +MODULE_LICENSE("GPL v2");