From patchwork Wed Nov 13 13:35:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873735 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE5751EF94C for ; Wed, 13 Nov 2024 13:35:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504950; cv=none; b=aPW740emNqDe+nNF4p/rc2ioVfAGV69XEI2rOElKNUQIxFbX7gbWA392Iq7dhwA460jgxv9IZIUJgJsQ2bR2maoUZJlT+AW2ta6Tugeb1wPRGd8lzvlW0gZQKnl+Ze9E57mfOZuxmlHfT+L6EQZlaRGhmydmOemHBAXCqH4Yyh0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504950; c=relaxed/simple; bh=tRCvEtnmNEMPpYJQYZQqSgTO3s8UYztq2iLuGkoPOpY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sv+z/ibTVExaqAKCBjzNL6Cl6020k7fWEBZH/Wj2oGzpWAz7obBje520HO9suOkuXmoWVsWQI1h4r9UQNGifsfVuR5kqiHTAcrCOkNhfWzSzaFnMCCCJJnbgiD9YODj6G+Z3rxBMKFCx3XHQCNLnC0KBTbfT01tr7HKbQxR7eP4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=QOO0wjA5; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="QOO0wjA5" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-431688d5127so55860385e9.0 for ; Wed, 13 Nov 2024 05:35:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504947; x=1732109747; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wIKrCTKqo0knpYzgqc5iDCSA2PYAxbi2sKJksW310Bo=; b=QOO0wjA5dpONZKhyUX3ow0rznyCc6A9iV7V3tMfxpwbwrFLK9lBpD4e5xxLv4sABQL 938ov4IhJ+fi1BxqxsLgISP3cy1rMOTQr9c/mxUoX4ftUn3rCFsulT+VAt/2P/Zw/tQN O7lm7ae1j7F4h5SivXgzzCCa0+3eSzHsFb1mDl2Gji9FFTn+dIlxt3hucdUIhfcvxCGW 6F9783SwCflzfGPbnjGs0UyS3GMuiuTPZdkS6KR5fS2tb0VfrG+GsgywuiPWmejC1pHF M0rC8RW31V5sPGDBe6egH9Fl9yvueBYCVmwBzcMli8yPLGQ75VY8WVyN6xJGLoyogFiD yNOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504947; x=1732109747; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wIKrCTKqo0knpYzgqc5iDCSA2PYAxbi2sKJksW310Bo=; b=TLKjejyKnDQH4CJiIG5WCj4CdHj6IoD1w0s3GEuiyJku5d/r3TBBa2h4oOzlfrzAOF DiMOIxslMtLWeCzpHcXGsHeAt9GVnVGG3AYVzZjzds0Fp+0kAUUfgityEpb+mdFwnQtQ wW7MnN03Af0GfB5qOoPK37ILsXq/nzpzxvvwS157n4GzjqCMn1mXROyAPrOr5XDSyte0 /NcXtuO9vtp9H67M49mW4oXaLGnxvbe9GwE4+O6tkxXkztdHWfMgze9JnwgRYUVJ/r8n eZs61Pwgd6NVP1oMzr0L1s2/JeigRBN9jfU4oDeWcJoq49IrMnOXFJCCdm9Z1gwvHJyO CUPA== X-Forwarded-Encrypted: i=1; AJvYcCVTzNLAZJ4a/EYThG0vy8PNmj7Yy6VTBnaQqz0y+9TAIOPEEdF7OLLTu+R+k1WJvQDdwaeZgk7ckMk=@vger.kernel.org X-Gm-Message-State: AOJu0YwhbmNb//B4+QIuRqSaiFFPFE7UiA3SkxA2dI5FPpMCBpej5eyu 70fRY4xkvL6amkTIT1ZVItoxmIrEB2CZ0+WpVJTMSbj9VdNyQ73FA3NxJbPxFkA= X-Google-Smtp-Source: AGHT+IFQreZFi8mnOtWCfd/MMXO2rPTH6077T8y5lvDdCLcFj2DGPY9RyFbfHD6Lh3FLLf+PiUBOcQ== X-Received: by 2002:a05:600c:a40a:b0:432:d866:f45e with SMTP id 5b1f17b1804b1-432d866f646mr7318525e9.33.1731504947270; Wed, 13 Nov 2024 05:35:47 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:46 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 01/25] clk: renesas: r9a08g045-cpg: Add clocks, resets and power domains support for SSI Date: Wed, 13 Nov 2024 15:35:16 +0200 Message-Id: <20241113133540.2005850-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add SSI clocks, resets and power domains support for the SSI blocks available on the Renesas RZ/G3S SoC. Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - none drivers/clk/renesas/r9a08g045-cpg.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c index b2ae8cdc4723..d71e77624fac 100644 --- a/drivers/clk/renesas/r9a08g045-cpg.c +++ b/drivers/clk/renesas/r9a08g045-cpg.c @@ -209,6 +209,14 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = { DEF_MOD("sdhi2_imclk2", R9A08G045_SDHI2_IMCLK2, CLK_SD2_DIV4, 0x554, 9), DEF_MOD("sdhi2_clk_hs", R9A08G045_SDHI2_CLK_HS, R9A08G045_CLK_SD2, 0x554, 10), DEF_MOD("sdhi2_aclk", R9A08G045_SDHI2_ACLK, R9A08G045_CLK_P1, 0x554, 11), + DEF_MOD("ssi0_pclk", R9A08G045_SSI0_PCLK2, R9A08G045_CLK_P0, 0x570, 0), + DEF_MOD("ssi0_sfr", R9A08G045_SSI0_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 1), + DEF_MOD("ssi1_pclk", R9A08G045_SSI1_PCLK2, R9A08G045_CLK_P0, 0x570, 2), + DEF_MOD("ssi1_sfr", R9A08G045_SSI1_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 3), + DEF_MOD("ssi2_pclk", R9A08G045_SSI2_PCLK2, R9A08G045_CLK_P0, 0x570, 4), + DEF_MOD("ssi2_sfr", R9A08G045_SSI2_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 5), + DEF_MOD("ssi3_pclk", R9A08G045_SSI3_PCLK2, R9A08G045_CLK_P0, 0x570, 6), + DEF_MOD("ssi3_sfr", R9A08G045_SSI3_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 7), DEF_MOD("usb0_host", R9A08G045_USB_U2H0_HCLK, R9A08G045_CLK_P1, 0x578, 0), DEF_MOD("usb1_host", R9A08G045_USB_U2H1_HCLK, R9A08G045_CLK_P1, 0x578, 1), DEF_MOD("usb0_func", R9A08G045_USB_U2P_EXR_CPUCLK, R9A08G045_CLK_P1, 0x578, 2), @@ -238,6 +246,10 @@ static const struct rzg2l_reset r9a08g045_resets[] = { DEF_RST(R9A08G045_SDHI0_IXRST, 0x854, 0), DEF_RST(R9A08G045_SDHI1_IXRST, 0x854, 1), DEF_RST(R9A08G045_SDHI2_IXRST, 0x854, 2), + DEF_RST(R9A08G045_SSI0_RST_M2_REG, 0x870, 0), + DEF_RST(R9A08G045_SSI1_RST_M2_REG, 0x870, 1), + DEF_RST(R9A08G045_SSI2_RST_M2_REG, 0x870, 2), + DEF_RST(R9A08G045_SSI3_RST_M2_REG, 0x870, 3), DEF_RST(R9A08G045_USB_U2H0_HRESETN, 0x878, 0), DEF_RST(R9A08G045_USB_U2H1_HRESETN, 0x878, 1), DEF_RST(R9A08G045_USB_U2P_EXL_SYSRST, 0x878, 2), @@ -286,6 +298,14 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = { DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(1)), 0), DEF_PD("sdhi2", R9A08G045_PD_SDHI2, DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(11)), 0), + DEF_PD("ssi0", R9A08G045_PD_SSI0, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(10)), 0), + DEF_PD("ssi1", R9A08G045_PD_SSI1, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(11)), 0), + DEF_PD("ssi2", R9A08G045_PD_SSI2, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(12)), 0), + DEF_PD("ssi3", R9A08G045_PD_SSI3, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(13)), 0), DEF_PD("usb0", R9A08G045_PD_USB0, DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, GENMASK(6, 5)), 0), DEF_PD("usb1", R9A08G045_PD_USB1, From patchwork Wed Nov 13 13:35:17 2024 Content-Type: text/plain; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:48 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 02/25] clk: versaclock3: Prepare for the addition of 5L35023 device Date: Wed, 13 Nov 2024 15:35:17 +0200 Message-Id: <20241113133540.2005850-3-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The 5P35023 and 5L35035 Versa 3 clock generator variants are different but the versaclock3 driver could be used with small adjustments. The features that are implemented in driver and differs b/w variants are the PLL2 Fvco and clock sel bit for SE2 clock. Adjust the driver to prepare for the addition of 5L35023 device. Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - none drivers/clk/clk-versaclock3.c | 61 ++++++++++++++++++++++++----------- 1 file changed, 43 insertions(+), 18 deletions(-) diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c index 76d7ea1964c3..1398d16df5d0 100644 --- a/drivers/clk/clk-versaclock3.c +++ b/drivers/clk/clk-versaclock3.c @@ -78,9 +78,6 @@ #define VC3_PLL1_VCO_MIN 300000000UL #define VC3_PLL1_VCO_MAX 600000000UL -#define VC3_PLL2_VCO_MIN 400000000UL -#define VC3_PLL2_VCO_MAX 1200000000UL - #define VC3_PLL3_VCO_MIN 300000000UL #define VC3_PLL3_VCO_MAX 800000000UL @@ -147,9 +144,13 @@ struct vc3_pfd_data { u8 mdiv2_bitmsk; }; +struct vc3_vco { + unsigned long min; + unsigned long max; +}; + struct vc3_pll_data { - unsigned long vco_min; - unsigned long vco_max; + struct vc3_vco vco; u8 num; u8 int_div_msb_offs; u8 int_div_lsb_offs; @@ -166,12 +167,17 @@ struct vc3_div_data { struct vc3_hw_data { struct clk_hw hw; struct regmap *regmap; - const void *data; + void *data; u32 div_int; u32 div_frc; }; +struct vc3_hw_cfg { + struct vc3_vco pll2_vco; + u32 se2_clk_sel_msk; +}; + static const struct clk_div_table div1_divs[] = { { .val = 0, .div = 1, }, { .val = 1, .div = 4, }, { .val = 2, .div = 5, }, { .val = 3, .div = 6, }, @@ -386,10 +392,10 @@ static long vc3_pll_round_rate(struct clk_hw *hw, unsigned long rate, const struct vc3_pll_data *pll = vc3->data; u64 div_frc; - if (rate < pll->vco_min) - rate = pll->vco_min; - if (rate > pll->vco_max) - rate = pll->vco_max; + if (rate < pll->vco.min) + rate = pll->vco.min; + if (rate > pll->vco.max) + rate = pll->vco.max; vc3->div_int = rate / *parent_rate; @@ -680,8 +686,10 @@ static struct vc3_hw_data clk_pll[] = { .num = VC3_PLL1, .int_div_msb_offs = VC3_PLL1_LOOP_FILTER_N_DIV_MSB, .int_div_lsb_offs = VC3_PLL1_VCO_N_DIVIDER, - .vco_min = VC3_PLL1_VCO_MIN, - .vco_max = VC3_PLL1_VCO_MAX + .vco = { + .min = VC3_PLL1_VCO_MIN, + .max = VC3_PLL1_VCO_MAX + } }, .hw.init = &(struct clk_init_data) { .name = "pll1", @@ -698,8 +706,6 @@ static struct vc3_hw_data clk_pll[] = { .num = VC3_PLL2, .int_div_msb_offs = VC3_PLL2_FB_INT_DIV_MSB, .int_div_lsb_offs = VC3_PLL2_FB_INT_DIV_LSB, - .vco_min = VC3_PLL2_VCO_MIN, - .vco_max = VC3_PLL2_VCO_MAX }, .hw.init = &(struct clk_init_data) { .name = "pll2", @@ -716,8 +722,10 @@ static struct vc3_hw_data clk_pll[] = { .num = VC3_PLL3, .int_div_msb_offs = VC3_PLL3_LOOP_FILTER_N_DIV_MSB, .int_div_lsb_offs = VC3_PLL3_N_DIVIDER, - .vco_min = VC3_PLL3_VCO_MIN, - .vco_max = VC3_PLL3_VCO_MAX + .vco = { + .min = VC3_PLL3_VCO_MIN, + .max = VC3_PLL3_VCO_MAX + } }, .hw.init = &(struct clk_init_data) { .name = "pll3", @@ -901,7 +909,6 @@ static struct vc3_hw_data clk_mux[] = { [VC3_SE2_MUX] = { .data = &(struct vc3_clk_data) { .offs = VC3_SE2_CTRL_REG0, - .bitmsk = VC3_SE2_CTRL_REG0_SE2_CLK_SEL }, .hw.init = &(struct clk_init_data) { .name = "se2_mux", @@ -982,6 +989,7 @@ static int vc3_probe(struct i2c_client *client) { struct device *dev = &client->dev; u8 settings[NUM_CONFIG_REGISTERS]; + const struct vc3_hw_cfg *data; struct regmap *regmap; const char *name; int ret, i; @@ -1029,9 +1037,16 @@ static int vc3_probe(struct i2c_client *client) clk_pfd[i].hw.init->name); } + data = i2c_get_match_data(client); + /* Register pll's */ for (i = 0; i < ARRAY_SIZE(clk_pll); i++) { clk_pll[i].regmap = regmap; + if (i == VC3_PLL2) { + struct vc3_pll_data *pll_data = clk_pll[i].data; + + pll_data->vco = data->pll2_vco; + } ret = devm_clk_hw_register(dev, &clk_pll[i].hw); if (ret) return dev_err_probe(dev, ret, "%s failed\n", @@ -1059,6 +1074,11 @@ static int vc3_probe(struct i2c_client *client) /* Register clk muxes */ for (i = 0; i < ARRAY_SIZE(clk_mux); i++) { clk_mux[i].regmap = regmap; + if (i == VC3_SE2_MUX) { + struct vc3_clk_data *clk_data = clk_mux[i].data; + + clk_data->bitmsk = data->se2_clk_sel_msk; + } ret = devm_clk_hw_register(dev, &clk_mux[i].hw); if (ret) return dev_err_probe(dev, ret, "%s failed\n", @@ -1108,8 +1128,13 @@ static int vc3_probe(struct i2c_client *client) return ret; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:51 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , Krzysztof Kozlowski Subject: [PATCH v3 03/25] dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator Date: Wed, 13 Nov 2024 15:35:18 +0200 Message-Id: <20241113133540.2005850-4-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea There are some differences b/w 5L35023 and 5P35023 Versa3 clock generator variants but the same driver could be used with minimal adjustments. The identified differences are PLL2 Fvco, the clock sel bit for SE2 clock and different default values for some registers. Acked-by: Krzysztof Kozlowski Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - collected tags Documentation/devicetree/bindings/clock/renesas,5p35023.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml index 42b6f80613f3..162d38035188 100644 --- a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml @@ -31,6 +31,7 @@ description: | properties: compatible: enum: + - renesas,5l35023 - renesas,5p35023 reg: From patchwork Wed Nov 13 13:35:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873738 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C9B120101B for ; Wed, 13 Nov 2024 13:35:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504958; cv=none; b=TqQ/ZZp36WFJ7prVKkKsJ9OXdj5vKPkYIiTuZKG8aWQBFN86Zqfp9XkNFrFu6KFhdQOg8FZjsoEBTvCowxPa6Bb99f+CnS1Ieo0kQRQ20xEY01ZQ7fzz6k/z8dfJ7O7hNUPNkDJQtZ6BHf5imNDUJQ47rr9u9QvC/OQ7aPpDa08= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504958; c=relaxed/simple; bh=TSqSzOs8Q7BMfa4saTar0ZRCzZC0f5vyfoNlajUePmc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OR94v5/QWTZvTCBs98WcZCkmJ2heGAmY5gbeFONoB/9xgeR0uwBPTrsvB4JH6ePzqXqs4klSJER66Hs+3BrG9GRSGE2IUSF6pAnkQG1fSPZKjfDn1IaI5heFD9uSFQl9xN609XPZhg0hDbAu7KE+DJiLRfsEarKktpP8tuuvn0Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=kKnKaG2b; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="kKnKaG2b" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-4316f3d3c21so56409965e9.3 for ; Wed, 13 Nov 2024 05:35:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504953; x=1732109753; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9Sa3H1f/E/g0KGrtcmKvCv12Jkl936NP4UC4pZY9H8c=; b=kKnKaG2bzadX4UwnSHcO8CXdNKaiWXHMAVYJjthK0gAm4HGIEwiS0S6a1FQlnCWKvK mNQEGpr8XrymSvEXG5VCV3TIuXqORXY2gfnLe5YeZIW45bGeRkKfsygEiqe80N6y5gvL C4kyjkwszwb1acrefO+dw/WUYQ8hvnVKOPnrW4juTm14naOmdvlb+waV3CwD6NMmY1F9 Dzzz45vCwvgRMEyvLYlffysmTlH0HYekWmY/YBxdkAFyScobNGf62mcvjW+/hOgWAh4N HGzP769AZ7qojvnslMrrkOPMjW+n6dmwE+TJ2RxsWSwen1NZZhFE7DPGi7DRt7wREFFZ KbnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504953; x=1732109753; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9Sa3H1f/E/g0KGrtcmKvCv12Jkl936NP4UC4pZY9H8c=; b=V+pYXez9FTLFYUwD0FF807SToOXu+LkX3XKzjxQ92qPHNV2McQK6glvagECzBTxxeZ 1E1uB44/wEVWNaatZjfhDcnYeMvYVAD7OY9u1Jo6+3viiBNFZuJpXnEhqKNbZYMuDsOl fTNVva0GgCJOA5iepr9aPGYI56yDzyDaOrTf40/47K4J9RwIKwToDq7pZn/6oxqQwIfc dwYuYEuJ+Uc+k8bEW/JEpfyu8qBir4CHAi58+vE9H+VGrYamMGh8o5duTjONP+qqofGn 1WyIWz5Iu/gN42Tssk9dWh3dzieEVYI07vtX1A2JiBxUPvSg+xbixclk8iY8OyIbVj1L vmLw== X-Forwarded-Encrypted: i=1; AJvYcCW1cjByiE2s/sK26JCN7FOyj7oiVh6zXDqeEg4qX2F9W1tntmwshYi8iq745zoTDzLMcCk2QAxhe10=@vger.kernel.org X-Gm-Message-State: AOJu0YxDEDRjGjFGa5MlgV4E5R9sGQixTjfBQASzGdHDk0bvel/2JQbs EPKHF1RXP76ByMWBzbxjygzaJwdO/0nWoNual415YG4Bxdj/nnwUoqOPZBvgJ0k= X-Google-Smtp-Source: AGHT+IEYHJzqM5FW299ZAdbK6T7DVikcehfuphKy8vP+A1ZGKFW5gkq6w5nT2ifGCWhjngi1zECKUQ== X-Received: by 2002:a05:600c:4e0e:b0:431:59b2:f0d1 with SMTP id 5b1f17b1804b1-432cce6825amr58718565e9.4.1731504953372; Wed, 13 Nov 2024 05:35:53 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:52 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 04/25] clk: versaclock3: Add support for the 5L35023 variant Date: Wed, 13 Nov 2024 15:35:19 +0200 Message-Id: <20241113133540.2005850-5-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add support for the 5L35023 variant of the Versa 3 clock generator. Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - none drivers/clk/clk-versaclock3.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c index 1398d16df5d0..9fe27dace111 100644 --- a/drivers/clk/clk-versaclock3.c +++ b/drivers/clk/clk-versaclock3.c @@ -1133,8 +1133,14 @@ static const struct vc3_hw_cfg vc3_5p = { .se2_clk_sel_msk = BIT(6), }; +static const struct vc3_hw_cfg vc3_5l = { + .pll2_vco = { .min = 30000000UL, .max = 130000000UL }, + .se2_clk_sel_msk = BIT(0), +}; + static const struct of_device_id dev_ids[] = { { .compatible = "renesas,5p35023", .data = &vc3_5p }, + { .compatible = "renesas,5l35023", .data = &vc3_5l }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, dev_ids); From patchwork Wed Nov 13 13:35:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873739 Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6031220126E for ; Wed, 13 Nov 2024 13:35:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504959; cv=none; b=kpIq6r9DtuopYQwdBwBJht3SNoX+qBnRA3bzBT4Z+9o8gvHhrng6qYuT092g+YwKq39RAlNoFTeM6OeFYst/dd0X+/M9DXpzLYXfYhm+WyQvrojGNmftYPCfXNTHVddhejexhXZDwsxR0VIqQYLbdK9xRiIVFIo3z9KVms6TdS4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504959; c=relaxed/simple; bh=hsInE9S4S/vwenjeM66DD4/pCHktkvyL4wYR/f21JYc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WkvCQIkCPDgpTI6+qg9V5l1iVcXFmtHMl05j6JBjG4xq3F7tM2Qc4km/IUPJ1xgSDj7ufKpl7du9HWDX6VyzyZKIw4dzFFKaDwqsCNL1nuVcCEBDP6CWO8LGcXD2Ex4ucgnCAvRSx/5eNJPnYSr7/9C0Klqcs1+CEByFXUDOG3A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=YcYu1xGk; arc=none smtp.client-ip=209.85.167.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="YcYu1xGk" Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-53a007743e7so7966268e87.1 for ; Wed, 13 Nov 2024 05:35:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504955; x=1732109755; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zMlZeixiliINj2sB8B/Hsjodp45t1qy+/EotEbzHeIE=; b=YcYu1xGkwpljYym8LpPMHKuiZvIvXup09ZYCunlEKTd8XO+zpH5qEgnw/ApWezX6Bo JgTEz2elBcZXHxf0hRuZmEamkdek1ymaRorKkyZvN/dDhRasl9C+c3lRDjLhFt/jMgvG 4g72FdMdxMT3ba9Oa/i7XqUqd7M93JxQOJih9MaUGVqDPZm68G95cOcABY2J0wNt0BE5 DgXrLqdamji13Dzrn8joilMR6Xs8gsyqcEwvsK+d5D1qU/8okfAuscHf1UAibMTloRX7 OhB8XT397jgrLdQhOjwcm/PblL/GnbtoUU0+sBSVdz2QABuGFI+5YGS238xZgyAJY96t bBmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504955; x=1732109755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zMlZeixiliINj2sB8B/Hsjodp45t1qy+/EotEbzHeIE=; b=UwpTiqFQoOXs4soDgkGbOacdm1HhsVBjwJSXisBA/diZM0y0tGrgY+9ieKL9mm5uZZ O33JV45fxMgmZO8ao3luul4I+imdufxZiFuCvTyqInqY7KOKvJ33er1gug+g+9e/AzwR E8rXX05evYbf8Cp8Ze74GmF3kwAi56MmPGETHNLsK8vLoJr8P1uZw6S2z95ws8D5G6s0 I5i4XnJCsPPrxWPi1hcohpgvezhWIUu1ttycncmyIBZiIVfcORdz53oL8qRPJynyaFid Jg5UtazO7Cr8N2I/1gRSKxH/BwNRWYmXcb+YjlCDiEfO9dACtXFv1+2d9NSIf3SwNqfY 2gFw== X-Forwarded-Encrypted: i=1; AJvYcCXTpa2Ug24LiGKwmyFzGPCPDeV+U0xXhi5hm3uzFseg+aMYShu9QmEH/GwtZ0uMXBWMGdX/jRC9njM=@vger.kernel.org X-Gm-Message-State: AOJu0YxAjSwkOxUuGqXzH6sjHzC8ij5DofXXXx3/Ya4Lwq0N6pi1DlnG 17lIiA182Kon8PKskCksBmvUtYovj3hxbQYMlllpwS1Xe9fcCfthsNu0GaB6tuw= X-Google-Smtp-Source: AGHT+IFDoqWlc+LYE1IHHSkdT7sRQOeKuofe1Yq22n5/D6CUznab7ngU7zpCUFlNPYH6frvj2r8HUw== X-Received: by 2002:a05:6512:3da0:b0:539:8fcd:524 with SMTP id 2adb3069b0e04-53d9fe8ad7cmr1333681e87.30.1731504955530; Wed, 13 Nov 2024 05:35:55 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:55 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 05/25] pinctrl: renesas: rzg2l: Add audio clock pins Date: Wed, 13 Nov 2024 15:35:20 +0200 Message-Id: <20241113133540.2005850-6-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add audio clock pins. These are used by audio IPs as input pins to feed them with audio clocks. Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - none drivers/pinctrl/renesas/pinctrl-rzg2l.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 8ffb9430a134..1190ca4b1808 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2086,6 +2086,8 @@ static const struct rzg2l_dedicated_configs rzg3s_dedicated_pins[] = { PIN_CFG_SOFT_PS)) }, { "TDO", RZG2L_SINGLE_PIN_PACK(0x1, 1, (PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS)) }, { "WDTOVF_PERROUT#", RZG2L_SINGLE_PIN_PACK(0x6, 0, PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS) }, + { "AUDIO_CLK1", RZG2L_SINGLE_PIN_PACK(0x2, 0, PIN_CFG_IEN) }, + { "AUDIO_CLK2", RZG2L_SINGLE_PIN_PACK(0x2, 1, PIN_CFG_IEN) }, { "SD0_CLK", RZG2L_SINGLE_PIN_PACK(0x10, 0, (PIN_CFG_IOLH_B | PIN_CFG_IO_VMC_SD0)) }, { "SD0_CMD", RZG2L_SINGLE_PIN_PACK(0x10, 1, (PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_IO_VMC_SD0)) }, From patchwork Wed Nov 13 13:35:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873740 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 592BD20262E for ; Wed, 13 Nov 2024 13:35:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504962; cv=none; b=hr3O860CZTj+sfwP+v1EwJV3dBM7Hq3Q7aIPcb1JPERr4RlbW0dZunmn52N+YQgYRg4kq2BnVSblAzYHu5qkqq/IwZpZ3ka8T67YuwBtHC04bS3346akJr4bpLGXvYyspx5fDvQGS8/JiI8GxC/9tZ7zztctNsER1Nj6jJlUPhI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504962; c=relaxed/simple; bh=MN67nAF+CszefP3gr8RMGEznclhS5zNcjbkW5w4l35Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LFtf+hcHotOvDUfO2dRpKTNcZ2vRu9l9anN6OKCMrFUplfXC9EotLJZizGhunCsrzZlGlJCNFsEfSxcfXpT8VcwW4MSCQfMvFmYctax071aycGEUpTMWa/JV87+GLVSHrJpzsM7wCWR7/9dncOXPS6TrjQ2ziN3iYU83ZNBpi8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=rPzztnyQ; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="rPzztnyQ" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-4315eac969aso4691915e9.1 for ; Wed, 13 Nov 2024 05:35:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504958; x=1732109758; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1OvTZSeNAGKIV1seMePes99WD5Hn6Ptwq+/QcTfM4OA=; b=rPzztnyQnWc53nQPqtQRzK30csntTKsCs8KwjXCgnVLwhrO+qHUdSv3F26A+Fbxu+P pmHX0jNSaRXVxCtUq/z83LmReidtEGaAW0hLNcl36DXY6CZwuOAml+ctZnYN3F6K+1/N nwPl4HiqDotbA6mcaz29gp1Ue4RD/OzySFWM/qDDx6L285B3hsEqY7pmjN32E+VGl42s +FxLteK8tfuja9au5F9VRH35Gs7MN8Csg3gDksHz6y1BqImDZPBswbcIgrBc2+9UGzES zPKtQQjmcJ3NRX4xI3pNtxNw559M5gIVXS1cABqNN7kmWWGu9OtWBBj99DwsbAN3Xg5e PqNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504958; x=1732109758; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1OvTZSeNAGKIV1seMePes99WD5Hn6Ptwq+/QcTfM4OA=; b=KFGhpXRUjvdaZfUvE+EW7NveIhl2OcfQHotN2R3FKAvXZhZi6+KfzlILQcB5XNnYdP 9CyVCAMgXrL3gLpIEkcFPJ5htNodx/Yueg+aTko+GhzVQ0fMcgM9+UXWkNtm//dMT/1R yGHC9Mlv4E6ONEIY60BaQVfCdwDv85mMai4SKYkZiTN2qE7C2U2lERWao5fruuqVDrGI yvq1bu/vq43u911bRvIiUr7UixnUhRSM/oGFa/tAAIEeCOj6rXprfyyVl5/SxDS68YSD h0xqQWYqgan2rf5E/aXTUsGfJ4CfbAvbo6yR3FumngKmJAgZ85lCUI0zOA7LaJrQcwbx HEFw== X-Forwarded-Encrypted: i=1; AJvYcCUitCTIDvO7kU9ximgQuL5aFm1wp4xzygVxk3gdzHZlJXfKqPz0aNHPT8CjJ+5d1uIc2NbNzmVhk7k=@vger.kernel.org X-Gm-Message-State: AOJu0YxgGvD+M83G/9hZ+JNLxf5SW55ApiZxVojFZDJJbALfpfI96mzn OTdXdUT+DRpUCCSSE7W2ExDsKQaAmCPuVHpKX31gnVHl76nf0P+GBy4+vrpSvRY= X-Google-Smtp-Source: AGHT+IH0MgOpNYoww+cJhT91aFWRPXzfgZYVlvmgv7xhY7iMIMEQpgepNOVaV+LNO6p7EhOHTMdqGw== X-Received: by 2002:a05:600c:3c9d:b0:431:4fbd:f571 with SMTP id 5b1f17b1804b1-432b74ce199mr179115085e9.13.1731504957851; Wed, 13 Nov 2024 05:35:57 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:57 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 06/25] ASoC: renesas: rz-ssi: Terminate all the DMA transactions Date: Wed, 13 Nov 2024 15:35:21 +0200 Message-Id: <20241113133540.2005850-7-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea In case of full duplex the 1st closed stream doesn't benefit from the dmaengine_terminate_async(). Call it after the companion stream is closed. Fixes: 4f8cd05a4305 ("ASoC: sh: rz-ssi: Add full duplex support") Cc: stable@vger.kernel.org Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags - use proper fixes commit SHA1 and description - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 6efd017aaa7f..2d8721156099 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -415,8 +415,12 @@ static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0); /* Cancel all remaining DMA transactions */ - if (rz_ssi_is_dma_enabled(ssi)) - dmaengine_terminate_async(strm->dma_ch); + if (rz_ssi_is_dma_enabled(ssi)) { + if (ssi->playback.dma_ch) + dmaengine_terminate_async(ssi->playback.dma_ch); + if (ssi->capture.dma_ch) + dmaengine_terminate_async(ssi->capture.dma_ch); + } rz_ssi_set_idle(ssi); From patchwork Wed Nov 13 13:35:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873741 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C147202655 for ; Wed, 13 Nov 2024 13:36:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504963; cv=none; b=PpxbC9+SPujQFHBCGsv2z45dEhOaJE+VDGeoi+anx/77syLXe1pPkPYf1cDxKUrKjYEFBW03grdteiugZJRT1/Hv/uIf25eAckrWl1/56ouInjCJqqpEzMOrOMH/RnCBx5m5uQ70uWp0v5oUNIJvNEMgbaV44dIeBQ5Y1H+s9YE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504963; c=relaxed/simple; bh=Sz1PAChDcM9B6CCJvpuwCd6OJsVNXMcyHPYNhDbm9c8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NYhUrmGeVEobgq4aKEMadwC6UYQqSMlBonxiNeLpcOjFLMShcXsSFYt3O282eAOYVQGuy8QcYN6V0nqChYKuEyULq2WIEirCLN6mGMcGY1eU+5EO6xx/ThAKIyYQeOtY512POhIftTC0ZneY9CzZYNx8NbVdywMNYTG0ne5ie7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=fK3gTN7j; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="fK3gTN7j" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-43163667f0eso59465165e9.0 for ; Wed, 13 Nov 2024 05:36:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504960; x=1732109760; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AaN72J9oCjuJRB7FXPQLRWlL5CXlKXSOkEeKQxWmO0E=; b=fK3gTN7jiIIAtO3rkYMWViQ7kwSobDSblhvVDlndpe8/9iBB8nAKVldreAUVzg+SvA jKcupWdRqJOsqZo0jrgpnYR3AxsWnylOhulll5e/7AgSkuEaoE2S23U1Qa5LdZcNufjB H06/HXplKzimOfo3qluFqCrbOFUzTwYl3MIpVBKCkghTZS35KjrTRK9vjBSy6RxKMrWZ zjxmHCHQMy/8SBP/jjgGJpz6NRvWFbisVKSILQxHj3V6Bvd6vgXsJSlQuIsgxyXcCrNf aCYLHETVCdvlZa42tE32LP2ieOw97zYs4XNnQWm48SvoeVSjQBCQYEoE2lQd2YTbH59l zQdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504960; x=1732109760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AaN72J9oCjuJRB7FXPQLRWlL5CXlKXSOkEeKQxWmO0E=; b=gvyZ8tExN4iomQnRenmLdoq0vt4W/OEduBLYE8hdBuQ5NgamS53SmVsYvorntcEthr JuHBlh43o8W7tezQjMEsNb91yBVy1QeETaKbgpFJW5D85ejrz3g6WrXRipXPha4HhpnT /1Yhfpd2fD2VmT6hsn8ryqT2EzY8fcuvpakdHd8tKe0CwB3HirLIZr32plsUpUCMJmox 9xd3HPB8DhYweeOqkv7GM2/nAOqhCNBZHaQcriMD7KksInBa8VZnwHdTwbyNA9/M6qUD MmqpHaqRk8HIYtP3WdRHITIgRjKlgb2oL9QRtaMOpQKuFT6c02Xzd6d7mkb1fPi7KrzB tZOQ== X-Forwarded-Encrypted: i=1; AJvYcCVgIB0OxV0KOavf3qKcHAy2QWhMV9ATRrDHYkJSk+iVxDKztcoLU8N5qBFT+Z7n5ncI+U98NybzS6Y=@vger.kernel.org X-Gm-Message-State: AOJu0YwVt/LZSt32+2LfF1saBo23V+i0mbt1/tK2wpYuhFma9gX23k3d 0Um9d8YUgvf8lzEU9KYeOHaWwW36xKq1otrImPI3AnKIfCYvKwJrzByqqui0zb8= X-Google-Smtp-Source: AGHT+IEMrNnWePZLL6c2pl45w1yaF9tt+h731CuGi4h+iBycfvBUpWEwqJT5WVYgqo485BsTWQsP3g== X-Received: by 2002:a05:600c:4f43:b0:432:d82d:6a6c with SMTP id 5b1f17b1804b1-432d82d6b43mr9287205e9.30.1731504959807; Wed, 13 Nov 2024 05:35:59 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:59 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 07/25] ASoC: renesas: rz-ssi: Use only the proper amount of dividers Date: Wed, 13 Nov 2024 15:35:22 +0200 Message-Id: <20241113133540.2005850-8-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea There is no need to populate the ckdv[] with invalid dividers as that part will not be indexed anyway. The ssi->audio_mck/bclk_rate should always be >= 0. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 2d8721156099..b4439505929f 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -258,8 +258,7 @@ static void rz_ssi_stream_quit(struct rz_ssi_priv *ssi, static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, unsigned int channels) { - static s8 ckdv[16] = { 1, 2, 4, 8, 16, 32, 64, 128, - 6, 12, 24, 48, 96, -1, -1, -1 }; + static s8 ckdv[] = { 1, 2, 4, 8, 16, 32, 64, 128, 6, 12, 24, 48, 96 }; unsigned int channel_bits = 32; /* System Word Length */ unsigned long bclk_rate = rate * channels * channel_bits; unsigned int div; From patchwork Wed Nov 13 13:35:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873742 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F852202F90 for ; Wed, 13 Nov 2024 13:36:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504965; cv=none; b=po5GAFbDeheQCleWm+KSly0+CfiywTSv/tK2z8ASieBn/vsqJxY+wdZ34jn/gJW36+dxZi+QKwWzsvk+JnEdDWzZAe3hHJsFAx6nwNB+wAKoacHmeV3rHeNTnPcSx2hIOg17YqDBwD2dJaMamp48cbtTSIz2PDTqNg+gedqZpBc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504965; c=relaxed/simple; bh=/F4tAjXWBbEZnhKoW0PkXLQACERRTVgrP2LoplpSZfY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=tOW0BunHG9crFb5npfatiHy5PqjBeEMVG7j+RKQzf7LM7fz2quXpoDTAigOcSQ1/C+G9tPC8cGuk5bcoeGAnBJ6Y0X6D4Q5oi8ZB3nyR3gS3mF+CRTNkX3anjfhbc9kbjMAEyiKmHrRiQ/RXyU6DpjHvleQyN2OImtY1nZZ+vUM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=TQNmhHAC; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="TQNmhHAC" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-431ac30d379so60110855e9.1 for ; Wed, 13 Nov 2024 05:36:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504962; x=1732109762; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1FycoWm9/X38NSEgrZsMhWo4rCq7Gq3VfkCCUdfLyYY=; b=TQNmhHACH4vAH1Me1V4CuGWACRWaW68hW49wy9qcrEp4rlUwaO8O2UQIiHoSHKJDz+ 2sc60LjO5cp2UiQPJth5IzuXUCYWOhg6YHJip4pq5vevF5HX5J1R4uM/sD+JC7tDDLvm c5bO7l0T6Cp+SuIdqjXByc2gYOUnSYtpbhzdBRPz1gSo1uAhV1aHh0SIhgEZSWoLUJ5t A/nSM7O5WNwGvTPyHlMRVJx+ijAcTd7jLNPth9NZDySGXRr3oBl3lAU8p2HuDcA/Jy7b fO45wyR2uYY/Rj5TeCWmGYzu3M4laM2n/SSWKQKGv//1cpoBQL74DBMwEP7Mt7OPtlue w94Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504962; x=1732109762; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1FycoWm9/X38NSEgrZsMhWo4rCq7Gq3VfkCCUdfLyYY=; b=nENWTXxQM1BJD9epRA/xYtOZC58218KJMKRLomRwKCSu830vjlNgQFpXT+uTYKEzau 0sD/fm0nphphtihnS3Ryl2oyVkk9zm8JAopw+DLH6AJNcx5fXeUZdJ5lsFdMdraU9jUM pkN+9je8D34BbxBPpLrMNvQO58X7+0grrXwlrtjSP581V0SSgiHaqYuqJ8dMc+ahKeuE i16HPjH5cDuPLqt0HVTMP23yDHhEFYQ66PTKj293o074uuHlVhKFtRRIwDE+J1n71YVa KGysw3C+z0q9PVJb//rlfaRdVZxSx/h6unJVXLAYE2zTHpTeyTImpLU9ZdNVNO7JR1pp 3Hsg== X-Forwarded-Encrypted: i=1; AJvYcCUIuuXuNj2taMMXCho8xgdb+VwYKu6GxHq7L5mBX7cSfZ4GI49pgKYhlCgXS2EttZsdUN0AdpAscNI=@vger.kernel.org X-Gm-Message-State: AOJu0Yy5sCjNkEBdSVcv874p+S4IFg6sJ68oDwPsKsG6ubF96W5FgAs8 IQbxM0rL90DsPGHNUtmujrU2NsaOJlnwk83FIPELOY7xr3tYwsGC3suorEA7+Cs= X-Google-Smtp-Source: AGHT+IEv92yaQ+ofcsCPULdq5+LkFnXxgiZf2xmIfOkdQK30lk3F5kOjtytiBE0A/SgbrxV9z4uXIA== X-Received: by 2002:a05:600c:1c12:b0:431:5d4f:73a3 with SMTP id 5b1f17b1804b1-432b750606cmr185260445e9.18.1731504961857; Wed, 13 Nov 2024 05:36:01 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:01 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 08/25] ASoC: renesas: rz-ssi: Fix typo on SSI_RATES macro comment Date: Wed, 13 Nov 2024 15:35:23 +0200 Message-Id: <20241113133540.2005850-9-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The SSI_RATES macro covers 8KHz-48KHz audio frequencies. Update macro comment to reflect it. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index b4439505929f..a4d65be17eb1 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -71,7 +71,7 @@ #define PREALLOC_BUFFER (SZ_32K) #define PREALLOC_BUFFER_MAX (SZ_32K) -#define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-44.1kHz */ +#define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-48kHz */ #define SSI_FMTS SNDRV_PCM_FMTBIT_S16_LE #define SSI_CHAN_MIN 2 #define SSI_CHAN_MAX 2 From patchwork Wed Nov 13 13:35:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873743 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CC04204014 for ; Wed, 13 Nov 2024 13:36:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504966; cv=none; b=PbKXEP9jS1gq1FIv8Xs0QAaauhV5QiNyNbuj87hFW8f06RGlS3irN9S7VnxSI1CmPh9h8CZJPmTyNRbKi4PIevTtiAx+AK1rImt04l+vfDAUiCrbvXLlvJH6yPy3KTMUAJgcRHTlMAwywbeZAkG8Vr3WdfrUJGkCP6aUTLM9WGU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504966; c=relaxed/simple; bh=VAScEqC+gOYlOCD5fSBTF28pUjgsQMZqDGi/b9qUFQU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Vbnbg/e1PVxEpNh+QAU6Ch+G1LBa/VzQG5AvnE4CTqpK+oJ8Xu30cvPcIsQvZ6Mm1V22EENnkb0Xlzzaf7KX1vhYS5GNfLFAcVAUqkM/sX7LsWx+Ah2jNtYDBLEhoAHdrHan281HS1jNbszjl6TCzbIkEbfxEhzd1mjw6IbSRlE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=gXFZ/dcw; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="gXFZ/dcw" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-43155abaf0bso61618485e9.0 for ; Wed, 13 Nov 2024 05:36:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504964; x=1732109764; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yLrnY5p4F2ysEeuxEX1oEYB70cmBA8D62/QBYZDMk5c=; b=gXFZ/dcwZlK3nqxfyBwoKQ8r+NXg2cUybkd7Ptb65xgpF/+kJNiXPo0DvN8JZgOwSf pFuVUQptv6e2jBltSei/CGo9hEl1qRB0nJi+6180v2ATtAR1HOM32jm0RlM/CAfy8sCz /zOutt5fHtpZGdEE/fDvQ69UvCofZFggpxPZh3xX8L2Ee3tSaGoFB93T0dxS+Yc3mmah vrEg3leih7h4jRJmC50ho7UXnfdtovyAHHxwe/ZfmlGj73bmeTOwX8bEKPjZ4Ki4X4nn C1T4XvESgfLxfu9knSEuT/zI0rpVOpfYkGXpIVV4Ii8Jlfml0oj889ySWrF/ZpFsBzxa eBzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504964; x=1732109764; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yLrnY5p4F2ysEeuxEX1oEYB70cmBA8D62/QBYZDMk5c=; b=Wc0EBP75ew8re2OzZY4T0drXozAeS1C+0wrkvcXsOg+e6A5i2/2k6LzHqnbZqqc7Zw IrCHa/UrkZzYkIJCWzAJhCAVsf860Gq/dgmQQbRhecllMY56AXi47SmU/wq78C++PGpY OlAkyNe4gQhpBxSH+z49dFGiCUfnpO5kApOW5Rs+a9e6CM9NcZjfIFU3fofqO0wt4BQ2 /YAmNuTu8QzeossppTKX1lFVF8204jSqnBIfcYrr5h6BEhsX9nFiKtQj0m72dkcSBK5k lhWecXCsbV8y2cp0geMrG98xhUYdvczSaMP1D8vfgV8A4VNk0tVLIwdu53/ocEbqXqHH 0hCw== X-Forwarded-Encrypted: i=1; AJvYcCU7s50yfPvCbfmbzYb8scF+9yPk1P2Avs88dalQ4bcaqT7tpiEuv/V9r7JteUvMVuV48z4ZAveuK60=@vger.kernel.org X-Gm-Message-State: AOJu0YwkVVZ/R+9mZ5swtU3LvHWqgn6IvRSPrNmKAnTREE30lPlx9sgI TRmSm7Jl54iC7Obvr6HFpWnuazG+heWvLthYRhgXpkULEch+0brhqcZYOmyobkE= X-Google-Smtp-Source: AGHT+IFhAKQyD7wWJYrPMxlQRcN6qIExSg3WsiPuAigIJwy4l5iZHLGTurt4LfoRew5/k7IONHIaLA== X-Received: by 2002:a05:600c:1c15:b0:431:4b88:d408 with SMTP id 5b1f17b1804b1-432b74fda4bmr168007215e9.5.1731504963709; Wed, 13 Nov 2024 05:36:03 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:03 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 09/25] ASoC: renesas: rz-ssi: Remove pdev member of struct rz_ssi_priv Date: Wed, 13 Nov 2024 15:35:24 +0200 Message-Id: <20241113133540.2005850-10-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Remove the pdev member of struct rz_ssi_priv as it is not used. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index a4d65be17eb1..a359235b55af 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -99,7 +99,6 @@ struct rz_ssi_stream { struct rz_ssi_priv { void __iomem *base; - struct platform_device *pdev; struct reset_control *rstc; struct device *dev; struct clk *sfr_clk; @@ -1043,7 +1042,6 @@ static int rz_ssi_probe(struct platform_device *pdev) if (!ssi) return -ENOMEM; - ssi->pdev = pdev; ssi->dev = &pdev->dev; ssi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(ssi->base)) From patchwork Wed Nov 13 13:35:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873744 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21C122040A9 for ; Wed, 13 Nov 2024 13:36:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504969; cv=none; b=loHundJ5PKDLm7YA/jHQWXad01hwh39px6gX62Oq5WDTwF7XdZhoH5mt71jPn29GbUTR+UK741qocfwYSQ9nwJK01YrA+sgR9+BqzRIThAKnbGLXG0eAyqMC9EyjeXnAXnVq+dnDr+IEvkuidyzX5t8JE6ZWF3LFL7MrZ3YSsUw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504969; c=relaxed/simple; bh=dJmFxi/XYSim2RdASfGpckOphjsM6InegciA9dIPVKQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bWz5oRWMLzP79vJ55tayE7af8ow4IO2E6wN2/MYYEgw7LKCacSlJxLDaQfCGNIV9EYqmCQJ/mqUqNy3Qp7gRwlbib2kBO6hBVZqx7G60VQBleX1IU8oiO6kDYQo9A4VBssOWDa/MSMNH1/UExpC1/KtZR1kuufB/0SIdMuCG2cE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=Sn9RmcaS; arc=none smtp.client-ip=209.85.221.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="Sn9RmcaS" Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-3807dd08cfcso6485024f8f.1 for ; Wed, 13 Nov 2024 05:36:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504965; x=1732109765; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wRi48491gMOm4lIS/PpTnq0/Cq5SxV3TTLqC1PMh+ZM=; b=Sn9RmcaSko1DPVIPty9nti/0NNHCKU/R5qpEDxBLp3EADgN+05sh90kkZ/WnewGGSS UDixYNDdiRCn45s+aEr1W547yWxl5CmJ3W4vwWUatpJeOZCrYU3LyhaFIjr083LQxiPq lU+hJYJrg4VKSIjKdxQcso03xP9V1e/iOZMMtDKAzIH7Pdz5rK+inXKUp3TLpLoJ6AkC u/RjvKhsfHe3qzsCfr7tCIzQ4KIalciIfkK8WNXhkO+emlS50Zir8GveeWlwIFP6747r H7hnf2Nr7HHAimeN6tLED/Kd+C3NIzSmdaG5vfn7UhX6c1bror2YATmP+zBsXMuc4ZIf UJBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504965; x=1732109765; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wRi48491gMOm4lIS/PpTnq0/Cq5SxV3TTLqC1PMh+ZM=; b=biHb/TU3T2WZkvUwhBxFRw98xbyIlLRUqA0aElK8zhS4D4zIZnu+LUaDBjtiZGkMNC WvI+/i1BdM2sQzvpnEAR3JxfEKrOwb2wCD1hosWSwcL+AthlHuWc8IQDvxkvKLbzNTp9 0cKnLB5IeIur/9BN2ugV/HDwWzRJg3GBo3UWAIJXZJZCXFoxWEYy/XZCkn6pujEy0q9r s9TkaPlCXOsxlUjaSorO4Q5Bne5BLxYKtqfdP/rYVpyyNU40k3UQ4WG47R4+4V8l5MlF DSvL/qJwugLlLj6dMs7VWb2FDToQIypIfSm2UJ5ntLuGKqkSB4HWig6XnUeF+XB42Voc 34Lw== X-Forwarded-Encrypted: i=1; AJvYcCXqFJK1mz3/4+UPRNjxBUuUzhVEicyxKi8Vc83ABgtazEnYAahoP0yqsGrXloGPn4pWSP0xfkHVIZA=@vger.kernel.org X-Gm-Message-State: AOJu0Yz3yNjwACZKSujfJ83hWt+wrehNz+g8c444EU4Iq9LcUX9NoVv/ v/+dj2q1yuMkeBJwMvWmDAcrQ3vdHy5N+S3Y+5jJ5/zDc2H991ZOwdNdvIk5INI= X-Google-Smtp-Source: AGHT+IEhme3hP10Mj4FLpm2uYfql8eXZjzA8iO0gRxt+QEncxuEJxi6BwwbDWP/PNDtpBtbagGah2w== X-Received: by 2002:a05:6000:1543:b0:37d:95a7:9e57 with SMTP id ffacd0b85a97d-381f1866efamr21723054f8f.2.1731504965480; Wed, 13 Nov 2024 05:36:05 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:05 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 10/25] ASoC: renesas: rz-ssi: Remove the rz_ssi_get_dai() function Date: Wed, 13 Nov 2024 15:35:25 +0200 Message-Id: <20241113133540.2005850-11-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Remove the rz_ssi_get_dai() function as there are already helpers that can give the same output that rz_ssi_get_dai() gives. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index a359235b55af..4c33663a0ae4 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -162,14 +162,6 @@ static void rz_ssi_reg_mask_setl(struct rz_ssi_priv *priv, uint reg, writel(val, (priv->base + reg)); } -static inline struct snd_soc_dai * -rz_ssi_get_dai(struct snd_pcm_substream *substream) -{ - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - - return snd_soc_rtd_to_cpu(rtd, 0); -} - static inline bool rz_ssi_stream_is_play(struct rz_ssi_priv *ssi, struct snd_pcm_substream *substream) { @@ -243,15 +235,15 @@ static void rz_ssi_stream_init(struct rz_ssi_stream *strm, static void rz_ssi_stream_quit(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) { - struct snd_soc_dai *dai = rz_ssi_get_dai(strm->substream); + struct device *dev = ssi->dev; rz_ssi_set_substream(strm, NULL); if (strm->oerr_num > 0) - dev_info(dai->dev, "overrun = %d\n", strm->oerr_num); + dev_info(dev, "overrun = %d\n", strm->oerr_num); if (strm->uerr_num > 0) - dev_info(dai->dev, "underrun = %d\n", strm->uerr_num); + dev_info(dev, "underrun = %d\n", strm->uerr_num); } static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, @@ -988,7 +980,8 @@ static int rz_ssi_pcm_open(struct snd_soc_component *component, static snd_pcm_uframes_t rz_ssi_pcm_pointer(struct snd_soc_component *component, struct snd_pcm_substream *substream) { - struct snd_soc_dai *dai = rz_ssi_get_dai(substream); + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct snd_soc_dai *dai = snd_soc_rtd_to_cpu(rtd, 0); struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream); From patchwork Wed Nov 13 13:35:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873745 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0285205125 for ; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:06 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 11/25] ASoC: renesas: rz-ssi: Remove the first argument of rz_ssi_stream_is_play() Date: Wed, 13 Nov 2024 15:35:26 +0200 Message-Id: <20241113133540.2005850-12-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The first argument of the rz_ssi_stream_is_play() is not used. Remove it. Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - fixed typos in patch title and description - collected tags sound/soc/renesas/rz-ssi.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 4c33663a0ae4..f230d63339e8 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -162,8 +162,7 @@ static void rz_ssi_reg_mask_setl(struct rz_ssi_priv *priv, uint reg, writel(val, (priv->base + reg)); } -static inline bool rz_ssi_stream_is_play(struct rz_ssi_priv *ssi, - struct snd_pcm_substream *substream) +static inline bool rz_ssi_stream_is_play(struct snd_pcm_substream *substream) { return substream->stream == SNDRV_PCM_STREAM_PLAYBACK; } @@ -337,7 +336,7 @@ static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) { - bool is_play = rz_ssi_stream_is_play(ssi, strm->substream); + bool is_play = rz_ssi_stream_is_play(strm->substream); bool is_full_duplex; u32 ssicr, ssifcr; @@ -674,7 +673,7 @@ static int rz_ssi_dma_transfer(struct rz_ssi_priv *ssi, */ return 0; - dir = rz_ssi_stream_is_play(ssi, substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; + dir = rz_ssi_stream_is_play(substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; /* Always transfer 1 period */ amount = runtime->period_size; @@ -800,7 +799,7 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, if (ssi->dma_rt) { bool is_playback; - is_playback = rz_ssi_stream_is_play(ssi, substream); + is_playback = rz_ssi_stream_is_play(substream); ret = rz_ssi_dma_slave_config(ssi, ssi->playback.dma_ch, is_playback); /* Fallback to pio */ From patchwork Wed Nov 13 13:35:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873746 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F31D4205AD3 for ; Wed, 13 Nov 2024 13:36:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504972; cv=none; b=fFjqIY8TCwuNI92fGWUOxwsVp73oxk5I3FLthLV/pqAkzVnd6nBYqsLtdClS8/IpPwEpe4RLIOdVUgjhRXYTSJ3d81qO9yAtf2xEgdGCX9R4BTed8v3tvX8RrU7YPF+WYiyGhKLv2eAJY78WvpfEPPkP3sjTT4pSZA+xNo5iPuM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504972; c=relaxed/simple; bh=NUgMtnnlt4nR2lbnrP9/gik3mpApdnkEKWDZ4IVi3xQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=r7cBvJqX4zQ3D0KE0a/IqGNx/gphi8qAQdXBey0nplj+h29D/L1R3L3EN6xyQJhuVJdAVK8zQhzo88o4SMvnzNfpRgdHYADAVIjupRYPwNILkFc5T7MXQh6B4u7zMLseTG+lUmBWx0euSDHbYIzIRihYhCnTLmaX1m7zeBkvx/4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=U5QcSm7i; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="U5QcSm7i" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-431695fa98bso55676495e9.3 for ; Wed, 13 Nov 2024 05:36:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504969; x=1732109769; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=D/aj5+U2C4AQbzB11TbDC8dRK3QJao8LDxVCHZOdJT0=; b=U5QcSm7i5rGL1R1leyFKVDUB1s6PGASBgaG0ssAmOTx155klqRzl8DSRkix8uPDREC puO4GpxbQl9EeqnHzpwF6JUd+ArQOJDetMuEtDqV63sjT8eFEcbz+ydyrTn5HYjylPKD VBSH1Kduz0kCJ8TNwEMAKaXcU7cTX7kqEEQjVZZaB20beP6hcadUbEfxpOIAzgv+oeGg M12T+HMUFu8Lf4bnadseV2y0mqRAq8dSh/T1qCi50Nsfy7JckFUoIAWNcxn7CCFlPaSV wcYhPa+W3Q0LjOOGaj4JYmim/VJ3n+dyv+ieytUouR4ciHvo371wn7plxXExxqtmxZtL ZeZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504969; x=1732109769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=D/aj5+U2C4AQbzB11TbDC8dRK3QJao8LDxVCHZOdJT0=; b=TzP7Uq2nOUqH2YOOEDS9QMPTNv2NLTRtk3C1/FAhY7MAWVZvOAteafK827W1g60roS 6wibcwpIwGupQM6GKLGCfFCo2dmFbLCOzUerJuXQkCfv0HSrqwCkhSNhn6Einyez2Pw7 DdaiWN1UD4yr/80bbhNyjQWNwoGqsv8aGsJEh3wnTm0FoBpgN6OarB9lzWYd7jy2y6IU lMjPTxiOpb+zFOmn159iXjR/iR4cEPVPOGJVndSnv5mc1SnMvzX0q/m84ow095fZGlt2 ePR2i15aVfBKwm4sPpTXTD4/wNmBwg9e6FvHrNQaJhUzph3yZIHzINNuK4oapIay5tCc OU4w== X-Forwarded-Encrypted: i=1; AJvYcCULHsPxklUM72Bq+MGHBwLYpAVPGWPGtxAWPOTmxYX1BOtPtrebHu6onS00xb59TPVaNm2Z6vbuu1s=@vger.kernel.org X-Gm-Message-State: AOJu0YzsaZWnx7+sm0jWInQ5TI2DpxxWQ1AbeMdMklRUj1Ks8AaTLJ7a PrCBia9/TCsrJS8CAUJ4c/xL2QfJ3X+ClPE+LT29lSfUHKsFmZN8JF8aSkavviY= X-Google-Smtp-Source: AGHT+IHRUoR6qLLTPcShZ4p5979avpyEOAnKvqkSvqtbLDZ6hUvwGzICszKqBYI3SPEX2Ji1iuwTdw== X-Received: by 2002:a05:600c:190f:b0:42f:7e87:3438 with SMTP id 5b1f17b1804b1-432b749ee57mr186545625e9.0.1731504969583; Wed, 13 Nov 2024 05:36:09 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:08 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 12/25] ASoC: renesas: rz-ssi: Use readl_poll_timeout_atomic() Date: Wed, 13 Nov 2024 15:35:27 +0200 Message-Id: <20241113133540.2005850-13-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Use readl_poll_timeout_atomic() instead of hardcoding something similar. While at it replace dev_info() with dev_warn_ratelimited() as the rz_ssi_set_idle() can also be called from IRQ context and if the SSI idle is not properly set this is at least a warning for user. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index f230d63339e8..aa175803867f 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -307,7 +308,8 @@ static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) { - int timeout; + u32 tmp; + int ret; /* Disable irqs */ rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN | @@ -320,15 +322,9 @@ static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) SSISR_RUIRQ), 0); /* Wait for idle */ - timeout = 100; - while (--timeout) { - if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ) - break; - udelay(1); - } - - if (!timeout) - dev_info(ssi->dev, "timeout waiting for SSI idle\n"); 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:11 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 13/25] ASoC: renesas: rz-ssi: Use temporary variable for struct device Date: Wed, 13 Nov 2024 15:35:28 +0200 Message-Id: <20241113133540.2005850-14-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Use a temporary variable for the struct device pointers to avoid dereferencing. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 62 +++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index aa175803867f..2f56c63582e7 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1021,36 +1021,37 @@ static const struct snd_soc_component_driver rz_ssi_soc_component = { static int rz_ssi_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct rz_ssi_priv *ssi; struct clk *audio_clk; struct resource *res; int ret; - ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL); + ssi = devm_kzalloc(dev, sizeof(*ssi), GFP_KERNEL); if (!ssi) return -ENOMEM; - ssi->dev = &pdev->dev; + ssi->dev = dev; ssi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(ssi->base)) return PTR_ERR(ssi->base); ssi->phys = res->start; - ssi->clk = devm_clk_get(&pdev->dev, "ssi"); + ssi->clk = devm_clk_get(dev, "ssi"); if (IS_ERR(ssi->clk)) return PTR_ERR(ssi->clk); - ssi->sfr_clk = devm_clk_get(&pdev->dev, "ssi_sfr"); + ssi->sfr_clk = devm_clk_get(dev, "ssi_sfr"); if (IS_ERR(ssi->sfr_clk)) return PTR_ERR(ssi->sfr_clk); - audio_clk = devm_clk_get(&pdev->dev, "audio_clk1"); + audio_clk = devm_clk_get(dev, "audio_clk1"); if (IS_ERR(audio_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(audio_clk), "no audio clk1"); ssi->audio_clk_1 = clk_get_rate(audio_clk); - audio_clk = devm_clk_get(&pdev->dev, "audio_clk2"); + audio_clk = devm_clk_get(dev, "audio_clk2"); if (IS_ERR(audio_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(audio_clk), "no audio clk2"); @@ -1063,13 +1064,13 @@ static int rz_ssi_probe(struct platform_device *pdev) ssi->audio_mck = ssi->audio_clk_1 ? ssi->audio_clk_1 : ssi->audio_clk_2; /* Detect DMA support */ - ret = rz_ssi_dma_request(ssi, &pdev->dev); + ret = rz_ssi_dma_request(ssi, dev); if (ret < 0) { - dev_warn(&pdev->dev, "DMA not available, using PIO\n"); + dev_warn(dev, "DMA not available, using PIO\n"); ssi->playback.transfer = rz_ssi_pio_send; ssi->capture.transfer = rz_ssi_pio_recv; } else { - dev_info(&pdev->dev, "DMA enabled"); + dev_info(dev, "DMA enabled"); ssi->playback.transfer = rz_ssi_dma_transfer; ssi->capture.transfer = rz_ssi_dma_transfer; } @@ -1078,7 +1079,7 @@ static int rz_ssi_probe(struct platform_device *pdev) ssi->capture.priv = ssi; spin_lock_init(&ssi->lock); - dev_set_drvdata(&pdev->dev, ssi); + dev_set_drvdata(dev, ssi); /* Error Interrupt */ ssi->irq_int = platform_get_irq_byname(pdev, "int_req"); @@ -1087,12 +1088,11 @@ static int rz_ssi_probe(struct platform_device *pdev) return ssi->irq_int; } - ret = devm_request_irq(&pdev->dev, ssi->irq_int, &rz_ssi_interrupt, - 0, dev_name(&pdev->dev), ssi); + ret = devm_request_irq(dev, ssi->irq_int, &rz_ssi_interrupt, + 0, dev_name(dev), ssi); if (ret < 0) { rz_ssi_release_dma_channels(ssi); - return dev_err_probe(&pdev->dev, ret, - "irq request error (int_req)\n"); + return dev_err_probe(dev, ret, "irq request error (int_req)\n"); } if (!rz_ssi_is_dma_enabled(ssi)) { @@ -1104,11 +1104,11 @@ static int rz_ssi_probe(struct platform_device *pdev) if (ssi->irq_rt < 0) return ssi->irq_rt; - ret = devm_request_irq(&pdev->dev, ssi->irq_rt, + ret = devm_request_irq(dev, ssi->irq_rt, &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); + dev_name(dev), ssi); if (ret < 0) - return dev_err_probe(&pdev->dev, ret, + return dev_err_probe(dev, ret, "irq request error (dma_rt)\n"); } else { if (ssi->irq_tx < 0) @@ -1117,50 +1117,50 @@ static int rz_ssi_probe(struct platform_device *pdev) if (ssi->irq_rx < 0) return ssi->irq_rx; - ret = devm_request_irq(&pdev->dev, ssi->irq_tx, + ret = devm_request_irq(dev, ssi->irq_tx, &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); + dev_name(dev), ssi); if (ret < 0) - return dev_err_probe(&pdev->dev, ret, + return dev_err_probe(dev, ret, "irq request error (dma_tx)\n"); - ret = devm_request_irq(&pdev->dev, ssi->irq_rx, + ret = devm_request_irq(dev, ssi->irq_rx, &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); + dev_name(dev), ssi); if (ret < 0) - return dev_err_probe(&pdev->dev, ret, + return dev_err_probe(dev, ret, "irq request error (dma_rx)\n"); } } - ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); + ssi->rstc = devm_reset_control_get_exclusive(dev, NULL); if (IS_ERR(ssi->rstc)) { ret = PTR_ERR(ssi->rstc); goto err_reset; } reset_control_deassert(ssi->rstc); - pm_runtime_enable(&pdev->dev); - ret = pm_runtime_resume_and_get(&pdev->dev); + pm_runtime_enable(dev); + ret = pm_runtime_resume_and_get(dev); if (ret < 0) { - dev_err(&pdev->dev, "pm_runtime_resume_and_get failed\n"); + dev_err(dev, "pm_runtime_resume_and_get failed\n"); goto err_pm; } - ret = devm_snd_soc_register_component(&pdev->dev, &rz_ssi_soc_component, + ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, rz_ssi_soc_dai, ARRAY_SIZE(rz_ssi_soc_dai)); if (ret < 0) { - dev_err(&pdev->dev, "failed to register snd component\n"); + dev_err(dev, "failed to register snd component\n"); goto err_snd_soc; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:13 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 14/25] ASoC: renesas: rz-ssi: Use goto label names that specify their actions Date: Wed, 13 Nov 2024 15:35:29 +0200 Message-Id: <20241113133540.2005850-15-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Use goto label names that specify their action. In this way we can have a better understanding of what is the action associated with the label by just reading the label name. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 2f56c63582e7..4af381f6d470 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1084,15 +1084,15 @@ static int rz_ssi_probe(struct platform_device *pdev) /* Error Interrupt */ ssi->irq_int = platform_get_irq_byname(pdev, "int_req"); if (ssi->irq_int < 0) { - rz_ssi_release_dma_channels(ssi); - return ssi->irq_int; + ret = ssi->irq_int; + goto err_release_dma_chs; } ret = devm_request_irq(dev, ssi->irq_int, &rz_ssi_interrupt, 0, dev_name(dev), ssi); if (ret < 0) { - rz_ssi_release_dma_channels(ssi); - return dev_err_probe(dev, ret, "irq request error (int_req)\n"); + dev_err_probe(dev, ret, "irq request error (int_req)\n"); + goto err_release_dma_chs; } if (!rz_ssi_is_dma_enabled(ssi)) { @@ -1136,7 +1136,7 @@ static int rz_ssi_probe(struct platform_device *pdev) ssi->rstc = devm_reset_control_get_exclusive(dev, NULL); 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:15 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 15/25] ASoC: renesas: rz-ssi: Rely on the ASoC subsystem to runtime resume/suspend the SSI Date: Wed, 13 Nov 2024 15:35:30 +0200 Message-Id: <20241113133540.2005850-16-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The ASoC subsystem takes care of runtime resume/suspend the audio devices when needed. Just enable the runtime PM on the SSI driver and let the subsystem runtime resume/suspend it. While at it use directly the devm_pm_runtime_enable(). Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 4af381f6d470..35172630be8b 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1140,11 +1140,10 @@ static int rz_ssi_probe(struct platform_device *pdev) } reset_control_deassert(ssi->rstc); - pm_runtime_enable(dev); - ret = pm_runtime_resume_and_get(dev); + ret = devm_pm_runtime_enable(dev); if (ret < 0) { - dev_err(dev, "pm_runtime_resume_and_get failed\n"); - goto err_pm; + dev_err(dev, "Failed to enable runtime PM!\n"); + goto err_reset; } ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, @@ -1152,15 +1151,12 @@ static int rz_ssi_probe(struct platform_device *pdev) ARRAY_SIZE(rz_ssi_soc_dai)); if (ret < 0) { dev_err(dev, "failed to register snd component\n"); - goto err_pm_put; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:17 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 16/25] ASoC: renesas: rz-ssi: Enable runtime PM autosuspend support Date: Wed, 13 Nov 2024 15:35:31 +0200 Message-Id: <20241113133540.2005850-17-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Enable runtime PM autosuspend support. The chosen autosuspend delay is zero for immediate autosuspend. In case there are users that need a different autosuspend delay, it can be adjusted through sysfs. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 35172630be8b..01e8b6a4e8a8 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1140,6 +1140,9 @@ static int rz_ssi_probe(struct platform_device *pdev) } reset_control_deassert(ssi->rstc); + /* Default 0 for power saving. Can be overridden via sysfs. */ + pm_runtime_set_autosuspend_delay(dev, 0); + pm_runtime_use_autosuspend(dev); ret = devm_pm_runtime_enable(dev); if (ret < 0) { dev_err(dev, "Failed to enable runtime PM!\n"); From patchwork Wed Nov 13 13:35:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873751 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D7622076A0 for ; Wed, 13 Nov 2024 13:36:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504983; cv=none; b=rY7sfD4nrtkBCmrU014V3KdgNI2fPfnH/zUVhafQuMosi34ZzDDV6rk3KpDnGpWabz9tsWpZOG/B87s19EPD9zUtYTeZtdyHH+rYiVDxGOcISxoNINzhgFdTsnXY55YTwM4LJe/Gsp8vP/qmjlOYUxanBGiHDA/b4LJX6NJotsE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504983; c=relaxed/simple; bh=3/nMrplyu1CS26v3CmVThtiTMNI7VxBJOloy2v7mF0M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hGvPC62zSdZ7bHg9YdJOvF8MwLCw6T5aW56JmIGHpYAZ9V1E8VicKbBlFN86SrQMrkBSTz5eZ34hGJtZ/cfKJmC3ApDCLyQC1ITNxYmjDjVpmn+7YsF66ipx0TdKkCMjNl8b5ZDlo8FnIEk4DnFN6SwLD+Pq9LvULg6lowheOZY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=TEFSKpPJ; arc=none smtp.client-ip=209.85.167.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="TEFSKpPJ" Received: by mail-lf1-f50.google.com with SMTP id 2adb3069b0e04-53b34ed38easo6834159e87.0 for ; Wed, 13 Nov 2024 05:36:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504980; x=1732109780; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ebvqXc3BNnaEmIYcV6FQ3/XHcONiwErht0FtwjiZBz0=; b=TEFSKpPJXuFvGQtQ3JP5pkMXuUxOnt26UbbwiH7A1s5ClkYTkfYKc2Z4jHjrxtdHec 1hgvmsSgaRt9guu1yHSiTLm3wMWaz2MipuLoynb4sj6y6NVrXlWSnxDfoA9tOetGZZoY br7fQThtyQUhtWBh9MBGC6g8hGzDybgJMCxoaO3r05yqOKj32eNv1KvwO1/jVEjxaLtF IAp+GCM10fp9C1MZkCTfkhq+/fq3USGwH7OjP+vyIk8WYpAm9As/z+7j5WsiLImgFIzn TMyEGIOh2GhY+UHielG3tEw8D+hGt7PT6eX76Yre48Thai2ZXiEh9pMDkh11hRKE//Sf auPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504980; x=1732109780; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ebvqXc3BNnaEmIYcV6FQ3/XHcONiwErht0FtwjiZBz0=; b=qNdasjOAthyVn+Ba3PH3TvUpfQNrVTUFEMkqptTemzI35xkwQ0AGVJn7iiAWY5EbMA RVT1J8gEK7ezzTXc4Gl7hjEISNDaFis/yq4d4ipx+sqU6rYGoPEVLeVlKDIcNp+z0MOb GOzOB9/kvfkGQ3mcG20d8c3H6shKmteGbOHt2EYQO6gCjDX3fw7VuPj0+YV9AFZ0jwE5 4NgxrWL+UcYGRSaLyQvYiPwLBLfJ5+zjeWqUYNMaPkMfeUABZ0g4FNfa0A7PoeMoEJLN TH2DHQgF316xWtBi6t2sWcNRGBcGLwYcZfG6/YIzlxU9788VL6bmOtgScdVpLM7s345+ MTGQ== X-Forwarded-Encrypted: i=1; AJvYcCWZP8MP3vj5/oFM/SYJ1T0iqWCIO1zMR/jnNp3mspblr/6Fz72Tf/1/Y5OTRdi7fdswsPxemRAFv8A=@vger.kernel.org X-Gm-Message-State: AOJu0YxwN5xIMqrbDND6BrQw8X/oGLqrITe6sRzIk4qgQx5aq68PEY9x R4TPFH1O9Z174k1fQKrHACXSaoSC5MF34qRVssButvUS85Fv4uJJ5iQpBdl0lNk= X-Google-Smtp-Source: AGHT+IGR1P7Lt4oB51b/DZ11e2JaXo0ni2pJ+vo336Q7wZP2XAQWNh1QSMMM2N1uppIPUB5UdQRn8w== X-Received: by 2002:a05:6512:2248:b0:536:554a:24c2 with SMTP id 2adb3069b0e04-53d862bb5d5mr10522158e87.13.1731504979601; Wed, 13 Nov 2024 05:36:19 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:19 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 17/25] ASoC: renesas: rz-ssi: Add runtime PM support Date: Wed, 13 Nov 2024 15:35:32 +0200 Message-Id: <20241113133540.2005850-18-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add runtime PM support to the ssi driver. This assert/de-assert the reset lines on runtime suspend/resume. Along with it the de-assertion of the reset line from probe function was removed as it is not necessary anymore. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 01e8b6a4e8a8..d0e2665ec830 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1139,14 +1139,13 @@ static int rz_ssi_probe(struct platform_device *pdev) goto err_release_dma_chs; } - reset_control_deassert(ssi->rstc); /* Default 0 for power saving. Can be overridden via sysfs. */ pm_runtime_set_autosuspend_delay(dev, 0); pm_runtime_use_autosuspend(dev); ret = devm_pm_runtime_enable(dev); if (ret < 0) { dev_err(dev, "Failed to enable runtime PM!\n"); - goto err_reset; + goto err_release_dma_chs; } ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, @@ -1154,13 +1153,11 @@ static int rz_ssi_probe(struct platform_device *pdev) ARRAY_SIZE(rz_ssi_soc_dai)); if (ret < 0) { dev_err(dev, "failed to register snd component\n"); - goto err_reset; + goto err_release_dma_chs; } return 0; -err_reset: - reset_control_assert(ssi->rstc); err_release_dma_chs: rz_ssi_release_dma_channels(ssi); @@ -1182,10 +1179,29 @@ static const struct of_device_id rz_ssi_of_match[] = { }; MODULE_DEVICE_TABLE(of, rz_ssi_of_match); +static int rz_ssi_runtime_suspend(struct device *dev) +{ + struct rz_ssi_priv *ssi = dev_get_drvdata(dev); + + return reset_control_assert(ssi->rstc); +} + +static int rz_ssi_runtime_resume(struct device *dev) +{ + struct rz_ssi_priv *ssi = dev_get_drvdata(dev); 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:21 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 18/25] ASoC: renesas: rz-ssi: Issue software reset in hw_params API Date: Wed, 13 Nov 2024 15:35:33 +0200 Message-Id: <20241113133540.2005850-19-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The code initially issued software reset on SNDRV_PCM_TRIGGER_START action only before starting the first stream. This can be easily moved to hw_params() as the action is similar to setting the clocks. Moreover, according to the hardware manual (Table 35.7 Bits Initialized by Software Reset of the SSIFCR.SSIRST Bit) the software reset action acts also on the clock dividers bits. Due to this issue the software reset in hw_params() before configuring the clock dividers. This also simplifies the code in trigger API. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index d0e2665ec830..10dd973a1c85 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -388,6 +388,15 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) return 0; } +static int rz_ssi_swreset(struct rz_ssi_priv *ssi) +{ + u32 tmp; + + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, SSIFCR_SSIRST); + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0); + return readl_poll_timeout_atomic(ssi->base + SSIFCR, tmp, !(tmp & SSIFCR_SSIRST), 1, 5); +} + static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) { strm->running = 0; @@ -782,14 +791,6 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, switch (cmd) { case SNDRV_PCM_TRIGGER_START: - /* Soft Reset */ - if (!rz_ssi_is_stream_running(&ssi->playback) && - !rz_ssi_is_stream_running(&ssi->capture)) { - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST); 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:22 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 19/25] ASoC: renesas: rz-ssi: Add suspend to RAM support Date: Wed, 13 Nov 2024 15:35:34 +0200 Message-Id: <20241113133540.2005850-20-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The SSIF-2 IP is available on the Renesas RZ/G3S SoC. The Renesas RZ/G3S SoC supports a power-saving mode where power to most of the SoC components is turned off. Add suspend/resume support to the SSIF-2 driver to support this power-saving mode. On SNDRV_PCM_TRIGGER_SUSPEND trigger the SSI is stopped (the stream user pointer is left untouched to avoid breaking user space and the dma buffer pointer is set to zero), on SNDRV_PCM_TRIGGER_RESUME software reset is issued for the SSIF-2 IP and the clocks are re-configured. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 46 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 10dd973a1c85..c6bedb58d3ae 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -782,6 +782,32 @@ static int rz_ssi_dma_request(struct rz_ssi_priv *ssi, struct device *dev) return -ENODEV; } +static int rz_ssi_trigger_resume(struct rz_ssi_priv *ssi) +{ + int ret; + + if (rz_ssi_is_stream_running(&ssi->playback) || + rz_ssi_is_stream_running(&ssi->capture)) + return 0; + + ret = rz_ssi_swreset(ssi); + if (ret) + return ret; + + return rz_ssi_clk_setup(ssi, ssi->hw_params_cache.rate, + ssi->hw_params_cache.channels); +} + +static void rz_ssi_streams_suspend(struct rz_ssi_priv *ssi) +{ + if (rz_ssi_is_stream_running(&ssi->playback) || + rz_ssi_is_stream_running(&ssi->capture)) + return; + + ssi->playback.dma_buffer_pos = 0; + ssi->capture.dma_buffer_pos = 0; +} + static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { @@ -790,8 +816,16 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, int ret = 0, i, num_transfer = 1; switch (cmd) { + case SNDRV_PCM_TRIGGER_RESUME: + ret = rz_ssi_trigger_resume(ssi); + if (ret) + return ret; + + fallthrough; + case SNDRV_PCM_TRIGGER_START: - rz_ssi_stream_init(strm, substream); + if (cmd == SNDRV_PCM_TRIGGER_START) + rz_ssi_stream_init(strm, substream); if (ssi->dma_rt) { bool is_playback; @@ -819,6 +853,12 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, ret = rz_ssi_start(ssi, strm); break; + + case SNDRV_PCM_TRIGGER_SUSPEND: + rz_ssi_stop(ssi, strm); + rz_ssi_streams_suspend(ssi); + break; + case SNDRV_PCM_TRIGGER_STOP: rz_ssi_stop(ssi, strm); rz_ssi_stream_quit(ssi, strm); @@ -958,7 +998,8 @@ static const struct snd_soc_dai_ops rz_ssi_dai_ops = { static const struct snd_pcm_hardware rz_ssi_pcm_hardware = { .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID, + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_RESUME, .buffer_bytes_max = PREALLOC_BUFFER, .period_bytes_min = 32, .period_bytes_max = 8192, @@ -1201,6 +1242,7 @@ static int rz_ssi_runtime_resume(struct device *dev) static const struct dev_pm_ops rz_ssi_pm_ops = { RUNTIME_PM_OPS(rz_ssi_runtime_suspend, rz_ssi_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) }; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:24 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , Krzysztof Kozlowski Subject: [PATCH v3 20/25] ASoC: dt-bindings: renesas,rz-ssi: Document the Renesas RZ/G3S SoC Date: Wed, 13 Nov 2024 15:35:35 +0200 Message-Id: <20241113133540.2005850-21-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The SSI IP variant present on the Renesas RZ/G3S SoC is similar to the one found on the Renesas RZ/G2{UL, L, LC} SoCs. Add documentation for it. Acked-by: Krzysztof Kozlowski Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml index f4610eaed1e1..cab615f79ee4 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml @@ -19,6 +19,7 @@ properties: - renesas,r9a07g043-ssi # RZ/G2UL and RZ/Five - renesas,r9a07g044-ssi # RZ/G2{L,LC} - renesas,r9a07g054-ssi # RZ/V2L + - renesas,r9a08g045-ssi # RZ/G3S - const: renesas,rz-ssi reg: From patchwork Wed Nov 13 13:35:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13873755 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E272C212194 for ; Wed, 13 Nov 2024 13:36:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504991; cv=none; b=AMQXdKyGNUd7iyvirPx7aETp+73h3ALER38sK6MXlNV/7bXgUBRDCpI+An3AhIqnn3uDuKcUeAvc/AHSzgNmX1riOi87EfHHJwzdsV0f3/1YPIj5xee0/ypB7uBam61p+WJsn/jafFBuOJZpHqUgA7IoWRlODdPDblOSE7KTu6k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504991; c=relaxed/simple; bh=klKnW6pY9VR3FhQEQZTBaAipu8lgL9Qjmb9S0O/TpTY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=R3hBBCepsPvFYjThbGgbbxS7tDt0QYY5M/iti4OYcfCgZ6TOUqGGWT+GrdsDCeWVvziY7gH1lWRrmYrDk6XcbmHY5AR3BUeadT7vnLQy6ElUxAWapJgPUfCHR1gasDQEV6iphb5/9orRVK1ej4QT3D3oLjDnC+tCVPF6bBwrjoY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=nZpcV6Yn; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="nZpcV6Yn" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4314b316495so57975135e9.2 for ; Wed, 13 Nov 2024 05:36:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504987; x=1732109787; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=B83X34gMDf64A3uVR3n446BkoMV/V6kVlrm1DB9I7pQ=; b=nZpcV6YnciWXOiNhvF53uqK8lKxVPbwKYIl2yP+YT6wNSfWRhoCk+73hu2Yls4vqkn DpPU2V3kyHRjbaZ750t7BMSJ7paJKS0leH1ulr+EFE0W1CTuIlGTmlMefPfoi8V2b0ht ncRdsScHgoSxK2chpKMnIqMpaeEhitqU1UnxBe3TsZe6vj5BTtoYf2bB8JHLJQ6mzVik 0v0FhA06UUtQakgbtREcmhLO2hZ0b+YM5VZ3DbstGgrpM+tDe1mZh4CJZNz42fELd7IT zl+6ljN1panoueoY6XJ4j44SJlvwcAOtr4Z7oxnvXN1lKraLVGRxQp+8t7ZGx10DBfws 75Mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504987; x=1732109787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B83X34gMDf64A3uVR3n446BkoMV/V6kVlrm1DB9I7pQ=; b=IF9PKORHZZhAGBS5CKXKq8g+TMb9cWiXZLR7PViccqTrg+sQaLUgqTkiuBlgucyDCW 92O8oLmI8CGq6ql/MTkuGPoKs27FuE6TSaq8bRTW42bk23uIB4qx6GiLEbmlrEGT7VWy BMBkN8nMkhnJbMRbL4RP8mThZ5aerdPBLrT9WFCt3i7hmiOpRPZDWckM2ctSvOJ+DCD+ KCvmkVmZcHHeK7zJRhSPCVyNe3p4KqrEDaPnOxEtdmQD8H8s6mOeRXidTOj+XWh8TDWW 6VtQ2I+dPL1qZDDSgehoT6PbCm9mUvhsZqeAagKunDuHDLHnjgr2Is5/mGD1ZhH9fcGJ pI/g== X-Forwarded-Encrypted: i=1; AJvYcCX2tBwOLhiokE6rjTcbfvZJN1c0rQghnxizJuyDYkK7OlbVV2iw+akE3vUW1Gynr70z5x7zXGKheTo=@vger.kernel.org X-Gm-Message-State: AOJu0YyXYRveUjJT0mK5owMd8iFdXbEyGaYCTEYFBd+p9Yy4FOzjecyb T5dgfF/kl9hDRERxcwvhs6PPceoIy+WhmfEqoipyqYZwK0pgnRPGN5R2BIjfne8= X-Google-Smtp-Source: AGHT+IFTYauwCX+TC+dM+tJXScGC+NRGKDxfQYhWwC0Yq9o+VfhKItRyTz7escVpGORNAfY3vPX6Rg== X-Received: by 2002:a05:600c:b95:b0:431:57d2:d7b4 with SMTP id 5b1f17b1804b1-432d4ad3329mr24823125e9.26.1731504987299; Wed, 13 Nov 2024 05:36:27 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:26 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 21/25] arm64: dts: renesas: r9a08g045: Add SSI nodes Date: Wed, 13 Nov 2024 15:35:36 +0200 Message-Id: <20241113133540.2005850-22-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add DT nodes for the SSI IPs available on the Renesas RZ/G3S SoC. Along with it external audio clocks were added. Board device tree could use it and update the frequencies. Signed-off-by: Claudiu Beznea Reviewed-by: Biju Das --- Changes in v3: - none Changes in v2: - none arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 96 ++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index be8a0a768c65..24c6388cd0d5 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -14,6 +14,22 @@ / { #address-cells = <2>; #size-cells = <2>; + audio_clk1: audio-clk1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by boards that provide it. */ + clock-frequency = <0>; + status = "disabled"; + }; + + audio_clk2: audio-clk2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by boards that provide it. */ + clock-frequency = <0>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -187,6 +203,86 @@ i2c3: i2c@10090c00 { status = "disabled"; }; + ssi0: ssi@100a8000 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8000 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI0_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI0_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI0_RST_M2_REG>; + dmas = <&dmac 0x2665>, <&dmac 0x2666>; + dma-names = "tx", "rx"; + power-domains = <&cpg>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ssi1: ssi@100a8400 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8400 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI1_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI1_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI1_RST_M2_REG>; + dmas = <&dmac 0x2669>, <&dmac 0x266a>; + dma-names = "tx", "rx"; + power-domains = <&cpg>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ssi2: ssi@100a8800 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8800 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI2_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI2_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI2_RST_M2_REG>; + dmas = <&dmac 0x266d>, <&dmac 0x266e>; + dma-names = "tx", "rx"; + power-domains = <&cpg>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ssi3: ssi@100a8c00 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8c00 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI3_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI3_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:28 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 22/25] arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node Date: Wed, 13 Nov 2024 15:35:37 +0200 Message-Id: <20241113133540.2005850-23-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add versa3 clock generator node. It provides the clocks for the Ethernet PHY, PCIe, audio devices. Signed-off-by: Claudiu Beznea Reviewed-by: Biju Das --- Changes in v3: - none Changes in v2: - none .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 2ed01d391554..6e58d47d85b0 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -92,6 +92,12 @@ vcc_sdhi2: regulator2 { gpios = <&pinctrl RZG2L_GPIO(8, 1) GPIO_ACTIVE_HIGH>; enable-active-high; }; + + x3_clk: x3-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; #if SW_CONFIG3 == SW_ON @@ -152,6 +158,30 @@ &extal_clk { &i2c1 { status = "okay"; + + versa3: clock-generator@68 { + compatible = "renesas,5l35023"; + reg = <0x68>; + clocks = <&x3_clk>; + #clock-cells = <1>; + assigned-clocks = <&versa3 0>, + <&versa3 1>, + <&versa3 2>, + <&versa3 3>, + <&versa3 4>, + <&versa3 5>; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:30 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 23/25] arm64: dts: renesas: Add da7212 audio codec node Date: Wed, 13 Nov 2024 15:35:38 +0200 Message-Id: <20241113133540.2005850-24-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add the da7212 audio codec node. Along with it regulators nodes were reworked to be able to re-use them on da7212. Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - none .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 17 ++++++++++---- arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 23 +++++++++++++++++++ 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 6e58d47d85b0..5ee9dac4aebb 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -63,7 +63,6 @@ vcc_sdhi0: regulator0 { enable-active-high; }; -#if SW_CONFIG2 == SW_ON vccq_sdhi0: regulator1 { compatible = "regulator-gpio"; regulator-name = "SDHI0 VccQ"; @@ -73,8 +72,8 @@ vccq_sdhi0: regulator1 { gpios-states = <1>; states = <3300000 1>, <1800000 0>; }; -#else - reg_1p8v: regulator1 { + + reg_1p8v: regulator2 { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; @@ -82,9 +81,17 @@ reg_1p8v: regulator1 { regulator-boot-on; regulator-always-on; }; -#endif - vcc_sdhi2: regulator2 { + reg_3p3v: regulator3 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_sdhi2: regulator4 { compatible = "regulator-fixed"; regulator-name = "SDHI2 Vcc"; regulator-min-microvolt = <3300000>; diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 4509151344c4..4aa99814b808 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -68,6 +68,29 @@ &i2c0 { status = "okay"; clock-frequency = <1000000>; + + da7212: codec@1a { + compatible = "dlg,da7212"; + reg = <0x1a>; + + #sound-dai-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&versa3 1>; + clock-names = "mclk"; + + dlg,micbias1-lvl = <2500>; + dlg,micbias2-lvl = <2500>; + dlg,dmic-data-sel = "lrise_rfall"; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:32 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 24/25] arm64: dts: renesas: rzg3s-smarc: Enable SSI3 Date: Wed, 13 Nov 2024 15:35:39 +0200 Message-Id: <20241113133540.2005850-25-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Enable SSI3. Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - none arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 26 ++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 4aa99814b808..6dd439e68bd4 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -64,6 +64,11 @@ vccq_sdhi1: regulator-vccq-sdhi1 { }; }; +&audio_clk2 { + clock-frequency = <12288000>; + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -94,6 +99,11 @@ da7212: codec@1a { }; &pinctrl { + audio_clock_pins: audio-clock { + pins = "AUDIO_CLK1", "AUDIO_CLK2"; + input-enable; + }; + key-1-gpio-hog { gpio-hog; gpios = ; @@ -151,6 +161,13 @@ cd { pinmux = ; /* SD1_CD */ }; }; + + ssi3_pins: ssi3 { + pinmux = , /* BCK */ + , /* RCK */ + , /* TXD */ + ; /* RXD */ + }; }; &scif0 { @@ -171,3 +188,12 @@ &sdhi1 { max-frequency = <125000000>; status = "okay"; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:34 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 25/25] arm64: dts: renesas: rzg3s-smarc: Add sound card Date: Wed, 13 Nov 2024 15:35:40 +0200 Message-Id: <20241113133540.2005850-26-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add sound card with SSI3 as CPU DAI and DA7212 as codec DAI. Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - none arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 6dd439e68bd4..89673bbaee6d 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -44,6 +44,23 @@ key-3 { }; }; + snd_rzg3s: sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&cpu_dai>; + simple-audio-card,frame-master = <&cpu_dai>; + simple-audio-card,mclk-fs = <256>; + + cpu_dai: simple-audio-card,cpu { + sound-dai = <&ssi3>; + }; + + codec_dai: simple-audio-card,codec { + sound-dai = <&da7212>; + clocks = <&versa3 1>; + }; + }; + vcc_sdhi1: regulator-vcc-sdhi1 { compatible = "regulator-fixed"; regulator-name = "SDHI1 Vcc";