From patchwork Thu Nov 14 07:59:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874695 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30B9C1E8857 for ; Thu, 14 Nov 2024 08:03:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571411; cv=none; b=ROjoAld1o/LAvwzl6cnIoClQ/fAgmHY4L2wXMK2tbizI4F1jIbQR8ev//Wgg8P57lG0Y3jzIE2S6wZNmzgRBVQwW40VJefwSBKCfXQUeNwIkqcm43IUowU3wNVVF9SRUoxSa+zY/wfacJo0JSduD6BH5zTBZSMOnGUrd4cB6ZCM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571411; c=relaxed/simple; bh=Irfwz6f+CCffVc4a2X3/8hjZ28G+Gyv2lmT80b3w2wY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EPWY0srfhJbDvJmIwe+eP7A9vm2ZD7DvjFTrByfk0PXJJJw1R7zpdVNYu91FgwiAtS02LWprTZ4ADYXmNOIED5bXR9XOiN0stz2FdSHGvt5EFB3K0/dCPwX5HIDgr5aHK5XOf1a87EW/YrLpGAuXeauDRnscaSeRRgs8dWobpkY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Mpr56vOJ; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Mpr56vOJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571410; x=1763107410; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Irfwz6f+CCffVc4a2X3/8hjZ28G+Gyv2lmT80b3w2wY=; b=Mpr56vOJhRIoyY6xXbApaqmLYrMuKC7kDZT6NLD3Bki8Rv4jDJwrpITU ljAJKr37oO3IyXxl957wJlf9znISHHvNRWmLwHjXws9C+7h5nKzCmRRyD rSg7w/U8kjz31gsGc9DTryID4kZYE+LuQBlMKtT1IIbAr6dGjMp7uxg82 Shkfts9CQcMeOlJuV8lm1hZsVbvKy06RPy5xpr9T/JjC9VwwL0UR04MiC nlOxp+TjgtHbBYpM2a8ylDVEWOndjeQhwqyK/J+I+e65q4emOnUfbHc5Y 3VuJvz3BGW1DpTBS4R6g0KlunEr4wbkcy0pRlhqw3c3OqNG7XdV+J9mtH Q==; X-CSE-ConnectionGUID: TUU9aEM1QhKiZke7PjdqwQ== X-CSE-MsgGUID: mCOnnN/+QH2vHqzdF1bxlg== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600433" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600433" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:16 -0800 X-CSE-ConnectionGUID: 7/gel0/GT5GC+XtbEcU/2w== X-CSE-MsgGUID: k9A9jbp/R82MAmgSJf+4Ag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627444" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:14 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 01/10] tools/power turbostat: Remove PC7/PC9 support on MTL Date: Thu, 14 Nov 2024 15:59:37 +0800 Message-ID: <20241114075946.118577-2-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Similar to ADL/RPL, MTL support CC1/CC6/CC7/PC2/PC3/PC6/PC8/CP10. Remove PC7/PC9 support on MTL. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 089220aaa5c9..bf1b5fe1f00d 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -1003,8 +1003,8 @@ static const struct platform_data turbostat_pdata[] = { { INTEL_RAPTORLAKE, &adl_features }, { INTEL_RAPTORLAKE_P, &adl_features }, { INTEL_RAPTORLAKE_S, &adl_features }, - { INTEL_METEORLAKE, &cnl_features }, - { INTEL_METEORLAKE_L, &cnl_features }, + { INTEL_METEORLAKE, &adl_features }, + { INTEL_METEORLAKE_L, &adl_features }, { INTEL_ARROWLAKE_H, &arl_features }, { INTEL_ARROWLAKE_U, &arl_features }, { INTEL_ARROWLAKE, &arl_features }, From patchwork Thu Nov 14 07:59:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874694 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C226C1F5852 for ; Thu, 14 Nov 2024 08:03:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571411; cv=none; b=bjoiebsCs6oRq5hDga44SrCG/YFJMNLYYHGdMiqkyy+d92ZbPPNFiJ4TyTM/JYBU53vw+7sxHrV/uxt8zIvwAeeD3i+I8JaA3GYBykBS7OBLK+5HWrH9wY5vdMB3DI8x5+uU8YHMgm74LWPokNxvuc60zfFcYQnrHaZyjxcxY10= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571411; c=relaxed/simple; bh=ZReP/VscnZ7hXhimMmbrzdZBToZXEG6J0V5UJDgz+9U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TYENgit3cj88qP+vH4Y987SrhLSPcZH2bv1VRlALQooro+QDN6CJW6Aqo+h1Z3zt0kisN1HHZAbkPc09nhHkSQPEYDHEv+cfrIHIE/aezBez7bk0JMtzS0OWDTWfLp0R7qPFm6dVx3kYaIWHmTfvZhg/nb2wIc+K3altPaGj6IY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QBdXfmzZ; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QBdXfmzZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571410; x=1763107410; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZReP/VscnZ7hXhimMmbrzdZBToZXEG6J0V5UJDgz+9U=; b=QBdXfmzZ8aokmZPP4Z7Nga/5SEIKAYwq4ES3bKVRh68EDWbA+zFtTafz XD+WxUYii2SnughEfw8ywtK6h11cKLwgiDjMr4fSRVPare6jK04+gIAu1 ydRLCkLq5gPPhaDIyuObZvVieOIzd6flfOmeipPa0CMfg3NI+r6ghmjO3 jjTQGhGc1RsoYZYsd6+ri31Gsr+VNMw6r9lhqJR9xt67J01RJPAjElAXR JufOrBiXyez18RpLLMnflC6JAuu5A+u3HW0AQJINLpLB+Gwz1peRqY+VY VqRsV3DzINtW85tNn08aIbU35P04PRyFBvdQf1pOBfuZy/VzZE1bbSV8h Q==; X-CSE-ConnectionGUID: lQcRYG2DTpSQlqw0enh0MA== X-CSE-MsgGUID: Km4NJ8V3R0GbFIWry4pf4g== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600434" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600434" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:17 -0800 X-CSE-ConnectionGUID: Z7GPxwtJQjyUabARrN/BRA== X-CSE-MsgGUID: i68jMhuGQm+/wQ96255XfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627449" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:15 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 02/10] tools/power turbostat: Add back PC8 support on Arrowlake Date: Thu, 14 Nov 2024 15:59:38 +0800 Message-ID: <20241114075946.118577-3-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Similar to ADL/RPL/MTL, ARL supports CC1/CC6/CC7/PC2/PC3/PC6/PC8/PC10. Add back PC8 support on Arrowlake. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index bf1b5fe1f00d..b35f63c2b206 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -1005,9 +1005,9 @@ static const struct platform_data turbostat_pdata[] = { { INTEL_RAPTORLAKE_S, &adl_features }, { INTEL_METEORLAKE, &adl_features }, { INTEL_METEORLAKE_L, &adl_features }, - { INTEL_ARROWLAKE_H, &arl_features }, - { INTEL_ARROWLAKE_U, &arl_features }, - { INTEL_ARROWLAKE, &arl_features }, + { INTEL_ARROWLAKE_H, &adl_features }, + { INTEL_ARROWLAKE_U, &adl_features }, + { INTEL_ARROWLAKE, &adl_features }, { INTEL_LUNARLAKE_M, &arl_features }, { INTEL_ATOM_SILVERMONT, &slv_features }, { INTEL_ATOM_SILVERMONT_D, &slvd_features }, From patchwork Thu Nov 14 07:59:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874690 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6389E22611 for ; Thu, 14 Nov 2024 08:03:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571408; cv=none; b=k4mi5F+7CfrghjgfdS87EV3Ldb7bFbYs6tE+dvuGWIBPlhHdGWOrTosI2SxE1ZS+kJK1AAwXMCPfg98ZHz70zQfQysFLXqd1i+2HErWvFo5nlKGBS3R4gR0iYaZbkwZ8UPfaoE7TAh/dC3lgxupjHePVtUBTfrJ7m48wt6FYHJc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571408; c=relaxed/simple; bh=mqq16BB3dav1v6eYCRi3tewiK5s984dApyqhmuEXKSA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WFUb9CNNAa36IrFyM+b+JXuWxEhzw28fnb/Gos7x6fTh4F8fWOQ6w2WH7eqm0H5mwU4DkHJn6YmVA4+20Ee1db2Qv8CCY3GlEq/J2vu9d1xnbxPPR6NkRThvtQXIXc92GCSvkjz01OViK8VE7Ox8Kq4jmMMeBICiQCl+1dWmLOs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SE+aiGs1; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SE+aiGs1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571406; x=1763107406; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mqq16BB3dav1v6eYCRi3tewiK5s984dApyqhmuEXKSA=; b=SE+aiGs1xZnc3ejMySa1hC0JuAT+fHEY9ugqKF9xM3gTyg+IIhZcYkhK DBpSy8x28v1fAmqAwfJ15wUrtSZmdJAtDvEdbl5eOl78JP35TQLVlDms4 lshZ/b72TGdPLxfJOqQGWU/78YvHBIqBYXjt95F6U3lwyQxBzYFlDCjSF 4ZjS6iUPmA8MNFCizsMhxqKIeHuefCKRtqXlXjlYMuGxbVnkxA2Jwu+4h uJUUSX3aUfJjw08EP2e9GGcYKL5asayWheBRbZxQDXOz5F4WfPwgOALih y3ThIVIKrL6n/VaVyAjMGD272N91jc28aynAiqnu6dgkBWktfHmedQKbT w==; X-CSE-ConnectionGUID: xksjIXlJQC2Qq37ExUIROQ== X-CSE-MsgGUID: q3RBJxTZQqKyz+2UmC9Xow== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600435" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600435" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:18 -0800 X-CSE-ConnectionGUID: 182Bm0bFT8q35gPv6L6eLg== X-CSE-MsgGUID: FCgBtD4ET8mbbw6a/c9MLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627458" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:17 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 03/10] tools/power turbostat: Rename arl_features to lnl_features Date: Thu, 14 Nov 2024 15:59:39 +0800 Message-ID: <20241114075946.118577-4-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As ARL shares the same features with ADL/RPL/MTL, now 'arl_features' is used by Lunarlake platform only. Rename 'arl_features' to 'lnl_features'. No functional change. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index b35f63c2b206..3d59718516df 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -746,7 +746,7 @@ static const struct platform_features adl_features = { .enable_tsc_tweak = 1, }; -static const struct platform_features arl_features = { +static const struct platform_features lnl_features = { .has_msr_misc_feature_control = 1, .has_msr_misc_pwr_mgmt = 1, .has_nhm_msrs = 1, @@ -1008,7 +1008,7 @@ static const struct platform_data turbostat_pdata[] = { { INTEL_ARROWLAKE_H, &adl_features }, { INTEL_ARROWLAKE_U, &adl_features }, { INTEL_ARROWLAKE, &adl_features }, - { INTEL_LUNARLAKE_M, &arl_features }, + { INTEL_LUNARLAKE_M, &lnl_features }, { INTEL_ATOM_SILVERMONT, &slv_features }, { INTEL_ATOM_SILVERMONT_D, &slvd_features }, { INTEL_ATOM_AIRMONT, &amt_features }, From patchwork Thu Nov 14 07:59:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874691 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E29291E8857 for ; Thu, 14 Nov 2024 08:03:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571409; cv=none; b=dKeJH5FDssuFUVz+g7RF85jQZksfH/rbbq0xEOy2CL0TCscKftz0NFNI43hhJfaL5j74imbJ8eQD+dfBWSO/O7hRXZvIQiNURE7YIX9jrpHmMbbMYkE8jyCpOiy8xoHsEjfpxEUiXu6PsTK20e0TzyiaflZvI+oD+tPPkzxmzgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571409; c=relaxed/simple; bh=IQjSfD8xjGG2y6k7Z3sum460fevHAohcPX5rFtkmUQw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JbRbWb/1OWxImt2xF8QqEE5rMyljKJih+xQ5i/plp2lerJh6Lt1Y7sk1N75JIkh0efERHe1PBYCWDk6Vjzj1Devu48lXFeAb+pjcn5GtP9o53RrgCtUrD9zzVHlXoqadIg5NpMJXxRmy5iEDne+c1L29HxQHrCX0GApHValfToo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=eevRHBWu; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eevRHBWu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571408; x=1763107408; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IQjSfD8xjGG2y6k7Z3sum460fevHAohcPX5rFtkmUQw=; b=eevRHBWuN/cLiZWvnbTax8mm5L376e+WuVK6Vusw8ID1flDjrlh6/FAU VX6BsLlB1SulCJ2SP7NTHxbgFIvNtwH+A9BVuki8iVxmBn1lf2m6kVnWM Ufg6oUGNTM5QO6YTh5HOZ89CEIZPKgMeExgQjAT9/Ow7bhC4YlsTLfwnE b2IPXUEJPPQ0XMjn1OJE8oyZea2w03W47eFT2uI3ll1JxaJd2Jk7HXU3+ DdgNbLDMX3OiXAYa+TV3YW0Wp/U8p/KA3dKpapgabHZhoBJIk6gjsnQR3 HdNerembGBxAXIws3JM8cvGmBTz5gW52lp/KUsBX8uy1mq/tR3EbnID6Q g==; X-CSE-ConnectionGUID: brB03X7/TVy2XZpbNbuvSg== X-CSE-MsgGUID: ZVTYpCCETRmgbs9Nu+TnLw== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600437" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600437" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:19 -0800 X-CSE-ConnectionGUID: gQ1k/PmrRkSdJmHudPPOfA== X-CSE-MsgGUID: FxZ5mvL+SIamuUa/7s/nuA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627463" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:18 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 04/10] tools/power turbostat: Remove PC3 support on Lunarlake Date: Thu, 14 Nov 2024 15:59:40 +0800 Message-ID: <20241114075946.118577-5-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Lunarlake supports CC1/CC6/CC7/PC2/PC6/PC10. Remove PC3 support on Lunarlake. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 3d59718516df..9d76329e108f 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -752,7 +752,7 @@ static const struct platform_features lnl_features = { .has_nhm_msrs = 1, .has_config_tdp = 1, .bclk_freq = BCLK_100MHZ, - .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC3 | PC6 | PC10, + .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC6 | PC10, .cst_limit = CST_LIMIT_HSW, .has_irtl_msrs = 1, .has_msr_core_c1_res = 1, From patchwork Thu Nov 14 07:59:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874693 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 240C822611 for ; Thu, 14 Nov 2024 08:03:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571410; cv=none; b=cTk2dEMISoHMy0zlx9Um7bVm8FRu153e6mf4apzM0TqfavquEUu+m0quklSlLrryVGwDdyKKPRYY6aN9monAdhiqwBkWWnS+ugXHrCj3Ks1i1F0yWK+k2YzYd+DRk6VB0HaZBisVd4b3RQGb3AX9P2Qq61f/ovU3qoJEdr43R5w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571410; c=relaxed/simple; bh=GQBIc9cNmBVfSCy0H2v7jCxrHQRrUvAhVov6nj7t06Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VrzJ4ssfRHSNF/Pmthp6iubAoVAHQSP1faxg0aAgCm9e8ZfeH19gyq992BwzzZz280PSXAgMi5+1UIP0chRNoAB37G3eldHrV8jBIIwilN5fQtBPEq91Z4pKaxbU6d0rtsRBI5y/5/4wTxTnDFcoOk3Xwbj8oQRM5TTVf6RW/40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EhfGjtvM; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EhfGjtvM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571409; x=1763107409; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GQBIc9cNmBVfSCy0H2v7jCxrHQRrUvAhVov6nj7t06Q=; b=EhfGjtvMzwhixFDjmiqmEoS5JP+3tyFHjRLbOA1lyrOxxgrnAh7GVpEP H2kkkt0zBPaJ1YEKBkn2e70d4D3v2HOHQTLev76OUofG5G9BU3hykHWjm /du3StRH/r2bHID5fnYjz6oeuthub6RWAVq3doZkezGtAYOBpk1ECmc/s N+NmjpzwUH3U8abvxuRZ2Hi7Vhy0vQNnEWT1VtMAzgyJd3ap2+Jy29Ppk VBk1a+DyKsZBZRcmBjxPE9RW3Frfpq496Na8qHk4o4tPlxU5dNsdFUMQS sdMMwscCys8ZzNGgg/GyML1dnqm0YxQz+P+Afp3Gh239KABnlRqBxgJ8+ g==; X-CSE-ConnectionGUID: leDVKGx+QSS/vfzAObMhiw== X-CSE-MsgGUID: KXG96DgQQ9mRZ8CGcSNs+A== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600439" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600439" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:21 -0800 X-CSE-ConnectionGUID: UOle5x4RSlyjdBNOxM2B4A== X-CSE-MsgGUID: hZbHitiUQv6+bV3+JsGZPA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627469" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:19 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 05/10] tools/power turbostat: Add initial support for GraniteRapids-D Date: Thu, 14 Nov 2024 15:59:41 +0800 Message-ID: <20241114075946.118577-6-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add initial support for GraniteRapids-D. It shares the same features with SapphireRapids. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 9d76329e108f..d8338458d031 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -997,6 +997,7 @@ static const struct platform_data turbostat_pdata[] = { { INTEL_SAPPHIRERAPIDS_X, &spr_features }, { INTEL_EMERALDRAPIDS_X, &spr_features }, { INTEL_GRANITERAPIDS_X, &spr_features }, + { INTEL_GRANITERAPIDS_D, &spr_features }, { INTEL_LAKEFIELD, &cnl_features }, { INTEL_ALDERLAKE, &adl_features }, { INTEL_ALDERLAKE_L, &adl_features }, From patchwork Thu Nov 14 07:59:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874697 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B85251F6671 for ; Thu, 14 Nov 2024 08:03:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571413; cv=none; b=Co6WSw+aXvpjW8E+3XnHuIdFG1eNEVTpJ32JoZmdP17QJH45DNH+CDGQe/sJnTOn6kj6MNXFot+arbRmdrNOZ9BE68Ve5InAn/UcRAcxeBpsrbWnE7C4DvjZqdstcxAZ0QPAxJdCoDU4ozEWP38ivYWfJuyvWk03vYt+5gJ9jiw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571413; c=relaxed/simple; bh=pvS1h4Gp7T7xHYcLKeXGBr2z+uIKQs0CI+BDqdqe/qI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cQKCSKpxb5R8SJcpLEHp3Lb/eLuFan2BdZrpJ2Yo9EWEsMsihyEBEic898n4+E41R1emN7KASgXRTblfBXz0ouqG/Loy3n+58QIvE1j3KbiGkcH1wh470Q/YvtBOT6F5WND4UPIuXXKhx4oRQHL7vVA3r/rzTyW+CjAY5cYtlVE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=gS8oxjsU; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gS8oxjsU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571411; x=1763107411; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pvS1h4Gp7T7xHYcLKeXGBr2z+uIKQs0CI+BDqdqe/qI=; b=gS8oxjsULT1/9S+sd7C8h0BBdbc39BwymqnzV9VqvHjclVu287HW18/9 isyeL9c36lB5uk9gsSbbqxwpun7N79sW86BTaenW8+TDFebcngFdEPrW+ aNSqEyD6ZsUj7jYwtLDefMURslKpdvcVoGeZyyZCr4ZXY19gExHH68N1L a7pwQQgKW/r7BYSJNoFPjfM1zqO2fIqW1R5tw0GGaIUjcGg9YqcAyvcnR mhqx+YajyuwL/jtAE+18QgdBh8eb1WiqrfVk8loWxzISVnLd5iGUL9O/7 TDU06GMlJu1Yufso8CwrG3mzMyO0Hhce1BOIbtCyn+vGX/k+Wxyxs73cP A==; X-CSE-ConnectionGUID: VIwDIklWSP+cPV9lWobeuQ== X-CSE-MsgGUID: 0Jh5mnM3Sc+wC0g59BWREQ== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600442" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600442" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:22 -0800 X-CSE-ConnectionGUID: 56werRu4TRqkGa2hAtb4YQ== X-CSE-MsgGUID: 8q6vYVKbQ+WnoZm49j9W3A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627475" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:20 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 06/10] tools/power turbostat: Enhance platform divergence description Date: Thu, 14 Nov 2024 15:59:42 +0800 Message-ID: <20241114075946.118577-7-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In various generations, platforms often share a majority of features, diverging only in a few specific aspects. The current approach of using hardcoded values in 'platform_features' structure fails to effectively represent these divergences. To improve the description of platform divergence: 1. Each newly introduced 'platform_features' structure must have a base, typically derived from the previous generation. 2. Platform feature values should be inherited from the base structure rather than being hardcoded. This approach ensures a more accurate and maintainable representation of platform-specific features across different generations. Converts `adl_features` and `lnl_features` to follow this new scheme. No functional change. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 58 ++++++++++++++------------- 1 file changed, 30 insertions(+), 28 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index d8338458d031..8a45b1c4c225 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -729,38 +729,40 @@ static const struct platform_features cnl_features = { .enable_tsc_tweak = 1, }; +/* Copied from cnl_features, with PC7/PC9 removed */ static const struct platform_features adl_features = { - .has_msr_misc_feature_control = 1, - .has_msr_misc_pwr_mgmt = 1, - .has_nhm_msrs = 1, - .has_config_tdp = 1, - .bclk_freq = BCLK_100MHZ, - .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC3 | PC6 | PC8 | PC10, - .cst_limit = CST_LIMIT_HSW, - .has_irtl_msrs = 1, - .has_msr_core_c1_res = 1, - .has_ext_cst_msrs = 1, - .trl_msrs = TRL_BASE, - .tcc_offset_bits = 6, - .rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX, - .enable_tsc_tweak = 1, + .has_msr_misc_feature_control = cnl_features.has_msr_misc_feature_control, + .has_msr_misc_pwr_mgmt = cnl_features.has_msr_misc_pwr_mgmt, + .has_nhm_msrs = cnl_features.has_nhm_msrs, + .has_config_tdp = cnl_features.has_config_tdp, + .bclk_freq = cnl_features.bclk_freq, + .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC3 | PC6 | PC8 | PC10, + .cst_limit = cnl_features.cst_limit, + .has_irtl_msrs = cnl_features.has_irtl_msrs, + .has_msr_core_c1_res = cnl_features.has_msr_core_c1_res, + .has_ext_cst_msrs = cnl_features.has_ext_cst_msrs, + .trl_msrs = cnl_features.trl_msrs, + .tcc_offset_bits = cnl_features.tcc_offset_bits, + .rapl_msrs = cnl_features.rapl_msrs, + .enable_tsc_tweak = cnl_features.enable_tsc_tweak, }; +/* Copied from adl_features, with PC3/PC8 removed */ static const struct platform_features lnl_features = { - .has_msr_misc_feature_control = 1, - .has_msr_misc_pwr_mgmt = 1, - .has_nhm_msrs = 1, - .has_config_tdp = 1, - .bclk_freq = BCLK_100MHZ, - .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC6 | PC10, - .cst_limit = CST_LIMIT_HSW, - .has_irtl_msrs = 1, - .has_msr_core_c1_res = 1, - .has_ext_cst_msrs = 1, - .trl_msrs = TRL_BASE, - .tcc_offset_bits = 6, - .rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX, - .enable_tsc_tweak = 1, + .has_msr_misc_feature_control = adl_features.has_msr_misc_feature_control, + .has_msr_misc_pwr_mgmt = adl_features.has_msr_misc_pwr_mgmt, + .has_nhm_msrs = adl_features.has_nhm_msrs, + .has_config_tdp = adl_features.has_config_tdp, + .bclk_freq = adl_features.bclk_freq, + .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC6 | PC10, + .cst_limit = adl_features.cst_limit, + .has_irtl_msrs = adl_features.has_irtl_msrs, + .has_msr_core_c1_res = adl_features.has_msr_core_c1_res, + .has_ext_cst_msrs = adl_features.has_ext_cst_msrs, + .trl_msrs = adl_features.trl_msrs, + .tcc_offset_bits = adl_features.tcc_offset_bits, + .rapl_msrs = adl_features.rapl_msrs, + .enable_tsc_tweak = adl_features.enable_tsc_tweak, }; static const struct platform_features skx_features = { From patchwork Thu Nov 14 07:59:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874696 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6840C1F6688 for ; Thu, 14 Nov 2024 08:03:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571412; cv=none; b=kHVLDpVvd36mGTOz+28C/m21fLHsmIx+naKveHcJ9yjjH35/kBYGf6wE6tcFMCKDKjKig694v3eszrzMVmp6BeRK1nYcZH+VsJtflIgKCD1me03GTzPEw44Ly/BrFra40ZJ3iM8dGwXHw+wLOVzFq6emidVmzIsidv1w4EVIFRY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571412; c=relaxed/simple; bh=8KjvoTA9FFiJrrMA6CJizb+VcL+FjT/zZx7w4ZnmG2w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pu6HdD+Q11e7tL8d6hz3+ShhlRZdDEDBJQ1KJvbqc6kELCiTtUDmXLe4A7oj3T2F8IXdwhX6WGsdleUSofP23AuSzKNopXOexFxW5Vz3ADRiqFZyy7gJibYatOX/AlPIs8pXaG5XibOLyx47jiVYgxo2YQce1Ts37EVpUx9RljU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=E6tx49jP; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="E6tx49jP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571411; x=1763107411; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8KjvoTA9FFiJrrMA6CJizb+VcL+FjT/zZx7w4ZnmG2w=; b=E6tx49jPLyZ7DVW6k1sDUnxRbN9m1CE90KO+qNn8i65Gt1hZFNQAXEG+ gVfnoS5ospQB23fWVdEjb7Ves9lQc9A9++idhXJcTwc2GTc5lQdBLQBJv QpHuOiLTxD7Kx1U73wzwJeF1RrxdC8s0+Zzfv56+glSAnnsfpGof2r4o3 zyZH5vk7R6rpiTeBz//1vgWEwWPwzCEBRkoZYhLwjrSLbr9zwEI8N/br6 Q1LJFG5OZ1MWmIjfgQET0izB4GW2mndYZfFv+kInw1aw9nOqKouf0Fk5u HOA/u+vtGGN6p1dnOcFtMjuOLgwHxCSL2RR6vrFQPIobfYvSR9Puh6P0g A==; X-CSE-ConnectionGUID: t/3r41zlSqakePUgcp40AA== X-CSE-MsgGUID: V8BbbejBSCi+t3IXtSaMTg== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600444" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600444" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:23 -0800 X-CSE-ConnectionGUID: HViRJhZJTPSXhJfgjk/dbg== X-CSE-MsgGUID: 9SsIddKeSsCktipUdGqWEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627480" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:22 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 07/10] tools/power turbostat: Remove unnecessary fflush() call Date: Thu, 14 Nov 2024 15:59:43 +0800 Message-ID: <20241114075946.118577-8-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The graphics sysfs knobs are read-only, making the use of fflush() before reading them redundant. Remove the unnecessary fflush() call. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 8a45b1c4c225..4956f4b837d1 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -5747,12 +5747,11 @@ int snapshot_graphics(int idx) case GFX_ACTMHz: case SAM_MHz: case SAM_ACTMHz: - if (gfx_info[idx].fp == NULL) { + if (gfx_info[idx].fp == NULL) gfx_info[idx].fp = fopen_or_die(gfx_info[idx].path, "r"); - } else { + else rewind(gfx_info[idx].fp); - fflush(gfx_info[idx].fp); - } + retval = fscanf(gfx_info[idx].fp, "%d", &gfx_info[idx].val); if (retval != 1) err(1, "MHz"); From patchwork Thu Nov 14 07:59:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874698 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B13DB1F6695 for ; Thu, 14 Nov 2024 08:03:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571413; cv=none; b=XyDNaahzsiO86/a8qo24eNW09+LhdX0UDim41JRCM94AQUOrbiPZCmWK+BJuwKFePZv4MKA+QZsAMH2dqLWvhPDjvL82Vv9PTS0hven+3doP863Sh/w8Xoavoz329JYF4UMt0NZYrZqbrlsr0c6k/xvvUgAqV7awv+XSSBsjjX4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571413; c=relaxed/simple; bh=Ar9yrjBs5DsPBzg9E7xXiaurQFtJrWm3n27TGirj4hE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mhCDsNpzXM0uu3k+axva/AVs3Vk/yM6uIY1nOmRE4xcuVjL9LmS+pCpvg7UUgcZ7yLFt075yi8JK6AJI0QWPy0zhWOeQxHOqvdFgMpvHmkUMvMAFDE8BVIiZ7q7XAxQrlL/8KgoGNJsxqVDhuKsz++q23oV477IUcUbSFeUA850= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FSb66DEY; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FSb66DEY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571412; x=1763107412; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ar9yrjBs5DsPBzg9E7xXiaurQFtJrWm3n27TGirj4hE=; b=FSb66DEY/K9UsBO+tkmtHuUAQDpTR8SCAY/3K7bfBW+lViFo52chp04N S+yOJ16GMZXkTjjsue3CUlCK+yZzmxS75zRhkVrg/dEXjIYEGk76/nEjv 86hjcKWy+WhqCxdKt+ulCoQQJin1hPvmBRmARk3yZfQC61zYuopinNF9P PVyrhxi3GIiqyFLz/FU+ylm/nMYKUsnOMaGlCU0ZV+WtJXzJzfIhgyXaQ RH8GhNgzBvWkXbuZr7ecrIJF/XasrnuWiVfIZzsFIn1VNezyVbLTAe7i0 P3sWRDNeXDh2ItNwvotoqSeHJos/QQz3O/cerbhbh4IdBRQ8SVjMGHTo3 A==; X-CSE-ConnectionGUID: fJ2wdJCnSbitrmskHIb97A== X-CSE-MsgGUID: MpFjcdGvRy6yw/DPx8SPkw== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600445" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600445" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:24 -0800 X-CSE-ConnectionGUID: NPwW+JVCR3q4peylXOspFg== X-CSE-MsgGUID: NBeSBwSDRVCv0mdbhvP4OQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627494" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:23 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 08/10] tools/power turbostat: Consolidate graphics sysfs access Date: Thu, 14 Nov 2024 15:59:44 +0800 Message-ID: <20241114075946.118577-9-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently, there is an inconsistency in how graphics sysfs knobs are accessed: graphics residency sysfs knobs are opened and closed for each read, while graphics frequency sysfs knobs are opened once and remain open until turbostat exits. This inconsistency is confusing and adds unnecessary code complexity. Consolidate the access method by opening the sysfs files once and reusing the file pointers for subsequent accesses. This approach simplifies the code and ensures a consistent method for accessing graphics sysfs knobs. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 4956f4b837d1..aa0dab13d346 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -5731,27 +5731,24 @@ int snapshot_proc_interrupts(void) */ int snapshot_graphics(int idx) { - FILE *fp; int retval; + if (gfx_info[idx].fp == NULL) + gfx_info[idx].fp = fopen_or_die(gfx_info[idx].path, "r"); + else + rewind(gfx_info[idx].fp); + switch (idx) { case GFX_rc6: case SAM_mc6: - fp = fopen_or_die(gfx_info[idx].path, "r"); - retval = fscanf(fp, "%lld", &gfx_info[idx].val_ull); + retval = fscanf(gfx_info[idx].fp, "%lld", &gfx_info[idx].val_ull); if (retval != 1) err(1, "rc6"); - fclose(fp); return 0; case GFX_MHz: case GFX_ACTMHz: case SAM_MHz: case SAM_ACTMHz: - if (gfx_info[idx].fp == NULL) - gfx_info[idx].fp = fopen_or_die(gfx_info[idx].path, "r"); - else - rewind(gfx_info[idx].fp); - retval = fscanf(gfx_info[idx].fp, "%d", &gfx_info[idx].val); if (retval != 1) err(1, "MHz"); From patchwork Thu Nov 14 07:59:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874700 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E1BC1F7068 for ; Thu, 14 Nov 2024 08:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571414; cv=none; b=eVMndhQFYLjDoCZVk+ZXmC0ag4M1mYqxZ+tsGq79kRAOntsAWvGU6pktUlriqd3Bl11RpchBxXxPEnJXjDNgGcQeIFHRyoVqykiS0XCWvhvTWvxVSFpkEKAjm3NxHuiJiyLHzJR/tqay5b4CBysunB7Jx2eOcVDS8wXXIsX1j4Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571414; c=relaxed/simple; bh=sgXWBLYxlK/aUQLaAro1Z7uGRzkbkMQ1MuooJ69i9wo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CW/QQ/B7Jp4egRobZuX3/z1RzI1oxE5GU3gyW+MSrSVRfGeJxkeZQBAQ2il3llShFiz2IP7tthBFCZPkeVhFc5Sji2TkNnhKojZWZzLOQlUVjhYiueo7HZwQzapRLalqRJyaZYWeGZgQb7Tdv79XVBZXUX4GTCT9Wli643ZfzLk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=d5URKj2x; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="d5URKj2x" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571413; x=1763107413; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sgXWBLYxlK/aUQLaAro1Z7uGRzkbkMQ1MuooJ69i9wo=; b=d5URKj2xBb08dIUCrDRdcntM+7kfig26aFJSqle8uqcFC4jJ8MzK+OLi ND8uM3i2TpBNFqwIQL8/0tzj3wGiVVMl1xbc4koHL+6sJ792/qwCtG6NC kdRUmhGOo72XgICt1x4g5LVzN2WlSuI7+BiNmh4wtFeAxifvg0H9fCubl U2uBNFTgAtn6xZv0UgF0xb9o/FDB0MdRQF9fRbiq5mO8wn1W50uRdMdBM 4S+BuRFlDbkOag6Kcjo180X6y8Od7quoLzupzGpUydoQYOfZhQx7vlW46 xi9kYWQkQxVIZlvBZ+828MneHS6f68BGma86KKqzB3fHZV1cNjJSqY0Gu w==; X-CSE-ConnectionGUID: aOR86Z/iTg+40d2JscoD6w== X-CSE-MsgGUID: eAjzahQmQQ6M1Z9O9q5pPg== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600455" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600455" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:26 -0800 X-CSE-ConnectionGUID: IGdR2/HSSEKRCXDE0OQWHw== X-CSE-MsgGUID: pCmZpyuhSTSyLKd4MN6G4A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627499" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:24 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 09/10] tools/power turbostat: Cache graphics sysfs file descriptors during probe Date: Thu, 14 Nov 2024 15:59:45 +0800 Message-ID: <20241114075946.118577-10-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Snapshots of the graphics sysfs knobs are taken based on file descriptors. To optimize this process, open the files and cache the file descriptors during the graphics probe phase. As a result, the previously cached pathnames become redundant and are removed. This change aims to streamline the code without altering its functionality. No functional change intended. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 82 +++++++++++---------------- 1 file changed, 32 insertions(+), 50 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index aa0dab13d346..52b6ffc41bdf 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -370,7 +370,6 @@ enum gfx_sysfs_idx { }; struct gfx_sysfs_info { - const char *path; FILE *fp; unsigned int val; unsigned long long val_ull; @@ -5733,10 +5732,7 @@ int snapshot_graphics(int idx) { int retval; - if (gfx_info[idx].fp == NULL) - gfx_info[idx].fp = fopen_or_die(gfx_info[idx].path, "r"); - else - rewind(gfx_info[idx].fp); + rewind(gfx_info[idx].fp); switch (idx) { case GFX_rc6: @@ -6441,6 +6437,12 @@ static void probe_intel_uncore_frequency(void) probe_intel_uncore_frequency_legacy(); } +static void set_graphics_fp(char *path, int idx) +{ + if (!access(path, R_OK)) + gfx_info[idx].fp = fopen_or_die(path, "r"); +} + static void probe_graphics(void) { /* Xe graphics sysfs knobs */ @@ -6448,7 +6450,6 @@ static void probe_graphics(void) FILE *fp; char buf[8]; bool gt0_is_gt; - int idx; fp = fopen("/sys/class/drm/card0/device/tile0/gt0/gtidle/name", "r"); if (!fp) @@ -6467,28 +6468,17 @@ static void probe_graphics(void) else goto next; - idx = gt0_is_gt ? GFX_rc6 : SAM_mc6; - gfx_info[idx].path = "/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms"; + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms", gt0_is_gt ? GFX_rc6 : SAM_mc6); - idx = gt0_is_gt ? GFX_MHz : SAM_MHz; - if (!access("/sys/class/drm/card0/device/tile0/gt0/freq0/cur_freq", R_OK)) - gfx_info[idx].path = "/sys/class/drm/card0/device/tile0/gt0/freq0/cur_freq"; + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/cur_freq", gt0_is_gt ? GFX_MHz : SAM_MHz); - idx = gt0_is_gt ? GFX_ACTMHz : SAM_ACTMHz; - if (!access("/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq", R_OK)) - gfx_info[idx].path = "/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq"; + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq", gt0_is_gt ? GFX_ACTMHz : SAM_ACTMHz); - idx = gt0_is_gt ? SAM_mc6 : GFX_rc6; - if (!access("/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms", R_OK)) - gfx_info[idx].path = "/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms"; + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms", gt0_is_gt ? SAM_mc6 : GFX_rc6); - idx = gt0_is_gt ? SAM_MHz : GFX_MHz; - if (!access("/sys/class/drm/card0/device/tile0/gt1/freq0/cur_freq", R_OK)) - gfx_info[idx].path = "/sys/class/drm/card0/device/tile0/gt1/freq0/cur_freq"; + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/cur_freq", gt0_is_gt ? SAM_MHz : GFX_MHz); - idx = gt0_is_gt ? SAM_ACTMHz : GFX_ACTMHz; - if (!access("/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq", R_OK)) - gfx_info[idx].path = "/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq"; + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq", gt0_is_gt ? SAM_ACTMHz : GFX_ACTMHz); goto end; } @@ -6496,52 +6486,44 @@ static void probe_graphics(void) next: /* New i915 graphics sysfs knobs */ if (!access("/sys/class/drm/card0/gt/gt0/rc6_residency_ms", R_OK)) { - gfx_info[GFX_rc6].path = "/sys/class/drm/card0/gt/gt0/rc6_residency_ms"; + set_graphics_fp("/sys/class/drm/card0/gt/gt0/rc6_residency_ms", GFX_rc6); - if (!access("/sys/class/drm/card0/gt/gt0/rps_cur_freq_mhz", R_OK)) - gfx_info[GFX_MHz].path = "/sys/class/drm/card0/gt/gt0/rps_cur_freq_mhz"; + set_graphics_fp("/sys/class/drm/card0/gt/gt0/rps_cur_freq_mhz", GFX_MHz); - if (!access("/sys/class/drm/card0/gt/gt0/rps_act_freq_mhz", R_OK)) - gfx_info[GFX_ACTMHz].path = "/sys/class/drm/card0/gt/gt0/rps_act_freq_mhz"; + set_graphics_fp("/sys/class/drm/card0/gt/gt0/rps_act_freq_mhz", GFX_ACTMHz); - if (!access("/sys/class/drm/card0/gt/gt1/rc6_residency_ms", R_OK)) - gfx_info[SAM_mc6].path = "/sys/class/drm/card0/gt/gt1/rc6_residency_ms"; + set_graphics_fp("/sys/class/drm/card0/gt/gt1/rc6_residency_ms", SAM_mc6); - if (!access("/sys/class/drm/card0/gt/gt1/rps_cur_freq_mhz", R_OK)) - gfx_info[SAM_MHz].path = "/sys/class/drm/card0/gt/gt1/rps_cur_freq_mhz"; + set_graphics_fp("/sys/class/drm/card0/gt/gt1/rps_cur_freq_mhz", SAM_MHz); - if (!access("/sys/class/drm/card0/gt/gt1/rps_act_freq_mhz", R_OK)) - gfx_info[SAM_ACTMHz].path = "/sys/class/drm/card0/gt/gt1/rps_act_freq_mhz"; + set_graphics_fp("/sys/class/drm/card0/gt/gt1/rps_act_freq_mhz", SAM_ACTMHz); goto end; } /* Fall back to traditional i915 graphics sysfs knobs */ - if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK)) - gfx_info[GFX_rc6].path = "/sys/class/drm/card0/power/rc6_residency_ms"; + set_graphics_fp("/sys/class/drm/card0/power/rc6_residency_ms", GFX_rc6); - if (!access("/sys/class/drm/card0/gt_cur_freq_mhz", R_OK)) - gfx_info[GFX_MHz].path = "/sys/class/drm/card0/gt_cur_freq_mhz"; - else if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK)) - gfx_info[GFX_MHz].path = "/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz"; + set_graphics_fp("/sys/class/drm/card0/gt_cur_freq_mhz", GFX_MHz); + if (!gfx_info[GFX_MHz].fp) + set_graphics_fp("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", GFX_MHz); - if (!access("/sys/class/drm/card0/gt_act_freq_mhz", R_OK)) - gfx_info[GFX_ACTMHz].path = "/sys/class/drm/card0/gt_act_freq_mhz"; - else if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", R_OK)) - gfx_info[GFX_ACTMHz].path = "/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz"; + set_graphics_fp("/sys/class/drm/card0/gt_act_freq_mhz", GFX_ACTMHz); + if (!gfx_info[GFX_ACTMHz].fp) + set_graphics_fp("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", GFX_ACTMHz); end: - if (gfx_info[GFX_rc6].path) + if (gfx_info[GFX_rc6].fp) BIC_PRESENT(BIC_GFX_rc6); - if (gfx_info[GFX_MHz].path) + if (gfx_info[GFX_MHz].fp) BIC_PRESENT(BIC_GFXMHz); - if (gfx_info[GFX_ACTMHz].path) + if (gfx_info[GFX_ACTMHz].fp) BIC_PRESENT(BIC_GFXACTMHz); - if (gfx_info[SAM_mc6].path) + if (gfx_info[SAM_mc6].fp) BIC_PRESENT(BIC_SAM_mc6); - if (gfx_info[SAM_MHz].path) + if (gfx_info[SAM_MHz].fp) BIC_PRESENT(BIC_SAMMHz); - if (gfx_info[SAM_ACTMHz].path) + if (gfx_info[SAM_ACTMHz].fp) BIC_PRESENT(BIC_SAMACTMHz); } From patchwork Thu Nov 14 07:59:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13874699 X-Patchwork-Delegate: lenb@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 251431F7077 for ; Thu, 14 Nov 2024 08:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571414; cv=none; b=B/6iX0hs21fcjkVQt75bOWLvff5pW2TzEIvVVk2K9AQs4fgfnXGXK8XLNArj8py14tU8hPrddH+IXjpXzLimQ6Z5QvTxV0erT5PUE9bKm4LbSI4Lxw5ulcIIWAPtMCP4iKNXcxGVjVJ5sUbbu5gRShb4fSJn2ALqr7PnhyLcpS8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571414; c=relaxed/simple; bh=RvzuHv9H5LZC77DRGmwAzhDp31sHdWHn1NJLjqs7cU4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Hz9zsbKBrdGHKmz1bopco1B9/AW4r2yDyxbX501XOLdUFWsKQfQFvO3XBF60sNHvgwWzyvfuQh3eHf72ARUSE4byfGsUs/0OZYTChavioisQlmk15WGLIJYdnh63rjN52USjV4EeYL3jZhiMxvIt/rCgPzk8FRDCj6kTe4kWfaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kfhImkHv; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kfhImkHv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731571413; x=1763107413; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RvzuHv9H5LZC77DRGmwAzhDp31sHdWHn1NJLjqs7cU4=; b=kfhImkHvI60gLtADOPmm4+4UNC5pxy2ZJQ2Ox3fST3g+tsxkJCWJN7C8 HWyD9Fr3S1cahEh88uwvbTbW/gnEu55ARWzubUtv3B1ae2gbcN/IY5t/U aq434fQpO2VBchKiIcVn8BM65YEndI6l6J1wCJPlgIBlIIMfMsBsktqCr AQtPKFGne4/xk6wh+yKLuPqbiIvw2TLbCIkBj6pfqBP9cMMAmBTFmAGCF +U9rUmBznKeCL+983FiqF3Tyl0YlyJ0YZCIiHrFvF1iDUSqXC4SK4cJLX PGR9KAbvYbd2+20NJth9iMZiix0JvvhuyKK7dwQTZr6KAyovV52q3Z3EF A==; X-CSE-ConnectionGUID: 4n8PddRpQmiDKI5S0O9QHA== X-CSE-MsgGUID: C/3A8OIJQmiI4QqO8GaRow== X-IronPort-AV: E=McAfee;i="6700,10204,11255"; a="31600457" X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="31600457" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2024 00:03:27 -0800 X-CSE-ConnectionGUID: VPiQPKHUQV28fci/ZyD8nQ== X-CSE-MsgGUID: nm0rYe0sTSGbxjcxuaJRIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,153,1728975600"; d="scan'208";a="125627505" Received: from rzhang1-mobl.sh.intel.com ([10.239.158.59]) by orviesa001.jf.intel.com with ESMTP; 14 Nov 2024 00:03:26 -0800 From: Zhang Rui To: rafael.j.wysocki@intel.com, len.brown@intel.com Cc: linux-pm@vger.kernel.org Subject: [PATCH 10/10] tools/power turbostat: Add support for /sys/class/drm/card1 Date: Thu, 14 Nov 2024 15:59:46 +0800 Message-ID: <20241114075946.118577-11-rui.zhang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114075946.118577-1-rui.zhang@intel.com> References: <20241114075946.118577-1-rui.zhang@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On some machines, the graphics device is enumerated as /sys/class/drm/card1 instead of /sys/class/drm/card0. The current implementation does not handle this scenario, resulting in the loss of graphics C6 residency and frequency information. Add support for /sys/class/drm/card1, ensuring that turbostat can retrieve and display the graphics columns for these platforms. Signed-off-by: Zhang Rui --- tools/power/x86/turbostat/turbostat.c | 38 ++++++++++++++++++++------- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 52b6ffc41bdf..43ca50107e1a 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -6443,8 +6443,14 @@ static void set_graphics_fp(char *path, int idx) gfx_info[idx].fp = fopen_or_die(path, "r"); } +/* Enlarge this if there are /sys/class/drm/card2 ... */ +#define GFX_MAX_CARDS 2 + static void probe_graphics(void) { + char path[PATH_MAX]; + int i; + /* Xe graphics sysfs knobs */ if (!access("/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms", R_OK)) { FILE *fp; @@ -6485,22 +6491,36 @@ static void probe_graphics(void) next: /* New i915 graphics sysfs knobs */ - if (!access("/sys/class/drm/card0/gt/gt0/rc6_residency_ms", R_OK)) { - set_graphics_fp("/sys/class/drm/card0/gt/gt0/rc6_residency_ms", GFX_rc6); + for (i = 0; i < GFX_MAX_CARDS; i++) { + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt0/rc6_residency_ms", i); + if (!access(path, R_OK)) + break; + } - set_graphics_fp("/sys/class/drm/card0/gt/gt0/rps_cur_freq_mhz", GFX_MHz); + if (i == GFX_MAX_CARDS) + goto legacy_i915; - set_graphics_fp("/sys/class/drm/card0/gt/gt0/rps_act_freq_mhz", GFX_ACTMHz); + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt0/rc6_residency_ms", i); + set_graphics_fp(path, GFX_rc6); - set_graphics_fp("/sys/class/drm/card0/gt/gt1/rc6_residency_ms", SAM_mc6); + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt0/rps_cur_freq_mhz", i); + set_graphics_fp(path, GFX_MHz); - set_graphics_fp("/sys/class/drm/card0/gt/gt1/rps_cur_freq_mhz", SAM_MHz); + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt0/rps_act_freq_mhz", i); + set_graphics_fp(path, GFX_ACTMHz); - set_graphics_fp("/sys/class/drm/card0/gt/gt1/rps_act_freq_mhz", SAM_ACTMHz); + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt1/rc6_residency_ms", i); + set_graphics_fp(path, SAM_mc6); - goto end; - } + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt1/rps_cur_freq_mhz", i); + set_graphics_fp(path, SAM_MHz); + + snprintf(path, PATH_MAX, "/sys/class/drm/card%d/gt/gt1/rps_act_freq_mhz", i); + set_graphics_fp(path, SAM_ACTMHz); + + goto end; +legacy_i915: /* Fall back to traditional i915 graphics sysfs knobs */ set_graphics_fp("/sys/class/drm/card0/power/rc6_residency_ms", GFX_rc6);