From patchwork Thu Nov 14 08:02:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam X-Patchwork-Id: 13874706 Received: from smtp.ps-zuehlke.com (smtp.ps-zuehlke.com [193.135.254.84]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90C331F585B; Thu, 14 Nov 2024 08:10:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.135.254.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571808; cv=none; b=unNmE9s23pkZIAa+nSXmgyZzCjpzepFy6OC9MXUVXhqTqfdJNvO75Nm2vInoXIWxaQvgLgUzFxTjRv8PQ5oReoi2UG3nf72g0wUE/THYzrjucdBPbi6VUlfD4XtfCb7VYDh65sH/N/w3bHdAjq73zBGvVLMfiZuyj0im3c6dQy8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571808; c=relaxed/simple; bh=xQEWItvO4K2hmgsVC5C+clRiGDX0sc04fruShxWbObY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DykQVfUzhlhxSPjZf7EabkcVLvcSw3sVqR6iRO3yhRCeeqmcLl77utQqTSqyFeOEzmJt3DkDjLJJ5tocWPmmailSZ1Og4Efu6uwD5tlV/B2boMoYQlWcVlx+FPlIKISFqshLAkqmOc7RrssRQtP2SYU6DbzF/yxxYLrWpjD4OTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zuehlke.com; spf=pass smtp.mailfrom=zuehlke.com; arc=none smtp.client-ip=193.135.254.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zuehlke.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zuehlke.com Received: from ZUEN49445. (unknown [10.192.66.22]) by smtp.ps-zuehlke.com (Postfix) with ESMTP id 6A591125; Thu, 14 Nov 2024 09:02:22 +0100 (CET) From: Oliver Facklam Date: Thu, 14 Nov 2024 09:02:06 +0100 Subject: [PATCH v2 1/4] usb: typec: hd3ss3220: configure advertised power opmode based on fwnode property Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241114-usb-typec-controller-enhancements-v2-1-362376856aea@zuehlke.com> References: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> In-Reply-To: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> To: Heikki Krogerus , Biju Das , Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Benedict von Heyl , Mathis Foerst , Michael Glettig , Oliver Facklam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731571341; l=3492; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=xQEWItvO4K2hmgsVC5C+clRiGDX0sc04fruShxWbObY=; b=HvVCPl5uvDhWEKRy2xR7rnyd/4v1VTPmR59H8YR95Mo8LP9O3Q3eZF607y8RAWA8Py+TZBeDn vTizckKK1p0CT/ymSi9KSfkQmxwYZkXnP7bjOQk7F9FJxHwSbo6vV3W X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= The TI HD3SS3220 Type-C controller supports configuring its advertised power operation mode over I2C using the CURRENT_MODE_ADVERTISE field of the Connection Status Register. Configure this power mode based on the existing (optional) property "typec-power-opmode" of /schemas/connector/usb-connector.yaml Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 53 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index fb1242e82ffdc64a9a3330f50155bb8f0fe45685..56f74bf70895ca701083bde44a5bbe0b691551e1 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -16,10 +16,17 @@ #include #include +#define HD3SS3220_REG_CN_STAT 0x08 #define HD3SS3220_REG_CN_STAT_CTRL 0x09 #define HD3SS3220_REG_GEN_CTRL 0x0A #define HD3SS3220_REG_DEV_REV 0xA0 +/* Register HD3SS3220_REG_CN_STAT */ +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_MASK (BIT(7) | BIT(6)) +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_DEFAULT 0x00 +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_MID BIT(6) +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_HIGH BIT(7) + /* Register HD3SS3220_REG_CN_STAT_CTRL*/ #define HD3SS3220_REG_CN_STAT_CTRL_ATTACHED_STATE_MASK (BIT(7) | BIT(6)) #define HD3SS3220_REG_CN_STAT_CTRL_AS_DFP BIT(6) @@ -43,6 +50,31 @@ struct hd3ss3220 { bool poll; }; +static int hd3ss3220_set_power_opmode(struct hd3ss3220 *hd3ss3220, int power_opmode) +{ + int current_mode; + + switch (power_opmode) { + case TYPEC_PWR_MODE_USB: + current_mode = HD3SS3220_REG_CN_STAT_CURRENT_MODE_DEFAULT; + break; + case TYPEC_PWR_MODE_1_5A: + current_mode = HD3SS3220_REG_CN_STAT_CURRENT_MODE_MID; + break; + case TYPEC_PWR_MODE_3_0A: + current_mode = HD3SS3220_REG_CN_STAT_CURRENT_MODE_HIGH; + break; + case TYPEC_PWR_MODE_PD: /* Power delivery not supported */ + default: + dev_err(hd3ss3220->dev, "bad power operation mode: %d\n", power_opmode); + return -EINVAL; + } + + return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT, + HD3SS3220_REG_CN_STAT_CURRENT_MODE_MASK, + current_mode); +} + static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref) { return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, @@ -162,6 +194,23 @@ static irqreturn_t hd3ss3220_irq_handler(int irq, void *data) return hd3ss3220_irq(hd3ss3220); } +static int hd3ss3220_configure_power_opmode(struct hd3ss3220 *hd3ss3220, + struct fwnode_handle *connector) +{ + /* + * Supported power operation mode can be configured through device tree + */ + const char *cap_str; + int ret, power_opmode; + + ret = fwnode_property_read_string(connector, "typec-power-opmode", &cap_str); + if (ret) + return 0; + + power_opmode = typec_find_pwr_opmode(cap_str); + return hd3ss3220_set_power_opmode(hd3ss3220, power_opmode); +} + static const struct regmap_config config = { .reg_bits = 8, .val_bits = 8, @@ -223,6 +272,10 @@ static int hd3ss3220_probe(struct i2c_client *client) goto err_put_role; } + ret = hd3ss3220_configure_power_opmode(hd3ss3220, connector); + if (ret < 0) + goto err_unreg_port; + hd3ss3220_set_role(hd3ss3220); ret = regmap_read(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT_CTRL, &data); if (ret < 0) From patchwork Thu Nov 14 08:02:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam X-Patchwork-Id: 13874705 Received: from smtp.ps-zuehlke.com (smtp.ps-zuehlke.com [193.135.254.84]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90C8D1F6662; Thu, 14 Nov 2024 08:10:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.135.254.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571808; cv=none; b=vCCktR1bhZeZfUsE4DrDpaYP9ZjTCNtsstRZ/PBgP1yy6dQKTMpzE2cTa2k3VO2wcVbxqzHajqwUQLVELnaY70DqzeC6EOgQ81cRWJ9W8b5aUoXCiqdwgtyqtwQtQaYIvPnapT6QynO496NAQiDUFoGu0puVJ0f/uul1iHdi0mA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571808; c=relaxed/simple; bh=MMFNcDZl1O95DgMDsY1PAL4cRz865YcySfeAV8FEz+w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Alu549Ef6NEksP3TekbhsoDccOuzfey7Uah3HyCAcDQjKiHeNYw7R1gHJgLzbBEucbEJ/kzpPhmMZ7i3lgZKfD5AZLJg6WimM7fqzG1WEAk633MSvSej82kYxTIss3zYT8wEHcqL2klIJhk3axiUTeUsNjiyTJiNCqxDZe6D14w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zuehlke.com; spf=pass smtp.mailfrom=zuehlke.com; arc=none smtp.client-ip=193.135.254.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zuehlke.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zuehlke.com Received: from ZUEN49445. (unknown [10.192.66.22]) by smtp.ps-zuehlke.com (Postfix) with ESMTP id 7748B129; Thu, 14 Nov 2024 09:02:22 +0100 (CET) From: Oliver Facklam Date: Thu, 14 Nov 2024 09:02:07 +0100 Subject: [PATCH v2 2/4] usb: typec: hd3ss3220: use typec_get_fw_cap() to fill typec_cap Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241114-usb-typec-controller-enhancements-v2-2-362376856aea@zuehlke.com> References: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> In-Reply-To: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> To: Heikki Krogerus , Biju Das , Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Benedict von Heyl , Mathis Foerst , Michael Glettig , Oliver Facklam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731571341; l=1216; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=MMFNcDZl1O95DgMDsY1PAL4cRz865YcySfeAV8FEz+w=; b=8yynHsCy9WVM4CVOzaSXunNk89Nd1jajct9/wsLrGRXDuGUoRMHTO97bvd81Oev+lRCuPAQbE Js5ejRVBywsA4ISKgnmvvHIpSEkcX5aXBLzBn3Fz+QlJyV8I1+9yMGu X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= The type, data, and prefer_role properties were previously hard-coded when creating the struct typec_capability. Use typec_get_fw_cap() to populate these fields based on the respective fwnode properties, if present. Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index 56f74bf70895ca701083bde44a5bbe0b691551e1..e581272bb47de95dee8363a5491f543354fcbbf8 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -264,7 +264,14 @@ static int hd3ss3220_probe(struct i2c_client *client) typec_cap.type = TYPEC_PORT_DRP; typec_cap.data = TYPEC_PORT_DRD; typec_cap.ops = &hd3ss3220_ops; - typec_cap.fwnode = connector; + + /* + * Try to get properties from connector, + * but continue with defaults anyway if they are not found + */ + ret = typec_get_fw_cap(&typec_cap, connector); + if (ret != 0 && ret != -EINVAL && ret != -ENXIO) + goto err_put_role; hd3ss3220->port = typec_register_port(&client->dev, &typec_cap); if (IS_ERR(hd3ss3220->port)) { From patchwork Thu Nov 14 08:02:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam X-Patchwork-Id: 13874708 Received: from smtp.ps-zuehlke.com (smtp.ps-zuehlke.com [193.135.254.84]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90BDF1F5858; Thu, 14 Nov 2024 08:10:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.135.254.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571809; cv=none; b=EWLIOSnJ7EsoNDnndkLZvy7aA4v1wKpmkK+/rFdt7tCjsQ5AF1Wcx29I3gfHkOKEsMBs8ILcZLUC/p+bvEI46ycR0u/ZO1rATCScWUPyG/LUZaJCFE+jN/bEMq0q/mzKvF9thhjZDqjk+DsTS5ViwV4Ox/oBXkxh+6mquGhvCJU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571809; c=relaxed/simple; bh=uJEtCNxbDrnddnM8ZNno3zfUTeG9sWOhU95ycQbQD+A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hsB1Kg28B4iwJf37BnTOQbPp7r2iMA/7G6ZFfiMbSdIxMwVGz3MoEZY1RB03Em2cuUZOVzgDnblvCIkqPfLLN93RtIvrM0suuoXS055FtDS8cHAwZpCTxIcZXah3C4SdgmAfhw8r8MVFHN1+Pvxbcn4zCLxzLslGwEaJ7qxM2ek= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zuehlke.com; spf=pass smtp.mailfrom=zuehlke.com; arc=none smtp.client-ip=193.135.254.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zuehlke.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zuehlke.com Received: from ZUEN49445. (unknown [10.192.66.22]) by smtp.ps-zuehlke.com (Postfix) with ESMTP id 8121C12A; Thu, 14 Nov 2024 09:02:22 +0100 (CET) From: Oliver Facklam Date: Thu, 14 Nov 2024 09:02:08 +0100 Subject: [PATCH v2 3/4] usb: typec: hd3ss3220: support configuring port type Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241114-usb-typec-controller-enhancements-v2-3-362376856aea@zuehlke.com> References: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> In-Reply-To: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> To: Heikki Krogerus , Biju Das , Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Benedict von Heyl , Mathis Foerst , Michael Glettig , Oliver Facklam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731571341; l=4623; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=uJEtCNxbDrnddnM8ZNno3zfUTeG9sWOhU95ycQbQD+A=; b=NiJu2sCpaqzSnXgpilS8a8TbaucEGD7NY7K1ID2rBfiBIERP8l/UvjVQh0v/LWpwSchxFcqtf B6aHPbz8Lj9DFw+gS+drCwwwWwn3CaAkg94X+pCJ1ieJcflIu0eH9tA X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= The TI HD3SS3220 Type-C controller supports configuring the port type it will operate as through the MODE_SELECT field of the General Control Register. Configure the port type based on the fwnode property "power-role" during probe, and through the port_type_set typec_operation. The MODE_SELECT field can only be changed when the controller is in unattached state, so follow the sequence recommended by the datasheet to: 1. disable termination on CC pins to disable the controller 2. change the mode 3. re-enable termination This will effectively cause a connected device to disconnect for the duration of the mode change. Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 66 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index e581272bb47de95dee8363a5491f543354fcbbf8..e3e9b1597e3b09b82f0726a01f311fb60b4284da 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -35,10 +35,16 @@ #define HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS BIT(4) /* Register HD3SS3220_REG_GEN_CTRL*/ +#define HD3SS3220_REG_GEN_CTRL_DISABLE_TERM BIT(0) #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_MASK (BIT(2) | BIT(1)) #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT 0x00 #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK BIT(1) #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC (BIT(2) | BIT(1)) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_MASK (BIT(5) | BIT(4)) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DEFAULT 0x00 +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DFP BIT(5) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_UFP BIT(4) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DRP (BIT(5) | BIT(4)) struct hd3ss3220 { struct device *dev; @@ -75,6 +81,52 @@ static int hd3ss3220_set_power_opmode(struct hd3ss3220 *hd3ss3220, int power_opm current_mode); } +static int hd3ss3220_set_port_type(struct hd3ss3220 *hd3ss3220, int type) +{ + int mode_select, err; + + switch (type) { + case TYPEC_PORT_SRC: + mode_select = HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DFP; + break; + case TYPEC_PORT_SNK: + mode_select = HD3SS3220_REG_GEN_CTRL_MODE_SELECT_UFP; + break; + case TYPEC_PORT_DRP: + mode_select = HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DRP; + break; + default: + dev_err(hd3ss3220->dev, "bad port type: %d\n", type); + return -EINVAL; + } + + /* Disable termination before changing MODE_SELECT as required by datasheet */ + err = regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM); + if (err < 0) { + dev_err(hd3ss3220->dev, "Failed to disable port for mode change: %d\n", err); + return err; + } + + err = regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_MODE_SELECT_MASK, + mode_select); + if (err < 0) { + dev_err(hd3ss3220->dev, "Failed to change mode: %d\n", err); + regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM, 0); + return err; + } + + err = regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM, 0); + if (err < 0) + dev_err(hd3ss3220->dev, "Failed to re-enable port after mode change: %d\n", err); + + return err; +} + static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref) { return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, @@ -131,8 +183,16 @@ static int hd3ss3220_dr_set(struct typec_port *port, enum typec_data_role role) return ret; } +static int hd3ss3220_port_type_set(struct typec_port *port, enum typec_port_type type) +{ + struct hd3ss3220 *hd3ss3220 = typec_get_drvdata(port); + + return hd3ss3220_set_port_type(hd3ss3220, type); +} + static const struct typec_operations hd3ss3220_ops = { - .dr_set = hd3ss3220_dr_set + .dr_set = hd3ss3220_dr_set, + .port_type_set = hd3ss3220_port_type_set, }; static void hd3ss3220_set_role(struct hd3ss3220 *hd3ss3220) @@ -273,6 +333,10 @@ static int hd3ss3220_probe(struct i2c_client *client) if (ret != 0 && ret != -EINVAL && ret != -ENXIO) goto err_put_role; + ret = hd3ss3220_set_port_type(hd3ss3220, typec_cap.type); + if (ret < 0) + goto err_put_role; + hd3ss3220->port = typec_register_port(&client->dev, &typec_cap); if (IS_ERR(hd3ss3220->port)) { ret = PTR_ERR(hd3ss3220->port); From patchwork Thu Nov 14 08:02:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam X-Patchwork-Id: 13874707 Received: from smtp.ps-zuehlke.com (smtp.ps-zuehlke.com [193.135.254.84]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90B1D13CA99; Thu, 14 Nov 2024 08:10:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.135.254.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731571808; cv=none; b=W7fWuhxA83Qf1NmBBDLZs+WrjgAt3zR2mgnho3+ovfHsWjeY57uDviTe+pJEz8rFftxaG5KN+jygtQdykhQLrYtFd9vtFe6iADhhwV+53xh7iQdAnDvYqLvCk5T0RvjaPMtI7vtDhRJ7tCJf5spWOWNSWo1JkOn0OZoKOdyoYBg= ARC-Message-Signature: i=1; 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(unknown [10.192.66.22]) by smtp.ps-zuehlke.com (Postfix) with ESMTP id 8AFC512E; Thu, 14 Nov 2024 09:02:22 +0100 (CET) From: Oliver Facklam Date: Thu, 14 Nov 2024 09:02:09 +0100 Subject: [PATCH v2 4/4] usb: typec: hd3ss3220: support configuring role preference based on fwnode property and typec_operation Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241114-usb-typec-controller-enhancements-v2-4-362376856aea@zuehlke.com> References: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> In-Reply-To: <20241114-usb-typec-controller-enhancements-v2-0-362376856aea@zuehlke.com> To: Heikki Krogerus , Biju Das , Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Benedict von Heyl , Mathis Foerst , Michael Glettig , Oliver Facklam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731571341; l=4351; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=xO9l0nLfli08W2OYf5c3unKKB7iAHPMUKyhuLnOgTpY=; b=Kcb57uEEl7mkDiGjvoRPZfkCmC0ZqKj2NW6arCgOh5SviGRuSPsY1J2FU4I+bQn+OAjY4fG8Y B/mDQ8GvsyhDKiYl5Z/tUpJ1UbKOEbe6FnnaLsDzoWGlal9QTDdHl9i X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= The TI HD3SS3220 Type-C controller supports configuring its role preference when operating as a dual-role port through the SOURCE_PREF field of the General Control Register. The previous driver behavior was to set the role preference based on the dr_set typec_operation. However, the controller does not support swapping the data role on an active connection due to its lack of Power Delivery support. Remove previous dr_set typec_operation, and support setting the role preference based on the corresponding fwnode property, as well as the try_role typec_operation. Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 50 +++++++++++++++++++++---------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index e3e9b1597e3b09b82f0726a01f311fb60b4284da..666bf15f88a2adb778f14efd982c0803424512bd 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -127,8 +127,25 @@ static int hd3ss3220_set_port_type(struct hd3ss3220 *hd3ss3220, int type) return err; } -static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref) +static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int prefer_role) { + int src_pref; + + switch (prefer_role) { + case TYPEC_NO_PREFERRED_ROLE: + src_pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT; + break; + case TYPEC_SINK: + src_pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK; + break; + case TYPEC_SOURCE: + src_pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC; + break; + default: + dev_err(hd3ss3220->dev, "bad role preference: %d\n", prefer_role); + return -EINVAL; + } + return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, HD3SS3220_REG_GEN_CTRL_SRC_PREF_MASK, src_pref); @@ -160,27 +177,11 @@ static enum usb_role hd3ss3220_get_attached_state(struct hd3ss3220 *hd3ss3220) return attached_state; } -static int hd3ss3220_dr_set(struct typec_port *port, enum typec_data_role role) +static int hd3ss3220_try_role(struct typec_port *port, int role) { struct hd3ss3220 *hd3ss3220 = typec_get_drvdata(port); - enum usb_role role_val; - int pref, ret = 0; - if (role == TYPEC_HOST) { - role_val = USB_ROLE_HOST; - pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC; - } else { - role_val = USB_ROLE_DEVICE; - pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK; - } - - ret = hd3ss3220_set_source_pref(hd3ss3220, pref); - usleep_range(10, 100); - - usb_role_switch_set_role(hd3ss3220->role_sw, role_val); - typec_set_data_role(hd3ss3220->port, role); - - return ret; + return hd3ss3220_set_source_pref(hd3ss3220, role); } static int hd3ss3220_port_type_set(struct typec_port *port, enum typec_port_type type) @@ -191,7 +192,7 @@ static int hd3ss3220_port_type_set(struct typec_port *port, enum typec_port_type } static const struct typec_operations hd3ss3220_ops = { - .dr_set = hd3ss3220_dr_set, + .try_role = hd3ss3220_try_role, .port_type_set = hd3ss3220_port_type_set, }; @@ -200,9 +201,6 @@ static void hd3ss3220_set_role(struct hd3ss3220 *hd3ss3220) enum usb_role role_state = hd3ss3220_get_attached_state(hd3ss3220); usb_role_switch_set_role(hd3ss3220->role_sw, role_state); - if (role_state == USB_ROLE_NONE) - hd3ss3220_set_source_pref(hd3ss3220, - HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT); switch (role_state) { case USB_ROLE_HOST: @@ -297,8 +295,6 @@ static int hd3ss3220_probe(struct i2c_client *client) if (IS_ERR(hd3ss3220->regmap)) return PTR_ERR(hd3ss3220->regmap); - hd3ss3220_set_source_pref(hd3ss3220, - HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT); /* For backward compatibility check the connector child node first */ connector = device_get_named_child_node(hd3ss3220->dev, "connector"); if (connector) { @@ -333,6 +329,10 @@ static int hd3ss3220_probe(struct i2c_client *client) if (ret != 0 && ret != -EINVAL && ret != -ENXIO) goto err_put_role; + ret = hd3ss3220_set_source_pref(hd3ss3220, typec_cap.prefer_role); + if (ret < 0) + goto err_put_role; + ret = hd3ss3220_set_port_type(hd3ss3220, typec_cap.type); if (ret < 0) goto err_put_role;