From patchwork Sat Nov 16 16:36:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13877639 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 280B7F9CB for ; Sat, 16 Nov 2024 16:36:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774981; cv=none; b=LtY1sTDi8jPGXEIkj1XZhBZNs8cyvWHU8szT1by+U9O+FRF1V5+M8kJDCRLEK5Av9FUa0wcKmiU9NIpzn2/6CGXjY/ulkj0/Q1fcJ/+HMROd/tKmwUHk/0h21LBXHTOpqHY2KirGfC2rif1gAJ+7G4/BHVTMrKfoRonpQ96sgvY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774981; c=relaxed/simple; bh=JLwPJicJGgYkPGo978p/3MyeYQOOa2tCmhPsQI6RZpw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SMM4tzf5TXIbklA9b/DG+EGuogmZU5YKbaRia6p9dTO7g3X5FHh6Lox25MBOeqFroDVC77t6Fyst+SLV+eApMVdltHoOdbbyhx/emZMFkRu8JjaENOC33ToJx7Qjdb01LLGaoDpWsifU5Mtq4xyGYksBwqsUzo0ImIpNXX3ceiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ebQEu/2o; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ebQEu/2o" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 56D18C4CEC3; Sat, 16 Nov 2024 16:36:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731774978; bh=JLwPJicJGgYkPGo978p/3MyeYQOOa2tCmhPsQI6RZpw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ebQEu/2ojNlcsIgDxLYb7qZqA6AE8O6CPl0GWkX7+T4nBh2FehwD/M58ENwbGoQ3s IqV0tRyasK+HuyDMYtW9rJd+UVGBCsVsKJKZyQRPKyIle7QUmivZZeD8ZBgL6QEMhw MyIljjijN2CudUjIGtUqWHLg8trDv8UWKHGvkfNtaIJVvWQfZjnl2C6bb6obuh7ryH Jud+d8ATxMdTgOOZKvYTSQNZpM172z/JnKHIQ47zpe+jJr1Rw+bdJexHGoBbTavu/Q 6H0zeyskRBlUKqF+m5wp2QyR0ptABa0ZDBbZsx+riPIOVCi/mtZzff47UJtMESYrNY Fyb5P48Ejlxog== From: Niklas Cassel To: Jesper Nilsson , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas Cc: Damien Le Moal , Frank Li , Niklas Cassel , linux-arm-kernel@axis.com, linux-pci@vger.kernel.org Subject: [PATCH v3 1/4] PCI: artpec6: Implement dw_pcie_ep operation get_features Date: Sat, 16 Nov 2024 17:36:00 +0100 Message-ID: <20241116163558.2606874-7-cassel@kernel.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241116163558.2606874-6-cassel@kernel.org> References: <20241116163558.2606874-6-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1650; i=cassel@kernel.org; h=from:subject; bh=JLwPJicJGgYkPGo978p/3MyeYQOOa2tCmhPsQI6RZpw=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNItTn45dYE7IPvzveY/5xzSjHe0Vr0U8Jl2qPrvtQL5s nkF5qLHO0pZGMS4GGTFFFl8f7jsL+52n3Jc8Y4NzBxWJpAhDFycAjCRBzkM/9QkZTh9NdWWMNbe Xv7ad8Hv14ZWLLoXNjjmpqUt78/hs2P4X53AzOl+YuZyZsOjQX9Mjc0UYmZs+dGUIRm7ZenSGTN vswIA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA All non-DWC EPC drivers implement (struct pci_epc *)->ops->get_features(). All DWC EPC drivers implement (struct dw_pcie_ep *)->ops->get_features(), except for pcie-artpec6.c. epc_features has been required in pci-epf-test.c since commit 6613bc2301ba ("PCI: endpoint: Fix NULL pointer dereference for ->get_features()"). A follow-up commit will make further use of epc_features in EPC core code. Implement epc_features in the only EPC driver where it is currently not implemented. Signed-off-by: Niklas Cassel Reviewed-by: Frank Li Acked-by: Jesper Nilsson --- drivers/pci/controller/dwc/pcie-artpec6.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c index f8e7283dacd47..234c8cbcae3af 100644 --- a/drivers/pci/controller/dwc/pcie-artpec6.c +++ b/drivers/pci/controller/dwc/pcie-artpec6.c @@ -369,9 +369,22 @@ static int artpec6_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, return 0; } +static const struct pci_epc_features artpec6_pcie_epc_features = { + .linkup_notifier = false, + .msi_capable = true, + .msix_capable = false, +}; + +static const struct pci_epc_features * +artpec6_pcie_get_features(struct dw_pcie_ep *ep) +{ + return &artpec6_pcie_epc_features; +} + static const struct dw_pcie_ep_ops pcie_ep_ops = { .init = artpec6_pcie_ep_init, .raise_irq = artpec6_pcie_raise_irq, + .get_features = artpec6_pcie_get_features, }; static int artpec6_pcie_probe(struct platform_device *pdev) From patchwork Sat Nov 16 16:36:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13877640 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A530418A6D5 for ; Sat, 16 Nov 2024 16:36:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774981; cv=none; b=EFBkjPb4yRuWS5RpKB3xDSFW4M+hd7Uo6Om4B13aecJ7zz+4febtOJTt4b0lg+9GrRnw8D+w/CxahzIyd/Ph0VOAsvMY2uCmmtzJ0wUT/azgcZN0eplQJ7wQc4dp0+/r1cLSrQQ0iF8gTkxGDW/Bxg9Q272si82bFtB0NFLwQmI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774981; c=relaxed/simple; bh=SlN/xkv2h1nTy/SSDUnI5IQ0q1BJajoSiTu2IIeDb/0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CmWGb124xTKiXIIKC0hSwaVeEi3L21J7WXFbWgI7jVeXZlMS6UrBCmkqWr/xMLP9UY0Yd+kDkUxmzy2TE/vcYiO1qFmIosx0SFK4fO3Q36z2XU1idYkQZWnjJj51WCePk8guA/WCrvHreORZzq2LZhRXpL4SOBzQb6BQmynGFVk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WdE3iNrQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WdE3iNrQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5106FC4CED2; Sat, 16 Nov 2024 16:36:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731774981; bh=SlN/xkv2h1nTy/SSDUnI5IQ0q1BJajoSiTu2IIeDb/0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WdE3iNrQ+vM2W/Xqcw83oSM6b7gF6lPE5p2noisBhBgBbpFr2iQI4/x0j9lpZ/Aw9 pw8ySjDk6XNzKn93sJWxAXC/N6QaAOQHVYMtVPh+qCO7GMoXoyOGzYg9RK3bkQ3cgW g9mZUviB1z9pZC4xeTTUsIW1Izm2RBBxw1o/RxMkQUXtrFWIESG39M6EUrPR1c8Lxc NLX98BjnWKhHpPjN7EgYoA+6zCIoe7EiXg6PNqSDHtIQbBdwVjYMya3WLQUW5GHyXI cUgiu2RCRqFuqUO9TYAXcj/CGrxH2G290vYV/nffPqhAJkXG3kUHPGyZqeTkkpuDC3 6anGup7P6CbBg== From: Niklas Cassel To: Manivannan Sadhasivam , =?utf-8?q?Krzy?= =?utf-8?q?sztof_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas Cc: Damien Le Moal , Frank Li , Jesper Nilsson , Niklas Cassel , linux-pci@vger.kernel.org Subject: [PATCH v3 2/4] PCI: endpoint: Add size check for fixed size BARs in pci_epc_set_bar() Date: Sat, 16 Nov 2024 17:36:01 +0100 Message-ID: <20241116163558.2606874-8-cassel@kernel.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241116163558.2606874-6-cassel@kernel.org> References: <20241116163558.2606874-6-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1826; i=cassel@kernel.org; h=from:subject; bh=SlN/xkv2h1nTy/SSDUnI5IQ0q1BJajoSiTu2IIeDb/0=; b=kA0DAAoWyWQxo5nGTXIByyZiAGc4yfShPVIdOid5GHu/GV/jqvrdHKpCjmasbS3a1Uu/s76wz oh1BAAWCgAdFiEETfhEv3OLR5THIdw8yWQxo5nGTXIFAmc4yfQACgkQyWQxo5nGTXJ8KQD+Lrlp oeqXC9XZpGvtwOrfEHzSViNQlmn1dn5L7JBs00IA/iYad3U/7IAUt4wtTUHh20Pwb92hpLuI1Gl H9EkoHHcJ X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA A BAR of type BAR_FIXED has a fixed BAR size (the size cannot be changed). When using pci_epf_alloc_space() to allocate backing memory for a BAR, pci_epf_alloc_space() will always set the size to the fixed BAR size if the BAR type is BAR_FIXED (and will give an error if you the requested size is larger than the fixed BAR size). However, some drivers might not call pci_epf_alloc_space() before calling pci_epc_set_bar(), so add a check in pci_epc_set_bar() to ensure that an EPF driver cannot set a size different from the fixed BAR size, if the BAR type is BAR_FIXED. The pci_epc_function_is_valid() check is removed because this check is now done by pci_epc_get_features(). Signed-off-by: Niklas Cassel Reviewed-by: Frank Li --- drivers/pci/endpoint/pci-epc-core.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index bed7c7d1fe3c3..c69c133701c92 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -609,10 +609,17 @@ EXPORT_SYMBOL_GPL(pci_epc_clear_bar); int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epf_bar *epf_bar) { - int ret; + const struct pci_epc_features *epc_features; + enum pci_barno bar = epf_bar->barno; int flags = epf_bar->flags; + int ret; - if (!pci_epc_function_is_valid(epc, func_no, vfunc_no)) + epc_features = pci_epc_get_features(epc, func_no, vfunc_no); + if (!epc_features) + return -EINVAL; + + if (epc_features->bar[bar].type == BAR_FIXED && + (epc_features->bar[bar].fixed_size != epf_bar->size)) return -EINVAL; if ((epf_bar->barno == BAR_5 && flags & PCI_BASE_ADDRESS_MEM_TYPE_64) || From patchwork Sat Nov 16 16:36:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13877641 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EF5E29415 for ; Sat, 16 Nov 2024 16:36:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774984; cv=none; b=Qpu51LyR/whD4UZ7uwE9EgZw6zXv17/k1ag+dxDanfBR9NXfpOQl9Nd3ecuIyDxh+GMNW6WcpjOGaJa2A+lZmZhIewJyhYTMC8Mlh9hR5yuNC/qNH+R0KB0lv/6a6P8bs0UoIE6ryOEBA7sH3UELu35s7u+IzGb6e6ZQlqJMFng= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774984; c=relaxed/simple; bh=KoLmHPN+69iBXOvoxCUQ4B4ux9IP5nIy91a83eyfrN4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fZvEssNjmorE5UfQVg4Es4xGGj4PnxMImG0sVB7T+lPZWFGYdmAdkEb9CKNVKd6zEsReZy05aHaFBLjRd5Wre8otU3UFF4O9mV1tI59T65Vt/TfN1+D1lRweSKwsnWY7gQER6TFM5P8mZ8OBeLF7Dcej65vGFL7p5t3cP4917b4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=n9C9kodz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="n9C9kodz" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E86C6C4CEC3; Sat, 16 Nov 2024 16:36:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731774983; bh=KoLmHPN+69iBXOvoxCUQ4B4ux9IP5nIy91a83eyfrN4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n9C9kodz+qYDI4pvTFMYH+gZUkecjtPM7j79yJdS5V9JS5N+FNHb8fALZjd4Irmh7 PGJHKDlD+QH5eVlPgsD393mg/d06RzA/wQ/7xunL6ZpiFkbVCdDszzUCyQjgVzDbzJ UsNET+37+yRRV+W3B/1s5do21fr0waJnj+Sql57e8Sl/E/n1i/O3LprWehHh1fW4Xd rjoe4q90i/m2K3Nj9JkkpbHiAC4MjF+LYpGhtYhHlbJFwERArVYepu3MQiKeKGnmGj 1r2kH0mbspITR1ZtS8KRKX5kPRM0CtJV4cofM83vAwki8ShWY5LR6NsGIl/xvc/z0G vWLc5wAfHO8xg== From: Niklas Cassel To: Manivannan Sadhasivam , =?utf-8?q?Krzy?= =?utf-8?q?sztof_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas Cc: Damien Le Moal , Frank Li , Jesper Nilsson , Niklas Cassel , linux-pci@vger.kernel.org Subject: [PATCH v3 3/4] PCI: endpoint: Verify that requested BAR size is a power of two Date: Sat, 16 Nov 2024 17:36:02 +0100 Message-ID: <20241116163558.2606874-9-cassel@kernel.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241116163558.2606874-6-cassel@kernel.org> References: <20241116163558.2606874-6-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1136; i=cassel@kernel.org; h=from:subject; bh=KoLmHPN+69iBXOvoxCUQ4B4ux9IP5nIy91a83eyfrN4=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNItTn4xjPt82CNnJ3vdVekXZ9m3Nf8/+zzq7vol77gig 7dN4Vru11HKwiDGxSArpsji+8Nlf3G3+5TjindsYOawMoEMYeDiFICJfH3H8L8oJZFZKVPtVYgO c3xcz/UvFR+/ZjC/zI8N6TrXwph/YhfD/7y+nTOOiTj9/HbxYHtG1eq3TkyNN422dn2+/FhReld hPT8A X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA When allocating a BAR using pci_epf_alloc_space(), there are checks that round up the size to a power of two. However, there is no check in pci_epc_set_bar() which verifies that the requested BAR size is a power of two. Add a power of two check in pci_epc_set_bar(), so that we don't need to add such a check in each and every PCI endpoint controller driver. Signed-off-by: Niklas Cassel --- drivers/pci/endpoint/pci-epc-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index c69c133701c92..6062677e9ffec 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -622,6 +622,9 @@ int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, (epc_features->bar[bar].fixed_size != epf_bar->size)) return -EINVAL; + if (!is_power_of_2(epf_bar->size)) + return -EINVAL; + if ((epf_bar->barno == BAR_5 && flags & PCI_BASE_ADDRESS_MEM_TYPE_64) || (flags & PCI_BASE_ADDRESS_SPACE_IO && flags & PCI_BASE_ADDRESS_IO_MASK) || From patchwork Sat Nov 16 16:36:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13877642 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AF1185270 for ; Sat, 16 Nov 2024 16:36:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774988; cv=none; b=DK8jUbGK5ZsV6f0Ilhf3hDOHOYMwZgtHDyVq0FXlOe3m9VvBj1HmjomkVpBNn3C7i2aMMbM43JbONLFHNBP+RSS5a+R4eq/17HAKRst4Y1pwH6DobYSwcqPPdn44pc7kfeGr0RI1vsdGlwQ1B9qpeieY2aq0QZxBaXcSXueHpVA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731774988; c=relaxed/simple; bh=DBoTMYzQHH1EDKTLCGDdsEXwGCMBH/6QSLBPWIIU0nY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=idfcUVSaUAC06b8Wq70hP0ErHC4QB6noIHLLwTrsSFFbyebpd++RL9YCGgxSLQaxu2ZG+0byy2dn+9Fn8n4YBq9tRhzifL/wB/EoMlYnCuAb//OURwF2rq9UafnjS3oSTAKvZfwXNyGq6EnhMuILXGMf3gBqDmALRgdRSW6+WJ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JrbfS2Po; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JrbfS2Po" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B3AEDC4CED5; Sat, 16 Nov 2024 16:36:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731774987; bh=DBoTMYzQHH1EDKTLCGDdsEXwGCMBH/6QSLBPWIIU0nY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JrbfS2PoR0/USlDSJGZU+R+EtfuhO/WLuE3hsy8EVygx5/ChfnRs67nWAnTNVpt+c SpXjLtJwBLa7j7DOeQXgvKXOCO+uglPzItLhuU286mRTxZtSyQjKxwFu4NsYkbKycW uauHwZun3yb9eGb/ECPU9rlpDGZDbDlVymA3qbu3Z96tYi1w6+I46xjnH/YfnwPTNb /5rAG7+xGAXlbs35Vv1nWxNmmAs9q6Jxv44YQqwruOV7QdhIO0Uxxe00H3g8rDBJya 1yjLiG6+DhsGUywLdANc/h7/BJ4vDQRObIgfCEv8C8kohGh9kIa/zCF2KIxdmqMXkX uyPptmjc77XCA== From: Niklas Cassel To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas Cc: Damien Le Moal , Frank Li , Jesper Nilsson , Niklas Cassel , linux-pci@vger.kernel.org Subject: [PATCH v3 4/4] PCI: dwc: ep: Add 'address' alignment to 'size' check in dw_pcie_prog_ep_inbound_atu() Date: Sat, 16 Nov 2024 17:36:03 +0100 Message-ID: <20241116163558.2606874-10-cassel@kernel.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241116163558.2606874-6-cassel@kernel.org> References: <20241116163558.2606874-6-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4258; i=cassel@kernel.org; h=from:subject; bh=DBoTMYzQHH1EDKTLCGDdsEXwGCMBH/6QSLBPWIIU0nY=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNItTn7N4zznUH8k/qOekablpmSdRdZP/A/pL8j4nWN9u +SJ+Dz9jlIWBjEuBlkxRRbfHy77i7vdpxxXvGMDM4eVCWQIAxenAExEeC3Df/fF/HYl/ofeztn+ yVW086vz4RurRUxidrAdceTId2GZNouR4b/H3/JC59f2q17/fPIh3HX2vsjbkXHLi4UOiylmMRe mswIA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA dw_pcie_prog_ep_inbound_atu() is used to program an inbound iATU in "BAR Match Mode". A memory address returned by e.g. kmalloc() is guaranteed to have natural alignment (aligned to the size of the allocation). It is however not guaranteed that pci_epc_set_bar() (and thus dw_pcie_prog_ep_inbound_atu()) is supplied an address that has natural alignment. (An EPF driver can send in an arbitrary physical address to pci_epc_set_bar().) The DWC Databook description for the LWR_TARGET_RW and LWR_TARGET_HW fields in the IATU_LWR_TARGET_ADDR_OFF_INBOUND_i registers state that: "Field size depends on log2(BAR_MASK+1) in BAR match mode." I.e. only the upper bits are writable, and the number of writable bits is dependent on the configured BAR_MASK. Add a check to ensure that the physical address programmed in the iATU is aligned to the size of the BAR (BAR_MASK+1), as without this, we can get hard to debug errors, as we could write to bits that are read-only (without getting a write error), which could cause the iATU to end up redirecting to a physical address that is different from the address that we intended. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-designware-ep.c | 8 +++++--- drivers/pci/controller/dwc/pcie-designware.c | 5 +++-- drivers/pci/controller/dwc/pcie-designware.h | 2 +- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 507e40bd18c8f..4ad6ebd2ea320 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -128,7 +128,8 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, } static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type, - dma_addr_t cpu_addr, enum pci_barno bar) + dma_addr_t cpu_addr, enum pci_barno bar, + size_t size) { int ret; u32 free_win; @@ -145,7 +146,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type, } ret = dw_pcie_prog_ep_inbound_atu(pci, func_no, free_win, type, - cpu_addr, bar); + cpu_addr, bar, size); if (ret < 0) { dev_err(pci->dev, "Failed to program IB window\n"); return ret; @@ -229,7 +230,8 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, else type = PCIE_ATU_TYPE_IO; - ret = dw_pcie_ep_inbound_atu(ep, func_no, type, epf_bar->phys_addr, bar); + ret = dw_pcie_ep_inbound_atu(ep, func_no, type, epf_bar->phys_addr, bar, + size); if (ret) return ret; diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 6d6cbc8b5b2c6..3c683b6119c39 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -597,11 +597,12 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type, } int dw_pcie_prog_ep_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, - int type, u64 cpu_addr, u8 bar) + int type, u64 cpu_addr, u8 bar, size_t size) { u32 retries, val; - if (!IS_ALIGNED(cpu_addr, pci->region_align)) + if (!IS_ALIGNED(cpu_addr, pci->region_align) || + !IS_ALIGNED(cpu_addr, size)) return -EINVAL; dw_pcie_writel_atu_ib(pci, index, PCIE_ATU_LOWER_TARGET, diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 347ab74ac35aa..fc08727116725 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -491,7 +491,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type, u64 cpu_addr, u64 pci_addr, u64 size); int dw_pcie_prog_ep_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, - int type, u64 cpu_addr, u8 bar); + int type, u64 cpu_addr, u8 bar, size_t size); void dw_pcie_disable_atu(struct dw_pcie *pci, u32 dir, int index); void dw_pcie_setup(struct dw_pcie *pci); void dw_pcie_iatu_detect(struct dw_pcie *pci);