From patchwork Tue Nov 19 17:49:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 13880374 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C58921D2200; Tue, 19 Nov 2024 17:50:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038607; cv=none; b=JYGduJxn6WRkplYnAj/p/ai59FesJyGXHSvq18d7HxNXPUuAHsXd3lGXL6L5quDagUdfwJjzNzoWHmKjxBGfdmVbfegkA1Pxpyk7od5sUuDONAhyp6tY0C+KiNz+8wRpRlhrvhMWH4sU6Om3BLPrjz+/5jdUxw06OqlFkP12HBQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038607; c=relaxed/simple; bh=CbZHBKuJA6W/UoAE84GFI1E+aJt3W44WhU3c4ij8//0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cjsw9BHYXyZu/LcyjYCGKh/SUINYEK9oLvYsoVZvUqNLh4TUl1EdJkQMQWJwJ94sfm3dgUUwetcD9UiS5OPV7xdEmKT6w0vkXsZBA3MIWhd8tCEpAxT1yqv/njiVAsPxdRaxwWVDQsm+varJlrnKbZGRj9977yCcRZwQBDGWoCg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Nur3PWsn; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Nur3PWsn" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJ7bpdF005668; Tue, 19 Nov 2024 17:50:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=vtCfWtly1yA 8xA6HRcgTnBmAYXHBLqBXnS/SuV3GJW4=; b=Nur3PWsntOocHkZHd0zwgz6o13S WPMae/8+QVdXvdh/eN6zmUx6Cpc3vNTIgP4Rn3GABVAg6PthT0VYhaVo15Xfxnry DZNX8N6e82llwNpqEK5eevWrnjbqGhKz2KY000yRcz4Xcu37Y9qsyixynvFC82nH q+tZRNpP6IIcEbpkNcP9u9d+e/Z5fUagrmLqplgUO9u1m9xFLf1Z287CRHOWsBiP ofQNPGpk6uskkulrI5pztHYen8q7MPuIya3+2TU3mbMcuijbDXXGJO8e2CDkOZZa XAJnbC3w4dgyDEU09EXVQGvzooJUShke0iW+bpyANav2aCD7Fkl2OO0IFIQ== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4308y8kc7a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:02 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJHnxEx007359; Tue, 19 Nov 2024 17:49:59 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 42xmfm26re-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AJHnx8S007332; Tue, 19 Nov 2024 17:49:59 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4AJHnw3f007328 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id AC4D33C9; Tue, 19 Nov 2024 23:19:57 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v3 1/5] dt-bindings: arm: qcom,ids: add SoC ID for QCS9075 Date: Tue, 19 Nov 2024 23:19:50 +0530 Message-ID: <20241119174954.1219002-2-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241119174954.1219002-1-quic_wasimn@quicinc.com> References: <20241119174954.1219002-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: YkJT4NS0U-bWyHfJbjqh7NHEwHvYH41e X-Proofpoint-GUID: YkJT4NS0U-bWyHfJbjqh7NHEwHvYH41e X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=960 lowpriorityscore=0 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 mlxscore=0 spamscore=0 phishscore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190132 Add the unique ID for Qualcomm QCS9075 SoC. This value is used to differentiate the SoC across qcom targets. Acked-by: Rob Herring (Arm) Signed-off-by: Wasim Nazir --- include/dt-bindings/arm/qcom,ids.h | 1 + 1 file changed, 1 insertion(+) -- 2.47.0 diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index e850dc3a1ad3..1b3e0176dcb7 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -284,6 +284,7 @@ #define QCOM_ID_QCS9100 667 #define QCOM_ID_QCS8300 674 #define QCOM_ID_QCS8275 675 +#define QCOM_ID_QCS9075 676 #define QCOM_ID_QCS615 680 /* From patchwork Tue Nov 19 17:49:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 13880376 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBBAF1D1F56; Tue, 19 Nov 2024 17:50:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038608; cv=none; b=F3yvwlhukbKBMs4Ms8IacIUc7PW2N2MzybvWtrkbldMkEYDCvWjBJDvBNOrsessq2VXqV4fKvnn+Yu9mImpDLTfeIrKF+duUxCHpYtMm3wXcg7X3htOS4uq5OOdbHlqzC048boL4K3MABLHv79O63OFj8i0hMAgD1Ztx+04+HvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038608; c=relaxed/simple; bh=jFkmm93lr9MD/rw5hW0pc7789fFvi04IYI4ZdyxsDUA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MjAqlIPbsaRUznCz9qI8j1TklaSuRcpDENs0HcHhuIbKDwSGuhzYycLvXi1hoHCvwYjixEyU7jJC/fumoFaqqlp2hVgCFi0p921qK1ZwS3w5++td4KSY8ir+XAMnkQOv2k4x4sk4teGyVJeGrhl2/kjhdAOtbQn9FZQGTr3a/Fw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=XbV6Lre4; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="XbV6Lre4" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJ7lUXl028549; Tue, 19 Nov 2024 17:50:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=bkouYLvk2ll JjZ5fbMjGu1sO+/G23EpCWQ79MEr/2Dw=; b=XbV6Lre4PtxmzMEncvS/KuvDfT6 7toYm+GcbiDiHcJrzCTkivQP/ZDUm4u4Lc8fWCiHFF1a1kgOlJbBBDSNLIEhIlFJ Mptr4ylj7USr1lXqvLCtQap65uXByivcKWqMyvZu2ObZRv51MPoyxYHb2ooSChxv R2WLINejeWUNRJ4b0IzaCyKpiWBGOpD31RPgppsQgzt7VFYZn7eF6keGLcvagSTy AkUxajosr65LC25ogmKzrexmGEnt2wKLj+Ava3M6QQkFsi6/s4E7EjyKG4K5rBkl 87iSqUXx4RT0Fmb3fzZ93EkfxI9fM65L29vdowbSdFWWTwzxeRmivvUbLLQ== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4308y83ax6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:02 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJHnxvT007358; Tue, 19 Nov 2024 17:49:59 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 42xmfm26rf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AJHnxgq007335; Tue, 19 Nov 2024 17:49:59 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4AJHnwaZ007327 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id B10BE5A4; Tue, 19 Nov 2024 23:19:57 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir , Dmitry Baryshkov Subject: [PATCH v3 2/5] soc: qcom: socinfo: add QCS9075 SoC ID Date: Tue, 19 Nov 2024 23:19:51 +0530 Message-ID: <20241119174954.1219002-3-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241119174954.1219002-1-quic_wasimn@quicinc.com> References: <20241119174954.1219002-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: HLLPlMrNue79N32UlVyXst1M46Qh_qMF X-Proofpoint-GUID: HLLPlMrNue79N32UlVyXst1M46Qh_qMF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 mlxscore=0 spamscore=0 adultscore=0 suspectscore=0 malwarescore=0 mlxlogscore=964 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190132 Update soc_id table for the Qualcomm QCS9075 SoC to represent qcs9075 machine. Reviewed-by: Dmitry Baryshkov Signed-off-by: Wasim Nazir --- drivers/soc/qcom/socinfo.c | 1 + 1 file changed, 1 insertion(+) -- 2.47.0 diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index 805dc3c4de40..a473d85bc033 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -451,6 +451,7 @@ static const struct soc_id soc_id[] = { { qcom_board_id(QCS9100) }, { qcom_board_id(QCS8300) }, { qcom_board_id(QCS8275) }, + { qcom_board_id(QCS9075) }, { qcom_board_id(QCS615) }, }; From patchwork Tue Nov 19 17:49:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 13880373 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 977381D1F79; Tue, 19 Nov 2024 17:50:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038607; cv=none; b=njRKQr4LjQr4niDywfm86ehnZaSjuBDP9xT/knb+kq4s666ZtfLMGKaG/F5rz7+vveeYOkOg+ZIF5R5UgXRPOS/5wc0Yd6rYkBvmm2xk6Mo0VhxKB5omo4L2mQDmdqui23p853WVPSEQaxx9eP+4GSSn8QpB9/Gw0kPIyl/BVIQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038607; c=relaxed/simple; bh=TK/x+eTRy7P3IDR7hOUY/tVtyCL8g4YRyBMtnTCipVQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cae6ASQZ10x9ZN6jqYfFdU4Rs0nzJWnHjMuVmdzjutdaQEhbBI+TQntOhI+ddUl1+e4pHwtnn6+ahA2p8dKCVXp3NxsvOuY3JcudRtv4S3i327T0sAJzcBMYwiTLjZp38ZlS8kWmW7rKSJ0ovzuDlxTBAk6EGXRcLMWaZYK5vGg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Hen+uSXF; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Hen+uSXF" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJ7bpdE005668; Tue, 19 Nov 2024 17:50:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=j8YoXXcP2tM W5u8pL03W9TA6l31+kW0KHM0gtEydeV4=; b=Hen+uSXFOysqKvJ/DhiVp0wlKX+ IUB/++AVJJNpTtq1Q7LDVsmtc3n8HR1yDXdFZxVNcuzjj0ox3l7bZgn4pk7HJjcO yhQwQ0bnE4nWePlibUz6FsxRZn7jpNlJoRZuh+Xvzn9VtDdnAT4QV1B7daV0jLjF ixRAjxxDwdeF3VCxJmgON1u5+pAWLm1Ry0+fmLIg9thsgLUgdHgyfHfPb/n/gQOA ySOAa2ghGBBr0brz49gKQwYNXQ+MIPgiIejoTb9Bld8tooO8Qlpgd7KJRtTgbSCf VoRqyObPSGN1D6dpUwaIvxrBojmggp/s9gydEYFzh1QBGHJE1tHFMF8Dx0g== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4308y8kc7b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:02 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJHnx5D007360; Tue, 19 Nov 2024 17:49:59 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 42xmfm26rg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AJHnxSX007334; Tue, 19 Nov 2024 17:49:59 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4AJHnwhn007324 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id B51145A7; Tue, 19 Nov 2024 23:19:57 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v3 3/5] dt-bindings: arm: qcom: Document rb8/ride/ride-r3 on QCS9075 Date: Tue, 19 Nov 2024 23:19:52 +0530 Message-ID: <20241119174954.1219002-4-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241119174954.1219002-1-quic_wasimn@quicinc.com> References: <20241119174954.1219002-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: lA-0fJJo8KW8V-iLhQfpv7l8i2StzbvL X-Proofpoint-GUID: lA-0fJJo8KW8V-iLhQfpv7l8i2StzbvL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=999 lowpriorityscore=0 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 mlxscore=0 spamscore=0 phishscore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190132 qcs9075 rb8, ride & ride-r3 boards are based on QCS9075 SoC. QCS9075 is compatible IoT-industrial grade variant of SA8775p SoC without safety monitorng feature of SAfety-IsLand subsystem. This subsystem continues to supports other features like built-in self-test, error-detection, reset-handling, etc. Acked-by: Rob Herring (Arm) Signed-off-by: Wasim Nazir --- Documentation/devicetree/bindings/arm/qcom.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.47.0 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 7c8c3a97506a..de5cf9fb28ae 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -46,6 +46,7 @@ description: | qcs8550 qcm2290 qcm6490 + qcs9075 qcs9100 qdu1000 qrb2210 @@ -928,6 +929,14 @@ properties: - qcom,sa8775p-ride-r3 - const: qcom,sa8775p + - items: + - enum: + - qcom,qcs9075-rb8 + - qcom,qcs9075-ride + - qcom,qcs9075-ride-r3 + - const: qcom,qcs9075 + - const: qcom,sa8775p + - items: - enum: - qcom,qcs9100-ride From patchwork Tue Nov 19 17:49:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 13880377 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 514161D223B; Tue, 19 Nov 2024 17:50:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038608; cv=none; b=nglhnRC+dssIlYiHNUfD3hxzdWI4jp+2/Y5xOrr2LC1lc/h8OXihXr8oW32iugG3cSmlkQTlBLVevoKrk+EnCc/B9PSISdRmI50nuEkD19n954BBQ8hVYrwjedfBLE6kbOhVXMB9KzsPpOPOjHDEY4IbE4Im6h6R2Zfiz6A+47k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038608; c=relaxed/simple; bh=ccdh4JeSl6ymaPOSE2zfzwl5lf55Col+JZxkpM8qGGo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PowoP7Yiyy40UcbdwsUy00Mr9CAt3LnHVWXa6oGq/P0B8nKDdoA+VbL546lEtLHai0wbAyd8li51l8ZGZIMZiGQ9HvOgP9JQXF4ycCB20w3Wv5/WPOAYFeD7w1vSdK4eccxjPPCg6wA/+NP0t32i0Kc61+u6DwoImWeCxMOnqRk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=XG5v9E1T; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="XG5v9E1T" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJ7o8Kq027393; Tue, 19 Nov 2024 17:50:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=GkrXydYYZ+t scvqqCAu1cPU8Tm+5fBKTYcb9SkTEq8U=; b=XG5v9E1TvTvTScr3WceXOF3UaVE vjADm3nsAJfPgw0faLyonrblW4hAYqp0BhRp2VaRBm0qWmzN9P+V/Yrw7PKKzX2m 8TmGgkzKyJx/XWDBibeg3ziJSf/rLqt6VKH5phUGQiG2Xw3tTeYiaV1CMd/k9i2S NuV+f6CslG4dwU+U7ESW3cmeIxVTkKrJ8T4k8aq0B6tAaG9ljaiif1f4YBih6t4C 6sdm0yL4shXnfoDtIKFDPilrKLj7rnW9uX8KjAiN4oFO+/H9+WEWoC+zDEPDkCRk gypW3Dh11RNy14mArkVoBxN1CwCxLKwcRWynnL+vcDaYhP/GTDT0Xzjeakg== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4308y6uc1n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:02 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJHnxqc007362; Tue, 19 Nov 2024 17:49:59 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 42xmfm26rh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AJHnxGX007336; Tue, 19 Nov 2024 17:49:59 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4AJHnwBV007326 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:49:59 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id B93C25A8; Tue, 19 Nov 2024 23:19:57 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v3 4/5] arm64: dts: qcom: Add support for QCS9075 RB8 Date: Tue, 19 Nov 2024 23:19:53 +0530 Message-ID: <20241119174954.1219002-5-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241119174954.1219002-1-quic_wasimn@quicinc.com> References: <20241119174954.1219002-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: QWgz5YtFkXGcQeBRhTh7dMnjLgp5_1dj X-Proofpoint-GUID: QWgz5YtFkXGcQeBRhTh7dMnjLgp5_1dj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 impostorscore=0 bulkscore=0 mlxscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190132 Add initial device tree support for the RB8 board based on Qualcomm's QCS9075. Basic changes are supported for boot to shell. Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 281 +++++++++++++++++++++++ 2 files changed, 282 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-rb8.dts -- 2.47.0 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 9bb8b191aeb5..5d9847119f2e 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -115,6 +115,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts new file mode 100644 index 000000000000..ecaa383b6508 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts @@ -0,0 +1,281 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include +#include + +#include "sa8775p.dtsi" +#include "sa8775p-pmics.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Robotics RB8"; + compatible = "qcom,qcs9075-rb8", "qcom,qcs9075", "qcom,sa8775p"; + + aliases { + serial0 = &uart10; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s4a: smps4 { + regulator-name = "vreg_s4a"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1816000>; + regulator-initial-mode = ; + }; + + vreg_s5a: smps5 { + regulator-name = "vreg_s5a"; + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1996000>; + regulator-initial-mode = ; + }; + + vreg_s9a: smps9 { + regulator-name = "vreg_s9a"; + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + regulator-initial-mode = ; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_l1c: ldo1 { + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2c: ldo2 { + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3c: ldo3 { + regulator-name = "vreg_l3c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l4c: ldo4 { + regulator-name = "vreg_l4c"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + /* + * FIXME: This should have regulator-allow-set-load but + * we're getting an over-current fault from the PMIC + * when switching to LPM. + */ + }; + + vreg_l5c: ldo5 { + regulator-name = "vreg_l5c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6c: ldo6 { + regulator-name = "vreg_l6c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2700000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-2 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_s4e: smps4 { + regulator-name = "vreg_s4e"; + regulator-min-microvolt = <970000>; + regulator-max-microvolt = <1520000>; + regulator-initial-mode = ; + }; + + vreg_s7e: smps7 { + regulator-name = "vreg_s7e"; + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + regulator-initial-mode = ; + }; + + vreg_s9e: smps9 { + regulator-name = "vreg_s9e"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <570000>; + regulator-initial-mode = ; + }; + + vreg_l6e: ldo6 { + regulator-name = "vreg_l6e"; + regulator-min-microvolt = <1280000>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8e: ldo8 { + regulator-name = "vreg_l8e"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32768>; +}; + +&tlmm { + qup_uart10_default: qup-uart10-state { + pins = "gpio46", "gpio47"; + function = "qup1_se3"; + }; +}; + +&uart10 { + compatible = "qcom,geni-debug-uart"; + pinctrl-0 = <&qup_uart10_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&xo_board_clk { + clock-frequency = <38400000>; +}; From patchwork Tue Nov 19 17:49:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 13880375 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 764F11D221A; Tue, 19 Nov 2024 17:50:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038608; cv=none; b=PpRXL1P/zemOWO9jeEnvh+D3Rdjs98E7a6T66A+RxxRAj54oNG8e7DNSZLTiGFpEzlnWgdkQ/U6Eh3Vt9+dCTh2BmQZHnb6LR1/ecu0se9p6zjuT0xDOvjmDym3jV36FH+VdsToXwGw/k4FH8Hssjt0pQVvgLbwjLDnda7dQMt0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732038608; c=relaxed/simple; bh=UU5fPa1TBAZ6+2wdti1tYkR6HNbrQW4vBr7KTADoiCs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QgwfSNIRXcczt5d9HEj9fKMBfHfMjcu833EHhjdBz6eKKYrAmmJEmk4OOENpKKcB4ckWoD3/4C1qXO6fT159LwS9+Ptc0aAcApsYJl1NffhqIOBCcuU1srvnpG4BZkh0IG7k17FodZEzQEseErKcFZNk0Pmxb59tCpMXW3OTJ2g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=IKN1oHIt; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="IKN1oHIt" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJHE4Ip029939; Tue, 19 Nov 2024 17:50:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=toq4QokUBBz f0TwajtgeaN4ByORpJ0XGLWGij3aneV4=; b=IKN1oHIt1NU4gmy6VK6eMQ/kTJt yf28kIjgf5h225540sD77WkgjQpotJ1eTh5tO8DFq0/7ZtjiD36QSb7SvUjdH4c1 aEQf0HD/S6MOApHbHr4pWbfNc7+pRCNr21+7+NABOI6hFO9IO/ROI4FPMf27eoe8 7MndzFOnwxVQg6Y5FAX5nCYm868hE4yARq0Li+5dwA8CzhOca1UhON7h0onjlztz 5GT13JzoYecFex93RxMtuALZWcTWkFnVKhRLWNvm/WkalRiN9NjckogXI0JI4rWp xKx9w/r3tAdbcGnxL1NvdRi4LdoNR5NlA3711JVgPrgHyVdEjDDvFN1Pp0A== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4308y6bc07-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:03 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 4AJHnxF0007359; Tue, 19 Nov 2024 17:50:00 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 42xmfm26rw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:00 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AJHo0v9007383; Tue, 19 Nov 2024 17:50:00 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4AJHnxCw007375 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 17:50:00 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id BD2A15A9; Tue, 19 Nov 2024 23:19:57 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v3 5/5] arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3 Date: Tue, 19 Nov 2024 23:19:54 +0530 Message-ID: <20241119174954.1219002-6-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241119174954.1219002-1-quic_wasimn@quicinc.com> References: <20241119174954.1219002-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: f_kbk0R6km3JEzLOFJjny8cZ7O3qtypj X-Proofpoint-GUID: f_kbk0R6km3JEzLOFJjny8cZ7O3qtypj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=999 suspectscore=0 mlxscore=0 bulkscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 adultscore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190132 Add device tree support for QCS9075 Ride & Ride-r3 boards. QCS9075 Ride & Ride-r3 are similar to QCS9100 Ride and Ride-r3 boards but without safety monitoring feature of SAfety-IsLand subsystem. Difference between ride and ride-r3 is the ethernet phy. Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/Makefile | 2 ++ arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 12 ++++++++++++ arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 12 ++++++++++++ 3 files changed, 26 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts -- 2.47.0 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 5d9847119f2e..91c811aca2ca 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -116,6 +116,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts new file mode 100644 index 000000000000..a04c8d1fa258 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include "sa8775p-ride-r3.dts" + +/ { + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts new file mode 100644 index 000000000000..9ffab74fb1a8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include "sa8775p-ride.dts" + +/ { + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; +};