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([10.24.69.142]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4AP8dEin127929; Mon, 25 Nov 2024 02:39:15 -0600 From: Vaishnav Achath To: , , , , , , CC: , , , , Subject: [PATCH 1/2] dt-bindings: dma: ti: k3-bcdma: Add TX channel for AM62A CSIRX BCDMA Date: Mon, 25 Nov 2024 14:09:13 +0530 Message-ID: <20241125083914.2934815-1-vaishnav.a@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea J722S CSIRX BCDMA is based on AM62A BCDMA and supports CSI TX channels in addition to currently supported RX channels. Add TX channel properties as optional properties in the list so that the same compatible can be reused. K3 UDMA makes use of TCHAN_CNT capabilities register to identify whether platform supports TX channels. Signed-off-by: Vaishnav Achath --- Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml index 27b8e1636560..c748f78b313e 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml @@ -138,19 +138,22 @@ allOf: then: properties: ti,sci-rm-range-bchan: false - ti,sci-rm-range-tchan: false reg: + minItems: 3 items: - description: BCDMA Control /Status Registers region - description: RX Channel Realtime Registers region - description: Ring Realtime Registers region + - description: TX Channel Realtime Registers region reg-names: + minItems: 3 items: - const: gcfg - const: rchanrt - const: ringrt + - const: tchanrt required: - power-domains From patchwork Mon Nov 25 08:39:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaishnav Achath X-Patchwork-Id: 13884593 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C20457082C; Mon, 25 Nov 2024 08:57:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732525025; cv=none; b=fI8RKj9UoVta28ZvVV8s8C3jDhDDvIzJBl5XFJ7SxkIyKm+cvzVEzOkK92XcvNUAYMQKezW9nwCLqbFuVra93YXSYl34VPRC7x+kFaG1u/0/nmhv8IIpV6xRwB8RJ9aDjLpcqSuw4rDE9fTIVtCONh3/fEEUUwdep4/bHVK1Ebc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732525025; c=relaxed/simple; bh=+HHx1UwdTOZXvLeFxjB05giJcfy6ekNZV+yWUQe+dww=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KjbvJ08Iqvcq0QBD7UZ867J5sth+zVj86elhnXFBbZq6puqJ/C+klrlKzK1B0mHTmBt8EXoYvfdxQP/iFnHQ2GUvnRdXVwh3qHOCcXhzl2gowMyZ2xmLlKc/2z9pCrQt783veqlACzFBVzUBxfcYPt+F02UZdyBBfm2kNGF2u+4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=H0CA8TRf; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="H0CA8TRf" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 4AP8dMvY640456 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 25 Nov 2024 02:39:22 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1732523962; bh=Po8mjmkN+7GJHfNw49gxB2Jy2zXvZ8kxkXerGYlrYM0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=H0CA8TRfI/Rz/gQAE+Qj30LTiPBJzHQ0DkKVom+HCbq1HJj7YoltVkA9o75yPacpu WedWMmvyt3uoU1TwqN+81oYy06hYFalL2qWSAz/bqS7XtStfYaWjUv6rRz9Ye6A7vB J9jQ4TsFP7uY3frMrFyc6dIg83oFfucQaPNk8eSQ= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4AP8dMlZ008987 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 25 Nov 2024 02:39:22 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 25 Nov 2024 02:39:22 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 25 Nov 2024 02:39:22 -0600 Received: from uda0490681.. ([10.24.69.142]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4AP8dEio127929; Mon, 25 Nov 2024 02:39:19 -0600 From: Vaishnav Achath To: , , , , , , CC: , , , , Subject: [PATCH 2/2] dmaengine: ti: k3-udma: Add TX channel data in AM62A CSIRX DMSS Date: Mon, 25 Nov 2024 14:09:14 +0530 Message-ID: <20241125083914.2934815-2-vaishnav.a@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125083914.2934815-1-vaishnav.a@ti.com> References: <20241125083914.2934815-1-vaishnav.a@ti.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea J722S/AM67 uses the same BCDMA CSIRX IP as AM62A, but it supports TX channels as well in addition to RX. Add the BCDMA TCHAN information in the am62a_dmss_csi_soc_data so as to support all the platforms in the family with same compatible. UDMA_CAP2_TCHAN_CNT indicates the presence of TX channels and it will be 0 for platforms without TX support. Signed-off-by: Vaishnav Achath --- CSI2RX capture test results on J722S EVM with IMX219: https://gist.github.com/vaishnavachath/e2eaed62ee8f53428ee9b830aaa02cc3 drivers/dma/ti/k3-udma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index b3f27b3f9209..4130f50979d4 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -4340,6 +4340,8 @@ static struct udma_match_data j721e_mcu_data = { static struct udma_soc_data am62a_dmss_csi_soc_data = { .oes = { + .bcdma_tchan_data = 0x800, + .bcdma_tchan_ring = 0xa00, .bcdma_rchan_data = 0xe00, .bcdma_rchan_ring = 0x1000, },