From patchwork Mon Nov 25 09:21:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 13884637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A4DBD3B7F5 for ; Mon, 25 Nov 2024 09:32:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=eTCiIjP5WUtVlfWdpGLS44Qm+WOjxHYUNSodUPricsE=; b=bSvzRPaLxfjkMjjzoooOkFwDWt MyjuTVlxMfMyCSYKISiFHe/7CMwZocDLw5gYlEkE5bu/wRkXkQmBuvz1oDp5oEgrmw18aN0jziU5D cZz7uHntmgcznITG/dofI22znthtAskQJllJU3iwWb0Tn9qZ4OIyd/Qi1QW+WR4pH5tqiNJPmCsOw xWlzqf37SrHCYHt5kyms2LzX5we15GVumP0X77f/cqmeec8gnfcPDldKF9KbXa58Kd/RisWXsLE3M A/aUC6fwVkwOflG7IsPyQUQiBa7HqvRNnAhGx/lcv2NCRdRGk4b4W0g6OB/IMO15UXH7YZALPF6ac MbovJf2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tFVSF-00000007ZaS-22mU; Mon, 25 Nov 2024 09:32:27 +0000 Received: from mo-csw1801.securemx.jp ([210.130.202.135] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tFVNb-00000007Yip-15Ny for linux-arm-kernel@lists.infradead.org; Mon, 25 Nov 2024 09:27:41 +0000 DKIM-Signature: v=1;a=rsa-sha256;c=relaxed/simple;d=toshiba.co.jp;h=From:To:Cc :Subject:Date:Message-Id:In-Reply-To:References:MIME-Version: Content-Transfer-Encoding;i=yuji2.ishikawa@toshiba.co.jp;s=key2.smx;t= 1732526832;x=1733736432;bh=s2QBTYvjALWbK/9t34XSfK/DRgxA5dhcbwCLcFUYzbo=;b=pty ofG6gvZXuTXmZGloaGRHFDN5vnjmOEroyjENtiofn8xO4VTjp1TLme5RC2i6D8x3XF0t0m8T9w7Ax eObOVKuKAH7pi/SsJ7ANV+MV6BWFBqbouVlZj4HaG8jW+vh1YfDx9t1jImAXui5x6rX/G28eqTtRy 5ez1eumDiY5rFvYCj/es1wcgnRSm5/M6LTcL00EIdz1d+wSL2X9qcV4TGJzIAntKwhmHyrsf6Gsx+ 9v2kYeJIQDRaI4j+xqsjjoWCbhpo3v0VKpvpXsC+SmUdq1Mr/0VCfB2Xd/96ZHRXWL1/6z7D0dLY2 gWYDXlRF9EAjG51TwXKBuivXBa19y3A==; Received: by mo-csw.securemx.jp (mx-mo-csw1801) id 4AP9RCWA2549162; Mon, 25 Nov 2024 18:27:12 +0900 X-Iguazu-Qid: 2yAb1JZRvDQIMBFaAK X-Iguazu-QSIG: v=2; s=0; t=1732526831; q=2yAb1JZRvDQIMBFaAK; m=N3BxzmwQ7zs0tp7sqbG9wCdMkvuwdICtP93CLzazhJo= Received: from imx12-a.toshiba.co.jp ([38.106.60.135]) by relay.securemx.jp (mx-mr1802) id 4AP9R9Gm4129038 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 25 Nov 2024 18:27:10 +0900 X-SA-MID: 32872668 From: Yuji Ishikawa To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Nobuhiro Iwamatsu , Yuji Ishikawa Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v12 1/8] dt-bindings: media: platform: visconti: Add Toshiba Visconti MIPI CSI-2 Receiver Date: Mon, 25 Nov 2024 18:21:39 +0900 X-TSB-HOP2: ON Message-Id: <20241125092146.1561901-2-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> References: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241125_012739_495975_0B415BA1 X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds the Device Tree binding documentation that allows to describe the MIPI CSI-2 Receiver found in Toshiba Visconti SoCs. Signed-off-by: Yuji Ishikawa Reviewed-by: Nobuhiro Iwamatsu --- Changelog v12: - Newly add bindings for CSI2RX driver .../media/toshiba,visconti5-csi2rx.yaml | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml diff --git a/Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml b/Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml new file mode 100644 index 000000000000..5488072bc82a --- /dev/null +++ b/Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/toshiba,visconti5-csi2rx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti5 SoC MIPI CSI-2 receiver + +maintainers: + - Nobuhiro Iwamatsu + +description: |- + Toshiba Visconti5 SoC MIPI CSI-2 receiver device receives MIPI CSI-2 video + stream. Use with VIIF device. T.B.D + +properties: + compatible: + const: toshiba,visconti5-csi2rx + + reg: + items: + - description: Registers for CSI2 receiver control + + interrupts: + items: + - description: CSI2 Receiver Interrupt + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port node, single endpoint describing the CSI-2 transmitter. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + description: CSI2 receiver supports 1, 2, 3 or 4 data lanes + minItems: 1 + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + required: + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Output port node, single endpoint describing the Visconti VIIF. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + csi2rx@1c008000 { + compatible = "toshiba,visconti5-csi2rx"; + reg = <0 0x1c008000 0 0x400>; + interrupts = ; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + csi2rx_in0: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&imx219_out0>; + }; + }; + port@1 { + reg = <1>; + csi2rx_out0: endpoint { + remote-endpoint = <&csi_in0>; + }; + }; + }; + }; + }; From patchwork Mon Nov 25 09:21:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 13884634 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F884D3B7F6 for ; Mon, 25 Nov 2024 09:29:48 +0000 (UTC) DKIM-Signature: v=1; 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Mon, 25 Nov 2024 18:27:10 +0900 X-SA-MID: 32872672 From: Yuji Ishikawa To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Nobuhiro Iwamatsu , Yuji Ishikawa Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v12 2/8] dt-bindings: media: platform: visconti: Add Toshiba Visconti Video Input Interface Date: Mon, 25 Nov 2024 18:21:40 +0900 X-TSB-HOP2: ON Message-Id: <20241125092146.1561901-3-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> References: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241125_012737_315569_9F737616 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds the Device Tree binding documentation that allows to describe the Video Input Interface found in Toshiba Visconti SoCs. Signed-off-by: Yuji Ishikawa Reviewed-by: Nobuhiro Iwamatsu --- Changelog v2: - no change Changelog v3: - no change Changelog v4: - fix style problems at the v3 patch - remove "index" member - update example Changelog v5: - no change Changelog v6: - add register definition of BUS-IF and MPU Changelog v7: - remove trailing "bindings" from commit header message - remove trailing "Device Tree Bindings" from title - fix text wrapping of description - change compatible to visconti5-viif - explicitly define allowed properties for port::endpoint Changelog v8: - Suggestion from Krzysztof Kozlowski - rename bindings description file - use block style array instead of inline style - remove clock-lane (as it is fixed at position 0) - update sample node's name - use lowercase hex for literals - Suggestion from Laurent Pinchart - update description message port::description - remove port::endpoint::bus-type as it is fixed to <4> - remove port::endpoint::clock-lanes from example - add port::endpoint::data-lanes to required parameters list - fix sequence of data-lanes: <1 2 3 4> because current driver does not support data reordering - update port::endpoint::data-lanes::description - remove redundant type definition for port::endpoint::data-lanes Changelog v9: - place "required" after "properties" - dictionary ordering of properties Changelog v10: - no change Changelog v11: - no change Changelog v12: - remove property "clock-noncontinuous" as VIIF switches both modes automatically - remove property "link-frequencies" as VIIF does not use the information - remove reg[2] and interrupts[3] which are used for CSI2RX driver - update example to refer csi2rx for remote-endpoint .../media/toshiba,visconti5-viif.yaml | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/toshiba,visconti5-viif.yaml diff --git a/Documentation/devicetree/bindings/media/toshiba,visconti5-viif.yaml b/Documentation/devicetree/bindings/media/toshiba,visconti5-viif.yaml new file mode 100644 index 000000000000..ef0452a47e98 --- /dev/null +++ b/Documentation/devicetree/bindings/media/toshiba,visconti5-viif.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/toshiba,visconti5-viif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti5 SoC Video Input Interface + +maintainers: + - Nobuhiro Iwamatsu + +description: |- + Toshiba Visconti5 SoC Video Input Interface (VIIF) receives videostream + from MIPI CSI-2 receiver device, processes the stream with image signal + processors (L1ISP, L2ISP), then stores pictures to main memory. + +properties: + compatible: + const: toshiba,visconti5-viif + + reg: + items: + - description: Registers for capture control + - description: Registers for bus interface unit control + - description: Registers for Memory Protection Unit + + interrupts: + items: + - description: Sync Interrupt + - description: Status (Error) Interrupt + - description: L1ISP Interrupt + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI-2 input port, with a single endpoint connected to the CSI-2 transmitter. + + properties: + endpoint: + $ref: video-interfaces.yaml# + additionalProperties: false + + properties: + data-lanes: + description: VIIF supports 1, 2, 3 or 4 data lanes + minItems: 1 + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + remote-endpoint: true + + required: + - data-lanes + - remote-endpoint + +required: + - compatible + - reg + - interrupts + - port + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + video@1c000000 { + compatible = "toshiba,visconti5-viif"; + reg = <0 0x1c000000 0 0x6000>, + <0 0x1c00e000 0 0x1000>, + <0 0x2417a000 0 0x1000>; + interrupts = , + , + ; + + port { + #address-cells = <1>; + #size-cells = <0>; + + csi_in0: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&csi2rx_out0>; + }; + }; + }; + }; From patchwork Mon Nov 25 09:21:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 13884636 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A19C4D3B7F7 for ; Mon, 25 Nov 2024 09:31:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; 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Mon, 25 Nov 2024 18:27:12 +0900 X-SA-MID: 35004178 From: Yuji Ishikawa To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Nobuhiro Iwamatsu , Yuji Ishikawa Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v12 3/8] media: uapi: add visconti viif meta buffer format Date: Mon, 25 Nov 2024 18:21:41 +0900 X-TSB-HOP2: ON Message-Id: <20241125092146.1561901-4-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> References: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241125_012737_987287_D90366BE X-CRM114-Status: GOOD ( 10.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds the Toshiba Visconti VIIF specific metadata format - V4L2_META_FMT_VISCONTI_VIIF_PARAMS for ISP parameters - V4L2_META_FMT_VISCONTI_VIIF_STATS for ISP statistics Signed-off-by: Yuji Ishikawa --- Changelog v10: - add entry for V4L2_META_FMT_VISCONTI_VIIF_PARAMS - add entry for V4L2_META_FMT_VISCONTI_VIIF_STATS Changelog v11: - no change Changelog v12: - add description for meta formats at v4l2-ioctl.c drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++ include/uapi/linux/videodev2.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 0304daa8471d..f7facb63b8ea 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1470,6 +1470,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_META_FMT_RPI_BE_CFG: descr = "RPi PiSP BE Config format"; break; case V4L2_META_FMT_RPI_FE_CFG: descr = "RPi PiSP FE Config format"; break; case V4L2_META_FMT_RPI_FE_STATS: descr = "RPi PiSP FE Statistics format"; break; + case V4L2_META_FMT_VISCONTI_VIIF_PARAMS: descr = "Visconti ISP Parameters"; break; + case V4L2_META_FMT_VISCONTI_VIIF_STATS: descr = "Visconti ISP Statistics"; break; case V4L2_META_FMT_GENERIC_8: descr = "8-bit Generic Metadata"; break; case V4L2_META_FMT_GENERIC_CSI2_10: descr = "8-bit Generic Meta, 10b CSI-2"; break; case V4L2_META_FMT_GENERIC_CSI2_12: descr = "8-bit Generic Meta, 12b CSI-2"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index a5418759e2ba..9e1f66fdf038 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -863,6 +863,10 @@ struct v4l2_pix_format { #define V4L2_META_FMT_RPI_FE_CFG v4l2_fourcc('R', 'P', 'F', 'C') /* PiSP FE configuration */ #define V4L2_META_FMT_RPI_FE_STATS v4l2_fourcc('R', 'P', 'F', 'S') /* PiSP FE stats */ +/* Vendor specific - used for Visconti VIIF sub-system */ +#define V4L2_META_FMT_VISCONTI_VIIF_PARAMS v4l2_fourcc('V', 'I', 'F', 'P') /* ISP Params */ +#define V4L2_META_FMT_VISCONTI_VIIF_STATS v4l2_fourcc('V', 'I', 'F', 'S') /* ISP Stats */ + #ifdef __KERNEL__ /* * Line-based metadata formats. Remember to update v4l_fill_fmtdesc() when From patchwork Mon Nov 25 09:21:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 13884680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A204D3B7F5 for ; Mon, 25 Nov 2024 09:34:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Xt7lxWobtYtfeD0AtPJILQ1+/TOjOFN0s7q1AshPOao=; b=xXALY9IKmTVhsuXdQikBszxkK3 oC5lJn9Wi0hpxV40Y/MTI0NcVVcHW0Lsg1BbK0XjK4P405253xtHrElcYlmJdkVSnf1/N2R7t9i/T M0bkiLsEFocj3PT3EdorEYX4crUbiWq7ZTmJ+BnColgrONctw85yK9i+bEoQjUzJncF5gElTt8fyi j66ASWOfKBPbG0LDOcdx0zJpFOTLFjl9iydECrn7AC4KtcfOQujBbXiKP5zkZSAnqTF8YEbEswRza fNTs6dgZBPzFLxd7DOklTTPzkHoYvl0s+JRamGG7YBpGzo65BrmhatL/VKjyfh88rls7Aais6OBye JKhAdqzQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tFVU6-00000007a9E-3JOv; Mon, 25 Nov 2024 09:34:22 +0000 Received: from mo-csw1121.securemx.jp ([210.130.202.132] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tFVNf-00000007Ymg-0IBy for linux-arm-kernel@lists.infradead.org; Mon, 25 Nov 2024 09:27:44 +0000 DKIM-Signature: v=1;a=rsa-sha256;c=relaxed/simple;d=toshiba.co.jp;h=From:To:Cc :Subject:Date:Message-Id:In-Reply-To:References:MIME-Version: Content-Transfer-Encoding;i=yuji2.ishikawa@toshiba.co.jp;s=key2.smx;t= 1732526839;x=1733736439;bh=uZL+oCJiQQb+B0av6XL1UsHZSXfCpI5C0+fq7+c/Cd4=;b=hOo I40JOjmNHvy1ck871ImK9+MJr43G0d17imXZY9FraHtYGpTsrNd+EwZ9kTl4UQ4OA+hnx4n7yAbBm OpACrxaSDdFPJVeL6DnvmoYQkZD2UWaC5QXHe3f6RrTJsqug1FT/1cilkKiadV8geu+FQTJioBeCr vA5/6UczKjTvHI42ye4uosy7mPHQWyo7Pin/TlO2yWFURuir5Oh/EvQCaIliiK4dyNrAI2g1xVpHU MbBQ8UG8VMJr+e4NnetO12Wo+AHh1b7wqDzcRWzYPQ5iP1UCNeeagoeqMNywwlrPjgyBAJdn99CkP ikWBiab0u+E5yOc9rVuzLssaGr2ElCQ==; Received: by mo-csw.securemx.jp (mx-mo-csw1121) id 4AP9RHpW099343; Mon, 25 Nov 2024 18:27:18 +0900 X-Iguazu-Qid: 2rWgFNitjKYKO6hMyT X-Iguazu-QSIG: v=2; s=0; t=1732526837; q=2rWgFNitjKYKO6hMyT; m=TZXSZwOc5QcMMvGbsQzManldV9UpbFjv5/MHVnIvXaU= Received: from imx12-a.toshiba.co.jp ([38.106.60.135]) by relay.securemx.jp (mx-mr1123) id 4AP9RE95108739 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 25 Nov 2024 18:27:15 +0900 X-SA-MID: 32872675 From: Yuji Ishikawa To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Nobuhiro Iwamatsu , Yuji Ishikawa Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v12 4/8] media: platform: visconti: Add Toshiba Visconti CSI-2 Receiver driver Date: Mon, 25 Nov 2024 18:21:42 +0900 X-TSB-HOP2: ON Message-Id: <20241125092146.1561901-5-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> References: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241125_012743_356618_3F7D3036 X-CRM114-Status: GOOD ( 24.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support to MIPI CSI-2 Receiver on Toshiba Visconti ARM SoCs. This driver is used with Visconti Video Input Interface driver. Signed-off-by: Yuji Ishikawa --- Changelog v12: - Separate CSI2RX driver and made it independent driver - viif_csi2rx subdevice driver (in v11 patch) was removed. - dictionary order at Kconfig and Makefile drivers/media/platform/Kconfig | 1 + drivers/media/platform/Makefile | 1 + drivers/media/platform/toshiba/Kconfig | 6 + drivers/media/platform/toshiba/Makefile | 2 + .../media/platform/toshiba/visconti/Kconfig | 16 + .../media/platform/toshiba/visconti/Makefile | 8 + .../platform/toshiba/visconti/csi2rx_drv.c | 791 ++++++++++++++++++ 7 files changed, 825 insertions(+) create mode 100644 drivers/media/platform/toshiba/Kconfig create mode 100644 drivers/media/platform/toshiba/Makefile create mode 100644 drivers/media/platform/toshiba/visconti/Kconfig create mode 100644 drivers/media/platform/toshiba/visconti/Makefile create mode 100644 drivers/media/platform/toshiba/visconti/csi2rx_drv.c diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 85d2627776b6..761b15b07b90 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -86,6 +86,7 @@ source "drivers/media/platform/samsung/Kconfig" source "drivers/media/platform/st/Kconfig" source "drivers/media/platform/sunxi/Kconfig" source "drivers/media/platform/ti/Kconfig" +source "drivers/media/platform/toshiba/Kconfig" source "drivers/media/platform/verisilicon/Kconfig" source "drivers/media/platform/via/Kconfig" source "drivers/media/platform/xilinx/Kconfig" diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index ace4e34483dd..917145fe5171 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -29,6 +29,7 @@ obj-y += samsung/ obj-y += st/ obj-y += sunxi/ obj-y += ti/ +obj-y += toshiba/ obj-y += verisilicon/ obj-y += via/ obj-y += xilinx/ diff --git a/drivers/media/platform/toshiba/Kconfig b/drivers/media/platform/toshiba/Kconfig new file mode 100644 index 000000000000..f02983f4fc97 --- /dev/null +++ b/drivers/media/platform/toshiba/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +comment "Toshiba media platform drivers" + +source "drivers/media/platform/toshiba/visconti/Kconfig" + diff --git a/drivers/media/platform/toshiba/Makefile b/drivers/media/platform/toshiba/Makefile new file mode 100644 index 000000000000..2bce85ef3b48 --- /dev/null +++ b/drivers/media/platform/toshiba/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += visconti/ diff --git a/drivers/media/platform/toshiba/visconti/Kconfig b/drivers/media/platform/toshiba/visconti/Kconfig new file mode 100644 index 000000000000..e5c92d598f8b --- /dev/null +++ b/drivers/media/platform/toshiba/visconti/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +config VIDEO_VISCONTI_CSI2RX + tristate "Visconti MIPI CSI-2 Receiver driver" + depends on V4L_PLATFORM_DRIVERS + depends on VIDEO_DEV && OF + depends on ARCH_VISCONTI || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API + select V4L2_FWNODE + help + Support for Toshiba Visconti MIPI CSI-2 receiver, + which is used with Visconti Camera Interface driver. + + This driver yields 1 subdevice node for a hardware instance. + To compile this driver as a module, choose M here: the + module will be called visconti-csi2rx. diff --git a/drivers/media/platform/toshiba/visconti/Makefile b/drivers/media/platform/toshiba/visconti/Makefile new file mode 100644 index 000000000000..62a029376134 --- /dev/null +++ b/drivers/media/platform/toshiba/visconti/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the Visconti video input device driver +# + +visconti-csi2rx-objs = csi2rx_drv.o + +obj-$(CONFIG_VIDEO_VISCONTI_CSI2RX) += visconti-csi2rx.o diff --git a/drivers/media/platform/toshiba/visconti/csi2rx_drv.c b/drivers/media/platform/toshiba/visconti/csi2rx_drv.c new file mode 100644 index 000000000000..94567963872a --- /dev/null +++ b/drivers/media/platform/toshiba/visconti/csi2rx_drv.c @@ -0,0 +1,791 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +/* Toshiba Visconti Video Capture Support + * + * (C) Copyright 2024 TOSHIBA CORPORATION + * (C) Copyright 2024 Toshiba Electronic Devices & Storage Corporation + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* CSI2HOST register space */ +#define REG_CSI2RX_NLANES 0x4 +#define REG_CSI2RX_RESETN 0x8 +#define REG_CSI2RX_INT_ST_MAIN 0xc +#define REG_CSI2RX_DATA_IDS_1 0x10 +#define REG_CSI2RX_DATA_IDS_2 0x14 +#define REG_CSI2RX_PHY_SHUTDOWNZ 0x40 +#define REG_CSI2RX_PHY_RSTZ 0x44 + +/* access to dphy external registers */ +#define REG_CSI2RX_PHY_TESTCTRL0 0x50 +#define BIT_TESTCTRL0_CLK_0 0 +#define BIT_TESTCTRL0_CLK_1 BIT(1) + +#define REG_CSI2RX_PHY_TESTCTRL1 0x54 +#define BIT_TESTCTRL1_ADDR BIT(16) +#define MASK_TESTCTRL1_DIN 0xff +#define MASK_TESTCTRL1_DOUT 0xff00 + +#define REG_CSI2RX_INT_ST_PHY_FATAL 0xe0 +#define REG_CSI2RX_INT_MSK_PHY_FATAL 0xe4 +#define MASK_PHY_FATAL_ALL 0x0000000f + +#define REG_CSI2RX_INT_ST_PKT_FATAL 0xf0 +#define REG_CSI2RX_INT_MSK_PKT_FATAL 0xf4 +#define MASK_PKT_FATAL_ALL 0x0001000f + +#define REG_CSI2RX_INT_ST_FRAME_FATAL 0x100 +#define REG_CSI2RX_INT_MSK_FRAME_FATAL 0x104 +#define MASK_FRAME_FATAL_ALL 0x000f0f0f + +#define REG_CSI2RX_INT_ST_PHY 0x110 +#define REG_CSI2RX_INT_MSK_PHY 0x114 +#define MASK_PHY_ERROR_ALL 0x000f000f + +#define REG_CSI2RX_INT_ST_PKT 0x120 +#define REG_CSI2RX_INT_MSK_PKT 0x124 +#define MASK_PKT_ERROR_ALL 0x000f000f + +#define REG_CSI2RX_INT_ST_LINE 0x130 +#define REG_CSI2RX_INT_MSK_LINE 0x134 +#define MASK_LINE_ERROR_ALL 0x00ff00ff + +/* DPHY register space */ +enum dphy_testcode { + DIG_TESTCODE_EXT = 0, + DIG_SYS_0 = 0x001, + DIG_SYS_1 = 0x002, + DIG_SYS_3 = 0x004, + DIG_SYS_7 = 0x008, + DIG_RX_STARTUP_OVR_2 = 0x0e2, + DIG_RX_STARTUP_OVR_3 = 0x0e3, + DIG_RX_STARTUP_OVR_4 = 0x0e4, + DIG_RX_STARTUP_OVR_5 = 0x0e5, + DIG_CB_2 = 0x1ac, + DIG_TERM_CAL_0 = 0x220, + DIG_TERM_CAL_1 = 0x221, + DIG_TERM_CAL_2 = 0x222, + DIG_CLKLANE_LANE_6 = 0x307, + DIG_CLKLANE_OFFSET_CAL_0 = 0x39d, + DIG_LANE0_OFFSET_CAL_0 = 0x59f, + DIG_LANE0_DDL_0 = 0x5e0, + DIG_LANE1_OFFSET_CAL_0 = 0x79f, + DIG_LANE1_DDL_0 = 0x7e0, + DIG_LANE2_OFFSET_CAL_0 = 0x99f, + DIG_LANE2_DDL_0 = 0x9e0, + DIG_LANE3_OFFSET_CAL_0 = 0xb9f, + DIG_LANE3_DDL_0 = 0xbe0, +}; + +#define SYS_0_HSFREQRANGE_OVR BIT(5) +#define SYS_3_NO_REXT BIT(4) +#define SYS_7_RESERVED FIELD_PREP(0x1f, 0x0c) +#define SYS_7_DESKEW_POL BIT(5) +#define STARTUP_OVR_4_CNTVAL FIELD_PREP(0x70, 0x01) +#define STARTUP_OVR_4_DDL_EN BIT(0) +#define STARTUP_OVR_5_BYPASS BIT(0) +#define CB_2_LPRX_BIAS BIT(6) +#define CB_2_RESERVED FIELD_PREP(0x3f, 0x0b) +#define CLKLANE_RXHS_PULL_LONG BIT(7) + +/* bit mask for calibration result registers */ +#define MASK_TERM_CAL_ERR 0 +#define MASK_TERM_CAL_DONE BIT(7) +#define MASK_CLK_CAL_ERR BIT(4) +#define MASK_CLK_CAL_DONE BIT(0) +#define MASK_CAL_ERR BIT(2) +#define MASK_CAL_DONE BIT(1) +#define MASK_DDL_ERR BIT(1) +#define MASK_DDL_DONE BIT(2) + +#define VISCONTI_CSI2RX_ERROR_MONITORS_NUM 8 + +/** + * struct visconti_csi2rx_line_err_target + * + * Virtual Channel and Data Type pair for CSI2RX line error monitor + * + * When 0 is set to dt, line error detection is disabled. + * + * @vc: Virtual Channel to monitor; Range 0..3 + * @dt: Data Type to monitor; Range 0, 0x10..0x3f + */ +struct visconti_csi2rx_line_err_target { + u32 vc[VISCONTI_CSI2RX_ERROR_MONITORS_NUM]; + u32 dt[VISCONTI_CSI2RX_ERROR_MONITORS_NUM]; +}; + +#define CSI2RX_MIN_DATA_RATE 80U +#define CSI2RX_MAX_DATA_RATE 1500U + +#define VISCONTI_CSI2RX_PAD_SINK 0 +#define VISCONTI_CSI2RX_PAD_SRC 1 +#define VISCONTI_CSI2RX_PAD_NUM 2 + +#define VISCONTI_CSI2RX_DEF_WIDTH 1920 +#define VISCONTI_CSI2RX_DEF_HEIGHT 1080 +#define VISCONTI_CSI2RX_MIN_WIDTH 640 +#define VISCONTI_CSI2RX_MAX_WIDTH 3840 +#define VISCONTI_CSI2RX_MIN_HEIGHT 480 +#define VISCONTI_CSI2RX_MAX_HEIGHT 2160 + +struct visconti_csi2rx { + struct device *dev; + void __iomem *base; + + struct v4l2_subdev subdev; + struct media_pad pads[VISCONTI_CSI2RX_PAD_NUM]; + struct v4l2_async_notifier notifier; + struct v4l2_subdev *remote; + unsigned int remote_pad; + + unsigned int lanes; + + unsigned int irq; +}; + +static inline struct visconti_csi2rx *notifier_to_csi2(struct v4l2_async_notifier *n) +{ + return container_of(n, struct visconti_csi2rx, notifier); +} + +static inline struct visconti_csi2rx *sd_to_csi2(struct v4l2_subdev *sd) +{ + return container_of(sd, struct visconti_csi2rx, subdev); +} + +static inline void visconti_csi2rx_write(struct visconti_csi2rx *priv, u32 regid, u32 val) +{ + writel(val, priv->base + regid); +} + +static inline u32 visconti_csi2rx_read(struct visconti_csi2rx *priv, u32 regid) +{ + return readl(priv->base + regid); +} + +static inline void tick_testclk(struct visconti_csi2rx *priv) +{ + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL0, BIT_TESTCTRL0_CLK_1); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL0, BIT_TESTCTRL0_CLK_0); +} + +static inline void set_dphy_addr(struct visconti_csi2rx *priv, u32 test_mode) +{ + /* select testcode Ex space with top 4bits of test_mode */ + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL1, + BIT_TESTCTRL1_ADDR | DIG_TESTCODE_EXT); + tick_testclk(priv); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL1, FIELD_GET(0xf00, test_mode)); + tick_testclk(priv); + + /* set bottom 8bit of test_mode */ + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL1, + BIT_TESTCTRL1_ADDR | FIELD_GET(0xff, test_mode)); + tick_testclk(priv); +} + +static void write_dphy_param(struct visconti_csi2rx *priv, u32 test_mode, u8 test_in) +{ + set_dphy_addr(priv, test_mode); + + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL1, (u32)test_in); + tick_testclk(priv); +} + +struct csi2rx_dphy_hs_info { + u32 rate; + u32 hsfreqrange; + u32 osc_freq_target; +}; + +static const struct csi2rx_dphy_hs_info dphy_hs_info[] = { + { 80, 0x0, 0x1cc }, { 85, 0x10, 0x1cc }, { 95, 0x20, 0x1cc }, { 105, 0x30, 0x1cc }, + { 115, 0x1, 0x1cc }, { 125, 0x11, 0x1cc }, { 135, 0x21, 0x1cc }, { 145, 0x31, 0x1cc }, + { 155, 0x2, 0x1cc }, { 165, 0x12, 0x1cc }, { 175, 0x22, 0x1cc }, { 185, 0x32, 0x1cc }, + { 198, 0x3, 0x1cc }, { 213, 0x13, 0x1cc }, { 228, 0x23, 0x1cc }, { 243, 0x33, 0x1cc }, + { 263, 0x4, 0x1cc }, { 288, 0x14, 0x1cc }, { 313, 0x25, 0x1cc }, { 338, 0x35, 0x1cc }, + { 375, 0x5, 0x1cc }, { 425, 0x16, 0x1cc }, { 475, 0x26, 0x1cc }, { 525, 0x37, 0x1cc }, + { 575, 0x7, 0x1cc }, { 625, 0x18, 0x1cc }, { 675, 0x28, 0x1cc }, { 725, 0x39, 0x1cc }, + { 775, 0x9, 0x1cc }, { 825, 0x19, 0x1cc }, { 875, 0x29, 0x1cc }, { 925, 0x3a, 0x1cc }, + { 975, 0xa, 0x1cc }, { 1025, 0x1a, 0x1cc }, { 1075, 0x2a, 0x1cc }, { 1125, 0x3b, 0x1cc }, + { 1175, 0xb, 0x1cc }, { 1225, 0x1b, 0x1cc }, { 1275, 0x2b, 0x1cc }, { 1325, 0x3c, 0x1cc }, + { 1375, 0xc, 0x1cc }, { 1425, 0x1c, 0x1cc }, { 1475, 0x2c, 0x1cc } +}; + +static void get_dphy_hs_transfer_info(u32 dphy_rate, u32 *hsfreqrange, u32 *osc_freq_target) +{ + unsigned int i; + + for (i = 1; i < ARRAY_SIZE(dphy_hs_info); i++) { + if (dphy_rate < dphy_hs_info[i].rate) { + *hsfreqrange = dphy_hs_info[i - 1].hsfreqrange; + *osc_freq_target = dphy_hs_info[i - 1].osc_freq_target; + return; + } + } + + /* not found; return the largest entry */ + *hsfreqrange = dphy_hs_info[ARRAY_SIZE(dphy_hs_info) - 1].hsfreqrange; + *osc_freq_target = dphy_hs_info[ARRAY_SIZE(dphy_hs_info) - 1].osc_freq_target; +} + +static void visconti_csi2rx_set_dphy_rate(struct visconti_csi2rx *priv, u32 dphy_rate) +{ + u32 hsfreqrange, osc_freq_target; + + get_dphy_hs_transfer_info(dphy_rate, &hsfreqrange, &osc_freq_target); + + write_dphy_param(priv, DIG_SYS_1, (u8)hsfreqrange); + write_dphy_param(priv, DIG_SYS_0, SYS_0_HSFREQRANGE_OVR); + write_dphy_param(priv, DIG_RX_STARTUP_OVR_5, STARTUP_OVR_5_BYPASS); + write_dphy_param(priv, DIG_RX_STARTUP_OVR_4, STARTUP_OVR_4_CNTVAL); + write_dphy_param(priv, DIG_CB_2, CB_2_LPRX_BIAS | CB_2_RESERVED); + write_dphy_param(priv, DIG_SYS_7, SYS_7_DESKEW_POL | SYS_7_RESERVED); + write_dphy_param(priv, DIG_CLKLANE_LANE_6, CLKLANE_RXHS_PULL_LONG); + write_dphy_param(priv, DIG_RX_STARTUP_OVR_2, FIELD_GET(0xff, osc_freq_target)); + write_dphy_param(priv, DIG_RX_STARTUP_OVR_3, FIELD_GET(0xf00, osc_freq_target)); + write_dphy_param(priv, DIG_RX_STARTUP_OVR_4, STARTUP_OVR_4_CNTVAL | STARTUP_OVR_4_DDL_EN); +} + +static int visconti_csi2rx_initialize(struct visconti_csi2rx *priv, u32 num_lane, u32 dphy_rate, + const struct visconti_csi2rx_line_err_target *err_target) +{ + u32 val; + + if (dphy_rate < CSI2RX_MIN_DATA_RATE || dphy_rate > CSI2RX_MAX_DATA_RATE) { + dev_err(priv->dev, "Unsupported PHY speed (%u Mbps)", dphy_rate); + return -ERANGE; + } + + /* 1st phase of initialization */ + visconti_csi2rx_write(priv, REG_CSI2RX_RESETN, 1); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_RSTZ, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_SHUTDOWNZ, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL0, 1); + ndelay(15U); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL0, 0); + + /* Configure D-PHY frequency range */ + visconti_csi2rx_set_dphy_rate(priv, dphy_rate); + + /* 2nd phase of initialization */ + visconti_csi2rx_write(priv, REG_CSI2RX_NLANES, (num_lane - 1U)); + ndelay(5U); + + /* Release D-PHY from Reset */ + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_SHUTDOWNZ, 1); + ndelay(5U); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_RSTZ, 1); + + /* configuration of line error target */ + val = (err_target->vc[3] << 30U) | (err_target->dt[3] << 24U) | (err_target->vc[2] << 22U) | + (err_target->dt[2] << 16U) | (err_target->vc[1] << 14U) | (err_target->dt[1] << 8U) | + (err_target->vc[0] << 6U) | (err_target->dt[0]); + visconti_csi2rx_write(priv, REG_CSI2RX_DATA_IDS_1, val); + val = (err_target->vc[7] << 30U) | (err_target->dt[7] << 24U) | (err_target->vc[6] << 22U) | + (err_target->dt[6] << 16U) | (err_target->vc[5] << 14U) | (err_target->dt[5] << 8U) | + (err_target->vc[4] << 6U) | (err_target->dt[4]); + visconti_csi2rx_write(priv, REG_CSI2RX_DATA_IDS_2, val); + + /* configuration of mask */ + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PHY_FATAL, MASK_PHY_FATAL_ALL); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PKT_FATAL, MASK_PKT_FATAL_ALL); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_FRAME_FATAL, MASK_FRAME_FATAL_ALL); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PHY, MASK_PHY_ERROR_ALL); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PKT, MASK_PKT_ERROR_ALL); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_LINE, MASK_LINE_ERROR_ALL); + + return 0; +} + +struct visconti_csi2rx_format { + u32 code; + unsigned int bpp; +}; + +static const struct visconti_csi2rx_format visconti_csi2rx_formats[] = { + { .code = MEDIA_BUS_FMT_RGB888_1X24, .bpp = 24 }, + { .code = MEDIA_BUS_FMT_UYVY8_1X16, .bpp = 16 }, + { .code = MEDIA_BUS_FMT_UYVY10_1X20, .bpp = 20 }, + { .code = MEDIA_BUS_FMT_RGB565_1X16, .bpp = 16 }, + { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .bpp = 8 }, + { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8 }, + { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8 }, + { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8 }, + { .code = MEDIA_BUS_FMT_SBGGR10_1X10, .bpp = 10 }, + { .code = MEDIA_BUS_FMT_SGBRG10_1X10, .bpp = 10 }, + { .code = MEDIA_BUS_FMT_SGRBG10_1X10, .bpp = 10 }, + { .code = MEDIA_BUS_FMT_SRGGB10_1X10, .bpp = 10 }, + { .code = MEDIA_BUS_FMT_SBGGR12_1X12, .bpp = 12 }, + { .code = MEDIA_BUS_FMT_SGBRG12_1X12, .bpp = 12 }, + { .code = MEDIA_BUS_FMT_SGRBG12_1X12, .bpp = 12 }, + { .code = MEDIA_BUS_FMT_SRGGB12_1X12, .bpp = 12 }, + { .code = MEDIA_BUS_FMT_SBGGR14_1X14, .bpp = 14 }, + { .code = MEDIA_BUS_FMT_SGBRG14_1X14, .bpp = 14 }, + { .code = MEDIA_BUS_FMT_SGRBG14_1X14, .bpp = 14 }, + { .code = MEDIA_BUS_FMT_SRGGB14_1X14, .bpp = 14 }, +}; + +static const struct visconti_csi2rx_format *fmt_for_mbus_code(unsigned int mbus_code) +{ + int i; + + for (i = 0; ARRAY_SIZE(visconti_csi2rx_formats); i++) + if (visconti_csi2rx_formats[i].code == mbus_code) + return &visconti_csi2rx_formats[i]; +} + +static unsigned int bpp_for_mbus_code(unsigned int mbus_code) +{ + const struct visconti_csi2rx_format *fmt = fmt_for_mbus_code(mbus_code); + + return fmt ? fmt->bpp : 0; +} + +static int64_t get_pixelclock(struct v4l2_subdev *sd) +{ + struct v4l2_ctrl *ctrl; + + ctrl = v4l2_ctrl_find(sd->ctrl_handler, V4L2_CID_PIXEL_RATE); + if (!ctrl) + return -EINVAL; + + return v4l2_ctrl_g_ctrl_int64(ctrl); +} + +static const struct visconti_csi2rx_line_err_target err_target_vc0_alldt = { + /* select VC=0 */ + /* select all supported DataTypes */ + .dt = { + MIPI_CSI2_DT_RGB565, + MIPI_CSI2_DT_YUV422_8B, + MIPI_CSI2_DT_YUV422_10B, + MIPI_CSI2_DT_RGB888, + MIPI_CSI2_DT_RAW8, + MIPI_CSI2_DT_RAW10, + MIPI_CSI2_DT_RAW12, + MIPI_CSI2_DT_RAW14, + } +}; + +static int visconti_csi2rx_start(struct visconti_csi2rx *priv, struct v4l2_subdev_state *state) +{ + struct v4l2_mbus_framefmt *sink_fmt; + int cur_bpp, dphy_rate; + s64 pixelclock; + + /* get bpp for current format */ + sink_fmt = v4l2_subdev_state_get_format(state, VISCONTI_CSI2RX_PAD_SINK); + cur_bpp = bpp_for_mbus_code(sink_fmt->code); + + /* get pixel clock */ + pixelclock = get_pixelclock(priv->remote); + if (pixelclock < 0) + return -EINVAL; + + dphy_rate = div64_u64((u64)pixelclock * (u32)cur_bpp, priv->lanes * 1000000); + + ndelay(15U); + + return visconti_csi2rx_initialize(priv, priv->lanes, dphy_rate, &err_target_vc0_alldt); +} + +static void visconti_csi2rx_stop(struct visconti_csi2rx *priv) +{ + /* disable interrupt -> make sure registers cleared -> wait for current handlers finish */ + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PHY_FATAL, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PKT_FATAL, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_FRAME_FATAL, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PHY, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_PKT, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_INT_MSK_LINE, 0); + visconti_csi2rx_read(priv, REG_CSI2RX_INT_MSK_PHY_FATAL); + visconti_csi2rx_read(priv, REG_CSI2RX_INT_MSK_PKT_FATAL); + visconti_csi2rx_read(priv, REG_CSI2RX_INT_MSK_FRAME_FATAL); + visconti_csi2rx_read(priv, REG_CSI2RX_INT_MSK_PHY); + visconti_csi2rx_read(priv, REG_CSI2RX_INT_MSK_PKT); + visconti_csi2rx_read(priv, REG_CSI2RX_INT_MSK_LINE); + synchronize_irq(priv->irq); + + /* shutdown hardware */ + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_SHUTDOWNZ, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_RSTZ, 0); + visconti_csi2rx_write(priv, REG_CSI2RX_PHY_TESTCTRL0, 1); + visconti_csi2rx_write(priv, REG_CSI2RX_RESETN, 0); +} + +static int visconti_csi2rx_enable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) +{ + struct visconti_csi2rx *priv = sd_to_csi2(sd); + struct v4l2_subdev *remote_sd; + struct media_pad *remote_pad; + int ret; + + remote_pad = media_pad_remote_pad_first(&sd->entity.pads[VISCONTI_CSI2RX_PAD_SINK]); + if (!remote_pad) + return -ENODEV; + remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); + + /* enabling: turn on CSI2RX -> turn on sensor */ + ret = visconti_csi2rx_start(priv, state); + if (ret) + return ret; + + /* currently CSI2RX supports only stream0 in source pad */ + ret = v4l2_subdev_enable_streams(remote_sd, remote_pad->index, BIT(0)); + if (ret) { + visconti_csi2rx_stop(priv); + return ret; + } + + return 0; +} + +static int visconti_csi2rx_disable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) +{ + struct visconti_csi2rx *priv = sd_to_csi2(sd); + struct v4l2_subdev *remote_sd; + struct media_pad *remote_pad; + + remote_pad = media_pad_remote_pad_first(&sd->entity.pads[VISCONTI_CSI2RX_PAD_SINK]); + if (!remote_pad) + return -ENODEV; + remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); + + /* disabling: turn off sensor -> turn off CSI2RX */ + v4l2_subdev_disable_streams(remote_sd, remote_pad->index, BIT(0)); + visconti_csi2rx_stop(priv); + + return 0; +} + +static int visconti_csi2rx_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->pad == VISCONTI_CSI2RX_PAD_SRC) { + const struct v4l2_mbus_framefmt *sink_fmt; + + /* SRC pad supports exactly the same format as SINK pad */ + if (code->index) + return -EINVAL; + sink_fmt = v4l2_subdev_state_get_format(sd_state, VISCONTI_CSI2RX_PAD_SINK); + code->code = sink_fmt->code; + return 0; + } + + if (code->index >= ARRAY_SIZE(visconti_csi2rx_formats)) + return -EINVAL; + code->code = visconti_csi2rx_formats[code->index].code; + + return 0; +} + +static int visconti_csi2rx_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state) +{ + struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; + + sink_fmt = v4l2_subdev_state_get_format(sd_state, VISCONTI_CSI2RX_PAD_SINK); + src_fmt = v4l2_subdev_state_get_format(sd_state, VISCONTI_CSI2RX_PAD_SRC); + + sink_fmt->width = VISCONTI_CSI2RX_DEF_WIDTH; + sink_fmt->height = VISCONTI_CSI2RX_DEF_HEIGHT; + sink_fmt->field = V4L2_FIELD_NONE; + sink_fmt->code = visconti_csi2rx_formats[0].code; + + *src_fmt = *sink_fmt; + + return 0; +} + +static int visconti_csi2rx_set_pad_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *fmt) +{ + struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; + + /* SRC PAD has the same format as SINK PAD */ + if (fmt->pad == 1) + return v4l2_subdev_get_fmt(sd, sd_state, fmt); + + sink_fmt = v4l2_subdev_state_get_format(sd_state, VISCONTI_CSI2RX_PAD_SINK); + + *sink_fmt = fmt->format; + sink_fmt->width = clamp_t(u32, fmt->format.width, VISCONTI_CSI2RX_MIN_WIDTH, + VISCONTI_CSI2RX_MAX_WIDTH); + sink_fmt->height = clamp_t(u32, fmt->format.height, VISCONTI_CSI2RX_MIN_HEIGHT, + VISCONTI_CSI2RX_MAX_HEIGHT); + if (!fmt_for_mbus_code(sink_fmt->code)) + sink_fmt->code = visconti_csi2rx_formats[0].code; + fmt->format = *sink_fmt; + + /* source pad should have the same format */ + src_fmt = v4l2_subdev_state_get_format(sd_state, VISCONTI_CSI2RX_PAD_SRC); + *src_fmt = *sink_fmt; + + return 0; +} + +static const struct media_entity_operations visconti_csi2rx_entity_ops = { + .link_validate = v4l2_subdev_link_validate, +}; + +static const struct v4l2_subdev_video_ops visconti_csi2rx_video_ops = { + .s_stream = v4l2_subdev_s_stream_helper, +}; + +static const struct v4l2_subdev_pad_ops visconti_csi2rx_pad_ops = { + .enum_mbus_code = visconti_csi2rx_enum_mbus_code, + .disable_streams = visconti_csi2rx_disable_streams, + .enable_streams = visconti_csi2rx_enable_streams, + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = visconti_csi2rx_set_pad_format, +}; + +static const struct v4l2_subdev_ops visconti_csi2rx_subdev_ops = { + .video = &visconti_csi2rx_video_ops, + .pad = &visconti_csi2rx_pad_ops, +}; + +static const struct v4l2_subdev_internal_ops visconti_csi2rx_internal_ops = { + .init_state = visconti_csi2rx_init_state, +}; + +static int visconti_csi2rx_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *subdev, + struct v4l2_async_connection *asc) +{ + struct visconti_csi2rx *priv = notifier_to_csi2(notifier); + int pad; + + pad = media_entity_get_fwnode_pad(&subdev->entity, asc->match.fwnode, MEDIA_PAD_FL_SOURCE); + if (pad < 0) { + dev_err(priv->dev, "Failed to find pad for %s\n", subdev->name); + return pad; + } + + priv->remote = subdev; + priv->remote_pad = pad; + + return media_create_pad_link(&subdev->entity, pad, &priv->subdev.entity, 0, + MEDIA_LNK_FL_ENABLED); +} + +static void visconti_csi2rx_notify_unbind(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *subdev, + struct v4l2_async_connection *asc) +{ + struct visconti_csi2rx *priv = notifier_to_csi2(notifier); + + priv->remote = NULL; +} + +static const struct v4l2_async_notifier_operations visconti_csi2rx_notify_ops = { + .bound = visconti_csi2rx_notify_bound, + .unbind = visconti_csi2rx_notify_unbind, +}; + +static int visconti_csi2rx_parse_v4l2(struct visconti_csi2rx *priv, + struct v4l2_fwnode_endpoint *vep) +{ + /* Only port 0 endpoint 0 is valid. */ + if (vep->base.port || vep->base.id) + return -ENOTCONN; + + priv->lanes = vep->bus.mipi_csi2.num_data_lanes; + + /* got trouble */ + if (vep->bus_type != V4L2_MBUS_CSI2_DPHY) { + dev_err(priv->dev, "Specified bus type is not supported\n"); + return -EINVAL; + } + + if (priv->lanes != 1 && priv->lanes != 2 && priv->lanes != 4) { + dev_err(priv->dev, "Unsupported number of data-lanes for D-PHY: %u\n", priv->lanes); + return -EINVAL; + } + + return 0; +} + +static int visconti_csi2rx_parse_dt(struct visconti_csi2rx *priv) +{ + struct v4l2_async_connection *asc; + struct fwnode_handle *fwnode; + struct fwnode_handle *ep; + struct v4l2_fwnode_endpoint v4l2_ep = { + .bus_type = V4L2_MBUS_UNKNOWN, + }; + int ret; + + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(priv->dev), 0, 0, 0); + if (!ep) { + dev_err(priv->dev, "Not connected to subdevice\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_parse(ep, &v4l2_ep); + if (ret) { + dev_err(priv->dev, "Could not parse v4l2 endpoint\n"); + fwnode_handle_put(ep); + return -EINVAL; + } + + ret = visconti_csi2rx_parse_v4l2(priv, &v4l2_ep); + if (ret) { + fwnode_handle_put(ep); + return ret; + } + + fwnode = fwnode_graph_get_remote_endpoint(ep); + fwnode_handle_put(ep); + + v4l2_async_subdev_nf_init(&priv->notifier, &priv->subdev); + priv->notifier.ops = &visconti_csi2rx_notify_ops; + + asc = v4l2_async_nf_add_fwnode(&priv->notifier, fwnode, struct v4l2_async_connection); + fwnode_handle_put(fwnode); + if (IS_ERR(asc)) + return PTR_ERR(asc); + + ret = v4l2_async_nf_register(&priv->notifier); + if (ret) + v4l2_async_nf_cleanup(&priv->notifier); + + return ret; +} + +static irqreturn_t visconti_csi2rx_irq(int irq, void *dev_id) +{ + struct visconti_csi2rx *priv = dev_id; + u32 event; + + event = visconti_csi2rx_read(priv, REG_CSI2RX_INT_ST_MAIN); + dev_err(priv->dev, "CSI2RX error 0x%x.\n", event); + + return IRQ_HANDLED; +} + +static const struct of_device_id visconti_csi2rx_of_table[] = { + { + .compatible = "toshiba,visconti5-csi2rx", + }, + {}, +}; + +static int visconti_csi2rx_probe(struct platform_device *pdev) +{ + struct visconti_csi2rx *priv; + int irq, ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) { + dev_err(priv->dev, "Failed to get registers\n"); + return PTR_ERR(priv->base); + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + ret = devm_request_irq(&pdev->dev, irq, visconti_csi2rx_irq, 0, KBUILD_MODNAME, priv); + priv->irq = irq; + if (ret) { + dev_err(priv->dev, "request irq failed: %d\n", ret); + return ret; + } + + platform_set_drvdata(pdev, priv); + + ret = visconti_csi2rx_parse_dt(priv); /*this function does v4l2_async_nf_register */ + if (ret) + return ret; + + priv->subdev.owner = THIS_MODULE; + priv->subdev.dev = &pdev->dev; + v4l2_subdev_init(&priv->subdev, &visconti_csi2rx_subdev_ops); + v4l2_set_subdevdata(&priv->subdev, &pdev->dev); + snprintf(priv->subdev.name, sizeof(priv->subdev.name), "%s %s", KBUILD_MODNAME, + dev_name(&pdev->dev)); + + priv->subdev.internal_ops = &visconti_csi2rx_internal_ops; + priv->subdev.flags = V4L2_SUBDEV_FL_HAS_DEVNODE; + priv->subdev.entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER; + priv->subdev.entity.ops = &visconti_csi2rx_entity_ops; + + priv->pads[VISCONTI_CSI2RX_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + priv->pads[VISCONTI_CSI2RX_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE; + + ret = media_entity_pads_init(&priv->subdev.entity, VISCONTI_CSI2RX_PAD_NUM, priv->pads); + if (ret) + goto err_cleanup_async; + + ret = v4l2_subdev_init_finalize(&priv->subdev); + if (ret) + goto err_cleanup_media_entity; + + ret = v4l2_async_register_subdev(&priv->subdev); + if (ret < 0) + goto err_cleanup_subdev_state; + + return 0; + +err_cleanup_subdev_state: + v4l2_subdev_cleanup(&priv->subdev); + +err_cleanup_media_entity: + media_entity_cleanup(&priv->subdev.entity); + +err_cleanup_async: + v4l2_async_nf_unregister(&priv->notifier); + v4l2_async_nf_cleanup(&priv->notifier); + + return ret; +} + +static void visconti_csi2rx_remove(struct platform_device *pdev) +{ + struct visconti_csi2rx *priv = platform_get_drvdata(pdev); + + v4l2_async_nf_unregister(&priv->notifier); + v4l2_async_nf_cleanup(&priv->notifier); + v4l2_async_unregister_subdev(&priv->subdev); + + v4l2_subdev_cleanup(&priv->subdev); + media_entity_cleanup(&priv->subdev.entity); +} + +static struct platform_driver visconti_csi2rx_driver = { + .probe = visconti_csi2rx_probe, + .remove = visconti_csi2rx_remove, + .driver = { + .name = "visconti_csi2rx_dev", + .of_match_table = visconti_csi2rx_of_table, + }, +}; + +module_platform_driver(visconti_csi2rx_driver); + +MODULE_AUTHOR("Yuji Ishikawa "); +MODULE_DESCRIPTION("Toshiba Visconti CSI-2 receiver driver"); +MODULE_LICENSE("Dual BSD/GPL"); From patchwork Mon Nov 25 09:21:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 13884618 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7CF88D3B7F6 for ; Mon, 25 Nov 2024 09:28:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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m=+ThVAuMIKLy377WOKXKvorPZceR13tnluF7yD+ElZ7s= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1803) id 4AP9RHSQ3470709 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 25 Nov 2024 18:27:17 +0900 X-SA-MID: 35004183 From: Yuji Ishikawa To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Nobuhiro Iwamatsu , Yuji Ishikawa Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v12 7/8] documentation: media: add documentation for Toshiba Visconti Video Input Interface driver Date: Mon, 25 Nov 2024 18:21:45 +0900 X-TSB-HOP2: ON Message-Id: <20241125092146.1561901-8-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> References: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241125_012737_588996_A8743E3D X-CRM114-Status: GOOD ( 19.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Added description of Video Input Interface driver of Toshiba Visconti architecture. It includes hardware organization, structure of the driver and metadata format for embedded image signal processor. Signed-off-by: Yuji Ishikawa --- Changelog v3: - Newly add documentation to describe SW and HW Changelog v4: - no change Changelog v5: - no change Changelog v6: - add description of CSI2RX subdevice - add ordering of ioctl(S_FMT) and ioctl(S_EXT_CTRLS) Changelog v7: - no change Changelog v8: - add usage of V4L2_CTRL_TYPE_VISCONTI_ISP Changelog v9: - fix warning: set reference target for keyword V4L2_CTRL_TYPE_VISCONTI_ISP Changelog v10: - use parameter buffers instead of compound control - removed description of vendor specific compound control - add description of parameter buffers for ISP control - update directory structure - remove documents under driver-api - add documents to admin-guide, userspace-api Changelog v11: - update usage of the driver Changelog v12: - add description of CSI2RX driver - description of resizer subdevice - add block diagrams of VIIF and ISP - update usage of the driver .../admin-guide/media/v4l-drivers.rst | 1 + .../admin-guide/media/visconti-viif.dot | 22 + .../admin-guide/media/visconti-viif.rst | 435 ++++++++++++++++++ .../userspace-api/media/v4l/meta-formats.rst | 1 + .../media/v4l/metafmt-visconti-viif.rst | 48 ++ 5 files changed, 507 insertions(+) create mode 100644 Documentation/admin-guide/media/visconti-viif.dot create mode 100644 Documentation/admin-guide/media/visconti-viif.rst create mode 100644 Documentation/userspace-api/media/v4l/metafmt-visconti-viif.rst diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst index b6af448b9fe9..81054512e768 100644 --- a/Documentation/admin-guide/media/v4l-drivers.rst +++ b/Documentation/admin-guide/media/v4l-drivers.rst @@ -32,5 +32,6 @@ Video4Linux (V4L) driver-specific documentation si476x starfive_camss vimc + visconti-viif visl vivid diff --git a/Documentation/admin-guide/media/visconti-viif.dot b/Documentation/admin-guide/media/visconti-viif.dot new file mode 100644 index 000000000000..cc75c73336fb --- /dev/null +++ b/Documentation/admin-guide/media/visconti-viif.dot @@ -0,0 +1,22 @@ +digraph board { + rankdir=TB + n00000001 [label="{{ 0 | 4} | visconti-viif:isp\n/dev/v4l-subdev0 | { 1 | 2 | 3 | 5}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port1 -> n00000008:port0 + n00000001:port2 -> n0000000b:port0 + n00000001:port3 -> n00000016 + n00000001:port5 -> n0000001e + n00000008 [label="{{ 0} | visconti-viif:resizer0\n/dev/v4l-subdev1 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000008:port1 -> n0000000e + n0000000b [label="{{ 0} | visconti-viif:resizer1\n/dev/v4l-subdev2 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000b:port1 -> n00000012 + n0000000e [label="viif_capture_post0\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n00000012 [label="viif_capture_post1\n/dev/video1", shape=box, style=filled, fillcolor=yellow] + n00000016 [label="viif_capture_sub\n/dev/video2", shape=box, style=filled, fillcolor=yellow] + n0000001a [label="viif_params\n/dev/video3", shape=box, style=filled, fillcolor=yellow] + n0000001a -> n00000001:port4 + n0000001e [label="viif_stats\n/dev/video4", shape=box, style=filled, fillcolor=yellow] + n00000030 [label="{{ 0} | visconti_csi2rx 1c008000.csi2rx\n/dev/v4l-subdev3 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000030:port1 -> n00000001:port0 + n00000035 [label="{{} | imx219 1-0010\n/dev/v4l-subdev4 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n00000035:port0 -> n00000030:port0 +} diff --git a/Documentation/admin-guide/media/visconti-viif.rst b/Documentation/admin-guide/media/visconti-viif.rst new file mode 100644 index 000000000000..c2e85fb6f8c1 --- /dev/null +++ b/Documentation/admin-guide/media/visconti-viif.rst @@ -0,0 +1,435 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================================== +Visconti Video Input Interface Driver (visconti-viif) +====================================================== + +Introduction +============ + +This file documents the driver for the Video Input Interface (VIIF) that is +part of Toshiba Visconti SoCs. +The driver is located under drivers/media/platform/toshiba/visconti and uses +the Media-Controller API. + +The driver module is named visconti-viif, +and is enabled through the CONFIG_VIDEO_VISCONTI_VIIF config option. +The CSI-2 receiver part is controlled by another module named visconti-csi2rx, +which is enabled through the CONFIG_VIDEO_VISCONTI_CSI2RX config option. + +The Visconti VIIF Hardware +========================== + +The Visconti VIIF hardware is an internally developed video capture device. +Following function modules are integrated: + +* MIPI CSI-2 receiver (CSI2RX) +* L1 Image Signal Processor (L1ISP) + + * Correction, enhancement, adjustment on bayer images. + +* L2 Image Signal Processor (L2ISP) + + * Lens distortion correction + * Scaling & Cropping with up to 2 parameter sets + * Formatting picture (RGB, YUV, Grayscale, ...) + * Integrated DMAC: Writing picture into main memory + +* Video DMAC + + * Writing picture into main memory + +Visconti5 SoC has two VIIF hardware instances. + + +The hardware block diagram is shown below.:: + + The VIIF hardware + "POST0" + "RGB with scale 0" + +--------+ +----------+ +-----+ +-----+ +-----+ +--------+ + | Sensor |--->| CSI2RX |--->| | | | | |--->| memory | + +--------+ +----------+ | | | | | | +--------+ + | | | L1 | | L2 | "POST1" + | |--->| ISP |--->| ISP | "RGB with scale 1" + | | | | | | +--------+ + | MUX | | | | |--->| memory | + | | +-----+ +-----+ +--------+ + | | "SUB" + | | "RAW w/o scale" + | | +------------+ +--------+ + | |------> | Video DMAC |--->| memory | + +-----+ +------------+ +--------+ + +Topology +======== + +Graph +----- + +.. _visconti_viif_topology_graph: + +.. kernel-figure:: visconti-viif.dot + :alt: Diagram of the default media pipeline topology + :align: center + +The driver has 3 video devices for capturing images: + +- viif_capture_post0: capture device for image. + - corresponds to L2ISP. +- viif_capture_post1: capture device for image. + - corresponds to L2ISP. +- viif_capture_sub: capture device for bayer image. + - corresponds to Video DMAC. + +The driver has 2 video devices for controlling ISP. + +- viif_params: a metadata output device that receives ISP parameters. + - corresponds to L1ISP and L2ISP. +- viif_stats: a metadata capture device that sends statistics. + - corresponds to L1ISP and L2ISP. + +The driver has 2 subdevices: + +- visconti_csi2rx: CSI-2 receiver operation. + - corresponds to CSI2RX. +- visconti-viif:isp: Image Signal Processor operation. + - corresponds to L1ISP and L2ISP. +- visconti-viif:resizer: Scaling operation of Image Signal Processor. + - corresponds to L2ISP. + +visconti_csi2rx - CSI2 Receiver Subdevice Node +--------------------------------------------------- + +This subdevice node corresponds to a MIPI CSI2 receiver. +It resides between an image sensor subdevice and the ISP subdevice. +It controls CSI2 link configuration and training process. + +visconti-viif:isp - ISP Subdevice Node +-------------------------------------- + +This subdevice node corresponds to L1/L2 ISPs. +It receives pictures from an sensor (via CSI2RX), +applies multiple operations on pictures, then passes resulting images to capture nodes. + +ISP configurations/parameters are passed from userland via viif_params node. +The status of ISP operations are passed to userland via viif_stats node. + +L1 ISP provides following operations: + +- Input: accepts 8, 10, 12, 14bit bayer format + - Operation selector; :c:type:`viif_l1_input_mode_config` + - HDR image / PWL (Piecewse Linear Compression) image + - with preprocessing / without preprocessing + - HDRE: HDR expansion (only for PWL image); + see :c:type:`viif_l1_hdre_config` +- Preprocessing: generate intermediate data (24bit RAW) + - SLIC: Bit slicing (x3 12bit planes for preprocessing); + see :c:type:`viif_l1_img_extraction_config` + - ABPC/DPC: Blemish/Defect pixel correction :c:type:`viif_l1_dpc_config` + - PWHB: Preset white balance; see :c:type:`viif_l1_preset_white_balance_config` + - RCNR: RAW color noise reduction; see :c:type:`viif_l1_raw_color_noise_reduction_config` + - HDRS: HDR synthesis; see :c:type:`viif_l1_hdrs_config` +- Processing on RAW image: Main Process (MPRO) + - BLVC: black level correction and normalization; + see :c:type:`viif_l1_black_level_correction_config` + - LSSC: Lens shading correction; see :c:type:`viif_l1_lsc_config` + - MPRO: digital amplifier; see :c:type:`viif_l1_main_process_config` + - MPRO: bayer demosaicing; see :c:type:`viif_l1_main_process_config` + - MPRO: color matrix correction; see :c:type:`viif_l1_main_process_config` + - HDRC: HDR compression; + see :c:type:`viif_l1_hdrc_config`, :c:type:`viif_l1_hdrc_ltm_config`, + :c:type:`viif_l1_rgb_to_y_coef_config` +- Processing on RGB/YUV image: Video Process (VPRO) + - VPRO: gamma correction; see :c:type:`viif_l1_gamma_config` + - VPRO: RGB2YUV; + see :c:type:`viif_l1_rgb_to_y_coef_config`, + :c:type:`viif_l1_img_quality_adjustment_config` + - VPRO: image quality adjustment; see :c:type:`viif_l1_img_quality_adjustment_config` +- Output: 16bit YUV +- Feedback loop + - AWHB: auto white balance; see :c:type:`viif_l1_awb_config`, + :c:type:`viif_isp_capture_status` + - AEXP: auto exposure (average luminance calculation); + see :c:type:`viif_l1_avg_lum_generation_config`, + :c:type:`viif_l1_rgb_to_y_coef_config`, :c:type:`viif_isp_capture_status` + - AG: analog gain calculation; + see :c:type:`viif_l1_ag_mode_config`, :c:type:`viif_l1_ag_config` + +Below is the block diagram:: + + L1ISP::INPUT + + +--------+ +-----+ +-----+ + | Input |--------------->| |--------------------->| | + | 24bHDR | | | | | + +--------+ | 24b | | 24b | + | RAW | | RAW | + +--------+ +------+ | (0) | | (1) | + | Input |--->| HDRE |--->| | +------------+ | | + | 24bPWL | | | | |--->| preprocess |--->| | + +--------+ +------+ +-----+ +------------+ +-----+ + + L1ISP::INPUT::preprocess + + +-----+ +-----+ + | 24b | +------+ +------+ +------+ +------+ +------+ | 24b | + | RAW |--->| SLIC |--->| ABPC |--->| PWHB |--->| RCNR |--->| HDRS |--->| RAW | + | (0) | +------+ +------+ +------+ +------+ +------+ | (1) | + +-----+ +-----+ + + L1ISP::MainProcess(MPRO) + + +-----+ + | 24b | +------+ +------+ + | RAW |--->| BLVC |--->| LSSC |---+ + | (1) | +------+ +------+ | + +-----+ | + | + +------------------------------+ + | + | +-----------+ +-------------+ +--------+ +-----+ + +--->| MPRO | | MPRO | | MPRO | +------+ | 16b | + | Digital |--->| Demosaicing |----| Color |--->| HDRC |--->| RGB | + +--->| Amplifier | | | | Matrix | +------+ | | + | +-----------+ +-------------+ +--------+ +-----+ + | | | + | +--------------+ | | +------+ + +----| Auto |<----+ +--->| AEXP |---> Auto-Exposure statistics + | Whitebalance | +------+ + +--------------+ + | + +------------------------------> Auto-Whitebalance statistics + + L1ISP::VideoProcess(VPRO) + + +-----+ +------------+ +------------+ +---------------+ +--------+ + | 16b |--->| Gamma |--->| RGB2YUV |--->| Image Quality |--->| Output | + | RGB | | Correction | | Conversion | | Adjustment | | 16b | + | | +------------+ +------------+ +---------------+ | YUV | + +-----+ +--------+ + + L1ISP::AnalogGain + + statistics +-------------+ +------------------+ + information ---> (user SW) --->| Analog Gain |--->| ABPC, RCNR, LSSC | + +-------------+ | MPRO, VPRO | + +------------------+ + +L2 ISP provides following operations: + +- Input: accepts 16bit YUV / RGB +- Operations: + - Lens undistortion; see :c:type:`viif_l2_undist` + - Scaling; see :c:type:`viif_l2_roi` + - Cropping; see :c:type:`viif_l2_roi` + - Gamma correction; see :c:type:`viif_l2_gamma_config` + - YUV2RGB +- Output: RGB, YUV422, YUV444 + +Below is the block diagram:: + + L2ISP + + +-------+ +------------+ +--------------+ +---------+ + | Input |--->| YUV2RGB |--->| Lens |--->| Scaling |---> | + | Image | | Conversion | | Undistortion | | |---> | + +-------+ +------------+ +--------------+ +---------+ | + | + +----------------------------------------------------------+ + | + | +----------+ +------------+ +--------+ +--------+ + +--->|Gamma |--->| Colorspace |--->| Data |--->| Output | + | |Correction| | Conversion | | Packer | | Image | + | +----------+ +------------+ +--------+ +--------+ + | + | +----------+ +------------+ +--------+ +--------+ + +--->|Gamma |--->| Colorspace |--->| Data |--->| Output | + |Correction| | Conversion | | Packer | | Image | + +----------+ +------------+ +--------+ +--------+ + +visconti-viif:resizer - Resizer Subdevice Node +---------------------------------------------- + +The resizer subdevice resides between ISP subdevice and Capture device +on a capture path for post0 and post1. +It receives resize and crop parameters for the specific capture path +and controls L2ISP HW. + +following selection rectangles can be passed at VIDIOC_S_SELECTION ioctl. + +- sink pads's compose rectangle (V4L2_SEL_TGT_COMPOSE) for scaling +- source pad's crop rectangle (V4L2_SEL_TGT_CROP) for cropping + + +viif_capture_post0, viif_capture_post1 - Processed Image Capture Video Node +--------------------------------------------------------------------------- + +These video nodes are used for capturing images processed at ISPs. +Supported capture formats are as follows: + +- V4L2_PIX_FMT_RGB24 +- V4L2_PIX_FMT_ABGR32 +- V4L2_PIX_FMT_YUV422M +- V4L2_PIX_FMT_YUV444M +- V4L2_PIX_FMT_Y16 + +Bayer format is not supported. Use viif_capture_sub instead. + +POST0 and POST1 can output images from the same input image +using different cropping and scaling settings. + +viif_capture_sub - Raw Image Capture Video Node +----------------------------------------------- + +This video node is used for capturing bayer image from the sensor. +The output picture has exactly the same resolution and format as the sensor input. +The pipeline does not edit pixel values. +However, when writing pixel values to memory, they are shifted to the MSB +to match either 8bit or 16bit. + +Therefore, resulting capture formats are as follows: + +- for 8bit RAW input: + - V4L2_PIX_FMT_SRGGB8 + - V4L2_PIX_FMT_SGRBG8 + - V4L2_PIX_FMT_SGBRG8 + - V4L2_PIX_FMT_SBGGR8 +- for 10, 12, 14bit RAW input: + - V4L2_PIX_FMT_SRGGB16 + - V4L2_PIX_FMT_SGRBG16 + - V4L2_PIX_FMT_SGBRG16 + - V4L2_PIX_FMT_SBGGR16 + +.. _viif_params: + +viif_params - ISP Parameters Video Node +--------------------------------------- + +The viif_params video node receives a set of ISP parameters from userspace +to be applied to the hardware during a video stream. + +The buffer format is defined by struct :c:type:`visconti_viif_isp_config`, and userspace should set +:ref:`V4L2_META_FMT_VISCONTI_VIIF_PARAMS ` as the data format. + +.. _viif_stats: + +viif_stats - Statistics Video Node +---------------------------------- + +The viif_stats video node provides current status of ISP. + +Following information is included: + +* statistics of auto white balance +* average luminance information which can be used by auto exposure software impl. + +The buffer format is defined by struct :c:type:`visconti_viif_isp_stat`, and userspace should set +:ref:`V4L2_META_FMT_VISCONTI_VIIF_STATS ` as the data format. + +Feedback Operations +=================== + +Among the so-called 3A functions, VIIF provides only auto-whitebalance and auto-exposure. +Auto-whitebalance is a standalone hardware feature. +Some status information is available through the ISP statistics interface. + +Auto-exposure is realized through a combination of hardware and userland software. +VIIF provides weighted average luminance information through the ISP statistics interface. +The userland application calculates the sensor gain, sensor exposure and ISP digital gain. +The calculated parameters are then passed to sensor's controls and the ISP parameter interface. + +Among ISP parameters, there are parameters called AG (analog gain). +Actually, AG parameters have nothing to do with auto-exposure. +It controls "strength" in several signal correction algorithms. +Below is the list of the functions which may be affected by AG parameters: + +- ABPC/DPC +- RCNR +- LSSC +- MPRO: color matrix correction +- VPRO + +Capturing Video Frames Example +============================== + +In the following example, +imx219 camera is connected to pad 0 of 'visconti_csi2rx' subdevice. + +The following commands yield three pictures with different zoom ratio: +- main path 0: 1.5x zoom, crop 1920x1080, RGB picture +- main path 1: 0.67x zoom, crop 640x480, RGB picture +- sub path: 1920x1080 RAW picture + +.. code-block:: bash + + # set the links + media-ctl -d platform:visconti-viif-0 -r + media-ctl -d platform:visconti-viif-0 -l '"imx219 1-0010":0 -> "visconti_csi2rx 1c008000.csi2rx":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti_csi2rx 1c008000.csi2rx":1 -> "visconti-viif:isp":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti-viif:isp":1 -> "visconti-viif:resizer0":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti-viif:isp":2 -> "visconti-viif:resizer1":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti-viif:isp":3 -> "viif_capture_sub":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti-viif:resizer0":1 -> "viif_capture_post0":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti-viif:resizer1":1 -> "viif_capture_post1":0 [1]' + media-ctl -d platform:visconti-viif-0 -l '"viif_params":0 -> "visconti-viif:isp":4 [1]' + media-ctl -d platform:visconti-viif-0 -l '"visconti-viif:isp":5 -> "viif_stats":0 [1]' + + # set format for imx219 + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"imx219 1-0010":0 [fmt:SRGGB10_1X10/1920x1080]' + + # set format for csi2rx + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti_csi2rx 1c008000.csi2rx":0 [fmt:SRGGB10_1X10/1920x1080 field:none colorspace:raw xfer:none ycbcr:601 quantization:full-range]' + + # set format for isp sink pad + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti-viif:isp":0 [fmt:SRGGB10_1X10/1920x1080]' + + # set format for resizer pads + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti-viif:resizer0":0 '"[fmt:YUV8_1X24/1920x1080 compose:(0,0)/2880x1620]" + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti-viif:resizer0":1 '"[crop:(480,16)/1920x1080]" + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti-viif:resizer1":0 '"[fmt:YUV8_1X24/1920x1080 compose:(0,0)/1280x720]" + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti-viif:resizer1":1 '"[crop:(320,32)/640x480]" + + media-ctl -d platform:visconti-viif-0 --set-v4l2 '"visconti-viif:isp":1 [fmt:YUV8_1X24/1024 crop:(640,0)/1024x1024]' + + # set format for main path0 + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_post0 -v "width=1920,height=1080" + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_post0 -v "pixelformat=RGB3" + + # set format for main path1 + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_post0 -v "width=640,height=480" + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_post0 -v "pixelformat=RGB3" + + # start streaming + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_post0 --stream-mmap --stream-count 1000 & + + # start streaming with other devices while viif_capture_post0 is running + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_post1 --stream-mmap --stream-count 10 + v4l2-ctl -z platform:visconti-viif-0 -d viif_capture_sub --stream-mmap --stream-count 10 + +Use of coherent memory +====================== + +Visconti5 SoC has two independent DDR SDRAM controllers. +Each controller is mapped to 36bit address space. + +Accelerator bus masters have two paths to access memory; +one is directly connected to SDRAM controller, +the another is connected via a cache coherency bus +which keeps coherency among CPUs. + +From accelerators and CPUs, the address map is following: + +* 0x0_8000_0000 DDR0 direct access +* 0x4_8000_0000 DDR0 coherency bus +* 0x8_8000_0000 DDR1 direct access +* 0xC_8000_0000 DDR1 coherency bus + +The base address can be specified with "memory" and "reserved-memory" elements +in a device tree description. +It's not recommended to mix direct address and coherent address. + +The Visconti5 VIIF driver always use only direct address to configure Video DMACs of the hardware. +This design is to avoid great performance loss at coherency bus caused by massive memory access. +You should not put the dma_coherent attribute to viif element in device tree. +Cache operations are done automatically by videobuf2 driver. diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst index 86ffb3bc8ade..2336842f0c26 100644 --- a/Documentation/userspace-api/media/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -19,6 +19,7 @@ These formats are used for the :ref:`metadata` interface only. metafmt-pisp-fe metafmt-rkisp1 metafmt-uvc + metafmt-visconti-viif metafmt-vivid metafmt-vsp1-hgo metafmt-vsp1-hgt diff --git a/Documentation/userspace-api/media/v4l/metafmt-visconti-viif.rst b/Documentation/userspace-api/media/v4l/metafmt-visconti-viif.rst new file mode 100644 index 000000000000..dc4b31627fe1 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/metafmt-visconti-viif.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _v4l2-meta-fmt-visconti-viif-params: + +.. _v4l2-meta-fmt-visconti-viif-stats: + +*************************************************************************************** +V4L2_META_FMT_VISCONTI_VIIF_PARAMS ('vifp'), V4L2_META_FMT_VISCONTI_VIIF_STATS ('vifs') +*************************************************************************************** + +Configuration parameters +======================== + +The configuration parameters are passed to the +:ref:`viif_params ` metadata output video node, using +the :c:type:`v4l2_meta_format` interface. The buffer contains +a single instance of the C structure :c:type:`visconti_viif_isp_config` defined in +``visconti_viif.h``. So the structure can be obtained from the buffer by: + +.. code-block:: c + + struct visconti_viif_isp_config *params = (struct visconti_viif_isp_config*) buffer; + +VIIF statistics +=============== + +The VIIF device collects different statistics over an input Bayer frame. +Those statistics are obtained from the :ref:`viif_stats ` +metadata capture video node, +using the :c:type:`v4l2_meta_format` interface. The buffer contains a single +instance of the C structure :c:type:`visconti_viif_isp_stat` defined in +``visconti_viif.h``. So the structure can be obtained from the buffer by: + +.. code-block:: c + + struct visconti_viif_isp_stat *stats = (struct visconti_viif_isp_stat*) buffer; + +The statistics collected are Exposure, AWB (auto white balance) and errors. +See :c:type:`visconti_viif_isp_stat` for details of the statistics. + +The statistics and configuration parameters described here are usually +consumed and produced by dedicated user space libraries that comprise the +tuning tools using software control loop. + +visconti viif uAPI data types +============================= + +.. kernel-doc:: include/uapi/linux/visconti_viif.h From patchwork Mon Nov 25 09:21:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuji Ishikawa X-Patchwork-Id: 13884638 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F5CDD3B7F5 for ; Mon, 25 Nov 2024 09:33:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=NDrALBEIHaOrNybjMAxZ0pEv7yfnFcCvcby1oq43AiU=; b=ZZMlsTwyGLyTA4yBTo03tv0JKs KJPqcMX64wDxUoTMp9SY0eMlRpalXFudIROUcsqtO+WG32v6KA+vPCs6CnSaXjr8XUrdmGbvnw5r2 PMJSSk6LEXBmJabMX6rMNT+eo3TJxp5FaSx4W6y7nLLsR+SpVL0gFTWRcfBkkuCsAduRphW/GKZ98 0nrTTGB3kq0jCF9VAHs4eywV3dRuuPyiCMfczil4kbGF8JVhnUKL09MI0IeoZafNCAAdmUWwzIIji HbKgepqQcaWNRarBDUM1z5lEpdJz8yO4STqsXDXJislw1LHPmtGaHpQ64u2+YB++4qlEPd9PqEI3G cwfYIo6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tFVTA-00000007Zo4-0HX0; Mon, 25 Nov 2024 09:33:24 +0000 Received: from mo-csw1121.securemx.jp ([210.130.202.132] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tFVNe-00000007Ym7-04sb for linux-arm-kernel@lists.infradead.org; Mon, 25 Nov 2024 09:27:43 +0000 DKIM-Signature: v=1;a=rsa-sha256;c=relaxed/simple;d=toshiba.co.jp;h=From:To:Cc :Subject:Date:Message-Id:In-Reply-To:References:MIME-Version: Content-Transfer-Encoding;i=yuji2.ishikawa@toshiba.co.jp;s=key2.smx;t= 1732526841;x=1733736441;bh=PCq/pu+QO5n9bATAUWThnGACe2nepbUSJDlQFbrVrx8=;b=ssK rD2dA6ydWDQ6pOMt2C5SL8sXLaAYRAfqPxs6mSdZYsTxCkOhnxEqJ5+gXjHoqI/vi81FEUxoFDrxS Qt3jLqg0153A6aZQq6KoE/jltceTLvhDyrw2K3d+zUMn31MZMdyCXez0RjnSNgOO4GJLcJuh4WddV AXGqimEQITHWVsUwf6hzcNHSxlQ0lVcw67zkNN5Juz2h4tqj0Z/atXbLe9KYGE127KhmlKTFQEd37 yy5UBWaNAcpN1I2YuxfAN6UsIG1+WybisEaHoOLtszQ0hKd9r1J1lh/6hpNvErmBclKErBTR0AnkH 5iaYi0t1Ql7JK04F6OYVQQ+U2Wd2anQ==; Received: by mo-csw.securemx.jp (mx-mo-csw1121) id 4AP9RJmm099468; Mon, 25 Nov 2024 18:27:19 +0900 X-Iguazu-Qid: 2rWguDC9mIphlABSrL X-Iguazu-QSIG: v=2; s=0; t=1732526839; q=2rWguDC9mIphlABSrL; m=k1DP3cEVolB9mfsCCNGe71tsvk/AiYIrIbXeZwTU+I0= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1121) id 4AP9RHIp297761 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 25 Nov 2024 18:27:17 +0900 X-SA-MID: 35004190 From: Yuji Ishikawa To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Nobuhiro Iwamatsu , Yuji Ishikawa Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v12 8/8] MAINTAINERS: Add entries for Toshiba Visconti Video Input Interface Date: Mon, 25 Nov 2024 18:21:46 +0900 X-TSB-HOP2: ON Message-Id: <20241125092146.1561901-9-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> References: <20241125092146.1561901-1-yuji2.ishikawa@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241125_012742_292992_4ABB8095 X-CRM114-Status: UNSURE ( 8.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Added entries for visconti Video Input Interface driver, including; * device tree bindings * source files * documentation files Signed-off-by: Yuji Ishikawa Reviewed-by: Nobuhiro Iwamatsu --- Changelog v2: - no change Changelog v3: - added entry for driver API documentation Changelog v4: - added entry for header file Changelog v5: - no change Changelog v6: - update path to VIIF driver source files Changelog v7: - no change Changelog v8: - rename bindings description file Changelog v9: - no change Changelog v10: - add a separate entry of VIIF driver Changelog v11: - no change Changelog v12: - add a bindings description of CSI2RX driver MAINTAINERS | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b878ddc99f94..b5c819e94e9b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -23430,6 +23430,18 @@ F: Documentation/devicetree/bindings/media/i2c/tc358743.txt F: drivers/media/i2c/tc358743* F: include/media/i2c/tc358743.h +TOSHIBA VISCONTI VIIF DRIVER +M: Nobuhiro Iwamatsu +M: Yuji Ishikawa +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/admin-guide/media/visconti-viif.* +F: Documentation/devicetree/bindings/media/toshiba,visconti5-csi2rx.yaml +F: Documentation/devicetree/bindings/media/toshiba,visconti5-viif.yaml +F: Documentation/userspace-api/media/v4l/metafmt-visconti-viif.rst +F: drivers/media/platform/toshiba/visconti/ +F: include/uapi/linux/visconti_viif.h + TOSHIBA WMI HOTKEYS DRIVER M: Azael Avalos L: platform-driver-x86@vger.kernel.org