From patchwork Fri Nov 29 15:17:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Sousa X-Patchwork-Id: 13888767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4ED36D729E6 for ; Fri, 29 Nov 2024 15:18:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DC6E310E4F2; Fri, 29 Nov 2024 15:18:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="LbvCHGza"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 04ECE10E482; Fri, 29 Nov 2024 15:18:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1732893488; x=1764429488; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KnI4igaOSsxAu7V+pgHxHN9ELxMvZ5WZhf0ujZ/Q4YA=; b=LbvCHGzaMOjrAMM+9UK8QlggU2qOlHg+N52ALbicIY+KMQsgMaJhTwqI fp8KpN7KkFN9k8VjGH2+x/cRXZ9wivWDfjIYJ+wkdBfkHMeHN93v2J27d vbpl3A+DBBMX5rYKiH2jMos7Rm4CDKN4s3HSUN7wBCOxtyEmnzUvRlMjp Zeq/8N+CPxDKh+EwBmphwR1MhB+p2ZHfe27cj4bOFAFYiLxt03D8jFjmb 3L2yvqvOKmgdmUFYhjLA/NT5OCVwT6Qiask2zvbBtFOlOyZs62ANcEU6/ /c5L06hEDK3717krnUcP+nFhEkS2EzIOkb9EdljgzOwzNfZlc5JLmC4RU Q==; X-CSE-ConnectionGUID: yTkvPBBaT8uQxCvO9Z8/Ow== X-CSE-MsgGUID: i0uCCI8lStmQ1aZZbpkTPA== X-IronPort-AV: E=McAfee;i="6700,10204,11271"; a="44513491" X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="44513491" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 07:18:08 -0800 X-CSE-ConnectionGUID: l8TxLxmKQ0SjEBSrWroYaA== X-CSE-MsgGUID: 7CSy4NoCQsqKjauU6PCGrw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="92394985" Received: from eamartin-mobl1.amr.corp.intel.com (HELO gjsousa-mobl2.corp.amr.intel.com) ([10.125.111.90]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 07:18:06 -0800 From: Gustavo Sousa To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: Luca Coelho , Rodrigo Vivi Subject: [PATCH 1/3] drm/i915/dmc_wl: Extract intel_dmc_wl_flush_release_work() Date: Fri, 29 Nov 2024 12:17:44 -0300 Message-ID: <20241129151754.22015-2-gustavo.sousa@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241129151754.22015-1-gustavo.sousa@intel.com> References: <20241129151754.22015-1-gustavo.sousa@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We will need to flush the release work from outside in an upcoming change. Let's put that into a public interface and call it intel_dmc_wl_flush_release_work(). Signed-off-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12 +++++++++++- drivers/gpu/drm/i915/display/intel_dmc_wl.h | 1 + 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index 853d75610489..09075830c12f 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -349,7 +349,7 @@ void intel_dmc_wl_disable(struct intel_display *display) if (!__intel_dmc_wl_supported(display)) return; - flush_delayed_work(&wl->work); + intel_dmc_wl_flush_release_work(display); spin_lock_irqsave(&wl->lock, flags); @@ -377,6 +377,16 @@ void intel_dmc_wl_disable(struct intel_display *display) spin_unlock_irqrestore(&wl->lock, flags); } +void intel_dmc_wl_flush_release_work(struct intel_display *display) +{ + struct intel_dmc_wl *wl = &display->wl; + + if (!__intel_dmc_wl_supported(display)) + return; + + flush_delayed_work(&wl->work); +} + void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg) { struct intel_dmc_wl *wl = &display->wl; diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h b/drivers/gpu/drm/i915/display/intel_dmc_wl.h index 147eeb4d8432..5488fbdf29b8 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.h +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.h @@ -32,6 +32,7 @@ struct intel_dmc_wl { void intel_dmc_wl_init(struct intel_display *display); void intel_dmc_wl_enable(struct intel_display *display, u32 dc_state); void intel_dmc_wl_disable(struct intel_display *display); +void intel_dmc_wl_flush_release_work(struct intel_display *display); void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg); void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg); void intel_dmc_wl_get_noreg(struct intel_display *display); From patchwork Fri Nov 29 15:17:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Sousa X-Patchwork-Id: 13888766 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04F1AD729E9 for ; Fri, 29 Nov 2024 15:18:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A21FD10E4E6; Fri, 29 Nov 2024 15:18:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="aY4vxhMF"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 730CA10E4E6; Fri, 29 Nov 2024 15:18:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1732893489; x=1764429489; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3au231/hzBnl/iwpV5UXv9HE4Oi59/WXxRvlFyEb7eg=; b=aY4vxhMF10gyGiF6LwnEA7RhhiAJq5/19ezgTo95FZlipXugffOI0+lE 5uN9xnxmGVqiX1GYzgEkrICJ2ggO14iyC+ULOl3iMfhaYylrauWOzTYV5 9c9py/wLvC3z8GRtPJd5eT8bWAcOM5tT5EK/6PAm+NI6HfPLmM5BWzG0G BCkZCq4n8r4KATNlsbom/k9iRUD4SCDjam6ZLp26GxJAM9v9hgtabKCo9 ymPNbFAYk/49ttfUy875JKAXQPR634dSk1cpDloM2XAXXBRcqIsaJLAZi pWRddgwUPV0aMG3s9Go6DDGuCDgdsAWCa9OgEnH/7Q8CCMEfnTpsVJfSb A==; X-CSE-ConnectionGUID: rsjMmpGBQJqBDDq4+UdXOA== X-CSE-MsgGUID: G/5CWzmkTXyyCuHRFnRV0w== X-IronPort-AV: E=McAfee;i="6700,10204,11271"; a="44513492" X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="44513492" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 07:18:09 -0800 X-CSE-ConnectionGUID: Cz+7Fq5nTsGz/pryG+p8Hg== X-CSE-MsgGUID: 4Tysu/I+T72QL9UDF2n/DQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="92394997" Received: from eamartin-mobl1.amr.corp.intel.com (HELO gjsousa-mobl2.corp.amr.intel.com) ([10.125.111.90]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 07:18:08 -0800 From: Gustavo Sousa To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: Luca Coelho , Rodrigo Vivi Subject: [PATCH 2/3] drm/xe/display: Extract xe_display_pm_runtime_suspend_late() Date: Fri, 29 Nov 2024 12:17:45 -0300 Message-ID: <20241129151754.22015-3-gustavo.sousa@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241129151754.22015-1-gustavo.sousa@intel.com> References: <20241129151754.22015-1-gustavo.sousa@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The current behavior for the runtime suspend case is that xe_display_pm_suspend_late() is only called when D3cold is allowed. Let's incorportate that behavior into a function specific to runtime PM and call it xe_display_pm_runtime_suspend_late(). With that, we keep stuff a bit more self-contained and allow having a place for adding more "late display runtime suspend"-related logic that isn't dependent on the "D3cold allowed" state. Signed-off-by: Gustavo Sousa Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/xe/display/xe_display.c | 9 +++++++++ drivers/gpu/drm/xe/display/xe_display.h | 1 + drivers/gpu/drm/xe/xe_pm.c | 4 ++-- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c index 69c828f38cb6..2e189abf8d6f 100644 --- a/drivers/gpu/drm/xe/display/xe_display.c +++ b/drivers/gpu/drm/xe/display/xe_display.c @@ -407,6 +407,15 @@ void xe_display_pm_suspend_late(struct xe_device *xe) intel_display_power_suspend_late(xe, s2idle); } +void xe_display_pm_runtime_suspend_late(struct xe_device *xe) +{ + if (!xe->info.probe_display) + return; + + if (xe->d3cold.allowed) + xe_display_pm_runtime_suspend_late(xe); +} + void xe_display_pm_shutdown_late(struct xe_device *xe) { if (!xe->info.probe_display) diff --git a/drivers/gpu/drm/xe/display/xe_display.h b/drivers/gpu/drm/xe/display/xe_display.h index 17afa537aee5..954c5a268ef4 100644 --- a/drivers/gpu/drm/xe/display/xe_display.h +++ b/drivers/gpu/drm/xe/display/xe_display.h @@ -41,6 +41,7 @@ void xe_display_pm_shutdown_late(struct xe_device *xe); void xe_display_pm_resume_early(struct xe_device *xe); void xe_display_pm_resume(struct xe_device *xe); void xe_display_pm_runtime_suspend(struct xe_device *xe); +void xe_display_pm_runtime_suspend_late(struct xe_device *xe); void xe_display_pm_runtime_resume(struct xe_device *xe); #else diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 80699dbeb2e9..a6761cb769b2 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -414,8 +414,8 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_irq_suspend(xe); - if (xe->d3cold.allowed) - xe_display_pm_suspend_late(xe); + xe_display_pm_runtime_suspend_late(xe); + out: if (err) xe_display_pm_runtime_resume(xe); From patchwork Fri Nov 29 15:17:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Sousa X-Patchwork-Id: 13888768 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24420D729E7 for ; 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X-CSE-ConnectionGUID: T/UDj456T2Gsf2SnXfN7pg== X-CSE-MsgGUID: iqVT7kDlQh2GrCBSyFbUSw== X-IronPort-AV: E=McAfee;i="6700,10204,11271"; a="44513493" X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="44513493" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 07:18:10 -0800 X-CSE-ConnectionGUID: 7lm2EG4hTtGC3szTZq2ulw== X-CSE-MsgGUID: PbM7zDJQSE6rUzHRSBzi6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="92395005" Received: from eamartin-mobl1.amr.corp.intel.com (HELO gjsousa-mobl2.corp.amr.intel.com) ([10.125.111.90]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 07:18:09 -0800 From: Gustavo Sousa To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: Luca Coelho , Rodrigo Vivi Subject: [PATCH 3/3] drm/xe/display: Flush DMC wakelock release work on runtime suspend Date: Fri, 29 Nov 2024 12:17:46 -0300 Message-ID: <20241129151754.22015-4-gustavo.sousa@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241129151754.22015-1-gustavo.sousa@intel.com> References: <20241129151754.22015-1-gustavo.sousa@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We currently are not calling display runtime suspend functions when D3cold is not allowed. Because of that, we endup not disabling dynamic DC states (and do not go to DC9). With dynamic DC states enabled, we will also have DMC wakelock enabled. Since we use a delayed work to release the DMC wakelock, the work might get executed a little too late (after the PCI device has been put to D3hot) and we get a timeout warning ("DMC wakelock release timed out") because the MMIO for releasing the wakelock will be invalid after that point. To fix that, make sure we flush the release work at the end of xe_display_pm_runtime_suspend_late(). We can do that unconditionally because, if there is no pending work, that turns into a no-op. Signed-off-by: Gustavo Sousa --- drivers/gpu/drm/xe/display/xe_display.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c index 2e189abf8d6f..9ae397a09f7b 100644 --- a/drivers/gpu/drm/xe/display/xe_display.c +++ b/drivers/gpu/drm/xe/display/xe_display.c @@ -22,6 +22,7 @@ #include "intel_display_irq.h" #include "intel_display_types.h" #include "intel_dmc.h" +#include "intel_dmc_wl.h" #include "intel_dp.h" #include "intel_encoder.h" #include "intel_fbdev.h" @@ -409,11 +410,20 @@ void xe_display_pm_suspend_late(struct xe_device *xe) void xe_display_pm_runtime_suspend_late(struct xe_device *xe) { + struct intel_display *display = &xe->display; + if (!xe->info.probe_display) return; if (xe->d3cold.allowed) xe_display_pm_runtime_suspend_late(xe); + + /* + * If xe_display_pm_suspend_late() is not called, it is likely + * that we will be on dynamic DC states with DMC wakelock enabled. We + * need to flush the release work in that case. + */ + intel_dmc_wl_flush_release_work(display); } void xe_display_pm_shutdown_late(struct xe_device *xe)