From patchwork Mon Dec 2 14:58:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 13890867 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 882DE204093 for ; Mon, 2 Dec 2024 14:58:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151524; cv=none; b=pk/AwjgZ7g8LZeNx6iOPGSiaObZn5oWIdlJRXHPT976151M20n+W+ovNXOESvae7Hkd0ZQwHmIayDP0ry6BMTnUyy/oKP2r0rjqSQtbsaH9WUPGzxf62047o6pcDl2k3evdqcwzLD7gYUEIBU1AGNydn3o/y8w9pLNLLI92NzdY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151524; c=relaxed/simple; bh=oMcW58QfVTUpM/P97XYYoIy7PQWj8tWqsBOxeeZHGs0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uMvDP6V8mgtBqfQu2AK9mYK5MuCzpiGhyyQbfwGsn/DMiBW3wrsZF7LkZT0zsJqN8IjVoWVBOCy8fsWwvoIrQ1N0FWoGqsVxYpKzvDr2uVSyQeojKgTWQhebAUWXxRGUN+2S/WctOzpRzEi8HA5g8R9HKYNhMtgpnHtWF9oKSRM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=DrOe8lpa; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="DrOe8lpa" Received: from mail.ideasonboard.com (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net [86.13.91.161]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A63B475A; Mon, 2 Dec 2024 15:58:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733151494; bh=oMcW58QfVTUpM/P97XYYoIy7PQWj8tWqsBOxeeZHGs0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DrOe8lpaoivrGr80ZR4lp8Mu4oMTUnrLfnVFbRArz2ymjRaec+ZeO34DVEy3qscSG wi9os+XhEIA8fUTAbmdaKKiOJu3DFSZ7QKIMP+gaOTw4prDU/lO10ruxi9wMSpdASv 8C57UTfbCcDb3makkX1I+XIox47qKAR1ylEbsx2w= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, jacopo.mondi@ideasonboard.com, isaac.scott@ideasonboard.com, Daniel Scally Subject: [PATCH v3 1/5] media: v4l2: Add Renesas Camera Receiver Unit pixel formats Date: Mon, 2 Dec 2024 14:58:27 +0000 Message-Id: <20241202145831.127297-2-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202145831.127297-1-dan.scally@ideasonboard.com> References: <20241202145831.127297-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Renesas Camera Receiver Unit in the RZ/V2H SoC can output RAW data captured from an image sensor without conversion to an RGB/YUV format. In that case the data are packed into 64-bit blocks, with a variable amount of padding in the most significant bits depending on the bitdepth of the data. Add new V4L2 pixel format codes for the new formats, along with documentation to describe them. Reviewed-by: Jacopo Mondi Signed-off-by: Daniel Scally Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar --- Changes in v3: - Switched from bayer-order specific formats to generic RAWnn Changes in v2: - Added labels to the new formats in the documentation file - Added 20-bit formats .../userspace-api/media/v4l/pixfmt-bayer.rst | 1 + .../media/v4l/pixfmt-rawnn-cru.rst | 144 ++++++++++++++++++ drivers/media/v4l2-core/v4l2-common.c | 4 + drivers/media/v4l2-core/v4l2-ioctl.c | 4 + include/uapi/linux/videodev2.h | 6 + 5 files changed, 159 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/pixfmt-rawnn-cru.rst diff --git a/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst index ed3eb432967d9..20a8aa0433047 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst @@ -31,3 +31,4 @@ orders. See also `the Wikipedia article on Bayer filter pixfmt-srggb14 pixfmt-srggb14p pixfmt-srggb16 + pixfmt-rawnn-cru diff --git a/Documentation/userspace-api/media/v4l/pixfmt-rawnn-cru.rst b/Documentation/userspace-api/media/v4l/pixfmt-rawnn-cru.rst new file mode 100644 index 0000000000000..959ecc33654a1 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/pixfmt-rawnn-cru.rst @@ -0,0 +1,144 @@ +.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later + +.. _v4l2-pix-fmt-cru-raw10: +.. _v4l2-pix-fmt-cru-raw12: +.. _v4l2-pix-fmt-cru-raw14: +.. _v4l2-pix-fmt-cru-raw20: + +********************************************************************************************************************************** +V4L2_PIX_FMT_CRU_RAW10 ('CR10'), V4L2_PIX_FMT_CRU_RAW12 ('CR12'), V4L2_PIX_FMT_CRU_RAW14 ('CR14'), V4L2_PIX_FMT_CRU_RAW20 ('CR20') +********************************************************************************************************************************** + +=============================================================== +Renesas RZ/V2H Camera Receiver Unit 64-bit packed pixel formats +=============================================================== + +| V4L2_PIX_FMT_CRU_RAW10 (CR10) +| V4L2_PIX_FMT_CRU_RAW12 (CR12) +| V4L2_PIX_FMT_CRU_RAW14 (CR14) +| V4L2_PIX_FMT_CRU_RAW20 (CR20) + +Description +=========== + +These pixel formats are some of the Bayer RAW outputs for the Camera Receiver +Unit in the Renesas RZ/V2H SoC. They are raw sRGB / Bayer formats which pack +pixels contiguously into 64-bit units, with the 4 or 8 most significant +bits padded. + +**Byte Order** + +.. flat-table:: RGB formats + :header-rows: 2 + :stub-columns: 0 + :widths: 36 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 + :fill-cells: + + * - :rspan:`1` Pixel Format Code + - :cspan:`63` Data organization + * - 63 + - 62 + - 61 + - 60 + - 59 + - 58 + - 57 + - 56 + - 55 + - 54 + - 53 + - 52 + - 51 + - 50 + - 49 + - 48 + - 47 + - 46 + - 45 + - 44 + - 43 + - 42 + - 41 + - 40 + - 39 + - 38 + - 37 + - 36 + - 35 + - 34 + - 33 + - 32 + - 31 + - 30 + - 29 + - 28 + - 27 + - 26 + - 25 + - 24 + - 23 + - 22 + - 21 + - 20 + - 19 + - 18 + - 17 + - 16 + - 15 + - 14 + - 13 + - 12 + - 11 + - 10 + - 9 + - 8 + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + * - V4L2_PIX_FMT_CRU_RAW10 + - 0 + - 0 + - 0 + - 0 + - :cspan:`9` P5 + - :cspan:`9` P4 + - :cspan:`9` P3 + - :cspan:`9` P2 + - :cspan:`9` P1 + - :cspan:`9` P0 + * - V4L2_PIX_FMT_CRU_RAW12 + - 0 + - 0 + - 0 + - 0 + - :cspan:`11` P4 + - :cspan:`11` P3 + - :cspan:`11` P2 + - :cspan:`11` P1 + - :cspan:`11` P0 + * - V4L2_PIX_FMT_CRU_RAW14 + - 0 + - 0 + - 0 + - 0 + - 0 + - 0 + - 0 + - 0 + - :cspan:`13` P3 + - :cspan:`13` P2 + - :cspan:`13` P1 + - :cspan:`13` P0 + * - V4L2_PIX_FMT_CRU_RAW20 + - 0 + - 0 + - 0 + - 0 + - :cspan:`19` P2 + - :cspan:`19` P1 + - :cspan:`19` P0 diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 0a2f4f0d0a073..696b33add65b8 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -329,10 +329,14 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) { .format = V4L2_PIX_FMT_SGBRG10DPCM8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SGRBG10DPCM8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SRGGB10DPCM8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_RAW10, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 6, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SBGGR12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SGBRG12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SGRBG12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SRGGB12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_RAW12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 5, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_RAW14, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 4, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_RAW20, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 3, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, }; unsigned int i; diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 0304daa8471d1..85bd068b14275 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1409,6 +1409,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_SGBRG10DPCM8: descr = "8-bit Bayer GBGB/RGRG (DPCM)"; break; case V4L2_PIX_FMT_SGRBG10DPCM8: descr = "8-bit Bayer GRGR/BGBG (DPCM)"; break; case V4L2_PIX_FMT_SRGGB10DPCM8: descr = "8-bit Bayer RGRG/GBGB (DPCM)"; break; + case V4L2_PIX_FMT_CRU_RAW10: descr = "10-bit Bayer CRU Packed"; break; case V4L2_PIX_FMT_SBGGR12: descr = "12-bit Bayer BGBG/GRGR"; break; case V4L2_PIX_FMT_SGBRG12: descr = "12-bit Bayer GBGB/RGRG"; break; case V4L2_PIX_FMT_SGRBG12: descr = "12-bit Bayer GRGR/BGBG"; break; @@ -1417,6 +1418,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_SGBRG12P: descr = "12-bit Bayer GBGB/RGRG Packed"; break; case V4L2_PIX_FMT_SGRBG12P: descr = "12-bit Bayer GRGR/BGBG Packed"; break; case V4L2_PIX_FMT_SRGGB12P: descr = "12-bit Bayer RGRG/GBGB Packed"; break; + case V4L2_PIX_FMT_CRU_RAW12: descr = "12-bit Bayer CRU Packed"; break; case V4L2_PIX_FMT_SBGGR14: descr = "14-bit Bayer BGBG/GRGR"; break; case V4L2_PIX_FMT_SGBRG14: descr = "14-bit Bayer GBGB/RGRG"; break; case V4L2_PIX_FMT_SGRBG14: descr = "14-bit Bayer GRGR/BGBG"; break; @@ -1425,10 +1427,12 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_SGBRG14P: descr = "14-bit Bayer GBGB/RGRG Packed"; break; case V4L2_PIX_FMT_SGRBG14P: descr = "14-bit Bayer GRGR/BGBG Packed"; break; case V4L2_PIX_FMT_SRGGB14P: descr = "14-bit Bayer RGRG/GBGB Packed"; break; + case V4L2_PIX_FMT_CRU_RAW14: descr = "14-bit Bayer CRU Packed"; break; case V4L2_PIX_FMT_SBGGR16: descr = "16-bit Bayer BGBG/GRGR"; break; case V4L2_PIX_FMT_SGBRG16: descr = "16-bit Bayer GBGB/RGRG"; break; case V4L2_PIX_FMT_SGRBG16: descr = "16-bit Bayer GRGR/BGBG"; break; case V4L2_PIX_FMT_SRGGB16: descr = "16-bit Bayer RGRG/GBGB"; break; + case V4L2_PIX_FMT_CRU_RAW20: descr = "14-bit Bayer CRU Packed"; break; case V4L2_PIX_FMT_SN9C20X_I420: descr = "GSPCA SN9C20X I420"; break; case V4L2_PIX_FMT_SPCA501: descr = "GSPCA SPCA501"; break; case V4L2_PIX_FMT_SPCA505: descr = "GSPCA SPCA505"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index e7c4dce390074..b0482b9af04f5 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -830,6 +830,12 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_PISP_COMP2_BGGR v4l2_fourcc('P', 'C', '2', 'B') /* PiSP 8-bit mode 2 compressed BGGR bayer */ #define V4L2_PIX_FMT_PISP_COMP2_MONO v4l2_fourcc('P', 'C', '2', 'M') /* PiSP 8-bit mode 2 compressed monochrome */ +/* Renesas RZ/V2H CRU packed formats. 64-bit units with contiguous pixels */ +#define V4L2_PIX_FMT_CRU_RAW10 v4l2_fourcc('C', 'R', '1', '0') +#define V4L2_PIX_FMT_CRU_RAW12 v4l2_fourcc('C', 'R', '1', '2') +#define V4L2_PIX_FMT_CRU_RAW14 v4l2_fourcc('C', 'R', '1', '4') +#define V4L2_PIX_FMT_CRU_RAW20 v4l2_fourcc('C', 'R', '2', '0') + /* SDR formats - used only for Software Defined Radio devices */ #define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') /* IQ u8 */ #define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') /* IQ u16le */ From patchwork Mon Dec 2 14:58:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 13890868 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAEC5204093 for ; Mon, 2 Dec 2024 14:58:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151527; cv=none; b=RbT+B/lVsHKylLF9XxFY5isTeFPdULbJPylXa+es4Sdc0h3t8mKBX4uKqcCOs3YLF4mrH1OAZpkkC1X7CnwiD9gQ8j7MHu0bK3P/gp03DikNp5jnabeCo0nIQ7eD+wOQcUQOY5oMUgfJwQx67LaddgJwyPVP7QOYxaYUX8+gpz4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151527; c=relaxed/simple; bh=vfCa/UxvbYkL0/aU7gH9QfEmUDDCMZhuA60e3HKrhTg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733151494; bh=vfCa/UxvbYkL0/aU7gH9QfEmUDDCMZhuA60e3HKrhTg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YmfWpSN2oZSDd76+nQNR74VmNJ0g8ndJJ+4/NA2u+3qxhdEHOl6do+yFZGJfB9cAq L9/JnauqIP7ytcEr6Ebe00io8LxbaRwtc7ZMZ24e4e2/QISiJLno10dIgaahuiMXhP rl4NiDtAII2fyM3OZWnlUU+i90KgqjPd0zBual8E= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, jacopo.mondi@ideasonboard.com, isaac.scott@ideasonboard.com, Daniel Scally , Laurent Pinchart Subject: [PATCH v3 2/5] media: platform: rzg2l-cru: Use v4l2_get_link_freq() Date: Mon, 2 Dec 2024 14:58:28 +0000 Message-Id: <20241202145831.127297-3-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202145831.127297-1-dan.scally@ideasonboard.com> References: <20241202145831.127297-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The rzg2l_csi2_calc_mbps() function currently tries to calculate the link frequency for a CSI2 bus using the V4L2_CID_PIXEL_RATE control of the remote subdevice. Switch the function to v4l2_get_link_freq() which correctly targets V4L2_CID_LINK_FREQ before falling back on V4L2_CID_PIXEL_RATE if the former is unavailable. Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar Tested-by: Lad Prabhakar Signed-off-by: Daniel Scally --- Changes in v3: - Fixed mbps sign Changes in v2: - None .../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 27 ++++++++----------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index 881e910dce023..243a36b952cb3 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -242,28 +242,23 @@ static int rzg2l_csi2_calc_mbps(struct rzg2l_csi2 *csi2) const struct rzg2l_csi2_format *format; const struct v4l2_mbus_framefmt *fmt; struct v4l2_subdev_state *state; - struct v4l2_ctrl *ctrl; - u64 mbps; - - /* Read the pixel rate control from remote. */ - ctrl = v4l2_ctrl_find(source->ctrl_handler, V4L2_CID_PIXEL_RATE); - if (!ctrl) { - dev_err(csi2->dev, "no pixel rate control in subdev %s\n", - source->name); - return -EINVAL; - } + s64 mbps; state = v4l2_subdev_lock_and_get_active_state(&csi2->subdev); fmt = v4l2_subdev_state_get_format(state, RZG2L_CSI2_SINK); format = rzg2l_csi2_code_to_fmt(fmt->code); v4l2_subdev_unlock_state(state); - /* - * Calculate hsfreq in Mbps - * hsfreq = (pixel_rate * bits_per_sample) / number_of_lanes - */ - mbps = v4l2_ctrl_g_ctrl_int64(ctrl) * format->bpp; - do_div(mbps, csi2->lanes * 1000000); + /* Read the link frequency from remote subdevice. */ + mbps = v4l2_get_link_freq(source->ctrl_handler, format->bpp, + csi2->lanes); + if (mbps < 0) { + dev_err(csi2->dev, "can't retrieve link freq from subdev %s\n", + source->name); + return -EINVAL; + } + + do_div(mbps, 1000000); return mbps; } From patchwork Mon Dec 2 14:58:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 13890869 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A9CA208967 for ; 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arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="k9HcHMOu" Received: from mail.ideasonboard.com (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net [86.13.91.161]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 9BC301045; Mon, 2 Dec 2024 15:58:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733151494; bh=cC9Q9CAJD3RayUe22OQ7BCKKJpf/iVo4m0OFNevMp9s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k9HcHMOuDfPL9mCU9WngnFl14QP6Fb2GAeVI8Xkd+D0dWxXaoHx9uUrgEjj50EiPS +PWv8f6e82sK10+DLbHIBMp8r6ApBRsu2MsZ3+pN40HU1ufGj+VNR1tkYcmZlDSxk/ Q1O3GIr/4B7RRlhnIQDH/btbi9ZBf+PZZVStLbgw= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, jacopo.mondi@ideasonboard.com, isaac.scott@ideasonboard.com, Daniel Scally , Laurent Pinchart Subject: [PATCH v3 3/5] media: platform: rzg2l-cru: Use v4l2_fill_pixfmt() Date: Mon, 2 Dec 2024 14:58:29 +0000 Message-Id: <20241202145831.127297-4-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202145831.127297-1-dan.scally@ideasonboard.com> References: <20241202145831.127297-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Rather than open-code a calculation of the format's bytesperline and sizeimage, use the v4l2_fill_pixfmt() helper. This makes it easier to support the CRU packed pixel formats without over complicating the driver. This change makes the .bpp member of struct rzg2l_cru_ip_format superfluous - remove them. Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar Tested-by: Lad Prabhakar Signed-off-by: Daniel Scally --- Changes in v3: - None Changes in v2: - Minor changes due to rebase drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h | 2 -- drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c | 5 ----- drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c | 3 +-- 3 files changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h index 8b898ce05b847..aaf85054f8842 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h @@ -68,7 +68,6 @@ struct rzg2l_cru_ip { * @datatype: MIPI CSI2 data type * @format: 4CC format identifier (V4L2_PIX_FMT_*) * @icndmr: ICnDMR register value - * @bpp: bytes per pixel * @yuv: Flag to indicate whether the format is YUV-based. */ struct rzg2l_cru_ip_format { @@ -76,7 +75,6 @@ struct rzg2l_cru_ip_format { u32 datatype; u32 format; u32 icndmr; - u8 bpp; bool yuv; }; diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index 76a2b451f1daf..399a337dbafbf 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -16,7 +16,6 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .code = MEDIA_BUS_FMT_UYVY8_1X16, .datatype = MIPI_CSI2_DT_YUV422_8B, .format = V4L2_PIX_FMT_UYVY, - .bpp = 2, .icndmr = ICnDMR_YCMODE_UYVY, .yuv = true, }, @@ -24,7 +23,6 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .format = V4L2_PIX_FMT_SBGGR8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, .yuv = false, }, @@ -32,7 +30,6 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .format = V4L2_PIX_FMT_SGBRG8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, .yuv = false, }, @@ -40,7 +37,6 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .format = V4L2_PIX_FMT_SGRBG8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, .yuv = false, }, @@ -48,7 +44,6 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .format = V4L2_PIX_FMT_SRGGB8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, .yuv = false, }, diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c index 17a1af507a270..028b390488c84 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c @@ -711,8 +711,7 @@ static void rzg2l_cru_format_align(struct rzg2l_cru_dev *cru, v4l_bound_align_image(&pix->width, 320, RZG2L_CRU_MAX_INPUT_WIDTH, 1, &pix->height, 240, RZG2L_CRU_MAX_INPUT_HEIGHT, 2, 0); - pix->bytesperline = pix->width * fmt->bpp; - pix->sizeimage = pix->bytesperline * pix->height; + v4l2_fill_pixfmt(pix, pix->pixelformat, pix->width, pix->height); dev_dbg(cru->dev, "Format %ux%u bpl: %u size: %u\n", pix->width, pix->height, pix->bytesperline, pix->sizeimage); From patchwork Mon Dec 2 14:58:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 13890871 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 483B4208969 for ; Mon, 2 Dec 2024 14:58:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151531; cv=none; b=s/9Oq5eun+c8ASNcS++50GamUel143Ike1yb1SgqeDY5itYVsceZq3y/OOti/vF0GKJzH8C9P2DgZfNPXngfGPyZ48YpSvO82jl/k6YDMQBAqoEl8TeipXpoZq8/RTpCAyXRGooP7sUj6JFQT9q+Rw4k8St0xdVXhMABKmYUuCc= ARC-Message-Signature: i=1; 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Mon, 2 Dec 2024 15:58:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733151495; bh=KMThR1ftkkd2GZtT3jZFUOmNERSEZJ3FC4H3QwJCiSs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fpz4BnxcJtLWy18kRjGkO9yo1VQ9uB9TgSxWw6VdSENDidf4YWUA4o4r8GDvaYk9x w4y6quK5H8D6kK1szMCS/39NWJtIwixwO1rUcaUVxsVuCoL3M86RA5C0FOER9P009k 7phVMk2FqIk1JN2inal4zxIeWjwFhkl3NciO2doo= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, jacopo.mondi@ideasonboard.com, isaac.scott@ideasonboard.com, Daniel Scally Subject: [PATCH v3 4/5] media: rzg2l-cru: Support multiple mbus codes per pixel format Date: Mon, 2 Dec 2024 14:58:30 +0000 Message-Id: <20241202145831.127297-5-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202145831.127297-1-dan.scally@ideasonboard.com> References: <20241202145831.127297-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As a preliminary step for supporting the CRU pixel formats, extend the driver such that multiple media bus codes can support each of the output pixel formats. Signed-off-by: Daniel Scally Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar --- Changes in v3: - New patch due to changes to patch 1 .../platform/renesas/rzg2l-cru/rzg2l-cru.h | 8 ++- .../platform/renesas/rzg2l-cru/rzg2l-ip.c | 67 +++++++++++++++---- .../platform/renesas/rzg2l-cru/rzg2l-video.c | 2 +- 3 files changed, 61 insertions(+), 16 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h index aaf85054f8842..ab923bfa3becf 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h @@ -71,7 +71,11 @@ struct rzg2l_cru_ip { * @yuv: Flag to indicate whether the format is YUV-based. */ struct rzg2l_cru_ip_format { - u32 code; + /* + * RAW output formats might be produced by RAW media codes with any one + * of the 4 common bayer patterns. + */ + u32 codes[4]; u32 datatype; u32 format; u32 icndmr; @@ -169,5 +173,7 @@ struct v4l2_mbus_framefmt *rzg2l_cru_ip_get_src_fmt(struct rzg2l_cru_dev *cru); const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code); const struct rzg2l_cru_ip_format *rzg2l_cru_ip_format_to_fmt(u32 format); const struct rzg2l_cru_ip_format *rzg2l_cru_ip_index_to_fmt(u32 index); +bool rzg2l_cru_ip_fmt_supports_mbus_code(const struct rzg2l_cru_ip_format *fmt, + unsigned int code); #endif diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index 399a337dbafbf..54a79d5c13e10 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -13,35 +13,45 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { { - .code = MEDIA_BUS_FMT_UYVY8_1X16, + .codes = { + MEDIA_BUS_FMT_UYVY8_1X16, + }, .datatype = MIPI_CSI2_DT_YUV422_8B, .format = V4L2_PIX_FMT_UYVY, .icndmr = ICnDMR_YCMODE_UYVY, .yuv = true, }, { - .code = MEDIA_BUS_FMT_SBGGR8_1X8, + .codes = { + MEDIA_BUS_FMT_SBGGR8_1X8, + }, .format = V4L2_PIX_FMT_SBGGR8, .datatype = MIPI_CSI2_DT_RAW8, .icndmr = 0, .yuv = false, }, { - .code = MEDIA_BUS_FMT_SGBRG8_1X8, + .codes = { + MEDIA_BUS_FMT_SGBRG8_1X8, + }, .format = V4L2_PIX_FMT_SGBRG8, .datatype = MIPI_CSI2_DT_RAW8, .icndmr = 0, .yuv = false, }, { - .code = MEDIA_BUS_FMT_SGRBG8_1X8, + .codes = { + MEDIA_BUS_FMT_SGRBG8_1X8, + }, .format = V4L2_PIX_FMT_SGRBG8, .datatype = MIPI_CSI2_DT_RAW8, .icndmr = 0, .yuv = false, }, { - .code = MEDIA_BUS_FMT_SRGGB8_1X8, + .codes = { + MEDIA_BUS_FMT_SRGGB8_1X8, + }, .format = V4L2_PIX_FMT_SRGGB8, .datatype = MIPI_CSI2_DT_RAW8, .icndmr = 0, @@ -51,11 +61,14 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code) { - unsigned int i; + unsigned int i, j; - for (i = 0; i < ARRAY_SIZE(rzg2l_cru_ip_formats); i++) - if (rzg2l_cru_ip_formats[i].code == code) - return &rzg2l_cru_ip_formats[i]; + for (i = 0; i < ARRAY_SIZE(rzg2l_cru_ip_formats); i++) { + for (j = 0; j < ARRAY_SIZE(rzg2l_cru_ip_formats[i].codes); j++) { + if (rzg2l_cru_ip_formats[i].codes[j] == code) + return &rzg2l_cru_ip_formats[i]; + } + } return NULL; } @@ -80,6 +93,17 @@ const struct rzg2l_cru_ip_format *rzg2l_cru_ip_index_to_fmt(u32 index) return &rzg2l_cru_ip_formats[index]; } +bool rzg2l_cru_ip_fmt_supports_mbus_code(const struct rzg2l_cru_ip_format *fmt, + unsigned int code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(fmt->codes); i++) + if (fmt->codes[i] == code) + return true; + + return false; +} struct v4l2_mbus_framefmt *rzg2l_cru_ip_get_src_fmt(struct rzg2l_cru_dev *cru) { struct v4l2_subdev_state *state; @@ -155,7 +179,7 @@ static int rzg2l_cru_ip_set_format(struct v4l2_subdev *sd, sink_format = v4l2_subdev_state_get_format(state, fmt->pad); if (!rzg2l_cru_ip_code_to_fmt(fmt->format.code)) - sink_format->code = rzg2l_cru_ip_formats[0].code; + sink_format->code = rzg2l_cru_ip_formats[0].codes[0]; else sink_format->code = fmt->format.code; @@ -181,11 +205,26 @@ static int rzg2l_cru_ip_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, struct v4l2_subdev_mbus_code_enum *code) { - if (code->index >= ARRAY_SIZE(rzg2l_cru_ip_formats)) - return -EINVAL; + unsigned int index = code->index; + unsigned int i, j; - code->code = rzg2l_cru_ip_formats[code->index].code; - return 0; + for (i = 0; i < ARRAY_SIZE(rzg2l_cru_ip_formats); i++) { + const struct rzg2l_cru_ip_format *fmt = &rzg2l_cru_ip_formats[i]; + + for (j = 0; j < ARRAY_SIZE(fmt->codes); j++) { + if (!fmt->codes[j]) + continue; + + if (!index) { + code->code = fmt->codes[j]; + return 0; + } + + index--; + } + } + + return -EINVAL; } static int rzg2l_cru_ip_enum_frame_size(struct v4l2_subdev *sd, diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c index 028b390488c84..57d1ff45ce1e9 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c @@ -891,7 +891,7 @@ static int rzg2l_cru_video_link_validate(struct media_link *link) if (fmt.format.width != cru->format.width || fmt.format.height != cru->format.height || fmt.format.field != cru->format.field || - video_fmt->code != fmt.format.code) + !rzg2l_cru_ip_fmt_supports_mbus_code(video_fmt, fmt.format.code)) return -EPIPE; return 0; From patchwork Mon Dec 2 14:58:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 13890870 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48358208967 for ; Mon, 2 Dec 2024 14:58:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151530; cv=none; b=UFmjymj99S1BZckhUJOSpOY2wTv2dVwyLeWSq8hV5+WxasiFaLp15l4HCxI331AUh6hKfkQzkZ8ElXQQiPUbqPwOwMJB7io7iCMvdH/HJcP9r7d8IYv1ZA3wsw4+HqyGU8SaKA6HfMyCozAOiY/ifBAD9NP9M8BPks6fl3NXM6M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733151530; c=relaxed/simple; bh=NzORBDlZ+2b3bTIpmo6N0TIjdVHHmntl2hVVYrgVoU0=; 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Mon, 2 Dec 2024 15:58:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733151495; bh=NzORBDlZ+2b3bTIpmo6N0TIjdVHHmntl2hVVYrgVoU0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oO90q0HeUn9gD0IK949YmFzEu87U1oJ9foopGk40J5dXT3U9poM4jXyFuajvBUvQD afmVu18fL11O29Uguw8QMssIHcpejMPgBBNeC1Q6G3no1isuThpJ4txiYrj7ttiXJ+ pWUsbkYjys7zaZFGtSmpSQwdLvs5yhBldNrvMp80= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, jacopo.mondi@ideasonboard.com, isaac.scott@ideasonboard.com, Daniel Scally Subject: [PATCH v3 5/5] media: platform: rzg2l-cru: Add support for RAW10/12/14 data Date: Mon, 2 Dec 2024 14:58:31 +0000 Message-Id: <20241202145831.127297-6-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202145831.127297-1-dan.scally@ideasonboard.com> References: <20241202145831.127297-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support to the rzg2l-cru driver to capture 10/12/14 bit bayer data and output it into the CRU's 64-bit packed pixel format. Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar Signed-off-by: Daniel Scally --- Changes in v3: - Fewer new entries as the RAWnn pixel formats support multiple mbus codes Changes in v2: - Minor updates accounting for rebase .../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 12 +++++++ .../platform/renesas/rzg2l-cru/rzg2l-ip.c | 36 +++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index 243a36b952cb3..d4b4b334d082f 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -192,6 +192,18 @@ static const struct rzg2l_csi2_format rzg2l_csi2_formats[] = { { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8, }, { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8, }, { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SBGGR10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SGBRG10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SGRBG10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SRGGB10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SBGGR12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SGBRG12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SGRBG12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SRGGB12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SBGGR14_1X14, .bpp = 14, }, + { .code = MEDIA_BUS_FMT_SGBRG14_1X14, .bpp = 14, }, + { .code = MEDIA_BUS_FMT_SGRBG14_1X14, .bpp = 14, }, + { .code = MEDIA_BUS_FMT_SRGGB14_1X14, .bpp = 14, }, }; static inline struct rzg2l_csi2 *sd_to_csi2(struct v4l2_subdev *sd) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index 54a79d5c13e10..a3432d8b54e82 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -57,6 +57,42 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .icndmr = 0, .yuv = false, }, + { + .codes = { + MEDIA_BUS_FMT_SBGGR10_1X10, + MEDIA_BUS_FMT_SGBRG10_1X10, + MEDIA_BUS_FMT_SGRBG10_1X10, + MEDIA_BUS_FMT_SRGGB10_1X10 + }, + .format = V4L2_PIX_FMT_CRU_RAW10, + .datatype = MIPI_CSI2_DT_RAW10, + .icndmr = 0, + .yuv = false, + }, + { + .codes = { + MEDIA_BUS_FMT_SBGGR12_1X12, + MEDIA_BUS_FMT_SGBRG12_1X12, + MEDIA_BUS_FMT_SGRBG12_1X12, + MEDIA_BUS_FMT_SRGGB12_1X12 + }, + .format = V4L2_PIX_FMT_CRU_RAW12, + .datatype = MIPI_CSI2_DT_RAW12, + .icndmr = 0, + .yuv = false, + }, + { + .codes = { + MEDIA_BUS_FMT_SBGGR14_1X14, + MEDIA_BUS_FMT_SGBRG14_1X14, + MEDIA_BUS_FMT_SGRBG14_1X14, + MEDIA_BUS_FMT_SRGGB14_1X14 + }, + .format = V4L2_PIX_FMT_CRU_RAW14, + .datatype = MIPI_CSI2_DT_RAW14, + .icndmr = 0, + .yuv = false, + }, }; const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code)