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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434aa7e4d42sm215482375e9.37.2024.12.03.03.01.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:07 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 01/10] iio: adc: ad7124: Don't create more channels than the driver can handle Date: Tue, 3 Dec 2024 12:00:21 +0100 Message-ID: <20241203110019.1520071-13-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1454; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=zn8zvV9Mo4O2rpc8Z3avU2Iyc7Z00tacRFBEl6WqSmQ=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTHdZucAX2c0f4j3lwLFQfEx4Ynwm9Zsma60 WqCqNIV1u+JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07kxwAKCRCPgPtYfRL+ TsRYB/4/A1UjY3nmdlsZz6U1VvAw06ETk1sobvVZ7QTDc131ydp5ZD3vx0mIBsp4FG1RP5ebW8f FbInr/cKnuhGQaVmdsoYhmmyw8vmHddCp/U0fjFASKcUSvmLHx7GSsTdq6Y6hjThl4rK5AZdoJH Oe4mGNiY/CDiRZ9ZjgBghjpP9N6RifJu5rrLtYIOLFQguCCH+UQIqiLjLDJHuKm6k1aWYDTVWZx FG3Q5t5OQuqTvmH5n7TWqhXJw4IjfOkCVUFDcqz/4whX7GRpIWqs2vLbqSzvoaqcVHWHnK5uMU3 og0JFKcl2dZeFJLC7YQw3kmKASeqx776mUpJlojkWIhbtcSQ X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 8d94bc2b1cac..5352b26bb391 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -821,6 +821,16 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (!st->num_channels) return dev_err_probe(dev, -ENODEV, "no channel children\n"); + /* + * The driver assigns each logical channel defined in the device tree + * statically one channel register. So only accept 16 such logical + * channels to not treat CONFIG_0 (i.e. the register following + * CHANNEL_15) as an additional channel register. The driver could be + * improved to lift this limitation. + */ + if (st->num_channels > AD7124_MAX_CHANNELS) + return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) From patchwork Tue Dec 3 11:00:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13892161 Received: from mail-wr1-f43.google.com (mail-wr1-f43.google.com [209.85.221.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 557A01E3765 for ; Tue, 3 Dec 2024 11:01:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733223674; cv=none; b=DYffhM1UMxTq9l/vsw9erLQRIVVqx1b8GO5tYm2aihwRINwvaGftFjgUG+Z3GzAi6ikI1BlL8LetTjVDFOys+gQfbQhP2xrDrR2vY122iQZgS2po9vELFzc5eC3xhX5+MtFW6ZDRMjhCjGvXkW7cq1b4rLixgDSQrF84qJsNa5I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733223674; c=relaxed/simple; bh=UpCDFbHiLoBrphP0ZQ6Ni+CRtV5VYT4LknAceCYNRfw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NdclzBFNhscQVE1gNn5p3SIEFu0v5TgZCyj8JSuhKS4M55GjX9c8i/mLvapH3IyHrLeB0+j7Cidcww89rFCXd2FRZ31HCt4mSBQjRyXnxJjRNDkNQ7ZjxDaVHpLaqhW0JTpNGFBpG3OsbCkQ4fcMimDKdXq4DD/jugk2P+0zLHk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=ojUoMtis; arc=none smtp.client-ip=209.85.221.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="ojUoMtis" Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-385e2c52c21so2006284f8f.2 for ; Tue, 03 Dec 2024 03:01:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1733223670; x=1733828470; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RITSuX/h//gaahWszdW0fpwFRnABn01F981JW4yCXNU=; b=ojUoMtisOXvHmvbY2DDMTVLBMWCgVdnIP3zOuUoz5V6exTAYqQpWPdRlkM6HwvDxUj 8JY7Do7xd2Zt+DV3HoZOllDhueSh2FmyCndJEc+nocKXMdAgicZL6M4LeXHzqSSZ35Fy r/C7zfypr4dRy18H/iPaRGPRzIREQjhfjRXdQjzU5SuXM+s14qwhNMzeCb4H/NfkycBn KdUhFH7ZddmCS+7yvbe6wb+3lMYel/EyeVawwcCPLIkqh/2PKAakz5AnDH2ZEzSWX9am 4cFjl8romufZT1ojXz/2SwWOZpnb53x6bP3uoDoWS93jwIA76Gs6fWgoxbwnOe3OYvM3 0Rxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733223670; x=1733828470; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RITSuX/h//gaahWszdW0fpwFRnABn01F981JW4yCXNU=; b=PVaXV/p6H9+MEk5TlRZ2fQ+hvv9AWOZRd5qrtaquyJKas1rDW2UfCY1ks0AVtED4q+ jDFczdrCUi3/HKfwanvOklNQd1Duytu88XxfavXTqzlJvZHf1DsZFdx8kJypUXd7hjwJ M2SbXsstQDLzXdcTCcYSBkHaYe7UzTWB1is/KSy40GgnPt5XOy/PYMVRne3x9iWCW7ll VW3K5zxXgc91990Bu6UrlaWwp7fKE4gRtNkl2lV3T25MerDkWgdUfetD5qtAruX0Y2De Vz8UcLcF/IcK7krGAr0l2L1smil00sujQNSzFAA5Y6GGp9EfGthdCyTwQVG1PQVsZ0Cy pyJQ== X-Forwarded-Encrypted: i=1; AJvYcCXbXum/X5I64uJLoVg5rXKsj0kFHibCKuaz21I3OGebgJl5U6w1vXKcoxSjywsr7dN9J7jCmgd5FPY=@vger.kernel.org X-Gm-Message-State: AOJu0YzVBzn/W0Bb8YU0UfsG0NSvnlF5K5YbKV7qh7p9HTKveAbCECny 1yFR6NllTln8HXxZpeX6/RRNVSPtQlq6pAKoXqgWE1werRcKlO8D3o9kUTg5cS4= X-Gm-Gg: ASbGncvDvFMUWJwexa4QKX6Xw/96EqRvX3kE9sGwJa+eWyLG4JqsxheaT1YPl1x68Ss QMz1/KDuezWMrzKwHGQ0l1g87xuD1eMOrsmzMiBk0Pzd0AqMhbuodJJFsKimMo/nJwrhjr9jAa0 CRDp1VMMxbrNI9kVEE4fhGmQ+I7Q5dJ885T483tPj6J5jCtdSXcJgGvA26+q7rWIRYjxY7LXqCg DgI9+lcVxJvRY0W/LNcjNsUoR1NFas8QCwarT0GmWuvE0hWETcRCUSsFaSb8q/vXIGBDrCMxIHT 8+a8z+C9q7obhtgSVbQ68w9MrPPHFkGr0mEHvqI= X-Google-Smtp-Source: AGHT+IFA46H2YPPErVFU4xOMsCcOhAl2fAi7jV0BkW3iIY0CR80NEQfPPI5aIOXtrg7jV8yoo66S3g== X-Received: by 2002:a5d:64a9:0:b0:381:f443:21d3 with SMTP id ffacd0b85a97d-385fd550480mr1563101f8f.57.1733223670641; Tue, 03 Dec 2024 03:01:10 -0800 (PST) Received: from localhost (p200300f65f242d005bbc9b581c6b9666.dip0.t-ipconnect.de. [2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e4617a61sm9560448f8f.3.2024.12.03.03.01.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:10 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 02/10] iio: adc: ad7124: Refuse invalid input specifiers Date: Tue, 3 Dec 2024 12:00:22 +0100 Message-ID: <20241203110019.1520071-14-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2144; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=UpCDFbHiLoBrphP0ZQ6Ni+CRtV5VYT4LknAceCYNRfw=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTK+1KZ5UiwNQ58Q3K97bSFf9BrVCEAt6t2k PM5wp0FvtGJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07kygAKCRCPgPtYfRL+ TiC7B/9MTToumMpHGv5g4UT8cZan5TcJIBaTnj1yrI+HniZROBrEH4Xl6T822fgSJNNEOmtijCf hIGLQPTzzkRyzNPpw2uAZMIPq2i3ZVifXJz4HYz3E6AJBdDoF4TEVtnxlr9/0LQxOw0BdPSpu79 JQLWhB19RFkyejHkh6ZCJpR+f0S9pnL/o0+IUMvP4IjwpKtw6zxu5gXBiyCRgty9/2LnGmbADND MpXFakDyt/Jblr1hJVwwWo1vfxvdslc5Cav2CbP1P2HTvnqToVHUQLbK4SNHL1turGt45fCWzYI KMiLohCN8FkkdjT9QYn6OSQY20cPUzN3N6D2+7h1FJZJgNO8 X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 has 8 analog inputs; the input select values 8 to 15 are reserved and not to be used. These are fine for ad7124-8. For both ad7124-4 and ad7124-8 values bigger than 15 are internal channels that might appear as inputs in the channels specified in the device description according to the description of commit f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation"), values bigger than 31 don't fit into the respective register bit field and the driver masked them to smaller values. Check for these invalid input specifiers and fail to probe if one is found. Fixes: f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 5352b26bb391..1f3342373f1c 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -807,6 +807,19 @@ static int ad7124_check_chip_id(struct ad7124_state *st) return 0; } +/* + * Input specifiers 8 - 15 are explicitly reserved for ad7124-4 + * while they are fine for ad7124-8. Values above 31 don't fit + * into the register field and so are invalid for sure. + */ +static bool ad7124_valid_input_select(unsigned int ain, const struct ad7124_chip_info *info) +{ + if (ain >= info->num_inputs && ain < 16) + return false; + + return ain <= FIELD_MAX(AD7124_CHANNEL_AINM_MSK); +} + static int ad7124_parse_channel_config(struct iio_dev *indio_dev, struct device *dev) { @@ -859,6 +872,11 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (ret) return ret; + if (!ad7124_valid_input_select(ain[0], st->chip_info) || + !ad7124_valid_input_select(ain[1], st->chip_info)) + return dev_err_probe(dev, -EINVAL, + "diff-channels property of %pfwP contains invalid data\n", child); + st->channels[channel].nr = channel; st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | AD7124_CHANNEL_AINM(ain[1]); From patchwork Tue Dec 3 11:00:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13892162 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8606A1E32C8 for ; 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385df69feaasm12306869f8f.5.2024.12.03.03.01.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:14 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 03/10] dt-bindings: iio: adc: adi,ad7{124,173,192,780}: Allow specifications of a gpio for irq line Date: Tue, 3 Dec 2024 12:00:23 +0100 Message-ID: <20241203110019.1520071-15-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6969; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=5Tub12uEev+sB+BLTljeut3vy9a9tjb4HivXuPMPSPc=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTNNTqsRL8hAaWaOKYVUCPFcr816hVSkYjcx ZUd58ppUqqJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07kzQAKCRCPgPtYfRL+ TuU9B/9/g1XaXscsZ5SZs74BVOxKsUNZVYEvgqQ1NgA3SjRhmhukkC1ywSdwThBTSAPdgLQAuN2 04GB4INgMwuRyh7+eaO/7j4J0xjzU83k75V/herGlDc8a3QKmnboarEpjBYngQooTNGekU6ZWHO C2fM984u9E6fIpDj1VfM6kInGUv7Z7/Br3U4cU6dXZEJAotOQY4lmLIP/aKnKqxsrPh+jv0aIyN KCua2u7KuCL3V/+gZbSk0T1IBvf2fJBpiHkcpi9f/M9+dVSxef0QXwzS9cYrAWxaReOQPaaOdzC h4lqz6tSWoIH2udA5E0fviEMbUroO37zM9u8AG44cDzIhQXi X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 For the AD7124 chip and some of its cousins the logical irq line (̅R̅D̅Y) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Signed-off-by: Uwe Kleine-König Acked-by: Conor Dooley --- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 13 +++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7173.yaml | 12 ++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 15 +++++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7780.yaml | 11 +++++++++++ 4 files changed, 51 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 35ed04350e28..d7b4676ecc65 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -37,6 +37,17 @@ properties: description: IRQ line for the ADC maxItems: 1 + rdy-gpios: + description: + GPIO reading the ̅̅R̅D̅Y line. Having such a GPIO is technically optional but + highly recommended because DOUT/̅R̅D̅Y toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + '#address-cells': const: 1 @@ -111,6 +122,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -121,6 +133,7 @@ examples: spi-max-frequency = <5000000>; interrupts = <25 2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply = <&adc_vref>; clocks = <&ad7124_mclk>; clock-names = "mclk"; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml index 17c5d39cc2c1..155a6b280aaf 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml @@ -133,6 +133,17 @@ properties: '#clock-cells': const: 0 + rdy-gpios: + description: + GPIO reading the ̅̅R̅D̅Y line. Having such a GPIO is technically optional but + highly recommended because DOUT/̅R̅D̅Y toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + patternProperties: "^channel@[0-9a-f]$": type: object @@ -440,6 +451,7 @@ examples: interrupts = <25 IRQ_TYPE_EDGE_FALLING>; interrupt-names = "rdy"; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; spi-max-frequency = <5000000>; gpio-controller; #gpio-cells = <2>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 66dd1c549bd3..6f584830ace1 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -106,6 +106,17 @@ properties: description: see Documentation/devicetree/bindings/iio/adc/adc.yaml type: boolean + rdy-gpios: + description: + GPIO reading the ̅̅R̅D̅Y line. Having such a GPIO is technically optional but + highly recommended because DOUT/̅R̅D̅Y toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + patternProperties: "^channel@[0-9a-f]+$": type: object @@ -181,6 +192,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -195,6 +207,7 @@ examples: clock-names = "mclk"; interrupts = <25 0x2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; aincom-supply = <&aincom>; dvdd-supply = <&dvdd>; avdd-supply = <&avdd>; @@ -207,6 +220,7 @@ examples: }; }; - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -224,6 +238,7 @@ examples: #clock-cells = <0>; interrupts = <25 0x2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; aincom-supply = <&aincom>; dvdd-supply = <&dvdd>; avdd-supply = <&avdd>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml index be2616ff9af6..28a384adb5aa 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml @@ -63,6 +63,17 @@ properties: marked GPIO_ACTIVE_LOW. maxItems: 1 + rdy-gpios: + description: + GPIO reading the ̅̅R̅D̅Y line. Having such a GPIO is technically optional but + highly recommended because DOUT/̅R̅D̅Y toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434aa7e5e59sm220478035e9.44.2024.12.03.03.01.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:17 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 04/10] iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIO Date: Tue, 3 Dec 2024 12:00:24 +0100 Message-ID: <20241203110019.1520071-16-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4052; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=3VYK2lqcXHXpyUFZjq+zgESMLPVepCyq2JNbLTqaCCM=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTQPIMxf/kANGRxUASya61ZjKGNpN0xlaFan tfW8FmkCwmJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k0AAKCRCPgPtYfRL+ TsttB/9AxvdY4SibFdPk0V+GqGCMwPDmRD/tV/YO8VOYatnpwO6Pm/l2ReN2/xEMb/5rlX9NQj2 CuiK3EuWFzm7czonfdaguVtujaYHUnbFdgaQyyt7qF+IEB4/tqoVymhk0/61an7u9GdB7eqJpLv GuT9jH9X7iKFsIYso2FYbjYkD9iuqRz0htyrlxOIU7QlArzdqvcUQyLEPPgylS/mkW1NVJrxDQz AoEFHj8+K9B0V3omseG6KKnHZyq8V/zv70Rl9ESlsYOVS4ebnzpL6wwUhmAflJwpoZJUuzAQI25 CnAXaeZKcAw4yPEL+y17+z0ENj8UsZuFlcur1uI+c7GnynP+ X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Some of the ADCs by Analog signal their irq condition on the MISO line. So typically that line is connected to an SPI controller and a GPIO. The GPIO is used as input and the respective interrupt is enabled when the last SPI transfer is completed. Depending on the GPIO controller the toggling MISO line might make the interrupt pending even while it's masked. In that case the irq handler is called immediately after irq_enable() and so before the device actually pulls that line low which results in non-sense values being reported to the upper layers. The only way to find out if the line was actually pulled low is to read the GPIO. (There is a flag in AD7124's status register that also signals if an interrupt was asserted, but reading that register toggles the MISO line and so might trigger another spurious interrupt.) Add the possibility to specify an interrupt GPIO in the machine description in addition to the plain interrupt. This GPIO is used then to check if the irq line is actually active in the irq handler. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 38 ++++++++++++++++++++++---- include/linux/iio/adc/ad_sigma_delta.h | 2 ++ 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index ea4aabd3960a..7f4eae5244dc 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -539,12 +539,29 @@ static irqreturn_t ad_sd_data_rdy_trig_poll(int irq, void *private) { struct ad_sigma_delta *sigma_delta = private; - complete(&sigma_delta->completion); - disable_irq_nosync(irq); - sigma_delta->irq_dis = true; - iio_trigger_poll(sigma_delta->trig); + /* + * AD7124 and a few others use the same physical line for interrupt + * reporting (nRDY) and MISO. + * As MISO toggles when reading a register, this likely results in a + * pending interrupt. This has two consequences: a) The irq might + * trigger immediately after it's enabled even though the conversion + * isn't done yet; and b) checking the STATUS register's nRDY flag is + * off-limits as reading that would trigger another irq event. + * + * So read the MOSI line as GPIO (if available) and only trigger the irq + * if the line is active. Without such a GPIO assume this is a valid + * interrupt. + */ + if (!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) { + complete(&sigma_delta->completion); + disable_irq_nosync(irq); + sigma_delta->irq_dis = true; + iio_trigger_poll(sigma_delta->trig); - return IRQ_HANDLED; + return IRQ_HANDLED; + } + + return IRQ_NONE; } /** @@ -679,6 +696,17 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, else sigma_delta->irq_line = spi->irq; + sigma_delta->rdy_gpiod = devm_gpiod_get_optional(&spi->dev, "rdy", GPIOD_IN); + if (IS_ERR(sigma_delta->rdy_gpiod)) + return dev_err_probe(&spi->dev, PTR_ERR(sigma_delta->rdy_gpiod), + "Failed to find rdy gpio\n"); + + if (sigma_delta->rdy_gpiod && !sigma_delta->irq_line) { + sigma_delta->irq_line = gpiod_to_irq(sigma_delta->rdy_gpiod); + if (sigma_delta->irq_line < 0) + return sigma_delta->irq_line; + } + iio_device_set_drvdata(indio_dev, sigma_delta); return 0; diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index f8c1d2505940..126b187d70e9 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -29,6 +29,7 @@ struct ad_sd_calib_data { struct ad_sigma_delta; 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385ddb364e3sm12796164f8f.27.2024.12.03.03.01.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:20 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 05/10] iio: adc: ad_sigma_delta: Handle CS assertion as intended in ad_sd_read_reg_raw() Date: Tue, 3 Dec 2024 12:00:25 +0100 Message-ID: <20241203110019.1520071-17-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=953; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=dkTnukD2rrkruTwfH798eaeGxe3q8221q3Q+tAj6IYI=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTTrHUffRNjnKdY3og9fWY46C7ZE5BO0lhvf IA8qsTdgOqJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k0wAKCRCPgPtYfRL+ TvIdCACT/CGSXboDEpBNsSE4VcFYnMpX7yyqbiq79d6mTLGclPH0/isWLJzrUXKEFDz35YItMCr VhZd0oQeklOrjgwqVtA2AzU94ju04iV9uthjbSGEIDkYeGXqm7FqoWoQowKA7aW1yEb19oXkbj5 guhgxznuAizgqzIcHaKHvCQvJ6Lt5D7VFgEdbBS6PvtkqO+nozrg7FY0WohbzkFLqFXqF2ecWX7 F5fyCyNN8uQGoHbtDHOmQXYs2oAjWriuhUGgseLVcNSoHPGWWOkA4cKh0FsF+hFPIsTYC5LHvMc MCa2bTlRnBDrs/WtYtBSy2QjBYlBRpQfWPAfm9mzG7LWtHoN X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 When struct ad_sigma_delta::keep_cs_asserted was introduced only register writing was adapted to honor this new flag. Also respect it when reading a register. Fixes: df1d80aee963 ("iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion") Reviewed-by: Trevor Gamblin Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 7f4eae5244dc..a2efd2145373 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -109,7 +109,7 @@ static int ad_sd_read_reg_raw(struct ad_sigma_delta *sigma_delta, }, { .rx_buf = val, .len = size, - .cs_change = sigma_delta->bus_locked, + .cs_change = sigma_delta->keep_cs_asserted, }, }; struct spi_message m; From patchwork Tue Dec 3 11:00:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13892165 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAFF01E3772 for ; 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385ccd3a522sm15094135f8f.52.2024.12.03.03.01.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:24 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 06/10] iio: adc: ad_sigma_delta: Fix a race condition Date: Tue, 3 Dec 2024 12:00:26 +0100 Message-ID: <20241203110019.1520071-18-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5630; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=/UtxUNcu7FlfgGbbbYqeI92ekworOfOuWxMulK9vmm4=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTXZ1jctnT359wUzbJNDXuiikKyGWIfPGgx0 Z+4vPzq9DCJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k1wAKCRCPgPtYfRL+ TurMCACwp77bmy+d6tT9ffLfcGgapofq3I0A69QQLgwSDQDkHV6DV6Ocn8b57sVXwxxOYdYTuVc i9D9DrnxW7F7VWt5FpvNE05FtiQT0cyCovcTw7Kdq7Roq3ohdg8OfM8VkuaohTHDsKrQmZKo5lx XtN3iculo8PK7W3XDDj5vf68YrE/N7DLFUp6JMo9UHkY6dh5IHj4B+Oadwj57S64GbhZL+r4O9l AN0ZfmzsS0aNVlJdcyreYGowxvfcs3ibawQyLvXdGoWOZYSNc7BzKvgYOOPHGcoyCNNKxHcKuzg VsrSWayXZGx70Z8RDeueIONdx4fTM1f8tRbG6Rlzns1H8Ll+ X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad_sigma_delta driver helper uses irq_disable_nosync(). With that one it is possible that the irq handler still runs after the irq_disable_nosync() function call returns. Also to properly synchronize irq disabling in the different threads proper locking is needed and because it's unclear if the irq handler's irq_disable_nosync() call comes first or the one in the enabler's error path, all code locations that disable the irq must check for .irq_dis first to ensure there is exactly one disable call per enable call. So add a spinlock to the struct ad_sigma_delta and use it to synchronize irq enabling and disabling. Also only act in the irq handler if the irq is still enabled. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 56 ++++++++++++++++---------- include/linux/iio/adc/ad_sigma_delta.h | 1 + 2 files changed, 36 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index a2efd2145373..9abde276cd17 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -202,6 +202,27 @@ int ad_sd_reset(struct ad_sigma_delta *sigma_delta, } EXPORT_SYMBOL_NS_GPL(ad_sd_reset, IIO_AD_SIGMA_DELTA); +static bool ad_sd_disable_irq(struct ad_sigma_delta *sigma_delta) +{ + guard(spinlock_irqsave)(&sigma_delta->irq_lock); + + /* It's already off, return false to indicate nothing was changed */ + if (sigma_delta->irq_dis) + return false; + + sigma_delta->irq_dis = true; + disable_irq_nosync(sigma_delta->irq_line); + return true; +} + +static void ad_sd_enable_irq(struct ad_sigma_delta *sigma_delta) +{ + guard(spinlock_irqsave)(&sigma_delta->irq_lock); + + sigma_delta->irq_dis = false; + enable_irq(sigma_delta->irq_line); +} + int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { @@ -221,12 +242,10 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, if (ret < 0) goto out; - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); time_left = wait_for_completion_timeout(&sigma_delta->completion, 2 * HZ); if (time_left == 0) { - sigma_delta->irq_dis = true; - disable_irq_nosync(sigma_delta->irq_line); + ad_sd_disable_irq(sigma_delta); ret = -EIO; } else { ret = 0; @@ -294,8 +313,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); ret = wait_for_completion_interruptible_timeout( &sigma_delta->completion, HZ); @@ -314,10 +332,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, &raw_sample); out: - if (!sigma_delta->irq_dis) { - disable_irq_nosync(sigma_delta->irq_line); - sigma_delta->irq_dis = true; - } + ad_sd_disable_irq(sigma_delta); sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); @@ -396,8 +411,7 @@ static int ad_sd_buffer_postenable(struct iio_dev *indio_dev) if (ret) goto err_unlock; - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); return 0; @@ -414,10 +428,7 @@ static int ad_sd_buffer_postdisable(struct iio_dev *indio_dev) reinit_completion(&sigma_delta->completion); wait_for_completion_timeout(&sigma_delta->completion, HZ); - if (!sigma_delta->irq_dis) { - disable_irq_nosync(sigma_delta->irq_line); - sigma_delta->irq_dis = true; - } + ad_sd_disable_irq(sigma_delta); sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); @@ -516,8 +527,7 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p) irq_handled: iio_trigger_notify_done(indio_dev->trig); - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); return IRQ_HANDLED; } @@ -551,11 +561,13 @@ static irqreturn_t ad_sd_data_rdy_trig_poll(int irq, void *private) * So read the MOSI line as GPIO (if available) and only trigger the irq * if the line is active. Without such a GPIO assume this is a valid * interrupt. + * + * Also as disable_irq_nosync() is used to disable the irq, only act if + * the irq wasn't disabled before. */ - if (!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) { + if ((!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) && + ad_sd_disable_irq(sigma_delta)) { complete(&sigma_delta->completion); - disable_irq_nosync(irq); - sigma_delta->irq_dis = true; iio_trigger_poll(sigma_delta->trig); return IRQ_HANDLED; @@ -691,6 +703,8 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, } } + spin_lock_init(&sigma_delta->irq_lock); + if (info->irq_line) sigma_delta->irq_line = info->irq_line; else diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index 126b187d70e9..f86eca6126b4 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -86,6 +86,7 @@ struct ad_sigma_delta { /* private: */ struct completion completion; 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d0575d29sm16983315e9.1.2024.12.03.03.01.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:28 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 07/10] iio: adc: ad_sigma_delta: Store information about reset sequence length Date: Tue, 3 Dec 2024 12:00:27 +0100 Message-ID: <20241203110019.1520071-19-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6415; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=2HKcFo7TQCrQ4num0VNgfMdjg/saRUqyt2yVyJlKlYY=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTafPehvuD7NanA5CU+zAVsKAUhDZ6URvb5T rJan46pg8iJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k2gAKCRCPgPtYfRL+ TqqHB/4u5YA4lR+TEnBBp4375AW4aaA03VWSP9GUhKuk+Yz1tTpoMlHbw8BhzAAtLrz0/HxbCp1 rokpEGARiU5mlXjo8F4usSD8JCkhtUsXQKNqvZNfM9LWVp5gC1vZ3CqAa41WGHI0iaUglbGd84D ylqrl+dKqxQMqFOdBVYQpl9FDn4/YKHncOv8U8MQ/MHxblVNsvpValKn6GLsE9L90+8nblcfqn6 GWSyUoqTiG1ZB3CDk9PElR+pPCXC9AcnaJfv4WbjE/5cvaObCPxvAXjMWzNA9q9Hf+x2vXWy30/ hAQNMErEjFDxj0D+N5EqHxQdKNp7SunI8Qzd/tdXf++PWdWO X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The various chips can be reset using a sequence of SPI transfers with MOSI = 1. The length of such a sequence varies from chip to chip. Store that length in struct ad_sigma_delta_info and replace the respective parameter to ad_sd_reset() with it. Note the ad7192 used to pass 48 as length but the documentation specifies 40 as the required length. Assuming the latter is right. (Using a too long sequence doesn't hurt apart from using a longer spi transfer than necessary, so this is no relevant fix.) The motivation for storing this information is that this is useful to clear a pending RDY signal in the next change. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 3 ++- drivers/iio/adc/ad7173.c | 1 + drivers/iio/adc/ad7192.c | 4 +++- drivers/iio/adc/ad7791.c | 1 + drivers/iio/adc/ad7793.c | 3 ++- drivers/iio/adc/ad_sigma_delta.c | 5 ++--- include/linux/iio/adc/ad_sigma_delta.h | 5 +++-- 7 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 1f3342373f1c..b17c3dbeaeba 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -571,6 +571,7 @@ static const struct ad_sigma_delta_info ad7124_sigma_delta_info = { .data_reg = AD7124_DATA, .num_slots = 8, .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 64, }; static int ad7124_read_raw(struct iio_dev *indio_dev, @@ -756,7 +757,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) unsigned int readval, timeout; int ret; - ret = ad_sd_reset(&st->sd, 64); + ret = ad_sd_reset(&st->sd); if (ret < 0) return ret; diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 0702ec71aa29..2550194efee8 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -744,6 +744,7 @@ static struct ad_sigma_delta_info ad7173_sigma_delta_info = { .read_mask = BIT(6), .status_ch_mask = GENMASK(3, 0), .data_reg = AD7173_REG_DATA, + .num_resetclks = 64, }; static int ad7173_setup(struct iio_dev *indio_dev) diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 7042ddfdfc03..c4dd48edd8d9 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -361,6 +361,7 @@ static const struct ad_sigma_delta_info ad7192_sigma_delta_info = { .status_ch_mask = GENMASK(3, 0), .num_slots = 4, .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 40, }; static const struct ad_sigma_delta_info ad7194_sigma_delta_info = { @@ -373,6 +374,7 @@ static const struct ad_sigma_delta_info ad7194_sigma_delta_info = { .read_mask = BIT(6), .status_ch_mask = GENMASK(3, 0), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 40, }; static const struct ad_sd_calib_data ad7192_calib_arr[8] = { @@ -565,7 +567,7 @@ static int ad7192_setup(struct iio_dev *indio_dev, struct device *dev) int i, ret, id; /* reset the serial interface */ - ret = ad_sd_reset(&st->sd, 48); + ret = ad_sd_reset(&st->sd); if (ret < 0) return ret; usleep_range(500, 1000); /* Wait for at least 500us */ diff --git a/drivers/iio/adc/ad7791.c b/drivers/iio/adc/ad7791.c index 86effe8501b4..c7509b911835 100644 --- a/drivers/iio/adc/ad7791.c +++ b/drivers/iio/adc/ad7791.c @@ -254,6 +254,7 @@ static const struct ad_sigma_delta_info ad7791_sigma_delta_info = { .addr_shift = 4, .read_mask = BIT(3), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 32, }; static int ad7791_read_raw(struct iio_dev *indio_dev, diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c index abebd519cafa..0767c56bb442 100644 --- a/drivers/iio/adc/ad7793.c +++ b/drivers/iio/adc/ad7793.c @@ -206,6 +206,7 @@ static const struct ad_sigma_delta_info ad7793_sigma_delta_info = { .addr_shift = 3, .read_mask = BIT(6), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 32, }; static const struct ad_sd_calib_data ad7793_calib_arr[6] = { @@ -265,7 +266,7 @@ static int ad7793_setup(struct iio_dev *indio_dev, return ret; /* reset the serial interface */ - ret = ad_sd_reset(&st->sd, 32); + ret = ad_sd_reset(&st->sd); if (ret < 0) goto out; usleep_range(500, 2000); /* Wait for at least 500us */ diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 9abde276cd17..9891346c2d73 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -178,13 +178,12 @@ EXPORT_SYMBOL_NS_GPL(ad_sd_read_reg, IIO_AD_SIGMA_DELTA); * ad_sd_reset() - Reset the serial interface * * @sigma_delta: The sigma delta device - * @reset_length: Number of SCLKs with DIN = 1 * * Returns 0 on success, an error code otherwise. **/ -int ad_sd_reset(struct ad_sigma_delta *sigma_delta, - unsigned int reset_length) +int ad_sd_reset(struct ad_sigma_delta *sigma_delta) { + unsigned int reset_length = sigma_delta->info->num_resetclks; uint8_t *buf; unsigned int size; int ret; diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index f86eca6126b4..eef87d04eb6b 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -54,6 +54,7 @@ struct iio_dev; * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots * @irq_line: IRQ for reading conversions. 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e038fd96sm11631001f8f.99.2024.12.03.03.01.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:30 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 08/10] iio: adc: ad_sigma_delta: Check for previous ready signals Date: Tue, 3 Dec 2024 12:00:28 +0100 Message-ID: <20241203110019.1520071-20-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4681; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=he0cVYfpQa7wau1Twc6qaQz5l4LmLSj99huWty3K/Cw=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTdf05eTNCYKfIAfYuGAzAtKhzuaX0MxXuXC 7TzctAPdvCJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k3QAKCRCPgPtYfRL+ TgezB/wK5Rl6LOswxnyfRkwy8hZVuQQJ6LH03eZKcdabo5tOR9K6yv8k4vLq3eU53XN8iI3mrNq puVR56fxnZZMKP8tqCbLlM2aO9eqI0ANEcmRNx3K8+MU0Lz6E6+gljPN1uGVctD27EDJjl+Mc8B 6jxn1Rx0SCEY5lYxbIlwjgexRYdlIEWyTkZoCwqb6XsnaBBqURuzASe1PQ0prrorEi+r9rFKupd 4wYPWBLDZ1jVr0yhoi1LQDtuXNjqKWQvkr9DcekwyMvFJiTV3NLfTJua43q8UD28Jp4VJK44nte ZRd9dXZuz5fpWznRxW+txHjZnbU28DD1GP1TEzEY2K+jLK9O X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 It can happen if a previous conversion was aborted the ADC pulls down the ̅R̅D̅Y line but the event wasn't handled before. In that case enabling the irq might immediately fire (depending on the irq controller's capabilities) and even with a rdy-gpio isn't identified as an unrelated one. To cure that problem check for a pending event before the measurement is started and clear it if needed. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 95 ++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 9891346c2d73..308e24dbfd16 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -29,8 +29,11 @@ #define AD_SD_COMM_CHAN_MASK 0x3 #define AD_SD_REG_COMM 0x00 +#define AD_SD_REG_STATUS 0x00 #define AD_SD_REG_DATA 0x03 +#define AD_SD_REG_STATUS_RDY 0x80 + /** * ad_sd_set_comm() - Set communications register * @@ -222,6 +225,86 @@ static void ad_sd_enable_irq(struct ad_sigma_delta *sigma_delta) enable_irq(sigma_delta->irq_line); } +#define AD_SD_CLEAR_DATA_BUFLEN 9 + +/* Called with `sigma_delta->bus_locked == true` only. */ +static int ad_sigma_delta_clear_pending_event(struct ad_sigma_delta *sigma_delta) +{ + bool pending_event; + unsigned int data_read_len = BITS_TO_BYTES(sigma_delta->info->num_resetclks); + u8 *data; + struct spi_transfer t[] = { + { + .len = 1, + }, { + .len = data_read_len, + } + }; + struct spi_message m; + int ret; + + /* + * Read RDY pin (if possible) or status register to check if there is an + * old event. + */ + if (sigma_delta->rdy_gpiod) { + pending_event = gpiod_get_value(sigma_delta->rdy_gpiod); + } else { + unsigned status_reg; + + ret = ad_sd_read_reg(sigma_delta, AD_SD_REG_STATUS, 1, &status_reg); + if (ret) + return ret; + + pending_event = !(status_reg & AD_SD_REG_STATUS_RDY); + } + + if (!pending_event) + return 0; + + /* + * In general the size of the data register is unknown. It varies from + * device to device, might be one byte longer if CONTROL.DATA_STATUS is + * set and even varies on some devices depending on which input is + * selected. So send one byte to start reading the data register and + * then just clock for some bytes with DIN (aka MOSI) high to not + * confuse the register access state machine after the data register was + * completely read. Note however that the sequence length must be + * shorter than the reset procedure. + */ + + data = kzalloc(data_read_len + 1, GFP_KERNEL); + if (!data) + return -ENOMEM; + + spi_message_init(&m); + if (sigma_delta->info->has_registers) { + unsigned int data_reg = sigma_delta->info->data_reg ?: AD_SD_REG_DATA; + + data[0] = data_reg << sigma_delta->info->addr_shift; + data[0] |= sigma_delta->info->read_mask; + data[0] |= sigma_delta->comm; + t[0].tx_buf = data; + spi_message_add_tail(&t[0], &m); + } + + /* + * The first transferred byte is part of the real data register, + * so this doesn't need to be 0xff. In the remaining + * `data_read_len - 1` bytes are less than $num_resetclks ones. + */ + t[1].tx_buf = data + 1; + data[1] = 0x00; + memset(data + 2, 0xff, data_read_len - 1); + spi_message_add_tail(&t[1], &m); + + ret = spi_sync_locked(sigma_delta->spi, &m); + + kfree(data); + + return ret; +} + int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { @@ -237,6 +320,10 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, sigma_delta->keep_cs_asserted = true; reinit_completion(&sigma_delta->completion); + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + return ret; + ret = ad_sigma_delta_set_mode(sigma_delta, mode); if (ret < 0) goto out; @@ -310,6 +397,10 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, sigma_delta->keep_cs_asserted = true; reinit_completion(&sigma_delta->completion); + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + return ret; + ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); ad_sd_enable_irq(sigma_delta); @@ -406,6 +497,10 @@ static int ad_sd_buffer_postenable(struct iio_dev *indio_dev) sigma_delta->bus_locked = true; sigma_delta->keep_cs_asserted = true; + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + return ret; + ret = ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_CONTINUOUS); if (ret) goto err_unlock; From patchwork Tue Dec 3 11:00:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13892168 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D84A91E47B9 for ; Tue, 3 Dec 2024 11:01:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434b0f32589sm189216425e9.28.2024.12.03.03.01.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:33 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 09/10] iio: adc: ad7124: Add error reporting during probe Date: Tue, 3 Dec 2024 12:00:29 +0100 Message-ID: <20241203110019.1520071-21-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7578; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=KqvwXZaRvv9GSGI/LYFDg6O+kYZP0S5RykbY4ZVAHHY=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTg21u9PBaHL9RvbdKYINTvca8kYaTJvCcrL 1ugRtmXPMCJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k4AAKCRCPgPtYfRL+ TjsPCACWsD4/oslP+HjQsLo0TX9mOqEfFwVb9e8aY+MT0q0PgRuW+Rmb5HDUtNrmdN3kms38WFL 0VLCbui6Ef8kw+E57IlYnCDiogbY7UQOAirKtKvQKNIZmJkE4Qbq/WcOJlvG08DHGx4gsuCPeiu VGGeJ7SBafshtTw4z+B+s06jjLrGTIORDWTmW8rttgOvs4XtbJIgg8ah4Er5nye5h1HD0mw8kgX aIj975K3TkA9Zz5J8XWFJr/3295T6YAmkssPpkJu0EjjPgSuVR3FVFc1tOdu4Zi2Bs4jRcd2Nns TZkRysdA+7Hh5OVcksGnKF3EL+RyM9kDz6JnQ1faFwymESc/ X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 A driver that silently fails to probe is annoying and hard to debug. So add messages in the error paths of the probe function. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 76 +++++++++++++++++++++------------------- 1 file changed, 40 insertions(+), 36 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index b17c3dbeaeba..9405cb579324 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -360,20 +360,21 @@ static int ad7124_find_free_config_slot(struct ad7124_state *st) return free_cfg_slot; } +/* Only called during probe, so dev_err_probe() can be used */ static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channel_config *cfg) { + struct device *dev = &st->sd.spi->dev; unsigned int refsel = cfg->refsel; switch (refsel) { case AD7124_REFIN1: case AD7124_REFIN2: case AD7124_AVDD_REF: - if (IS_ERR(st->vref[refsel])) { - dev_err(&st->sd.spi->dev, - "Error, trying to use external voltage reference without a %s regulator.\n", - ad7124_ref_names[refsel]); - return PTR_ERR(st->vref[refsel]); - } + if (IS_ERR(st->vref[refsel])) + return dev_err_probe(dev, PTR_ERR(st->vref[refsel]), + "Error, trying to use external voltage reference without a %s regulator.\n", + ad7124_ref_names[refsel]); + cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); /* Conversion from uV to mV */ cfg->vref_mv /= 1000; @@ -384,8 +385,7 @@ static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channe st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); return 0; default: - dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Invalid reference %d\n", refsel); } } @@ -752,8 +752,10 @@ static const struct iio_info ad7124_info = { .attrs = &ad7124_attrs_group, }; +/* Only called during probe, so dev_err_probe() can be used */ static int ad7124_soft_reset(struct ad7124_state *st) { + struct device *dev = &st->sd.spi->dev; unsigned int readval, timeout; int ret; @@ -766,7 +768,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) do { ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Error reading status register\n"); if (!(readval & AD7124_STATUS_POR_FLAG_MSK)) return 0; @@ -775,35 +777,30 @@ static int ad7124_soft_reset(struct ad7124_state *st) usleep_range(100, 2000); } while (--timeout); - dev_err(&st->sd.spi->dev, "Soft reset failed\n"); - - return -EIO; + return dev_err_probe(dev, -EIO, "Soft reset failed\n"); } static int ad7124_check_chip_id(struct ad7124_state *st) { + struct device *dev = &st->sd.spi->dev; unsigned int readval, chip_id, silicon_rev; int ret; ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Failure to read ID register\n"); chip_id = AD7124_DEVICE_ID_GET(readval); silicon_rev = AD7124_SILICON_REV_GET(readval); - if (chip_id != st->chip_info->chip_id) { - dev_err(&st->sd.spi->dev, - "Chip ID mismatch: expected %u, got %u\n", - st->chip_info->chip_id, chip_id); - return -ENODEV; - } + if (chip_id != st->chip_info->chip_id) + return dev_err_probe(dev, -ENODEV, + "Chip ID mismatch: expected %u, got %u\n", + st->chip_info->chip_id, chip_id); - if (silicon_rev == 0) { - dev_err(&st->sd.spi->dev, - "Silicon revision empty. Chip may not be present\n"); - return -ENODEV; - } + if (silicon_rev == 0) + return dev_err_probe(dev, -ENODEV, + "Silicon revision empty. Chip may not be present\n"); return 0; } @@ -862,16 +859,18 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, device_for_each_child_node_scoped(dev, child) { ret = fwnode_property_read_u32(child, "reg", &channel); if (ret) - return ret; + return dev_err_probe(dev, ret, + "Failed to parse reg property of %pfwP\n", child); if (channel >= indio_dev->num_channels) return dev_err_probe(dev, -EINVAL, - "Channel index >= number of channels\n"); + "Channel index >= number of channels in %pfwP\n", child); ret = fwnode_property_read_u32_array(child, "diff-channels", ain, 2); if (ret) - return ret; + return dev_err_probe(dev, ret, + "Failed to parse diff-channels property of %pfwP\n", child); if (!ad7124_valid_input_select(ain[0], st->chip_info) || !ad7124_valid_input_select(ain[1], st->chip_info)) @@ -908,12 +907,13 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, static int ad7124_setup(struct ad7124_state *st) { + struct device *dev = &st->sd.spi->dev; unsigned int fclk, power_mode; int i, ret; fclk = clk_get_rate(st->mclk); if (!fclk) - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Failed to get mclk rate\n"); /* The power mode changes the master clock frequency */ power_mode = ad7124_find_closest_match(ad7124_master_clk_freq_hz, @@ -922,7 +922,7 @@ static int ad7124_setup(struct ad7124_state *st) if (fclk != ad7124_master_clk_freq_hz[power_mode]) { ret = clk_set_rate(st->mclk, fclk); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to set mclk rate\n"); } /* Set the power mode */ @@ -953,7 +953,7 @@ static int ad7124_setup(struct ad7124_state *st) ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Failed to setup CONTROL register\n"); return ret; } @@ -966,13 +966,14 @@ static void ad7124_reg_disable(void *r) static int ad7124_probe(struct spi_device *spi) { const struct ad7124_chip_info *info; + struct device *dev = &spi->dev; struct ad7124_state *st; struct iio_dev *indio_dev; int i, ret; info = spi_get_device_match_data(spi); if (!info) - return -ENODEV; + return dev_err_probe(dev, -ENODEV, "Failed to get match data\n"); indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); if (!indio_dev) @@ -1007,17 +1008,17 @@ static int ad7124_probe(struct spi_device *spi) ret = regulator_enable(st->vref[i]); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to enable regulator #%d\n", i); ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, st->vref[i]); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to register disable handler for regulator #%d\n", i); } st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); if (IS_ERR(st->mclk)) - return PTR_ERR(st->mclk); + return dev_err_probe(dev, PTR_ERR(st->mclk), "Failed to get mclk\n"); ret = ad7124_soft_reset(st); if (ret < 0) @@ -1033,10 +1034,13 @@ static int ad7124_probe(struct spi_device *spi) ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); if (ret < 0) - return ret; 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[2003:f6:5f24:2d00:5bbc:9b58:1c6b:9666]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434b0f32589sm189218195e9.28.2024.12.03.03.01.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:01:37 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alisa-Dariana Roman , Renato Lui Geh , Ceclan Dumitru , devicetree@vger.kernel.org, Nuno Sa , David Lechner , Alexandru Ardelean , Andy Shevchenko , Trevor Gamblin Subject: [PATCH v5 10/10] iio: adc: ad7124: Implement temperature measurement Date: Tue, 3 Dec 2024 12:00:30 +0100 Message-ID: <20241203110019.1520071-22-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> References: <20241203110019.1520071-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5420; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=PzIORblitgR8o9Wn8H59N3kcmZSxmQXU/hVecY0uC2M=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnTuTkU4JHKiap3rPd1eTqeDzUhthNZfuou1LnG KOtVIh+kMqJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ07k5AAKCRCPgPtYfRL+ TuXQB/4iamkPEY5yC3cQnm2HOCMFXsSZo5zs9YWkiLMVsb4lXmBZS0kVPNGqXlPhu9TSZ5QVbVz 5BoiJr3nztys0NZFgzoxKxpbprofjFhngow4WuYdx8Fu8HLkDs3pCnY/J+Na5lzPFm3xf1jFUs8 RSrjz7dIpYQslpIVSVEWg4EW6RSOqAXXl3bUaSgUM9U4IQmqQ9jBrCA2mKv+tISxeCENFZbaoju mcoZsFxhK/r1igV13JoYaSMku9S8H6VHAiyZujIlDa3dCdWT0n3hzy8ZRgdZiMYB50XwnHXqozc i/84/TJCoe7cb97JCMv6As49xy8phr37YinzARvhS31SdrnW X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 If the maximal count of channels the driver supports isn't fully utilized, add an attribute providing the internal temperature. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 112 +++++++++++++++++++++++++++++++-------- 1 file changed, 91 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 9405cb579324..d858bffd2628 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -95,6 +95,10 @@ #define AD7124_MAX_CONFIGS 8 #define AD7124_MAX_CHANNELS 16 +/* AD7124 input sources */ +#define AD7124_INPUT_TEMPSENSOR 16 +#define AD7124_INPUT_AVSS 17 + enum ad7124_ids { ID_AD7124_4, ID_AD7124_8, @@ -589,26 +593,59 @@ static int ad7124_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - mutex_lock(&st->cfgs_lock); + switch (chan->type) { + case IIO_VOLTAGE: + mutex_lock(&st->cfgs_lock); - idx = st->channels[chan->address].cfg.pga_bits; - *val = st->channels[chan->address].cfg.vref_mv; - if (st->channels[chan->address].cfg.bipolar) - *val2 = chan->scan_type.realbits - 1 + idx; - else - *val2 = chan->scan_type.realbits + idx; + idx = st->channels[chan->address].cfg.pga_bits; + *val = st->channels[chan->address].cfg.vref_mv; + if (st->channels[chan->address].cfg.bipolar) + *val2 = chan->scan_type.realbits - 1 + idx; + else + *val2 = chan->scan_type.realbits + idx; + + mutex_unlock(&st->cfgs_lock); + return IIO_VAL_FRACTIONAL_LOG2; + + case IIO_TEMP: + /* + * According to the data sheet + * Temperature (°C) + * = ((Conversion − 0x800000)/13584) − 272.5 + * = (Conversion − 0x800000 - 13584 * 272.5) / 13584 + * = (Conversion − 12090248) / 13584 + * So scale with 1000/13584 to yield °mC. Reduce by 8 to + * 125/1698. + */ + *val = 125; + *val2 = 1698; + return IIO_VAL_FRACTIONAL; + + default: + return -EINVAL; + } - mutex_unlock(&st->cfgs_lock); - return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_OFFSET: - mutex_lock(&st->cfgs_lock); - if (st->channels[chan->address].cfg.bipolar) - *val = -(1 << (chan->scan_type.realbits - 1)); - else - *val = 0; + switch (chan->type) { + case IIO_VOLTAGE: + mutex_lock(&st->cfgs_lock); + if (st->channels[chan->address].cfg.bipolar) + *val = -(1 << (chan->scan_type.realbits - 1)); + else + *val = 0; + + mutex_unlock(&st->cfgs_lock); + return IIO_VAL_INT; + + case IIO_TEMP: + /* see calculation above */ + *val = -12090248; + return IIO_VAL_INT; + + default: + return -EINVAL; + } - mutex_unlock(&st->cfgs_lock); - return IIO_VAL_INT; case IIO_CHAN_INFO_SAMP_FREQ: mutex_lock(&st->cfgs_lock); *val = st->channels[chan->address].cfg.odr; @@ -826,11 +863,10 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, struct ad7124_channel *channels; struct iio_chan_spec *chan; unsigned int ain[2], channel = 0, tmp; + unsigned int num_channels; int ret; - st->num_channels = device_get_child_node_count(dev); - if (!st->num_channels) - return dev_err_probe(dev, -ENODEV, "no channel children\n"); + num_channels = device_get_child_node_count(dev); /* * The driver assigns each logical channel defined in the device tree @@ -839,9 +875,12 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, * CHANNEL_15) as an additional channel register. The driver could be * improved to lift this limitation. */ - if (st->num_channels > AD7124_MAX_CHANNELS) + if (num_channels > AD7124_MAX_CHANNELS) return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + /* Add one for temperature */ + st->num_channels = min(num_channels + 1, AD7124_MAX_CHANNELS); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) @@ -862,7 +901,7 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, return dev_err_probe(dev, ret, "Failed to parse reg property of %pfwP\n", child); - if (channel >= indio_dev->num_channels) + if (channel >= num_channels) return dev_err_probe(dev, -EINVAL, "Channel index >= number of channels in %pfwP\n", child); @@ -902,6 +941,37 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, chan[channel].channel2 = ain[1]; } + if (num_channels < AD7124_MAX_CHANNELS) { + st->channels[num_channels] = (struct ad7124_channel) { + .nr = num_channels, + .ain = AD7124_CHANNEL_AINP(AD7124_INPUT_TEMPSENSOR) | + AD7124_CHANNEL_AINM(AD7124_INPUT_AVSS), + .cfg = { + .bipolar = true, + }, + }; + + chan[num_channels] = (struct iio_chan_spec) { + .type = IIO_TEMP, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .scan_type = { + /* + * You might find it strange that a bipolar + * measurement yields an unsigned value, but + * this matches the device's manual. + */ + .sign = 'u', + .realbits = 24, + .storagebits = 32, + .endianness = IIO_BE, + }, + .address = num_channels, + .scan_index = num_channels, + }; + }; + return 0; }