From patchwork Wed Dec 4 09:26:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3186BE7716B for ; Wed, 4 Dec 2024 09:23:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CEF3B10E4BE; Wed, 4 Dec 2024 09:23:58 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="aKW+fKKC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2671C10E49D; Wed, 4 Dec 2024 09:23:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733304237; x=1764840237; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nSqNV7nsCtP7Fmy50ieyWPRWThcmZcBJQIxLs8bkxVY=; b=aKW+fKKCH/ziacMtKP0oZIgCY5acRrjoEGFIpvgDwECYxgjFm6kwG3cN GKEO8WzzeH53KPhyKXqdkMM3tBkgb3u1sHHwBxaFVvX5qxhLol2iufKwr 2thuIQkY1Emc89yk7RxNovRqHg5AY0fQl3VAptfWAD25SFI/VXr3fyXsX 1IainfymCU6vuSheq0+hH/P6Vdai1Vd9xKNQIlUnnfieM2NE7+mS2Sf8Z CbQMDKVlSvAss702bb/1bK87OmCZNgaaj2K29ArijIoQr9SZPlp7U+EKc jfM7IMxRF81BD0+3gi7RvlXrCBk7NR7FF5Fzy6Hu18/NSrJs1/YwuDlZp A==; X-CSE-ConnectionGUID: p20Fj0XTRImTKP7a5YzYAw== X-CSE-MsgGUID: kM0ynD58S/6OEgDH3rJtBg== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038451" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038451" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:23:57 -0800 X-CSE-ConnectionGUID: 7pRrH8J2QrmjFYJAw6U6lA== X-CSE-MsgGUID: l7VqKswkTz+Jk1bMxPL9eA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555078" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:23:55 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 01/14] drm/i915/dp: Refactor FEC support check in intel_dp_supports_dsc Date: Wed, 4 Dec 2024 14:56:29 +0530 Message-ID: <20241204092642.1835807-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Forward Error Correction is required for DP if we are using DSC but is optional for eDP. Currently the helper intel_dp_supports_dsc checks if fec_enable is set for DP or not. The helper is called after fec_enable is set in crtc_state. Instead of this a better approach would be to: first, call intel_dp_supports_dsc to check for DSC support (along with FEC requirement for DP) and then set fec_enable for DP (if not already set) in crtc_state. To achieve this, remove the check for fec_enable in the helper and instead check for FEC support for DP. With this change the helper intel_dp_supports_dsc can be called earlier and return early if DSC is not supported. The structure intel_dp is added to the helper to get the FEC support for DP. v2: Pass intel_dp to adjust_limits_for_dsc_hblank_expansion_quirk instead of deriving it from connector. (Jani) Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++--- drivers/gpu/drm/i915/display/intel_dp.h | 3 ++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++++++---- 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 4471c8fcd478..eb65c7a64a32 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1624,13 +1624,15 @@ bool intel_dp_supports_fec(struct intel_dp *intel_dp, drm_dp_sink_supports_fec(connector->dp.fec_capability); } -bool intel_dp_supports_dsc(const struct intel_connector *connector, +bool intel_dp_supports_dsc(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state) { if (!intel_dp_has_dsc(connector)) return false; - if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) && !crtc_state->fec_enable) + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) && + !intel_dp_supports_fec(intel_dp, connector, crtc_state)) return false; return intel_dsc_source_support(crtc_state); @@ -2368,7 +2370,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, intel_dp_supports_fec(intel_dp, connector, pipe_config) && !intel_dp_is_uhbr(pipe_config)); - if (!intel_dp_supports_dsc(connector, pipe_config)) + if (!intel_dp_supports_dsc(intel_dp, connector, pipe_config)) return -EINVAL; if (!intel_dp_dsc_supports_format(connector, pipe_config->output_format)) diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 48f10876be65..4ae54e9718ce 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -170,7 +170,8 @@ bool intel_dp_supports_fec(struct intel_dp *intel_dp, const struct intel_connector *connector, const struct intel_crtc_state *pipe_config); -bool intel_dp_supports_dsc(const struct intel_connector *connector, +bool intel_dp_supports_dsc(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state); u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index c59c2c14679c..9b64c8a0e55e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -488,7 +488,8 @@ hblank_expansion_quirk_needs_dsc(const struct intel_connector *connector, } static bool -adjust_limits_for_dsc_hblank_expansion_quirk(const struct intel_connector *connector, +adjust_limits_for_dsc_hblank_expansion_quirk(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state, struct link_config_limits *limits, bool dsc) @@ -501,7 +502,7 @@ adjust_limits_for_dsc_hblank_expansion_quirk(const struct intel_connector *conne return true; if (!dsc) { - if (intel_dp_supports_dsc(connector, crtc_state)) { + if (intel_dp_supports_dsc(intel_dp, connector, crtc_state)) { drm_dbg_kms(display->drm, "[CRTC:%d:%s][CONNECTOR:%d:%s] DSC needed by hblank expansion quirk\n", crtc->base.base.id, crtc->base.name, @@ -582,7 +583,8 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp, limits)) return false; - return adjust_limits_for_dsc_hblank_expansion_quirk(connector, + return adjust_limits_for_dsc_hblank_expansion_quirk(intel_dp, + connector, crtc_state, limits, dsc); @@ -646,7 +648,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder, str_yes_no(ret), str_yes_no(joiner_needs_dsc), str_yes_no(intel_dp->force_dsc_en)); - if (!intel_dp_supports_dsc(connector, pipe_config)) + if (!intel_dp_supports_dsc(intel_dp, connector, pipe_config)) return -EINVAL; if (!mst_stream_compute_config_limits(intel_dp, connector, From patchwork Wed Dec 4 09:26:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9C68E7716B for ; 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X-CSE-ConnectionGUID: aoWDVIUSQLm4CtbtAv7ofA== X-CSE-MsgGUID: EuIubU3IRMCbYzStSOZKmQ== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038453" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038453" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:23:59 -0800 X-CSE-ConnectionGUID: xMVsl0wiTLyJgzEMRg/QTQ== X-CSE-MsgGUID: ugFE0L/jQwek+l2Zsz7bIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555087" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:23:57 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 02/14] drm/i915/dp: Return early if DSC not supported Date: Wed, 4 Dec 2024 14:56:30 +0530 Message-ID: <20241204092642.1835807-3-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Check for DSC support before computing link config with DSC. For DP MST we are already doing the same. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index eb65c7a64a32..4291aa4f4ab4 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2370,9 +2370,6 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, intel_dp_supports_fec(intel_dp, connector, pipe_config) && !intel_dp_is_uhbr(pipe_config)); - if (!intel_dp_supports_dsc(intel_dp, connector, pipe_config)) - return -EINVAL; - if (!intel_dp_dsc_supports_format(connector, pipe_config->output_format)) return -EINVAL; @@ -2635,6 +2632,9 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, str_yes_no(ret), str_yes_no(joiner_needs_dsc), str_yes_no(intel_dp->force_dsc_en)); + if (!intel_dp_supports_dsc(intel_dp, connector, pipe_config)) + return -EINVAL; + if (!intel_dp_compute_config_limits(intel_dp, pipe_config, respect_downstream_limits, true, From patchwork Wed Dec 4 09:26:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02BD6E77172 for ; Wed, 4 Dec 2024 09:24:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 973CE10EC86; Wed, 4 Dec 2024 09:24:02 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ewa55tDs"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2689A10EC83; Wed, 4 Dec 2024 09:24:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733304241; x=1764840241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WiT7gZUPzG3qHCMLaW4F1N5Z+6uu1TXZdwfXFWz2zdo=; b=ewa55tDsu4YT9Gqul5HxG1Rb9KA1D4lxdP7as6zIGDCl9QeQVnmoUBUM MPUkAMiuTj89AtAV68Zk4Pxf3X+Cd6IXUisUJjAl6mDIwscD2jQtvPBxW p/WsAtSnG7ZuF1viTRFziTw9LCr0nuQxWliR+b8pUlWZwElsR4RQ4i/J/ hxxqc98pA4LWqcin0YU/wHlaX4ASj1h87oydrfn21fWOU0QVYeVZXaRW6 9T/q2NHxwO+GBu3n7NQ7N8gh/g0CSvuPCKc6S+pHgzk5+BESngtwoPPVS AEBMiPJuSejfNFdMtMP0vhGAsEEpv+1SiB1M2bG4rtIRFIHMnl1Yy5HFe g==; X-CSE-ConnectionGUID: IMRiqg/cR8erT0Oza+0coA== X-CSE-MsgGUID: QZ2Z8iR0SdOsu3yRJRTy1g== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038455" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038455" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:01 -0800 X-CSE-ConnectionGUID: Ebx5RY0HSOuaVCE5R9f0dQ== X-CSE-MsgGUID: 4giliTbPRMuBgX5J5JH1yg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555097" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:23:59 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 03/14] drm/i915/dp: Separate out helper for compute fec_enable Date: Wed, 4 Dec 2024 14:56:31 +0530 Message-ID: <20241204092642.1835807-4-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make a separate function for setting fec_enable in crtc_state. v2: Rename helper to align with encoder->compute_config() callback and other minor fixes. (Jani) Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 34 ++++++++++++++++++------- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 4291aa4f4ab4..ccc495842518 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2344,6 +2344,30 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, return 0; } +static void intel_dp_fec_compute_config(struct intel_dp *intel_dp, + const struct intel_connector *connector, + struct intel_crtc_state *crtc_state) +{ + if (crtc_state->fec_enable) + return; + + /* + * Though eDP v1.5 supports FEC with DSC, unlike DP, it is optional. + * Since, FEC is a bandwidth overhead, continue to not enable it for + * eDP. Until, there is a good reason to do so. + */ + if (intel_dp_is_edp(intel_dp)) + return; + + if (!intel_dp_supports_fec(intel_dp, connector, crtc_state)) + return; + + if (intel_dp_is_uhbr(crtc_state)) + return; + + crtc_state->fec_enable = true; +} + int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state, @@ -2360,15 +2384,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); int ret; - /* - * Though eDP v1.5 supports FEC with DSC, unlike DP, it is optional. - * Since, FEC is a bandwidth overhead, continue to not enable it for - * eDP. Until, there is a good reason to do so. - */ - pipe_config->fec_enable = pipe_config->fec_enable || - (!intel_dp_is_edp(intel_dp) && - intel_dp_supports_fec(intel_dp, connector, pipe_config) && - !intel_dp_is_uhbr(pipe_config)); + intel_dp_fec_compute_config(intel_dp, connector, pipe_config); if (!intel_dp_dsc_supports_format(connector, pipe_config->output_format)) return -EINVAL; From patchwork Wed Dec 4 09:26:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF98AE77173 for ; Wed, 4 Dec 2024 09:24:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8637610EC92; Wed, 4 Dec 2024 09:24:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Mg6QAOGo"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3082410EC92; Wed, 4 Dec 2024 09:24:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733304244; x=1764840244; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6/ep/5Sao+0qspuC9f6AFzzqKXUsix0ojwHosgoqY74=; b=Mg6QAOGooMR69oqxEFRmqlx7XonXxqlsxT6oI1gvTTaukEd8J5Jkqm5n EHsGRjOqaLMcwHVK+72/NeoNvbvOIU2w7OCON+EPQdrBP17GfNtPXZA5n ZoJZo0qJNurIGH6Igi+P8wdc+3fj04T+rQ39ri/nCtH3xpJAeJhgl4yk8 5d7Ss4wFZCx96X02O5ryA4V9x5DTuSWUbqZA79evPnByQL7HpVux0LOta wxe5GKq3otQgn5cnRayMdPPK08Y22HgFfiVn7b85ixFdjLx7CtHVFGakm FU6Xo2wM1Vhcq1eJotPe+tdBCdp8HVggtex+8XQUo6qlLk/AKN+wxM1dg Q==; X-CSE-ConnectionGUID: tZwuhDisQJu6BBG9tJzCMg== X-CSE-MsgGUID: +3Dt/wSFSpCsCMfvX3CTUQ== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038456" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038456" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:03 -0800 X-CSE-ConnectionGUID: 0ZymIKSpTJqtK5UShnmCfg== X-CSE-MsgGUID: OaHOJ2uTShGpWUrVM66f7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555108" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:01 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 04/14] drm/i915/dp: Drop check for FEC in intel_dp_fec_compute_config Date: Wed, 4 Dec 2024 14:56:32 +0530 Message-ID: <20241204092642.1835807-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Support for FEC is already checked in intel_dp_supports_dsc(). Therefore the check can be dropped from the helper intel_dp_fec_compute_config. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index ccc495842518..d48fa94b2705 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2345,7 +2345,6 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, } static void intel_dp_fec_compute_config(struct intel_dp *intel_dp, - const struct intel_connector *connector, struct intel_crtc_state *crtc_state) { if (crtc_state->fec_enable) @@ -2359,9 +2358,6 @@ static void intel_dp_fec_compute_config(struct intel_dp *intel_dp, if (intel_dp_is_edp(intel_dp)) return; - if (!intel_dp_supports_fec(intel_dp, connector, crtc_state)) - return; - if (intel_dp_is_uhbr(crtc_state)) return; @@ -2384,7 +2380,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); int ret; - intel_dp_fec_compute_config(intel_dp, connector, pipe_config); + intel_dp_fec_compute_config(intel_dp, pipe_config); if (!intel_dp_dsc_supports_format(connector, pipe_config->output_format)) return -EINVAL; From patchwork Wed Dec 4 09:26:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45473E77172 for ; Wed, 4 Dec 2024 09:24:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DEE4D10EC93; Wed, 4 Dec 2024 09:24:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="V9Kyjje2"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4ADB010EC83; Wed, 4 Dec 2024 09:24:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733304246; x=1764840246; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Kt7cjM1rItcQm4RXH/ps89bbKgmNn5y8EuBMWbhjCBc=; b=V9Kyjje28ABbjU0UU04gSswmplHfEAbdXODozZBmLNj3PzMH88KXyDYk /6ugl+l7wcZWxbqECzwI3M5bA3NeHCA3t1M0EcGxsqtOxMQkwtEavZesH 4JdQ/EnK9NXoWkS6XIClo11RGIx1RZtc8Ej0TvwQ5gJ7Kw88rTFdxw0d+ ysSnoTliotC4AFmuCJ6q2a4zMQqrqI/u7pmSGLpLSODL7OHSWkxIPiwJ+ WtzC1B0JdJUM0OGwfvSvL6qS3MOrUzDfUoICer2cj91F8aE1wuWd66dQu cXTMojjk9rFXGw7dtGjoGpP7V5KL2BJVvJYzB1lY05KOMAhq+8RYAzlil A==; X-CSE-ConnectionGUID: pfBBEb7gTCCSUn/Ju2ie9w== X-CSE-MsgGUID: tetfCVslR2SndsL1SOi+ow== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038460" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038460" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:06 -0800 X-CSE-ConnectionGUID: q9tznY/sSb6v0ri+zQxd2w== X-CSE-MsgGUID: DvJusBKFQn2GttMQrXMn6A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555118" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:03 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 05/14] drm/i915/dp: Remove HAS_DSC macro for intel_dp_dsc_max_src_input_bpc Date: Wed, 4 Dec 2024 14:56:33 +0530 Message-ID: <20241204092642.1835807-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DSC support is already checked before the helper intel_dp_dsc_max_src_input_bpc is called. Remove the check from the helper. v2: Drop the argument struct drm_i915_private *i915. (Suraj) Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d48fa94b2705..3989873c9516 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2184,10 +2184,10 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, } static -u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915) +u8 intel_dp_dsc_min_src_input_bpc(void) { /* Min DSC Input BPC for ICL+ is 8 */ - return HAS_DSC(i915) ? 8 : 0; + return 8; } static @@ -2199,7 +2199,7 @@ bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, u8 dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp; dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(i915), conn_state->max_requested_bpc); - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915); + dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); dsc_max_pipe_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); dsc_min_pipe_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp); @@ -2266,7 +2266,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, dsc_max_bpc = min_t(u8, dsc_max_bpc, max_req_bpc); dsc_max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915); + dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); dsc_min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp); /* From patchwork Wed Dec 4 09:26:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55F84E7716D for ; Wed, 4 Dec 2024 09:24:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 02AA010E33E; Wed, 4 Dec 2024 09:24:09 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="O18Wz/r8"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6C11810EC97; Wed, 4 Dec 2024 09:24:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733304248; x=1764840248; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3PKu1QBgA04Ox6F0ulaqTU9h9z5YVl5609+xePH80dY=; b=O18Wz/r8/su+zK+Xk7dkL/bSWZeyp/QnrtDMPJYgfYaozaVQNcWRfV9+ zbcpTXiiu7D+vlWcFHN0+HCPHSvbjOO4hIZ+xO0QfU2nChhU24ykHU/Hg 0VBnxPJ840A3+vbgdUhiZSEmqWVrdMQb8N/8itq37V0OQdWlVkGhQ+GG5 B+A+7/0PR/+wTjINDmMysucQWuMf9qr0bcBuH6N/0BdkAY0R4ZR9yIsEQ pSLW+Kc4dl6bORTgx+QpJHzeH0VIL8m0JBqU4nBqmPAFD0vgAwFVDJNUR 24zxbYWVs6qCNUBiMcVSTeQ0TibLY/Csi+a/iVh0CYrkcLWW7U9U/0/oZ w==; X-CSE-ConnectionGUID: 3u79+8DhTs+796PUEWe+8Q== X-CSE-MsgGUID: vo+TNAPdQfy3kl+82JTLoQ== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038462" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038462" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:08 -0800 X-CSE-ConnectionGUID: xr2ynN6WS1OqUsnrvM1G2Q== X-CSE-MsgGUID: 5aXQTpoQSOK1VGYPhSqaXw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555128" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:05 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 06/14] drm/i915/dp: Return int from dsc_max/min_src_input_bpc helpers Date: Wed, 4 Dec 2024 14:56:34 +0530 Message-ID: <20241204092642.1835807-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use ints for dsc_max/min_bpc instead of u8 in dsc_max/min_src_input_bpc helpers and their callers. This will also help replace min_t/max_t macros with min/max ones. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3989873c9516..3767d3870a19 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1781,7 +1781,7 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, } static -u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915) +int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915) { /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ if (DISPLAY_VER(i915) >= 12) @@ -1798,14 +1798,14 @@ int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, struct drm_i915_private *i915 = to_i915(connector->base.dev); int i, num_bpc; u8 dsc_bpc[3] = {}; - u8 dsc_max_bpc; + int dsc_max_bpc; dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915); if (!dsc_max_bpc) return dsc_max_bpc; - dsc_max_bpc = min_t(u8, dsc_max_bpc, max_req_bpc); + dsc_max_bpc = min(dsc_max_bpc, max_req_bpc); num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd, dsc_bpc); @@ -2184,7 +2184,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, } static -u8 intel_dp_dsc_min_src_input_bpc(void) +int intel_dp_dsc_min_src_input_bpc(void) { /* Min DSC Input BPC for ICL+ is 8 */ return 8; @@ -2196,7 +2196,7 @@ bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, struct link_config_limits *limits, int pipe_bpp) { - u8 dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp; + int dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp; dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(i915), conn_state->max_requested_bpc); dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); @@ -2241,9 +2241,9 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, struct drm_i915_private *i915 = dp_to_i915(intel_dp); const struct intel_connector *connector = to_intel_connector(conn_state->connector); - u8 max_req_bpc = conn_state->max_requested_bpc; - u8 dsc_max_bpc, dsc_max_bpp; - u8 dsc_min_bpc, dsc_min_bpp; + int max_req_bpc = conn_state->max_requested_bpc; + int dsc_max_bpc, dsc_max_bpp; + int dsc_min_bpc, dsc_min_bpp; u8 dsc_bpc[3] = {}; int forced_bpp, pipe_bpp; int num_bpc, i, ret; @@ -2263,7 +2263,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, if (!dsc_max_bpc) return -EINVAL; - dsc_max_bpc = min_t(u8, dsc_max_bpc, max_req_bpc); + dsc_max_bpc = min(dsc_max_bpc, max_req_bpc); dsc_max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); From patchwork Wed Dec 4 09:26:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59AE4E77171 for ; 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X-CSE-ConnectionGUID: u9RAUvh3SymKOuCHsGfP5w== X-CSE-MsgGUID: bNHo77IzTsyrMdcWMj89yQ== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038465" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038465" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:10 -0800 X-CSE-ConnectionGUID: cfIrzN7rS5u1KpENrc6iaA== X-CSE-MsgGUID: EitGm/8TR5OonykMYIzTpQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555135" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:07 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 07/14] drm/i915/dp: Use intel_display in intel_dp_dsc_max_src_input_bpc() Date: Wed, 4 Dec 2024 14:56:35 +0530 Message-ID: <20241204092642.1835807-8-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Replace struct drm_i915_private with struct intel_display in the helper intel_dp_dsc_max_src_input_bpc(). Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3767d3870a19..edfe084dca39 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1781,12 +1781,12 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, } static -int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915) +int intel_dp_dsc_max_src_input_bpc(struct intel_display *display) { /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ - if (DISPLAY_VER(i915) >= 12) + if (DISPLAY_VER(display) >= 12) return 12; - if (DISPLAY_VER(i915) == 11) + if (DISPLAY_VER(display) == 11) return 10; return 0; @@ -1795,12 +1795,12 @@ int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915) int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, u8 max_req_bpc) { - struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct intel_display *display = to_intel_display(connector); int i, num_bpc; u8 dsc_bpc[3] = {}; int dsc_max_bpc; - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915); + dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); if (!dsc_max_bpc) return dsc_max_bpc; @@ -2196,9 +2196,10 @@ bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, struct link_config_limits *limits, int pipe_bpp) { + struct intel_display *display = to_intel_display(&i915->drm); int dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp; - dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(i915), conn_state->max_requested_bpc); + dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(display), conn_state->max_requested_bpc); dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); dsc_max_pipe_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); @@ -2238,7 +2239,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, struct link_config_limits *limits, int timeslots) { - struct drm_i915_private *i915 = dp_to_i915(intel_dp); + struct intel_display *display = to_intel_display(intel_dp); const struct intel_connector *connector = to_intel_connector(conn_state->connector); int max_req_bpc = conn_state->max_requested_bpc; @@ -2259,7 +2260,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, } } - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915); + dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); if (!dsc_max_bpc) return -EINVAL; From patchwork Wed Dec 4 09:26:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56A51E7716D for ; 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X-CSE-ConnectionGUID: vmbOG4b0RB+8lQJsqfa8NA== X-CSE-MsgGUID: /bpVH450T+y08aBEu4N4iw== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038466" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038466" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:12 -0800 X-CSE-ConnectionGUID: fsxGR1CuRfKzmuhPKJXkJQ== X-CSE-MsgGUID: PKICpcg0QqKXw0845EgIrA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555146" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:10 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 08/14] drm/i915/dp_mst: Use helpers to get dsc min/max input bpc Date: Wed, 4 Dec 2024 14:56:36 +0530 Message-ID: <20241204092642.1835807-9-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use helpers for source min/max input bpc with DSC. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 2 -- drivers/gpu/drm/i915/display/intel_dp.h | 3 +++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++-------- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index edfe084dca39..bff7441d2ddd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1780,7 +1780,6 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, return -EINVAL; } -static int intel_dp_dsc_max_src_input_bpc(struct intel_display *display) { /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ @@ -2183,7 +2182,6 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, dsc_max_bpp, dsc_min_bpp, pipe_bpp, timeslots); } -static int intel_dp_dsc_min_src_input_bpc(void) { /* Min DSC Input BPC for ICL+ is 8 */ diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 4ae54e9718ce..4895b52d41e8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -20,6 +20,7 @@ struct intel_atomic_state; struct intel_connector; struct intel_crtc_state; struct intel_digital_port; +struct intel_display; struct intel_dp; struct intel_encoder; @@ -207,5 +208,7 @@ bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate, u8 lane_count); bool intel_dp_has_connector(struct intel_dp *intel_dp, const struct drm_connector_state *conn_state); +int intel_dp_dsc_max_src_input_bpc(struct intel_display *display); +int intel_dp_dsc_min_src_input_bpc(void); #endif /* __INTEL_DP_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 9b64c8a0e55e..795594191717 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -365,17 +365,14 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, int i, num_bpc; u8 dsc_bpc[3] = {}; int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp; - u8 dsc_max_bpc; + int dsc_max_bpc, dsc_min_bpc; int min_compressed_bpp, max_compressed_bpp; - /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ - if (DISPLAY_VER(display) >= 12) - dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc); - else - dsc_max_bpc = min_t(u8, 10, conn_state->max_requested_bpc); + dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); + dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); - max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp); - min_bpp = limits->pipe.min_bpp; + max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); + min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp); num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd, dsc_bpc); From patchwork Wed Dec 4 09:26:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5C50E7716B for ; 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X-CSE-ConnectionGUID: WsDuW0WyTrC928D/5i57OQ== X-CSE-MsgGUID: kugmSkLaRGa7cjPhSxxU1A== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038468" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038468" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:14 -0800 X-CSE-ConnectionGUID: ZJAVMhwLTsmNVg1ox93EwQ== X-CSE-MsgGUID: d9H5te1dSfKUcOkx02A2cA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555154" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:12 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 09/14] drm/i915/dp: Drop max_requested_bpc for dsc pipe_min/max bpp Date: Wed, 4 Dec 2024 14:56:37 +0530 Message-ID: <20241204092642.1835807-10-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently we are including both max_requested_bpc and limits->pipe.bpp_max while computing maximum possible pipe bpp with dsc. However, while setting limits->pipe.max_bpp, the max_requested_bpc is already taken into account. Drop the redundant check for max_requested_bpc and use only limits->pipe.bpp_max. This will also result in dropping conn_state argument in functions where it was used only to get max_requested_bpc. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index bff7441d2ddd..ea1d1e7c0f45 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2190,14 +2190,13 @@ int intel_dp_dsc_min_src_input_bpc(void) static bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, - struct drm_connector_state *conn_state, struct link_config_limits *limits, int pipe_bpp) { struct intel_display *display = to_intel_display(&i915->drm); int dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp; - dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(display), conn_state->max_requested_bpc); + dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); dsc_max_pipe_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); @@ -2209,7 +2208,6 @@ bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, static int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp, - struct drm_connector_state *conn_state, struct link_config_limits *limits) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -2220,7 +2218,7 @@ int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp, forced_bpp = intel_dp->force_dsc_bpc * 3; - if (is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, forced_bpp)) { + if (is_dsc_pipe_bpp_sufficient(i915, limits, forced_bpp)) { drm_dbg_kms(&i915->drm, "Input DSC BPC forced to %d\n", intel_dp->force_dsc_bpc); return forced_bpp; } @@ -2240,14 +2238,13 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, struct intel_display *display = to_intel_display(intel_dp); const struct intel_connector *connector = to_intel_connector(conn_state->connector); - int max_req_bpc = conn_state->max_requested_bpc; int dsc_max_bpc, dsc_max_bpp; int dsc_min_bpc, dsc_min_bpp; u8 dsc_bpc[3] = {}; int forced_bpp, pipe_bpp; int num_bpc, i, ret; - forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits); + forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, limits); if (forced_bpp) { ret = dsc_compute_compressed_bpp(intel_dp, connector, pipe_config, @@ -2262,7 +2259,6 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, if (!dsc_max_bpc) return -EINVAL; - dsc_max_bpc = min(dsc_max_bpc, max_req_bpc); dsc_max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); @@ -2302,16 +2298,16 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; - forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits); + forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, limits); if (forced_bpp) { pipe_bpp = forced_bpp; } else { - int max_bpc = min(limits->pipe.max_bpp / 3, (int)conn_state->max_requested_bpc); + int max_bpc = limits->pipe.max_bpp / 3; /* For eDP use max bpp that can be supported with DSC. */ pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, max_bpc); - if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) { + if (!is_dsc_pipe_bpp_sufficient(i915, limits, pipe_bpp)) { drm_dbg_kms(&i915->drm, "Computed BPC is not in DSC BPC limits\n"); return -EINVAL; From patchwork Wed Dec 4 09:26:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41FF6E7716D for ; Wed, 4 Dec 2024 09:24:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DFB0E10EC97; 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a="44038470" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038470" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:16 -0800 X-CSE-ConnectionGUID: kQQbc6gJTA+qK1KSqAFsjg== X-CSE-MsgGUID: UEeUZsHsRBqe+NeNhaangg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555165" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:14 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 10/14] drm/i915/dp: Refactor pipe_bpp limits with dsc Date: Wed, 4 Dec 2024 14:56:38 +0530 Message-ID: <20241204092642.1835807-11-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" With DSC there are additional limits for pipe_bpp. Currently these are scattered in different places. Instead set the limits->pipe.max/min_bpp in one place and use them wherever required. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++++++++++------------- 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index ea1d1e7c0f45..fe0957e028bc 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2189,21 +2189,11 @@ int intel_dp_dsc_min_src_input_bpc(void) } static -bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, - struct link_config_limits *limits, +bool is_dsc_pipe_bpp_sufficient(struct link_config_limits *limits, int pipe_bpp) { - struct intel_display *display = to_intel_display(&i915->drm); - int dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp; - - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); - - dsc_max_pipe_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); - dsc_min_pipe_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp); - - return pipe_bpp >= dsc_min_pipe_bpp && - pipe_bpp <= dsc_max_pipe_bpp; + return pipe_bpp >= limits->pipe.min_bpp && + pipe_bpp <= limits->pipe.max_bpp; } static @@ -2218,7 +2208,7 @@ int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp, forced_bpp = intel_dp->force_dsc_bpc * 3; - if (is_dsc_pipe_bpp_sufficient(i915, limits, forced_bpp)) { + if (is_dsc_pipe_bpp_sufficient(limits, forced_bpp)) { drm_dbg_kms(&i915->drm, "Input DSC BPC forced to %d\n", intel_dp->force_dsc_bpc); return forced_bpp; } @@ -2235,11 +2225,10 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, struct link_config_limits *limits, int timeslots) { - struct intel_display *display = to_intel_display(intel_dp); const struct intel_connector *connector = to_intel_connector(conn_state->connector); - int dsc_max_bpc, dsc_max_bpp; - int dsc_min_bpc, dsc_min_bpp; + int dsc_max_bpp; + int dsc_min_bpp; u8 dsc_bpc[3] = {}; int forced_bpp, pipe_bpp; int num_bpc, i, ret; @@ -2255,14 +2244,8 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, } } - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); - if (!dsc_max_bpc) - return -EINVAL; - - dsc_max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); - - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); - dsc_min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp); + dsc_max_bpp = limits->pipe.max_bpp; + dsc_min_bpp = limits->pipe.min_bpp; /* * Get the maximum DSC bpc that will be supported by any valid @@ -2307,7 +2290,7 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, /* For eDP use max bpp that can be supported with DSC. */ pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, max_bpc); - if (!is_dsc_pipe_bpp_sufficient(i915, limits, pipe_bpp)) { + if (!is_dsc_pipe_bpp_sufficient(limits, pipe_bpp)) { drm_dbg_kms(&i915->drm, "Computed BPC is not in DSC BPC limits\n"); return -EINVAL; @@ -2521,6 +2504,18 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, return true; } +static void +intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp, + struct link_config_limits *limits) +{ + struct intel_display *display = to_intel_display(intel_dp); + int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); + int dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); + + limits->pipe.max_bpp = min(limits->pipe.max_bpp, dsc_max_bpc * 3); + limits->pipe.min_bpp = max(limits->pipe.min_bpp, dsc_min_bpc * 3); +} + static bool intel_dp_compute_config_limits(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, @@ -2541,6 +2536,8 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state, respect_downstream_limits); + if (dsc) + intel_dp_dsc_compute_pipe_bpp_limits(intel_dp, limits); if (intel_dp->use_max_params) { /* From patchwork Wed Dec 4 09:26:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 513D8E77172 for ; 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X-CSE-ConnectionGUID: je5N/kYVSwyWoEdTrqOJTQ== X-CSE-MsgGUID: cgzT7fZbStCAQIuzQ0bH0A== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038472" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038472" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:18 -0800 X-CSE-ConnectionGUID: Ea8ewc+SRZmxVj8AnMGmCQ== X-CSE-MsgGUID: vtI5iFqoSNKl4PZXq5pLQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555169" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:16 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 11/14] drm/i915/dp_mst: Refactor pipe_bpp limits with dsc for mst Date: Wed, 4 Dec 2024 14:56:39 +0530 Message-ID: <20241204092642.1835807-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Similar to DP, set the dsc limits->pipe.max/min_bpp early for MST too. Use the limits while computing the compressed bpp. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp.h | 3 +++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++------ 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index fe0957e028bc..c5740b8d2315 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2504,7 +2504,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, return true; } -static void +void intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp, struct link_config_limits *limits) { diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 4895b52d41e8..45b37d322565 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -200,6 +200,9 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, bool dsc, struct link_config_limits *limits); +void +intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp, + struct link_config_limits *limits); void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector); bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 795594191717..667006918bfd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -365,14 +365,10 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, int i, num_bpc; u8 dsc_bpc[3] = {}; int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp; - int dsc_max_bpc, dsc_min_bpc; int min_compressed_bpp, max_compressed_bpp; - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); - - max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp); - min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp); + max_bpp = limits->pipe.max_bpp; + min_bpp = limits->pipe.min_bpp; num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd, dsc_bpc); @@ -574,6 +570,9 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp, intel_dp_test_compute_config(intel_dp, crtc_state, limits); + if (dsc) + intel_dp_dsc_compute_pipe_bpp_limits(intel_dp, limits); + if (!intel_dp_compute_config_link_bpp_limits(intel_dp, crtc_state, dsc, From patchwork Wed Dec 4 09:26:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67B18E77171 for ; Wed, 4 Dec 2024 09:24:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09A5310ECA1; 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a="44038474" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038474" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:20 -0800 X-CSE-ConnectionGUID: YQBxh2UGSi2G/ZAhx20oHA== X-CSE-MsgGUID: d9vFQ0IvS7KEkwW2onvDZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555176" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:18 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 12/14] drm/i915/dp: Use clamp for pipe_bpp limits with DSC Date: Wed, 4 Dec 2024 14:56:40 +0530 Message-ID: <20241204092642.1835807-13-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently to get the max pipe_bpp with dsc we take the min of limits->pipe.max_bpp and dsc max bpp (dsc max bpc * 3). This can result in problems when limits->pipe.max_bpp is less than the computed dsc min bpp (dsc min bpc * 3). Replace the min/max functions with clamp while computing limits->pipe.max/min_bpp to ensure that the pipe_bpp limits are constrained within the DSC-defined minimum and maximum values. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index c5740b8d2315..8da85eee65a5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2512,8 +2512,11 @@ intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp, int dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(); int dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); - limits->pipe.max_bpp = min(limits->pipe.max_bpp, dsc_max_bpc * 3); - limits->pipe.min_bpp = max(limits->pipe.min_bpp, dsc_min_bpc * 3); + limits->pipe.max_bpp = clamp(limits->pipe.max_bpp, + dsc_min_bpc * 3, dsc_max_bpc * 3); + + limits->pipe.min_bpp = clamp(limits->pipe.min_bpp, + dsc_min_bpc * 3, dsc_max_bpc * 3); } static bool From patchwork Wed Dec 4 09:26:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B12EEE77172 for ; Wed, 4 Dec 2024 09:24:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5871610ECA0; Wed, 4 Dec 2024 09:24:23 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="glk50YPO"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id EF28110ECA0; Wed, 4 Dec 2024 09:24:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733304262; x=1764840262; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eUNVgoUbKZe1X6eFyNC4IPo08NkDgIXn1bR/uQJoZrw=; b=glk50YPOhKrh4Zy+KltSDrA8vvepcXR5pAWs7TLQM9UJbPC+AkNg5yjj lGMCvQj/qzmR091PKTNwkYPC0AaQyHNsbJ426CtKAjaFtjmY/vsj8VFpC 0vkt+plXwpgkw1ACWMLuW6ABqjEg59vvmPgUvH6R73Hnezm61/Ly41jkt YsRMvRn4Y9tBmPUt1UmwBJWvODCB6zyFPQMU36dGlbbj25la0W7gg7rgU bDJG4ynGZTXUkQQJttVbUUvfoM2irX+dppGaRYocvLXeoteaL36X75TkT g0IBB6XuQDOOrF6UrjIpUHFjEKCCZPlvGdto0qdvufRR01XxRGCo8bnXm Q==; X-CSE-ConnectionGUID: FiyklYSvT7SZI7R8iW4WYQ== X-CSE-MsgGUID: BcUdX1vvQfWa002kOrEnhw== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038476" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038476" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:22 -0800 X-CSE-ConnectionGUID: lBkTpEN3Td6ZN5Nj3ylNVg== X-CSE-MsgGUID: hjEGeohgS8mOcITl8FkN6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555180" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:20 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 13/14] drm/i915/dp: Make dsc helpers accept const crtc_state pointers Date: Wed, 4 Dec 2024 14:56:41 +0530 Message-ID: <20241204092642.1835807-14-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Modify the dsc helpers to get max/min compressed bpp to accept `const struct intel_crtc_state *` pointers instead of `struct intel_crtc_state *`. These helpers are not supposed to modify `crtc_state`. Accepting const pointers will allow these helpers to be called from functions that have const pointer to crtc_state. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 8da85eee65a5..60693c301c3d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1972,7 +1972,7 @@ static int dsc_compute_link_config(struct intel_dp *intel_dp, static u16 intel_dp_dsc_max_sink_compressed_bppx16(const struct intel_connector *connector, - struct intel_crtc_state *pipe_config, + const struct intel_crtc_state *pipe_config, int bpc) { u16 max_bppx16 = drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd); @@ -1997,7 +1997,7 @@ u16 intel_dp_dsc_max_sink_compressed_bppx16(const struct intel_connector *connec return 0; } -int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config) +int intel_dp_dsc_sink_min_compressed_bpp(const struct intel_crtc_state *pipe_config) { /* From Mandatory bit rate range Support Table 2-157 (DP v2.0) */ switch (pipe_config->output_format) { @@ -2015,7 +2015,7 @@ int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config) } int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector, - struct intel_crtc_state *pipe_config, + const struct intel_crtc_state *pipe_config, int bpc) { return intel_dp_dsc_max_sink_compressed_bppx16(connector, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 45b37d322565..1488e18ea8b0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -145,9 +145,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots); -int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config); +int intel_dp_dsc_sink_min_compressed_bpp(const struct intel_crtc_state *pipe_config); int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector, - struct intel_crtc_state *pipe_config, + const struct intel_crtc_state *pipe_config, int bpc); u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, From patchwork Wed Dec 4 09:26:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13893439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9D5EE77171 for ; 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X-CSE-ConnectionGUID: oYL7iY/HQ4GF9NF9W/6+2Q== X-CSE-MsgGUID: ezy45RcPRmCag6APRUmilQ== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44038478" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44038478" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:24 -0800 X-CSE-ConnectionGUID: 9zvqTJW2R/mogSRZd1gJxA== X-CSE-MsgGUID: D6SZOEbzRCKYYw3ds5qzsw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93555187" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2024 01:24:22 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, suraj.kandpal@intel.com, jani.nikula@linux.intel.com, imre.deak@intel.com Subject: [PATCH 14/14] drm/i915/dp: Set the DSC link limits intel_dp_compute_config_link_bpp_limits Date: Wed, 4 Dec 2024 14:56:42 +0530 Message-ID: <20241204092642.1835807-15-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> References: <20241204092642.1835807-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The helper intel_dp_compute_config_link_bpp_limits is the correct place to set the DSC link limits. Move the code to this function and remove the #TODO item. v2: Add argument intel_connector to the helper to get correct connector for DP MST. (Imre) Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 60 +++++++++++---------- drivers/gpu/drm/i915/display/intel_dp.h | 1 + drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 + 3 files changed, 34 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 60693c301c3d..1500b99ddb95 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2153,21 +2153,16 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, { const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; struct drm_i915_private *i915 = dp_to_i915(intel_dp); - int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; - int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; + int dsc_min_bpp; + int dsc_max_bpp; int dsc_joiner_max_bpp; int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); - dsc_src_min_bpp = dsc_src_min_compressed_bpp(); - dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); - dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); - dsc_min_bpp = max(dsc_min_bpp, fxp_q4_to_int_roundup(limits->link.min_bpp_x16)); + dsc_min_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16); - dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); - dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, - pipe_config, - pipe_bpp / 3); - dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; + dsc_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, + pipe_config, + pipe_bpp / 3); dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, adjusted_mode->clock, adjusted_mode->hdisplay, @@ -2278,8 +2273,8 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, struct intel_connector *connector = to_intel_connector(conn_state->connector); int pipe_bpp, forced_bpp; - int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; - int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; + int dsc_min_bpp; + int dsc_max_bpp; forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, limits); @@ -2299,16 +2294,12 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, pipe_config->port_clock = limits->max_rate; pipe_config->lane_count = limits->max_lane_count; - dsc_src_min_bpp = dsc_src_min_compressed_bpp(); - dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); - dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); - dsc_min_bpp = max(dsc_min_bpp, fxp_q4_to_int_roundup(limits->link.min_bpp_x16)); + dsc_min_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16); + + dsc_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, + pipe_config, + pipe_bpp / 3); - dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); - dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, - pipe_config, - pipe_bpp / 3); - dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; dsc_max_bpp = min(dsc_max_bpp, fxp_q4_to_int(limits->link.max_bpp_x16)); /* Compressed BPP should be less than the Input DSC bpp */ @@ -2447,6 +2438,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, /** * intel_dp_compute_config_link_bpp_limits - compute output link bpp limits * @intel_dp: intel DP + * @connector: intel connector * @crtc_state: crtc state * @dsc: DSC compression mode * @limits: link configuration limits @@ -2458,6 +2450,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, */ bool intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state, bool dsc, struct link_config_limits *limits) @@ -2480,12 +2473,22 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, limits->link.min_bpp_x16 = fxp_q4_from_int(limits->pipe.min_bpp); } else { - /* - * TODO: set the DSC link limits already here, atm these are - * initialized only later in intel_edp_dsc_compute_pipe_bpp() / - * intel_dp_dsc_compute_pipe_bpp() - */ - limits->link.min_bpp_x16 = 0; + int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; + int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; + + dsc_src_min_bpp = dsc_src_min_compressed_bpp(); + dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(crtc_state); + dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); + limits->link.min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp); + + dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); + dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, + crtc_state, + limits->pipe.max_bpp / 3); + dsc_max_bpp = dsc_sink_max_bpp ? + min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; + + max_link_bpp_x16 = min(max_link_bpp_x16, fxp_q4_from_int(dsc_max_bpp)); } limits->link.max_bpp_x16 = max_link_bpp_x16; @@ -2558,6 +2561,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, intel_dp_test_compute_config(intel_dp, crtc_state, limits); return intel_dp_compute_config_link_bpp_limits(intel_dp, + intel_dp->attached_connector, crtc_state, dsc, limits); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 1488e18ea8b0..90e8b8672ce0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -197,6 +197,7 @@ int intel_dp_output_bpp(enum intel_output_format output_format, int bpp); bool intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, + const struct intel_connector *connector, const struct intel_crtc_state *crtc_state, bool dsc, struct link_config_limits *limits); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 667006918bfd..47eed76b136f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -574,6 +574,7 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp, intel_dp_dsc_compute_pipe_bpp_limits(intel_dp, limits); if (!intel_dp_compute_config_link_bpp_limits(intel_dp, + connector, crtc_state, dsc, limits))