From patchwork Thu Dec 5 13:44:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13895364 X-Patchwork-Delegate: kieran@bingham.xyz Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4825D1D52B; Thu, 5 Dec 2024 13:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733406333; cv=none; b=dAOyc1PU9yhq9jAi09R8VNndsjGM2QsPvJeiJiWOo5I7PWpZp1ZjexnSQWWo9LPchXuaoB/h+h59grqhJsrZ+KvJogQTTH5+dP6W3ADHzuiKVaykJtxylc1/zsUwMkZeZQ5X/Jpf+5m3sbT1RPwfuoxjtk91s9gCnzzOpUISFsU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733406333; c=relaxed/simple; bh=avI8ClOrtHzD2SipA/Fyk+O8iRhwsleato1FpezpTWY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SiV/jC2nMtueMjZwrSsZkKKJbemXUeNcdqE3OWEWOPlCbdwvmy0ox61h9VTfuuP5VHrToRLv/kuSs3ZvtwsU6ilVcqskUydGx77huWlCrR6OZv5Q/5/8fpNEpBSailwuos810BeDtPmHFOY0q4IXYb15Rz5uwZjrNdgx1dJnLB4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=E1yT6PfK; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="E1yT6PfK" Received: from [127.0.1.1] (91-157-155-49.elisa-laajakaista.fi [91.157.155.49]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 966DE2B3; Thu, 5 Dec 2024 14:44:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733406300; bh=avI8ClOrtHzD2SipA/Fyk+O8iRhwsleato1FpezpTWY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=E1yT6PfKm87YUYCwaclXqDLloIvWFUCac5ibioLTEIhp6v/Th9MYaYEzUFFNGWL10 y3Hj+w/A/vIptwmJ/7NeUaPyXmqNdN3YbjCF/KiulzsuRzvahBFBljaymULiVOBozs oBQEGCHk+wec2SClYZUEPEgnqrSoVh1+h/d9SQc8= From: Tomi Valkeinen Date: Thu, 05 Dec 2024 15:44:56 +0200 Subject: [PATCH v2 01/10] drm/rcar-du: dsi: Fix PHY lock bit check Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241205-rcar-gh-dsi-v2-1-42471851df86@ideasonboard.com> References: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> In-Reply-To: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> To: Laurent Pinchart , Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Laurent Pinchart , linux-clk@vger.kernel.org, Tomi Valkeinen , stable@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2124; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=oDefLvswOZixERy//YecN6qGggsNckidLEErkzhvvTE=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBnUa5xRBLOhheJC6OnUN7SUGbCM6jOJCXyvEyrG 2oSiEF1wqyJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZ1GucQAKCRD6PaqMvJYe 9UdnD/4pt4eY4gYucruJMStt66P8KT8EJp8jh0vNvO4G6TX6DF/aO576gEFjUM1zdCRC3NVK21q EDvUmGuvGgp9/LrP0PebwTixwFCii3c23MW+ZayWvaErfMotHMHLDDDgm0q0tkqdvMZ6vpOAc8j h9DtLRXQLUJPwkKsj1xQdnStnbLx1OJn1FBme/B5stW6NVBf8tV6m8PUrXFK2VwaX4S0tnwGL7W qILh0qCB3+NL5HHqkzP9d9AMTUfnOMPPLi2lYI6oBeni98tsZmxq4teBgOsJFBbn5ZgXH1LFZnc r/7X9bF3dDUF4JrAWLYonS2FP1z+iV3VM4wqenBWBTSSrY6ueZkKtXSox3lX1is0R+nN6Jp3b12 5sDNWuxYsTjb3tlwHInVJ2wCIxbQnWJzBOBF7OVAr/4LVmb/MeRzP3odWPg+bW1kbna6dYoPmN/ JLK93ldlAMi14gawI5cHXVoPIZXK76cIqdFPrQdEsK1jXMXJT3K4uYnqybFxHBNZnetD5MvCQcN 8BpCWUT7MDUy43JLb+rkWI2oKvRDWMRr3Jh8dgbdIbcrw44aHP1a6NYLP1ecRICkTITKCl6MykU 4penfX0Z6yxKLICIyG91oaekm/VuKfuS8bYayqMVFDL5J/qjT5Y8HvZZ+JsUr6d/QUtWjyj/5Lz VVuSq1frIQLi2AA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen The driver checks for bit 16 (using CLOCKSET1_LOCK define) in CLOCKSET1 register when waiting for the PPI clock. However, the right bit to check is bit 17 (CLOCKSET1_LOCK_PHY define). Not only that, but there's nothing in the documents for bit 16 for V3U nor V4H. So, fix the check to use bit 17, and drop the define for bit 16. Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver") Fixes: 11696c5e8924 ("drm: Place Renesas drivers in a separate dir") Cc: stable@vger.kernel.org Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 2 +- drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c index 2dba7c5ffd2c..92f4261305bd 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c @@ -587,7 +587,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, for (timeout = 10; timeout > 0; --timeout) { if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) && (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) && - (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK)) + (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK_PHY)) break; usleep_range(1000, 2000); diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h index f8114d11f2d1..a6b276f1d6ee 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h @@ -142,7 +142,6 @@ #define CLOCKSET1 0x101c #define CLOCKSET1_LOCK_PHY (1 << 17) -#define CLOCKSET1_LOCK (1 << 16) #define CLOCKSET1_CLKSEL (1 << 8) #define CLOCKSET1_CLKINSEL_EXTAL (0 << 2) #define CLOCKSET1_CLKINSEL_DIG (1 << 2) From patchwork Thu Dec 5 13:44:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13895365 X-Patchwork-Delegate: kieran@bingham.xyz Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D977E219A96; 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arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="UzSD9oUW" Received: from [127.0.1.1] (91-157-155-49.elisa-laajakaista.fi [91.157.155.49]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 4DA817E2; Thu, 5 Dec 2024 14:45:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733406301; bh=EE9tcKkS2kZxo3gub1ut819lrRxN2CSfvIKQfB09sY0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=UzSD9oUWHOadpRdv8M8vcy7Z1IWkg6Ns2J3tFVc6c4e3fJwnnMO5T4Al0lCvPOOk6 2WUYb2MnyVg225xF7YOBaGC/CdBJMGGwwyPXSzTb0Qcw6ilpibnoT/82HtAoWr8xiE Fx396KuJIiuqYDcydP7tDLmk1wm9AjssCWkXmTbk= From: Tomi Valkeinen Date: Thu, 05 Dec 2024 15:44:57 +0200 Subject: [PATCH v2 02/10] drm/rcar-du: Write DPTSR only if there are more than one crtc Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241205-rcar-gh-dsi-v2-2-42471851df86@ideasonboard.com> References: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> In-Reply-To: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> To: Laurent Pinchart , Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Laurent Pinchart , linux-clk@vger.kernel.org, Tomi Valkeinen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Currently the driver always writes DPTSR when setting up the hardware. However, the register is only meaningful when there are more than one crtc, and the only SoC with one crtc, V3M, does not have the register mentioned in its documentation. So move the write behind a condition. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c b/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c index 2ccd2581f544..0fbf6abbde6e 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c @@ -185,11 +185,13 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) dorcr |= DORCR_PG1T | DORCR_DK1S | DORCR_PG1D_DS1; rcar_du_group_write(rgrp, DORCR, dorcr); - /* Apply planes to CRTCs association. */ - mutex_lock(&rgrp->lock); - rcar_du_group_write(rgrp, DPTSR, (rgrp->dptsr_planes << 16) | - rgrp->dptsr_planes); - mutex_unlock(&rgrp->lock); + if (rgrp->num_crtcs > 1) { + /* Apply planes to CRTCs association. */ + mutex_lock(&rgrp->lock); + rcar_du_group_write(rgrp, DPTSR, (rgrp->dptsr_planes << 16) | + rgrp->dptsr_planes); + mutex_unlock(&rgrp->lock); + } } /* From patchwork Thu Dec 5 13:44:58 2024 Content-Type: text/plain; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Extend the Renesas DSI display bindings to support the r8a779h0 V4M. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Acked-by: Krzysztof Kozlowski Tested-by: Geert Uytterhoeven --- .../devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml index d33026f85e19..c167795c63f6 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml @@ -19,6 +19,7 @@ properties: enum: - renesas,r8a779a0-dsi-csi2-tx # for V3U - renesas,r8a779g0-dsi-csi2-tx # for V4H + - renesas,r8a779h0-dsi-csi2-tx # for V4M reg: maxItems: 1 From patchwork Thu Dec 5 13:44:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13895368 X-Patchwork-Delegate: kieran@bingham.xyz Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35FFC21C17C; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Extend the Renesas DU display bindings to support the r8a779h0 V4M. Note that we remove the requirement for two ports from the global part of the bindings, as each conditional part defines the number of required ports already. This came up with r8a779h0 as it's the first one that has only one port. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- .../devicetree/bindings/display/renesas,du.yaml | 52 ++++++++++++++++++++-- 1 file changed, 48 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml index c5b9e6812bce..7dec47aea052 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -41,6 +41,7 @@ properties: - renesas,du-r8a77995 # for R-Car D3 compatible DU - renesas,du-r8a779a0 # for R-Car V3U compatible DU - renesas,du-r8a779g0 # for R-Car V4H compatible DU + - renesas,du-r8a779h0 # for R-Car V4M compatible DU reg: maxItems: 1 @@ -69,10 +70,6 @@ properties: $ref: /schemas/graph.yaml#/properties/port unevaluatedProperties: false - required: - - port@0 - - port@1 - unevaluatedProperties: false renesas,cmms: @@ -807,6 +804,53 @@ allOf: - reset-names - renesas,vsps + - if: + properties: + compatible: + contains: + enum: + - renesas,du-r8a779h0 + then: + properties: + clocks: + items: + - description: Functional clock + + clock-names: + items: + - const: du.0 + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + items: + - const: du.0 + + ports: + properties: + port@0: + description: DSI 0 + port@1: false + port@2: false + port@3: false + + required: + - port@0 + + renesas,vsps: + minItems: 1 + + required: + - clock-names + - interrupts + - resets + - reset-names + - renesas,vsps + additionalProperties: false examples: From patchwork Thu Dec 5 13:45:00 2024 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733406306; bh=Hq6JiYTrr48Zz5qgtO2NNBKqBW0EU5tjSo3HW2upEnQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=etLLRalqjnHU99dAVgt30b2vdmUuqwbleo7Oe+O7gXMDLeVmNn47AcfFIatJ8EDVw fN9OfxEex/HuiFuCp0aXAkxgcrE10ystY1xfOm8HGL7lvMDT3n2r1Qf5SyjdI3l3U9 D8sKwWro6Iy9vs9EO9Ir3Im4RmxmELg+6Q4fCumE= From: Tomi Valkeinen Date: Thu, 05 Dec 2024 15:45:00 +0200 Subject: [PATCH v2 05/10] clk: renesas: r8a779h0: Add display clocks Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241205-rcar-gh-dsi-v2-5-42471851df86@ideasonboard.com> References: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> In-Reply-To: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> To: Laurent Pinchart , Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Laurent Pinchart , linux-clk@vger.kernel.org, Tomi Valkeinen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Add display related clocks for DU, DSI, FCPVD, and VSPD. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- drivers/clk/renesas/r8a779h0-cpg-mssr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index e20c048bfa9b..dc37e987c0e6 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -179,6 +179,9 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { DEF_MOD("canfd0", 328, R8A779H0_CLK_SASYNCPERD2), DEF_MOD("csi40", 331, R8A779H0_CLK_CSI), DEF_MOD("csi41", 400, R8A779H0_CLK_CSI), + DEF_MOD("dis0", 411, R8A779H0_CLK_S0D3), + DEF_MOD("dsitxlink0", 415, R8A779H0_CLK_DSIREF), + DEF_MOD("fcpvd0", 508, R8A779H0_CLK_S0D3), DEF_MOD("hscif0", 514, R8A779H0_CLK_SASYNCPERD1), DEF_MOD("hscif1", 515, R8A779H0_CLK_SASYNCPERD1), DEF_MOD("hscif2", 516, R8A779H0_CLK_SASYNCPERD1), @@ -227,6 +230,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { DEF_MOD("vin15", 811, R8A779H0_CLK_S0D4_VIO), DEF_MOD("vin16", 812, R8A779H0_CLK_S0D4_VIO), DEF_MOD("vin17", 813, R8A779H0_CLK_S0D4_VIO), + DEF_MOD("vspd0", 830, R8A779H0_CLK_S0D1_VIO), DEF_MOD("wdt1:wdt0", 907, R8A779H0_CLK_R), DEF_MOD("cmt0", 910, R8A779H0_CLK_R), DEF_MOD("cmt1", 911, R8A779H0_CLK_R), From patchwork Thu Dec 5 13:45:01 2024 Content-Type: text/plain; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Add support for DSI on r8a779h0. As it is identical to DSI on r8a779g0, all we need is to handle the compatible string. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c index 92f4261305bd..36e902601f84 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c @@ -1081,6 +1081,8 @@ static const struct rcar_mipi_dsi_device_info v4h_data = { static const struct of_device_id rcar_mipi_dsi_of_table[] = { { .compatible = "renesas,r8a779a0-dsi-csi2-tx", .data = &v3u_data }, { .compatible = "renesas,r8a779g0-dsi-csi2-tx", .data = &v4h_data }, + /* DSI in r8a779h0 is identical to r8a779g0 */ + { .compatible = "renesas,r8a779h0-dsi-csi2-tx", .data = &v4h_data }, { } }; From patchwork Thu Dec 5 13:45:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13895370 X-Patchwork-Delegate: kieran@bingham.xyz Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7ACB721CA0C; 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arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="FRd3OIXR" Received: from [127.0.1.1] (91-157-155-49.elisa-laajakaista.fi [91.157.155.49]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C5B997E2; Thu, 5 Dec 2024 14:45:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733406310; bh=651yUJ3SOtPxI9SLtR8kAqHP9JQdu5ewO/5FNbSS4yk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=FRd3OIXRNJ3VTteya0GRg9q03H1nOn+UuwWGO/Ws1s+rM2ExSgh5j63LRLQko+KzN S9vFKpYaV0Clyf4fIztKbiN/08dOa6drTrzrKIx/Qh7f0CaugHwz0c4vFZ4FMWdXEZ SGCZTNCNonOnufWB9FHLGqhNXLDFZmPhvnf8dnlg= From: Tomi Valkeinen Date: Thu, 05 Dec 2024 15:45:02 +0200 Subject: [PATCH v2 07/10] drm/rcar-du: Add support for r8a779h0 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241205-rcar-gh-dsi-v2-7-42471851df86@ideasonboard.com> References: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> In-Reply-To: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> To: Laurent Pinchart , Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Laurent Pinchart , linux-clk@vger.kernel.org, Tomi Valkeinen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Add support for r8a779h0. It is very similar to r8a779g0, but has only one output. Signed-off-by: Tomi Valkeinen Tested-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/renesas/rcar-du/rcar_du_drv.c | 18 ++++++++++++++++++ drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c | 4 +++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/renesas/rcar-du/rcar_du_drv.c index fb719d9aff10..7858e10839f2 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_du_drv.c @@ -545,6 +545,23 @@ static const struct rcar_du_device_info rcar_du_r8a779g0_info = { .dsi_clk_mask = BIT(1) | BIT(0), }; +static const struct rcar_du_device_info rcar_du_r8a779h0_info = { + .gen = 4, + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_VSP1_SOURCE + | RCAR_DU_FEATURE_NO_BLENDING, + .channels_mask = BIT(0), + .routes = { + /* R8A779H0 has one MIPI DSI output. */ + [RCAR_DU_OUTPUT_DSI0] = { + .possible_crtcs = BIT(0), + .port = 0, + }, + }, + .num_rpf = 5, + .dsi_clk_mask = BIT(0), +}; + static const struct of_device_id rcar_du_of_table[] = { { .compatible = "renesas,du-r8a7742", .data = &rcar_du_r8a7790_info }, { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, @@ -571,6 +588,7 @@ static const struct of_device_id rcar_du_of_table[] = { { .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info }, { .compatible = "renesas,du-r8a779a0", .data = &rcar_du_r8a779a0_info }, { .compatible = "renesas,du-r8a779g0", .data = &rcar_du_r8a779g0_info }, + { .compatible = "renesas,du-r8a779h0", .data = &rcar_du_r8a779h0_info }, { } }; diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c b/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c index 0fbf6abbde6e..b9ae6cc43702 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c @@ -107,10 +107,12 @@ static void rcar_du_group_setup_didsr(struct rcar_du_group *rgrp) */ rcrtc = rcdu->crtcs; num_crtcs = rcdu->num_crtcs; - } else if (rcdu->info->gen >= 3 && rgrp->num_crtcs > 1) { + } else if ((rcdu->info->gen == 3 && rgrp->num_crtcs > 1) || + rcdu->info->gen == 4) { /* * On Gen3 dot clocks are setup through per-group registers, * only available when the group has two channels. + * On Gen4 the registers are there for single channel too. */ rcrtc = &rcdu->crtcs[rgrp->index * 2]; num_crtcs = rgrp->num_crtcs; From patchwork Thu Dec 5 13:45:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13895371 X-Patchwork-Delegate: geert@linux-m68k.org Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7CD2D21D5AD; Thu, 5 Dec 2024 13:45:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733406345; cv=none; b=oilUgRj5xx0ueTFwCu77NWcn0cbrasY1a7Ci6e5+1RtxKSDjZQR6SgeRyc2jvcebB0ponfuBroFiRbFKYAE9hOep/ChJse7D/AlO2S+gA8zH9oqGeKFRX5a8vxRbd8ugy8QOwZZQVa9np7AUyldIQEkMub4cFywnIFbHEleSYCw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733406345; 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Thu, 5 Dec 2024 14:45:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733406312; bh=qoTsg3vndyaPE/uVLOmVNadi0lVmr7QYIfbec2DlMKc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QDcIQTpI26NEcgMaCWYakp4o+FHIUB1u3FhguEl+zZ0lBaFkvBOLv4E7wK5+oEOEa jJC0LEHyvf5mgr+TetLl6Kt4xRn81YlDE1MHYhGr+AxBjx5tfQK5NVPOukDIm6dyPh uXsb14VvzS3MflZnfkSMRf2gfGb4klQ7A558nMWw= From: Tomi Valkeinen Date: Thu, 05 Dec 2024 15:45:03 +0200 Subject: [PATCH v2 08/10] arm64: dts: renesas: gray-hawk-single: Fix indentation Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241205-rcar-gh-dsi-v2-8-42471851df86@ideasonboard.com> References: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> In-Reply-To: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> To: Laurent Pinchart , Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Laurent Pinchart , linux-clk@vger.kernel.org, Tomi Valkeinen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Fix the indent on the two regulators. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- .../boot/dts/renesas/r8a779h0-gray-hawk-single.dts | 24 +++++++++++----------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts index 9a1917b87f61..057f959d67b3 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts +++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts @@ -127,21 +127,21 @@ memory@480000000 { }; reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; }; reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Add the device nodes for supporting DU and DSI. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 73 +++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 12d8be3fd579..4f97c483fd4b 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -1828,6 +1828,50 @@ csi41isp1: endpoint { }; }; + fcpvd0: fcp@fea10000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea10000 0 0x200>; + clocks = <&cpg CPG_MOD 508>; + power-domains = <&sysc R8A779H0_PD_C4>; + resets = <&cpg 508>; + }; + + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A779H0_PD_C4>; + resets = <&cpg 830>; + renesas,fcp = <&fcpvd0>; + }; + + du: display@feb00000 { + compatible = "renesas,du-r8a779h0"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = ; + clocks = <&cpg CPG_MOD 411>; + clock-names = "du.0"; + power-domains = <&sysc R8A779H0_PD_C4>; + resets = <&cpg 411>; + reset-names = "du.0"; + renesas,vsps = <&vspd0 0>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_dsi0: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + }; + isp0: isp@fed00000 { compatible = "renesas,r8a779h0-isp", "renesas,rcar-gen4-isp"; @@ -1996,6 +2040,35 @@ isp1vin15: endpoint { }; }; + dsi0: dsi-encoder@fed80000 { + compatible = "renesas,r8a779h0-dsi-csi2-tx"; + reg = <0 0xfed80000 0 0x10000>; + clocks = <&cpg CPG_MOD 415>, + <&cpg CPG_CORE R8A779H0_CLK_DSIEXT>, + <&cpg CPG_CORE R8A779H0_CLK_DSIREF>; + clock-names = "fck", "dsi", "pll"; + power-domains = <&sysc R8A779H0_PD_C4>; + resets = <&cpg 415>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&du_out_dsi0>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; From patchwork Thu Dec 5 13:45:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13895373 X-Patchwork-Delegate: geert@linux-m68k.org Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6561D221461; Thu, 5 Dec 2024 13:45:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733406348; cv=none; b=BM6IBh9W+Ih1eNbbfZ247UEsgacBk0aAEKP/8bYbbK6/u770zsp6i+QJqcunBnMMczjH4RI94sG0sNiVaKqxC4mva3wYV0voCtzL9bKA9j6ayba4qE0iwR/sJbQcec1Ow7ARiZjapDGL16wy9VCrK9bYK3friTSYf1dJ+QfrjOw= ARC-Message-Signature: i=1; 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Thu, 5 Dec 2024 14:45:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733406315; bh=tRF43KBsvxv3hRirW7Pu5wocJ26K3VE9RSkQJeg7ABU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=OA1n9cMJMPnikyhxwz7EcVXcDKAX7UMX+n1bt7jTXVMiuWwWNkTr/MBqSakzugY3t kphahV54aB/iMO/GUhvaut1xF//v0gHsb4zorWhQsYVmBLuEfU10CmPM+xJT2S3vEC CWO/u2GcYV/nyIn7ol1+Hvtp7vqLnW51GHxihNH8= From: Tomi Valkeinen Date: Thu, 05 Dec 2024 15:45:05 +0200 Subject: [PATCH v2 10/10] arm64: dts: renesas: gray-hawk-single: Add DisplayPort support Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241205-rcar-gh-dsi-v2-10-42471851df86@ideasonboard.com> References: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> In-Reply-To: <20241205-rcar-gh-dsi-v2-0-42471851df86@ideasonboard.com> To: Laurent Pinchart , Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Laurent Pinchart , linux-clk@vger.kernel.org, Tomi Valkeinen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Tomi Valkeinen Add support for the mini DP output on the Gray Hawk board. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Tested-by: Geert Uytterhoeven --- .../boot/dts/renesas/r8a779h0-gray-hawk-single.dts | 95 ++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts index 057f959d67b3..7cdf07b6dde6 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts +++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts @@ -59,6 +59,12 @@ chosen { stdout-path = "serial0:921600n8"; }; + sn65dsi86_refclk: clk-x6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; + keys { compatible = "gpio-keys"; @@ -126,6 +132,27 @@ memory@480000000 { reg = <0x4 0x80000000 0x1 0x80000000>; }; + mini-dp-con { + compatible = "dp-connector"; + label = "CN5"; + type = "mini"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out0>; + }; + }; + }; + + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -200,6 +227,24 @@ channel1 { }; }; +&dsi0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + dsi0_out: endpoint { + remote-endpoint = <&sn65dsi86_in0>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&du { + status = "okay"; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -269,6 +314,51 @@ eeprom@53 { }; }; +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + bridge@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in0: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out0: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; +}; + &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; @@ -361,6 +451,11 @@ i2c0_pins: i2c0 { function = "i2c0"; }; + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + i2c3_pins: i2c3 { groups = "i2c3"; function = "i2c3";