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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3861d0f75b4sm5173815f8f.0.2024.12.06.09.29.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:12 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 01/10] iio: adc: ad7124: Don't create more channels than the driver can handle Date: Fri, 6 Dec 2024 18:28:33 +0100 Message-ID: <1b9a5a1d334e5501294f7f9f9d5893f1cdf1b0ec.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1454; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=zn8zvV9Mo4O2rpc8Z3avU2Iyc7Z00tacRFBEl6WqSmQ=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnUzREwrfxrPn7/gyxJ6Ho77bnj3fw7lhluAKdc jf0pS0kSeGJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ1M0RAAKCRCPgPtYfRL+ TvSDB/902QBn4cFJm37Cm52C+RXIivFD2cDnWUPasBDpmCXM/VMWtRJ4ZIhKWyEiVePK1aX7FV8 7ukskMh1kiXJnqmaCaU28wcw0UloCjidZ0yfrf3q+XvKp5c4neMdtxN9OPehebLx5fohRNuLIbf c1AjpFgvBprCHb4TKqdayMz74d2+i7HfmPCW2Z3vmOpjad7YoBNCkB2dA7oMHgzseA01nScasod vWnZlrUYeX8wSyOycazmbFWTxkzCZ4TnnXtd1cydFhU6QKThV2E5SSqTv2iF7iPtybBUk3dTzW0 /iAxfTYdQ3grQ9VTLMW2GAfgQbO4lDVdFB7rZxNKZAkSJ2tz X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 8d94bc2b1cac..5352b26bb391 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -821,6 +821,16 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (!st->num_channels) return dev_err_probe(dev, -ENODEV, "no channel children\n"); + /* + * The driver assigns each logical channel defined in the device tree + * statically one channel register. So only accept 16 such logical + * channels to not treat CONFIG_0 (i.e. the register following + * CHANNEL_15) as an additional channel register. The driver could be + * improved to lift this limitation. + */ + if (st->num_channels > AD7124_MAX_CHANNELS) + return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) From patchwork Fri Dec 6 17:28:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13897503 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA2552206B0 for ; Fri, 6 Dec 2024 17:29:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733506157; cv=none; b=OQrvqXACcAmOVfET+IQ82ifjdgWU8SSkr1z7kRXUUpPNTZ4ULLbDSRtMWxLA8cdvMKfWnBpQIo6MgQSpiPgwByVWJ2Xk5VefIxPGo5aHVgcpVTA5OzKwOdaEvuHvd+/ZnHeYUvuKhw0Q+T0BRvv8Cs0++CkBs/ey4iSHm2g7BOI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733506157; c=relaxed/simple; bh=UpCDFbHiLoBrphP0ZQ6Ni+CRtV5VYT4LknAceCYNRfw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lra3AklR+uTWqVRdG3OgnjCchOjy7C+QGUBtDEd/YIVwgGkP0Hbc8/XOVExodH5fFgA3yZv+Yq0WO7phoeZKoG19+enKgt3fIkzQ1KaB/1VJnZnx7674Hqt2TB5gg/+djEiWmP9tcE6dhNwnQMPGHnNhmvqUapx+jPUztUJ3bgc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=l1hFeeyw; arc=none smtp.client-ip=209.85.221.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="l1hFeeyw" Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-3862b40a6e0so618220f8f.0 for ; Fri, 06 Dec 2024 09:29:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1733506154; x=1734110954; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RITSuX/h//gaahWszdW0fpwFRnABn01F981JW4yCXNU=; b=l1hFeeywNLNPUfWICZ16+Vvnz3jr1QC0bZjwE/eoBUtwlOALa7bcWOCGTJWOAPQk63 lTABES5zXhQbkvWRfTOexyAEo8k7X6triUDB4si6/A2OZS9dLQwr3JL6Ot9/c+oAB3pZ +4u6o8MgqyJ7WtDUAAEf8ax4PcUVX2qQ86Zn51VE0eE0wEfQIDwO9/ikSZ1G+QsJDIkh gw/4E3RsECLrRCY3fCEU/miCKK2JAd0871ko94KUglA4W0UseyByl/uaHLuU3099CWsV Krd320vQyJG6Vmbhq5y+3o0E6DpAEZ8p5OI7vblqyRft+sQUHR0SJu+NZHzlrT7r9Bat ySoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733506154; x=1734110954; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RITSuX/h//gaahWszdW0fpwFRnABn01F981JW4yCXNU=; b=iYeYRa6dvijFrIg8cDBNcm18ZGjZYQwM5siXNFYrDjEyqGWDVHqnuM5d+oGPWhjwGc uzfZzMYFsQuX6/TIk5vKU4pmWcuUT/DehGeCu5qjVpIsPGmEB2f+If35apNOe1GLJHeB 9+BwSIQOIzvrbQe9h3UkGMqgtNmEOMcgyMdUAE2hdvDRwocLm2MR5QVkM8wC6GwtxN96 dbv/GFp+IoOYVN1KtHoqJZz0mCRoYuuhArc7/31mt7fSrlGMYrx5Xh1DxNntX7o/KQ4Z vu3i0hfgi/rfsbFfrTAai7BQ+cqvjX9yoLkrtwr5aW6smAgkV+y9M4R4gbEM4lLhmOn8 OEag== X-Forwarded-Encrypted: i=1; AJvYcCXFJUfw4+bj70WoSqBXSZyfAR5YU3wolCQSd7dmGm++aHPm2LpovztdqcyzW39GTnZR/KIg6DsCfLU=@vger.kernel.org X-Gm-Message-State: AOJu0YxS/pv7Imls2yrOqsRLRFHHjA0zhfn+LCBHcSruFhEt6W+nOIpP RYDL+JY+BOjURIIZRLztSlXDbXcqmyGt0tiQhV6+1gALJbdItd8RI/CdkZMixuU= X-Gm-Gg: ASbGncss2BC/LQRonr3hTcySe5pPOlC0bn3GjD6Gde1Xo5G3ll7REu1qMJMEXRwr6mA oMHuxrdtrxbGFf98AYNRiDnNgR6kf4RV3lyhPiz0xs5hAj43/E7J+Ei9yFi3KnLPznSEfQAKuF9 /SJ5Kt5GG8gYbnDrZg6Jqo3bFBsK4gR6hTtyhw7893YJPQxN+HnFACoBOkagGMzRMu2w9IFUMx2 bfJFsEnQ5ACEPv+zbgvACqwB8c/KMg2RxvVl1huAguF0ZMk/uuggf5fUrUeN0obZBBS4Fn3+T9F ahm4 X-Google-Smtp-Source: AGHT+IE5DzkcHudQm+cl+IiQWqgFwmJoL60RcAa4mplsaFBiZxmIhJcps/AJJZBgIOBJOCSAxgwugQ== X-Received: by 2002:a05:6000:1565:b0:385:f280:d55 with SMTP id ffacd0b85a97d-3862b3e5618mr2862859f8f.37.1733506154354; Fri, 06 Dec 2024 09:29:14 -0800 (PST) Received: from localhost (p5dc6838f.dip0.t-ipconnect.de. [93.198.131.143]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3861ecf4395sm4987182f8f.10.2024.12.06.09.29.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:13 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 02/10] iio: adc: ad7124: Refuse invalid input specifiers Date: Fri, 6 Dec 2024 18:28:34 +0100 Message-ID: <80e3bd629d2b755ab5e061c8731dafa57d08698a.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2144; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=UpCDFbHiLoBrphP0ZQ6Ni+CRtV5VYT4LknAceCYNRfw=; b=owGbwMvMwMXY3/A7olbonx/jabUkhvRgE3chvaKtqvc/MRqK+S3iTO962BsVE8fzvOvX25f9S tmnxG50MhqzMDByMciKKbLYN67JtKqSi+xc++8yzCBWJpApDFycAjCRviL2/yllDHsTeKOfS6za Up6+e9umxBX5ctmsLnxd80yXM0W0Trsj5bJL/fHS9pSqiEP/zkp3KEl9i+GKyG2InFl3+p8Xg5C Dhmhi8/oDrbUpS5fbBc6YtefDYp2ukL1PkiqOb3zQmMkZkR42U+67XmOT+mrvWxsOaFWlpSh2cM h0XLa1cY9Q4rCQzrf6l8jWInlzcyJn6Z5vJtu5wqRZDl1UCX8h5PjDj3VN1VTmdE2eRe9uS9Xs/ PjldOpcvtIXTvVTMk3VZyUohNS6e8yqiNKv3hv4oi5t5r9N71yjU/4rPLqzJe+P0ISNcvr393+a IOEX+HqXToD2OuVf/FXFBUyuiy8m3ypWsnfSbNR61AwA X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 has 8 analog inputs; the input select values 8 to 15 are reserved and not to be used. These are fine for ad7124-8. For both ad7124-4 and ad7124-8 values bigger than 15 are internal channels that might appear as inputs in the channels specified in the device description according to the description of commit f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation"), values bigger than 31 don't fit into the respective register bit field and the driver masked them to smaller values. Check for these invalid input specifiers and fail to probe if one is found. Fixes: f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 5352b26bb391..1f3342373f1c 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -807,6 +807,19 @@ static int ad7124_check_chip_id(struct ad7124_state *st) return 0; } +/* + * Input specifiers 8 - 15 are explicitly reserved for ad7124-4 + * while they are fine for ad7124-8. Values above 31 don't fit + * into the register field and so are invalid for sure. + */ +static bool ad7124_valid_input_select(unsigned int ain, const struct ad7124_chip_info *info) +{ + if (ain >= info->num_inputs && ain < 16) + return false; + + return ain <= FIELD_MAX(AD7124_CHANNEL_AINM_MSK); +} + static int ad7124_parse_channel_config(struct iio_dev *indio_dev, struct device *dev) { @@ -859,6 +872,11 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (ret) return ret; + if (!ad7124_valid_input_select(ain[0], st->chip_info) || + !ad7124_valid_input_select(ain[1], st->chip_info)) + return dev_err_probe(dev, -EINVAL, + "diff-channels property of %pfwP contains invalid data\n", child); + st->channels[channel].nr = channel; st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | AD7124_CHANNEL_AINM(ain[1]); From patchwork Fri Dec 6 17:28:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13897504 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C472A2206BE for ; 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434da0d6a07sm61383595e9.13.2024.12.06.09.29.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:15 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin , Conor Dooley Subject: [PATCH v6 03/10] dt-bindings: iio: adc: adi,ad7{124,173,192,780}: Allow specifications of a gpio for irq line Date: Fri, 6 Dec 2024 18:28:35 +0100 Message-ID: <7fc92a8539e55802d514332e70ee836a3ed08b66.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7014; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=OZ8D5DIA9c2z/ZNslS4oghsCp+4099Z8MVhbXa2hSOo=; b=owGbwMvMwMXY3/A7olbonx/jabUkhvRgEy9HhQPy7z/3H4jRdG3lKcjY3ejzxuBu1/PL26M8C 3PEdk/pZDRmYWDkYpAVU2Sxb1yTaVUlF9m59t9lmEGsTCBTGLg4BWAih15yMMwUUuZL/vQ1+fp7 6fOiARn7zyzPfF9Us5hfXyZErbK1/wiXWPy3aau4lYSnJT05Hr7mB8vVA/8Com9zNO2PCKkVnGv qKvR+tfj9XG+JeW/Fxd1dP06zYwlqtJhpsNJLf+8q4ZXPJsroTm31/bv8UdfedMv0gG+RR+dnT9 tuKbv3uZXsq0MOkzVvCS39x86yb1aUhpCsmbYJq+Cq1Y9CS7JYJ/s1N8cyNZTmrSvstwx/Khjg4 Gd9z6zc5FAV+4zIauNlugmiXSVzZzEyPoxOOPB+SrXn51UzVS9Uy0jpbMhu2P+veJ+EbfuVEssE puiTk2eauOfFXDozX+CqX6G/Vr/rhz+/CvOZGqcm3zADAA== X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 For the AD7124 chip and some of its cousins the logical irq line (R̅D̅Y̅) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Acked-by: Conor Dooley Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 13 +++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7173.yaml | 12 ++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 15 +++++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7780.yaml | 11 +++++++++++ 4 files changed, 51 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 35ed04350e28..7146a654ae38 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -37,6 +37,17 @@ properties: description: IRQ line for the ADC maxItems: 1 + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + '#address-cells': const: 1 @@ -111,6 +122,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -121,6 +133,7 @@ examples: spi-max-frequency = <5000000>; interrupts = <25 2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply = <&adc_vref>; clocks = <&ad7124_mclk>; clock-names = "mclk"; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml index ad15cf9bc2ff..21ee319d4675 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml @@ -135,6 +135,17 @@ properties: '#clock-cells': const: 0 + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + patternProperties: "^channel@[0-9a-f]$": type: object @@ -443,6 +454,7 @@ examples: interrupts = <25 IRQ_TYPE_EDGE_FALLING>; interrupt-names = "rdy"; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; spi-max-frequency = <5000000>; gpio-controller; #gpio-cells = <2>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 66dd1c549bd3..0bd2c6906c83 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -106,6 +106,17 @@ properties: description: see Documentation/devicetree/bindings/iio/adc/adc.yaml type: boolean + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + patternProperties: "^channel@[0-9a-f]+$": type: object @@ -181,6 +192,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -195,6 +207,7 @@ examples: clock-names = "mclk"; interrupts = <25 0x2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; aincom-supply = <&aincom>; dvdd-supply = <&dvdd>; avdd-supply = <&avdd>; @@ -207,6 +220,7 @@ examples: }; }; - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -224,6 +238,7 @@ examples: #clock-cells = <0>; interrupts = <25 0x2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; aincom-supply = <&aincom>; dvdd-supply = <&dvdd>; avdd-supply = <&avdd>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml index be2616ff9af6..5c8df45bfab0 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml @@ -63,6 +63,17 @@ properties: marked GPIO_ACTIVE_LOW. maxItems: 1 + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3862f02f5c3sm1264715f8f.65.2024.12.06.09.29.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:17 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 04/10] iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIO Date: Fri, 6 Dec 2024 18:28:36 +0100 Message-ID: <5be9a4cc4dc600ec384c88db01dd661a21506b9c.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4062; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=Vn/ELfht9W9fFl9T7RxrKmgdJePzkYd4eCJaOLGeJgY=; b=owGbwMvMwMXY3/A7olbonx/jabUkhvRgE5+4cMcQpdtMKzV/ie6UDYjku/RGm10vJ/2MdryUi GFhu04nozELAyMXg6yYIot945pMqyq5yM61/y7DDGJlApnCwMUpABO558HB0HhaaoJratGccMnH 5zo87t/uOnVa/N3XhR2Ft/kqrKIDm6O+6O37oj9nRoyLqJF+n805y48qJw6aHn3xLFdWfsbNmWU nl7BK6GmwMX7h39776IQS58kTBu+kLX1zlXRVD675uynxiessQyd7L8uQa1dOtNSmnfhl/PqEZk Te9TchMgaeymuWNvrpP31nUPlv26f5Dxr/njNZWzjDeKnaBrGJlg7v6oRufokwlHvstnKyNr/f8 bzk1jWvagTOVx5+NvPcbbEFUadFT3e2XmAQCl7EWe8hNz9ljcF92zsnHngF/Z09bbVFnt6rij+s HvbMhv2iLCb7bvsp+k++y2T6jDN1RZW3xkY95fA/a7gtAA== X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Some of the ADCs by Analog signal their irq condition on the MISO line. So typically that line is connected to an SPI controller and a GPIO. The GPIO is used as input and the respective interrupt is enabled when the last SPI transfer is completed. Depending on the GPIO controller the toggling MISO line might make the interrupt pending even while it's masked. In that case the irq handler is called immediately after irq_enable() and so before the device actually pulls that line low which results in non-sense values being reported to the upper layers. The only way to find out if the line was actually pulled low is to read the GPIO. (There is a flag in AD7124's status register that also signals if an interrupt was asserted, but reading that register toggles the MISO line and so might trigger another spurious interrupt.) Add the possibility to specify an interrupt GPIO in the machine description in addition to the plain interrupt. This GPIO is used then to check if the irq line is actually active in the irq handler. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 38 ++++++++++++++++++++++---- include/linux/iio/adc/ad_sigma_delta.h | 2 ++ 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 2f3b61765055..f25850f4965a 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -539,12 +539,29 @@ static irqreturn_t ad_sd_data_rdy_trig_poll(int irq, void *private) { struct ad_sigma_delta *sigma_delta = private; - complete(&sigma_delta->completion); - disable_irq_nosync(irq); - sigma_delta->irq_dis = true; - iio_trigger_poll(sigma_delta->trig); + /* + * AD7124 and a few others use the same physical line for interrupt + * reporting (R̅D̅Y̅) and MISO. + * As MISO toggles when reading a register, this likely results in a + * pending interrupt. This has two consequences: a) The irq might + * trigger immediately after it's enabled even though the conversion + * isn't done yet; and b) checking the STATUS register's R̅D̅Y̅ flag is + * off-limits as reading that would trigger another irq event. + * + * So read the MOSI line as GPIO (if available) and only trigger the irq + * if the line is active. Without such a GPIO assume this is a valid + * interrupt. + */ + if (!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) { + complete(&sigma_delta->completion); + disable_irq_nosync(irq); + sigma_delta->irq_dis = true; + iio_trigger_poll(sigma_delta->trig); - return IRQ_HANDLED; + return IRQ_HANDLED; + } + + return IRQ_NONE; } /** @@ -679,6 +696,17 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, else sigma_delta->irq_line = spi->irq; + sigma_delta->rdy_gpiod = devm_gpiod_get_optional(&spi->dev, "rdy", GPIOD_IN); + if (IS_ERR(sigma_delta->rdy_gpiod)) + return dev_err_probe(&spi->dev, PTR_ERR(sigma_delta->rdy_gpiod), + "Failed to find rdy gpio\n"); + + if (sigma_delta->rdy_gpiod && !sigma_delta->irq_line) { + sigma_delta->irq_line = gpiod_to_irq(sigma_delta->rdy_gpiod); + if (sigma_delta->irq_line < 0) + return sigma_delta->irq_line; + } + iio_device_set_drvdata(indio_dev, sigma_delta); return 0; diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index f8c1d2505940..126b187d70e9 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -29,6 +29,7 @@ struct ad_sd_calib_data { struct ad_sigma_delta; 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434da113508sm63235655e9.35.2024.12.06.09.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:19 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 05/10] iio: adc: ad_sigma_delta: Handle CS assertion as intended in ad_sd_read_reg_raw() Date: Fri, 6 Dec 2024 18:28:37 +0100 Message-ID: <8d76b4ea4a4363b269886c71193b840821c724ea.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=953; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=nUb+NMAcRYvbgIjmhL5rgEmD59DRRpbiNVeKclS6rw0=; b=kA0DAAoBj4D7WH0S/k4ByyZiAGdTNE+ifln/JZWJ6HhWXIMo3Y5BJedD1LWvgMUo9LKAv6vJQ okBMwQAAQoAHRYhBD+BrGk6eh5Zia3+04+A+1h9Ev5OBQJnUzRPAAoJEI+A+1h9Ev5OLQ8IAJuX /Lcpu7GhiJY0WpXRnNMiuzXqDO9TUCBQrTrsa/oz6m4gfsCTOpGCDCzz4UzrkWkLUrnLvr5GYRx +MPp427nxNU46s34F2TBVJLMNUiB1Un2rvx5LHiLLEvli554fwUTL3xUerl50jlENTLjIFJV9+S /DhYbvarG57FryO4UEDLiAzuruMC+yfWp4INm3h6bdt0ubc4AOFLU5VoJ4mwl0FFdyjw/NcSRM2 AOPzvdeloK4IF9fZmnsgWC9AdYUPtynQpeiWXCN1hRbzB+u4keTlGWJ1ajYEqkOqvaT2sT0ECcY PQSkryx/tjtI5QY8f6w2470yRb4eX2STETW7t0k= X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 When struct ad_sigma_delta::keep_cs_asserted was introduced only register writing was adapted to honor this new flag. Also respect it when reading a register. Fixes: df1d80aee963 ("iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion") Reviewed-by: Trevor Gamblin Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index f25850f4965a..ff20fa61c293 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -109,7 +109,7 @@ static int ad_sd_read_reg_raw(struct ad_sigma_delta *sigma_delta, }, { .rx_buf = val, .len = size, - .cs_change = sigma_delta->bus_locked, + .cs_change = sigma_delta->keep_cs_asserted, }, }; struct spi_message m; From patchwork Fri Dec 6 17:28:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13897507 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5F60220694 for ; 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-386221a5eadsm4984212f8f.104.2024.12.06.09.29.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:20 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 06/10] iio: adc: ad_sigma_delta: Fix a race condition Date: Fri, 6 Dec 2024 18:28:38 +0100 Message-ID: <9e6def47e2e773e0e15b7a2c29d22629b53d91b1.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5630; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=wqhe5Rwj9TC6MCUOJBh7AMTtx8QdT9Ts7NqxrVq4PY0=; b=owEBbAGT/pANAwAKAY+A+1h9Ev5OAcsmYgBnUzRS5xn9Gwm5T8IZ6HgIXOMQe/MHu9Bow/IcY enT+JMYo0+JATIEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ1M0UgAKCRCPgPtYfRL+ TsW9B/iTPlviCK8UZLd3+iNMXH+Zv6UchEQDH21S/KKeCXcjhhQ2NMRArS5drLmbAi3wV1WIVqT sr7FPCvBdN5vc+uKsArncTtAAo1f3yTsVY4c9Q8CO+nv5ZvWBd6x3+OuINZ7XdtPdPBl0trgiKM i/slHgCKfdHnkxAc1xYUR3CZG1DU4AZ7K63QzGl5AamJEeXEAz+WUguZMkzRft0x/lkl8FdPkXX Ejnf8U8dNbzsETLOiJFfxHO69t4DTVuI9bRVyNx1H9Ia1twTJ/yJ+3PvpmYZYU75nVhLqDmnW5Z g7EXYp6KDcdXrE2MpMZ5R2jqhSnDdE9xblx+bAOvdGOEZs4= X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad_sigma_delta driver helper uses irq_disable_nosync(). With that one it is possible that the irq handler still runs after the irq_disable_nosync() function call returns. Also to properly synchronize irq disabling in the different threads proper locking is needed and because it's unclear if the irq handler's irq_disable_nosync() call comes first or the one in the enabler's error path, all code locations that disable the irq must check for .irq_dis first to ensure there is exactly one disable call per enable call. So add a spinlock to the struct ad_sigma_delta and use it to synchronize irq enabling and disabling. Also only act in the irq handler if the irq is still enabled. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 56 ++++++++++++++++---------- include/linux/iio/adc/ad_sigma_delta.h | 1 + 2 files changed, 36 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index ff20fa61c293..a4c31baa9c9e 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -202,6 +202,27 @@ int ad_sd_reset(struct ad_sigma_delta *sigma_delta, } EXPORT_SYMBOL_NS_GPL(ad_sd_reset, IIO_AD_SIGMA_DELTA); +static bool ad_sd_disable_irq(struct ad_sigma_delta *sigma_delta) +{ + guard(spinlock_irqsave)(&sigma_delta->irq_lock); + + /* It's already off, return false to indicate nothing was changed */ + if (sigma_delta->irq_dis) + return false; + + sigma_delta->irq_dis = true; + disable_irq_nosync(sigma_delta->irq_line); + return true; +} + +static void ad_sd_enable_irq(struct ad_sigma_delta *sigma_delta) +{ + guard(spinlock_irqsave)(&sigma_delta->irq_lock); + + sigma_delta->irq_dis = false; + enable_irq(sigma_delta->irq_line); +} + int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { @@ -221,12 +242,10 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, if (ret < 0) goto out; - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); time_left = wait_for_completion_timeout(&sigma_delta->completion, 2 * HZ); if (time_left == 0) { - sigma_delta->irq_dis = true; - disable_irq_nosync(sigma_delta->irq_line); + ad_sd_disable_irq(sigma_delta); ret = -EIO; } else { ret = 0; @@ -294,8 +313,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); ret = wait_for_completion_interruptible_timeout( &sigma_delta->completion, HZ); @@ -314,10 +332,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, &raw_sample); out: - if (!sigma_delta->irq_dis) { - disable_irq_nosync(sigma_delta->irq_line); - sigma_delta->irq_dis = true; - } + ad_sd_disable_irq(sigma_delta); sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); @@ -396,8 +411,7 @@ static int ad_sd_buffer_postenable(struct iio_dev *indio_dev) if (ret) goto err_unlock; - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); return 0; @@ -414,10 +428,7 @@ static int ad_sd_buffer_postdisable(struct iio_dev *indio_dev) reinit_completion(&sigma_delta->completion); wait_for_completion_timeout(&sigma_delta->completion, HZ); - if (!sigma_delta->irq_dis) { - disable_irq_nosync(sigma_delta->irq_line); - sigma_delta->irq_dis = true; - } + ad_sd_disable_irq(sigma_delta); sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); @@ -516,8 +527,7 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p) irq_handled: iio_trigger_notify_done(indio_dev->trig); - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); return IRQ_HANDLED; } @@ -551,11 +561,13 @@ static irqreturn_t ad_sd_data_rdy_trig_poll(int irq, void *private) * So read the MOSI line as GPIO (if available) and only trigger the irq * if the line is active. Without such a GPIO assume this is a valid * interrupt. + * + * Also as disable_irq_nosync() is used to disable the irq, only act if + * the irq wasn't disabled before. */ - if (!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) { + if ((!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) && + ad_sd_disable_irq(sigma_delta)) { complete(&sigma_delta->completion); - disable_irq_nosync(irq); - sigma_delta->irq_dis = true; iio_trigger_poll(sigma_delta->trig); return IRQ_HANDLED; @@ -691,6 +703,8 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, } } + spin_lock_init(&sigma_delta->irq_lock); + if (info->irq_line) sigma_delta->irq_line = info->irq_line; else diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index 126b187d70e9..f86eca6126b4 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -86,6 +86,7 @@ struct ad_sigma_delta { /* private: */ struct completion completion; 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3861fd46cbdsm4988194f8f.56.2024.12.06.09.29.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:22 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 07/10] iio: adc: ad_sigma_delta: Store information about reset sequence length Date: Fri, 6 Dec 2024 18:28:39 +0100 Message-ID: <9750db62fce638bf140ff48172c23bff7f785e5b.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6421; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=aMPtlxpdGZaOBJnY/Yq9rwlEXxqb3NKFZyJY/BjDPEs=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnUzRVCSgIn2/HrW3qhDdfxEQQ3yybpn3sRgHPo 8oCZ7yneSSJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ1M0VQAKCRCPgPtYfRL+ TtznB/sHEYNcsSInj9cqjWXtbpKcYFSSy5I0DmwSkbbrB7KZtshxvO1Ss2Fq2Ekpi08MGI8fN7W TsiWXDGxQFCZlE4ngtgtscy7QwbGCGf9yDVjZ6B7LCjPt0RDxDpZuYGeKt6b5stg+618szjhC+W izHdtYXaivYgPQQIizFTKgcbSAzk1f8MqSJa3feEtiUKrvkJbz92cKPDuqx4KQS4oytMttPli0+ eh+wTA3YaRnBIBk7/8YDxZOmNQSI3Da6vMaJVa6bRUNqRNaKPUdu8JioJu8NaWk3qw50BDbYUDb TV/Nv4IrN9Ldazeok1ekHzRof9hR1RlpjY3IDSZs7KRDKkEj X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The various chips can be reset using a sequence of SPI transfers with MOSI = 1. The length of such a sequence varies from chip to chip. Store that length in struct ad_sigma_delta_info and replace the respective parameter to ad_sd_reset() with it. Note the ad7192 used to pass 48 as length but the documentation specifies 40 as the required length. Assuming the latter is right. (Using a too long sequence doesn't hurt apart from using a longer spi transfer than necessary, so this is no relevant fix.) The motivation for storing this information is that this is useful to clear a pending R̅D̅Y̅ signal in the next change. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 3 ++- drivers/iio/adc/ad7173.c | 1 + drivers/iio/adc/ad7192.c | 4 +++- drivers/iio/adc/ad7791.c | 1 + drivers/iio/adc/ad7793.c | 3 ++- drivers/iio/adc/ad_sigma_delta.c | 5 ++--- include/linux/iio/adc/ad_sigma_delta.h | 5 +++-- 7 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 1f3342373f1c..b17c3dbeaeba 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -571,6 +571,7 @@ static const struct ad_sigma_delta_info ad7124_sigma_delta_info = { .data_reg = AD7124_DATA, .num_slots = 8, .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 64, }; static int ad7124_read_raw(struct iio_dev *indio_dev, @@ -756,7 +757,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) unsigned int readval, timeout; int ret; - ret = ad_sd_reset(&st->sd, 64); + ret = ad_sd_reset(&st->sd); if (ret < 0) return ret; diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index a0fca16c3be0..ca46bb20288d 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -764,6 +764,7 @@ static struct ad_sigma_delta_info ad7173_sigma_delta_info = { .read_mask = BIT(6), .status_ch_mask = GENMASK(3, 0), .data_reg = AD7173_REG_DATA, + .num_resetclks = 64, }; static int ad7173_setup(struct iio_dev *indio_dev) diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 955e9eff0099..f744441bd13f 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -361,6 +361,7 @@ static const struct ad_sigma_delta_info ad7192_sigma_delta_info = { .status_ch_mask = GENMASK(3, 0), .num_slots = 4, .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 40, }; static const struct ad_sigma_delta_info ad7194_sigma_delta_info = { @@ -373,6 +374,7 @@ static const struct ad_sigma_delta_info ad7194_sigma_delta_info = { .read_mask = BIT(6), .status_ch_mask = GENMASK(3, 0), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 40, }; static const struct ad_sd_calib_data ad7192_calib_arr[8] = { @@ -565,7 +567,7 @@ static int ad7192_setup(struct iio_dev *indio_dev, struct device *dev) int i, ret, id; /* reset the serial interface */ - ret = ad_sd_reset(&st->sd, 48); + ret = ad_sd_reset(&st->sd); if (ret < 0) return ret; usleep_range(500, 1000); /* Wait for at least 500us */ diff --git a/drivers/iio/adc/ad7791.c b/drivers/iio/adc/ad7791.c index 5d2ad3dd6caa..897e628de611 100644 --- a/drivers/iio/adc/ad7791.c +++ b/drivers/iio/adc/ad7791.c @@ -254,6 +254,7 @@ static const struct ad_sigma_delta_info ad7791_sigma_delta_info = { .addr_shift = 4, .read_mask = BIT(3), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 32, }; static int ad7791_read_raw(struct iio_dev *indio_dev, diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c index b86e89370e0d..5f15fd7aab74 100644 --- a/drivers/iio/adc/ad7793.c +++ b/drivers/iio/adc/ad7793.c @@ -206,6 +206,7 @@ static const struct ad_sigma_delta_info ad7793_sigma_delta_info = { .addr_shift = 3, .read_mask = BIT(6), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 32, }; static const struct ad_sd_calib_data ad7793_calib_arr[6] = { @@ -265,7 +266,7 @@ static int ad7793_setup(struct iio_dev *indio_dev, return ret; /* reset the serial interface */ - ret = ad_sd_reset(&st->sd, 32); + ret = ad_sd_reset(&st->sd); if (ret < 0) goto out; usleep_range(500, 2000); /* Wait for at least 500us */ diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index a4c31baa9c9e..101cf30f4458 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -178,13 +178,12 @@ EXPORT_SYMBOL_NS_GPL(ad_sd_read_reg, IIO_AD_SIGMA_DELTA); * ad_sd_reset() - Reset the serial interface * * @sigma_delta: The sigma delta device - * @reset_length: Number of SCLKs with DIN = 1 * * Returns 0 on success, an error code otherwise. **/ -int ad_sd_reset(struct ad_sigma_delta *sigma_delta, - unsigned int reset_length) +int ad_sd_reset(struct ad_sigma_delta *sigma_delta) { + unsigned int reset_length = sigma_delta->info->num_resetclks; uint8_t *buf; unsigned int size; int ret; diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index f86eca6126b4..eef87d04eb6b 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -54,6 +54,7 @@ struct iio_dev; * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots * @irq_line: IRQ for reading conversions. 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d5273b1dsm98206425e9.15.2024.12.06.09.29.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:24 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 08/10] iio: adc: ad_sigma_delta: Check for previous ready signals Date: Fri, 6 Dec 2024 18:28:40 +0100 Message-ID: <3ec6b61fb1e527e935133dc56f589aab4b2094a3.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5188; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=ZW+oa7MWxhNOMtPfOr2oYTZlBX6HRvncMDOFB2/VzrY=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnUzRYYfr9X2pbCHcy47EHryboUwuoY8g2+p3o0 F41Bm6K0jyJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ1M0WAAKCRCPgPtYfRL+ TpUAB/9hIYxrYwiaRHXcRZ//YA+ruSdgN57dbq1w25YdAcCRh3LD+8QklRLEREejJP6yHxlzv3a 305o8yTEvTE2JZFG3mnHhyNAeH0fCo7r9Qn0sbM5EjAYj7kxoDHgj7817uR+ZBoTjnOzJ+aWJcG SCEPZ+q4StI10VvH1mdWNk8LJi9WwZeWMHsMI92pZGH4k0n1ISYARuOJ1eGnBb4L5rJLv4Cqhcu yYozBGVgTvP3YyqEtglYJ78osCYCxb7M0sH70zVYx/0HQqmVpQqeMrVyXjSqS2J1ilqS5Gog6Jx 5KbEsCKp6I4ntTl6YD0sbbVyVNwjh9GcpanHB/VWwlCyAiMf X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 It can happen if a previous conversion was aborted the ADC pulls down the R̅D̅Y̅ line but the event wasn't handled before. In that case enabling the irq might immediately fire (depending on the irq controller capabilities) and even with a rdy-gpio isn't identified as an unrelated one. To cure that problem check for a pending event before the measurement is started and clear it if needed. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 99 +++++++++++++++++++++++++++++++- 1 file changed, 98 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 101cf30f4458..d32102b25530 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -29,8 +29,11 @@ #define AD_SD_COMM_CHAN_MASK 0x3 #define AD_SD_REG_COMM 0x00 +#define AD_SD_REG_STATUS 0x00 #define AD_SD_REG_DATA 0x03 +#define AD_SD_REG_STATUS_RDY 0x80 + /** * ad_sd_set_comm() - Set communications register * @@ -222,6 +225,86 @@ static void ad_sd_enable_irq(struct ad_sigma_delta *sigma_delta) enable_irq(sigma_delta->irq_line); } +#define AD_SD_CLEAR_DATA_BUFLEN 9 + +/* Called with `sigma_delta->bus_locked == true` only. */ +static int ad_sigma_delta_clear_pending_event(struct ad_sigma_delta *sigma_delta) +{ + bool pending_event; + unsigned int data_read_len = BITS_TO_BYTES(sigma_delta->info->num_resetclks); + u8 *data; + struct spi_transfer t[] = { + { + .len = 1, + }, { + .len = data_read_len, + } + }; + struct spi_message m; + int ret; + + /* + * Read R̅D̅Y̅ pin (if possible) or status register to check if there is an + * old event. + */ + if (sigma_delta->rdy_gpiod) { + pending_event = gpiod_get_value(sigma_delta->rdy_gpiod); + } else { + unsigned status_reg; + + ret = ad_sd_read_reg(sigma_delta, AD_SD_REG_STATUS, 1, &status_reg); + if (ret) + return ret; + + pending_event = !(status_reg & AD_SD_REG_STATUS_RDY); + } + + if (!pending_event) + return 0; + + /* + * In general the size of the data register is unknown. It varies from + * device to device, might be one byte longer if CONTROL.DATA_STATUS is + * set and even varies on some devices depending on which input is + * selected. So send one byte to start reading the data register and + * then just clock for some bytes with DIN (aka MOSI) high to not + * confuse the register access state machine after the data register was + * completely read. Note however that the sequence length must be + * shorter than the reset procedure. + */ + + data = kzalloc(data_read_len + 1, GFP_KERNEL); + if (!data) + return -ENOMEM; + + spi_message_init(&m); + if (sigma_delta->info->has_registers) { + unsigned int data_reg = sigma_delta->info->data_reg ?: AD_SD_REG_DATA; + + data[0] = data_reg << sigma_delta->info->addr_shift; + data[0] |= sigma_delta->info->read_mask; + data[0] |= sigma_delta->comm; + t[0].tx_buf = data; + spi_message_add_tail(&t[0], &m); + } + + /* + * The first transferred byte is part of the real data register, + * so this doesn't need to be 0xff. In the remaining + * `data_read_len - 1` bytes are less than $num_resetclks ones. + */ + t[1].tx_buf = data + 1; + data[1] = 0x00; + memset(data + 2, 0xff, data_read_len - 1); + spi_message_add_tail(&t[1], &m); + + ret = spi_sync_locked(sigma_delta->spi, &m); + + kfree(data); + + return ret; +} + int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { @@ -237,6 +320,10 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, sigma_delta->keep_cs_asserted = true; reinit_completion(&sigma_delta->completion); + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + goto out; + ret = ad_sigma_delta_set_mode(sigma_delta, mode); if (ret < 0) goto out; @@ -310,6 +397,10 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, sigma_delta->keep_cs_asserted = true; reinit_completion(&sigma_delta->completion); + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + goto out_unlock; + ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); ad_sd_enable_irq(sigma_delta); @@ -333,9 +424,11 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, out: ad_sd_disable_irq(sigma_delta); - sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); ad_sigma_delta_disable_one(sigma_delta, chan->address); + +out_unlock: + sigma_delta->keep_cs_asserted = false; sigma_delta->bus_locked = false; spi_bus_unlock(sigma_delta->spi->controller); iio_device_release_direct_mode(indio_dev); @@ -406,6 +499,10 @@ static int ad_sd_buffer_postenable(struct iio_dev *indio_dev) sigma_delta->bus_locked = true; sigma_delta->keep_cs_asserted = true; + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + goto err_unlock; + ret = ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_CONTINUOUS); if (ret) goto err_unlock; From patchwork Fri Dec 6 17:28:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13897511 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FEBC204569 for ; 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d5273131sm98625195e9.12.2024.12.06.09.29.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:27 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 09/10] iio: adc: ad7124: Add error reporting during probe Date: Fri, 6 Dec 2024 18:28:41 +0100 Message-ID: <55e24392f1e4d5b9896f00a52a93c1c4b1feac43.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7578; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=KqvwXZaRvv9GSGI/LYFDg6O+kYZP0S5RykbY4ZVAHHY=; b=owGbwMvMwMXY3/A7olbonx/jabUkhvRgk5jbFc/v9QTs8pjk0WrbV8W1yVAxZ+Lemp6aT4YGL BsfTLfsZDRmYWDkYpAVU2Sxb1yTaVUlF9m59t9lmEGsTCBTGLg4BWAiXt7s/9T+Jn/Rs9nLae0k LhVbvOL7Eo4exhl/kwT++26df3nhu5dWrW/+cqYV/3O1+Zs0sTH0ravF+xrleqFdKXw/2j1fxJ3 om89SquARuUk3a0Ilk9uOrhcmAT5ib/+YlT7KEV98ZXkal+DVaZzRhp6fVCxENKd2TGZ6GZS5Pf DkgvoyXXUR0Vdfgl/eM/SW5HDUd52gzj2VZyr7858G9x12mfFrz4hOOL7VZM++GIGT+wSZWDoN+ SK//5qSENugESE5JY3nmVyfWpfPRjtJ3qytXpznruoLzOFbmtDSukLWV4/t2t6fUxR3vClRufRa SNE3RqCFRXnKEYuErysLv59jPDzl+Idpl+pTfh1K33MKAA== X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 A driver that silently fails to probe is annoying and hard to debug. So add messages in the error paths of the probe function. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 76 +++++++++++++++++++++------------------- 1 file changed, 40 insertions(+), 36 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index b17c3dbeaeba..9405cb579324 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -360,20 +360,21 @@ static int ad7124_find_free_config_slot(struct ad7124_state *st) return free_cfg_slot; } +/* Only called during probe, so dev_err_probe() can be used */ static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channel_config *cfg) { + struct device *dev = &st->sd.spi->dev; unsigned int refsel = cfg->refsel; switch (refsel) { case AD7124_REFIN1: case AD7124_REFIN2: case AD7124_AVDD_REF: - if (IS_ERR(st->vref[refsel])) { - dev_err(&st->sd.spi->dev, - "Error, trying to use external voltage reference without a %s regulator.\n", - ad7124_ref_names[refsel]); - return PTR_ERR(st->vref[refsel]); - } + if (IS_ERR(st->vref[refsel])) + return dev_err_probe(dev, PTR_ERR(st->vref[refsel]), + "Error, trying to use external voltage reference without a %s regulator.\n", + ad7124_ref_names[refsel]); + cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); /* Conversion from uV to mV */ cfg->vref_mv /= 1000; @@ -384,8 +385,7 @@ static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channe st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); return 0; default: - dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Invalid reference %d\n", refsel); } } @@ -752,8 +752,10 @@ static const struct iio_info ad7124_info = { .attrs = &ad7124_attrs_group, }; +/* Only called during probe, so dev_err_probe() can be used */ static int ad7124_soft_reset(struct ad7124_state *st) { + struct device *dev = &st->sd.spi->dev; unsigned int readval, timeout; int ret; @@ -766,7 +768,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) do { ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Error reading status register\n"); if (!(readval & AD7124_STATUS_POR_FLAG_MSK)) return 0; @@ -775,35 +777,30 @@ static int ad7124_soft_reset(struct ad7124_state *st) usleep_range(100, 2000); } while (--timeout); - dev_err(&st->sd.spi->dev, "Soft reset failed\n"); - - return -EIO; + return dev_err_probe(dev, -EIO, "Soft reset failed\n"); } static int ad7124_check_chip_id(struct ad7124_state *st) { + struct device *dev = &st->sd.spi->dev; unsigned int readval, chip_id, silicon_rev; int ret; ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Failure to read ID register\n"); chip_id = AD7124_DEVICE_ID_GET(readval); silicon_rev = AD7124_SILICON_REV_GET(readval); - if (chip_id != st->chip_info->chip_id) { - dev_err(&st->sd.spi->dev, - "Chip ID mismatch: expected %u, got %u\n", - st->chip_info->chip_id, chip_id); - return -ENODEV; - } + if (chip_id != st->chip_info->chip_id) + return dev_err_probe(dev, -ENODEV, + "Chip ID mismatch: expected %u, got %u\n", + st->chip_info->chip_id, chip_id); - if (silicon_rev == 0) { - dev_err(&st->sd.spi->dev, - "Silicon revision empty. Chip may not be present\n"); - return -ENODEV; - } + if (silicon_rev == 0) + return dev_err_probe(dev, -ENODEV, + "Silicon revision empty. Chip may not be present\n"); return 0; } @@ -862,16 +859,18 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, device_for_each_child_node_scoped(dev, child) { ret = fwnode_property_read_u32(child, "reg", &channel); if (ret) - return ret; + return dev_err_probe(dev, ret, + "Failed to parse reg property of %pfwP\n", child); if (channel >= indio_dev->num_channels) return dev_err_probe(dev, -EINVAL, - "Channel index >= number of channels\n"); + "Channel index >= number of channels in %pfwP\n", child); ret = fwnode_property_read_u32_array(child, "diff-channels", ain, 2); if (ret) - return ret; + return dev_err_probe(dev, ret, + "Failed to parse diff-channels property of %pfwP\n", child); if (!ad7124_valid_input_select(ain[0], st->chip_info) || !ad7124_valid_input_select(ain[1], st->chip_info)) @@ -908,12 +907,13 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, static int ad7124_setup(struct ad7124_state *st) { + struct device *dev = &st->sd.spi->dev; unsigned int fclk, power_mode; int i, ret; fclk = clk_get_rate(st->mclk); if (!fclk) - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Failed to get mclk rate\n"); /* The power mode changes the master clock frequency */ power_mode = ad7124_find_closest_match(ad7124_master_clk_freq_hz, @@ -922,7 +922,7 @@ static int ad7124_setup(struct ad7124_state *st) if (fclk != ad7124_master_clk_freq_hz[power_mode]) { ret = clk_set_rate(st->mclk, fclk); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to set mclk rate\n"); } /* Set the power mode */ @@ -953,7 +953,7 @@ static int ad7124_setup(struct ad7124_state *st) ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Failed to setup CONTROL register\n"); return ret; } @@ -966,13 +966,14 @@ static void ad7124_reg_disable(void *r) static int ad7124_probe(struct spi_device *spi) { const struct ad7124_chip_info *info; + struct device *dev = &spi->dev; struct ad7124_state *st; struct iio_dev *indio_dev; int i, ret; info = spi_get_device_match_data(spi); if (!info) - return -ENODEV; + return dev_err_probe(dev, -ENODEV, "Failed to get match data\n"); indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); if (!indio_dev) @@ -1007,17 +1008,17 @@ static int ad7124_probe(struct spi_device *spi) ret = regulator_enable(st->vref[i]); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to enable regulator #%d\n", i); ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, st->vref[i]); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to register disable handler for regulator #%d\n", i); } st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); if (IS_ERR(st->mclk)) - return PTR_ERR(st->mclk); + return dev_err_probe(dev, PTR_ERR(st->mclk), "Failed to get mclk\n"); ret = ad7124_soft_reset(st); if (ret < 0) @@ -1033,10 +1034,13 @@ static int ad7124_probe(struct spi_device *spi) ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); if (ret < 0) - return ret; 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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52c12a4sm100751225e9.30.2024.12.06.09.29.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:29 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin Subject: [PATCH v6 10/10] iio: adc: ad7124: Implement temperature measurement Date: Fri, 6 Dec 2024 18:28:42 +0100 Message-ID: <433211af8ac3f02dee58586ecb51d2e98246a095.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5420; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=PzIORblitgR8o9Wn8H59N3kcmZSxmQXU/hVecY0uC2M=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnUzRfHBNHUkT6nB5k0c8aZVXPXbDComThxc8Vs 1ErW6rVUsKJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ1M0XwAKCRCPgPtYfRL+ Tk58CAClWEqXeqSI2Ca1vpvssFVhuJPMf0keKbY8s0bo0NZmUaUwL7yP1DUsfk6Ptic3K1ZeHNK +07ZiMOJdLDBER3RJpe5dSOlmQM157Ri4rYvdUywlFQAu3rrcZBgnsFERlpTe7TpF39I92IcSoR ge+TNCQU22L51cqNajZrnOmekPoCDckUlCMcsbbjxN2zwNlku6J3NKfVbQUow3Ye+iLyrxCZD1v eF14Mmm/mwch/NJPhCnsKhfZ4KaNDK6hBsHxb1AF7spgqCiLupIESu/vGdRiSj+bE3ck6k+akAh pDoYE81G1LWvqxwy6bnMl+D1/xFj8X+tSn4/gRaaSUaU1VNH X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 If the maximal count of channels the driver supports isn't fully utilized, add an attribute providing the internal temperature. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 112 +++++++++++++++++++++++++++++++-------- 1 file changed, 91 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 9405cb579324..d858bffd2628 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -95,6 +95,10 @@ #define AD7124_MAX_CONFIGS 8 #define AD7124_MAX_CHANNELS 16 +/* AD7124 input sources */ +#define AD7124_INPUT_TEMPSENSOR 16 +#define AD7124_INPUT_AVSS 17 + enum ad7124_ids { ID_AD7124_4, ID_AD7124_8, @@ -589,26 +593,59 @@ static int ad7124_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - mutex_lock(&st->cfgs_lock); + switch (chan->type) { + case IIO_VOLTAGE: + mutex_lock(&st->cfgs_lock); - idx = st->channels[chan->address].cfg.pga_bits; - *val = st->channels[chan->address].cfg.vref_mv; - if (st->channels[chan->address].cfg.bipolar) - *val2 = chan->scan_type.realbits - 1 + idx; - else - *val2 = chan->scan_type.realbits + idx; + idx = st->channels[chan->address].cfg.pga_bits; + *val = st->channels[chan->address].cfg.vref_mv; + if (st->channels[chan->address].cfg.bipolar) + *val2 = chan->scan_type.realbits - 1 + idx; + else + *val2 = chan->scan_type.realbits + idx; + + mutex_unlock(&st->cfgs_lock); + return IIO_VAL_FRACTIONAL_LOG2; + + case IIO_TEMP: + /* + * According to the data sheet + * Temperature (°C) + * = ((Conversion − 0x800000)/13584) − 272.5 + * = (Conversion − 0x800000 - 13584 * 272.5) / 13584 + * = (Conversion − 12090248) / 13584 + * So scale with 1000/13584 to yield °mC. Reduce by 8 to + * 125/1698. + */ + *val = 125; + *val2 = 1698; + return IIO_VAL_FRACTIONAL; + + default: + return -EINVAL; + } - mutex_unlock(&st->cfgs_lock); - return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_OFFSET: - mutex_lock(&st->cfgs_lock); - if (st->channels[chan->address].cfg.bipolar) - *val = -(1 << (chan->scan_type.realbits - 1)); - else - *val = 0; + switch (chan->type) { + case IIO_VOLTAGE: + mutex_lock(&st->cfgs_lock); + if (st->channels[chan->address].cfg.bipolar) + *val = -(1 << (chan->scan_type.realbits - 1)); + else + *val = 0; + + mutex_unlock(&st->cfgs_lock); + return IIO_VAL_INT; + + case IIO_TEMP: + /* see calculation above */ + *val = -12090248; + return IIO_VAL_INT; + + default: + return -EINVAL; + } - mutex_unlock(&st->cfgs_lock); - return IIO_VAL_INT; case IIO_CHAN_INFO_SAMP_FREQ: mutex_lock(&st->cfgs_lock); *val = st->channels[chan->address].cfg.odr; @@ -826,11 +863,10 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, struct ad7124_channel *channels; struct iio_chan_spec *chan; unsigned int ain[2], channel = 0, tmp; + unsigned int num_channels; int ret; - st->num_channels = device_get_child_node_count(dev); - if (!st->num_channels) - return dev_err_probe(dev, -ENODEV, "no channel children\n"); + num_channels = device_get_child_node_count(dev); /* * The driver assigns each logical channel defined in the device tree @@ -839,9 +875,12 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, * CHANNEL_15) as an additional channel register. The driver could be * improved to lift this limitation. */ - if (st->num_channels > AD7124_MAX_CHANNELS) + if (num_channels > AD7124_MAX_CHANNELS) return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + /* Add one for temperature */ + st->num_channels = min(num_channels + 1, AD7124_MAX_CHANNELS); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) @@ -862,7 +901,7 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, return dev_err_probe(dev, ret, "Failed to parse reg property of %pfwP\n", child); - if (channel >= indio_dev->num_channels) + if (channel >= num_channels) return dev_err_probe(dev, -EINVAL, "Channel index >= number of channels in %pfwP\n", child); @@ -902,6 +941,37 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, chan[channel].channel2 = ain[1]; } + if (num_channels < AD7124_MAX_CHANNELS) { + st->channels[num_channels] = (struct ad7124_channel) { + .nr = num_channels, + .ain = AD7124_CHANNEL_AINP(AD7124_INPUT_TEMPSENSOR) | + AD7124_CHANNEL_AINM(AD7124_INPUT_AVSS), + .cfg = { + .bipolar = true, + }, + }; + + chan[num_channels] = (struct iio_chan_spec) { + .type = IIO_TEMP, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .scan_type = { + /* + * You might find it strange that a bipolar + * measurement yields an unsigned value, but + * this matches the device's manual. + */ + .sign = 'u', + .realbits = 24, + .storagebits = 32, + .endianness = IIO_BE, + }, + .address = num_channels, + .scan_index = num_channels, + }; + }; + return 0; }