From patchwork Mon Dec 9 07:11:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 13898977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90D44E77173 for ; Mon, 9 Dec 2024 07:11:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7xQJMWjCN0OM+5uBnHV3T4XzVbW9fj3/dkSpL2FV1c4=; b=KCZgPMwSGH8AY/ iSLzWGQ5Y4jD9QBo7nQqscg+0819TH31ki3y9Elva31/2YrV3hOS3wGREZ1G6p52jTNSdY/zaHs4a 9K8QSPn40jut2XczHId8duwR8a9brVHrATD9S160te33Y1dVvxb8Yq896pJUiQvKVxP1S07vK2fhg 6f5G0jJf0WX7+1sH/FCKti/aAivzGBxxjKmnNAdqxTlFco7VjzyBKOLZnWKc7acmPRVtqhbRTofFX uh5rc18O3t0SiswAk5w74BMVMRMREsQyvkHtZuP85l2PUlBIy51b8ogd5mtf+nfQDHW5V/wYGK0Ll dXr4GQCPsg+UbaBOMIeg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tKXvn-00000006fPY-0DAC; Mon, 09 Dec 2024 07:11:47 +0000 Received: from mail-oo1-xc2e.google.com ([2607:f8b0:4864:20::c2e]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tKXvk-00000006fO6-3MWs for linux-riscv@lists.infradead.org; Mon, 09 Dec 2024 07:11:46 +0000 Received: by mail-oo1-xc2e.google.com with SMTP id 006d021491bc7-5f2c51478e5so39337eaf.1 for ; Sun, 08 Dec 2024 23:11:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733728304; x=1734333104; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=klPRAQmrviFZDy2vInQr+pcPkAn+YtkoFZF3QW1QD8Y=; b=D1JCTj638hAbUU0dW0bL8ooVZuRQP5biiCs8VZCEAvGmVj5cZciYc9hdEtlXLJLJwF 1dZW0/au9tVSc9O8gkVHm+3VY0FkUZj94lXLRoUfXgCQctJ1ww2pPh+djzBqZnFh2n+h /SBf9kvOL5Nzkl4tZBAzDWbtF9gsGU08LuGtzVBuacYZtN5QRROnRV+AXUM9mXioVuRv mcr9A2zhajeh2QVeQOtGnUHKJPYYfUf0Z4GUJXoBl38J5qpS2ZtzDKFm26bqpR1K0Evp ygmJ27eh1na6fvbN5Q36LOQNUPuPCulKAzy6klUBJhnrMjdDfCcQepiZ3h75L+jltSJS Q3VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733728304; x=1734333104; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=klPRAQmrviFZDy2vInQr+pcPkAn+YtkoFZF3QW1QD8Y=; b=u5bMbAG+QcotpG2/ja82GvWKLYZAfLcPwFdZxcyozvqDgtcutEjd2jJ90+V/w/CWe+ UITQpMHQXvGU/FkMi4FqLQCDnETPQnbADTQXMNqCc6V9f0j42UMz6/0fkrXdo4gotKOO wTL3V0Tez+oNPEJh3TVxBW25+lp/83hOmtrNl52q/RByY2v6ukLUhhu5nrlcnLk+Ynb0 3EdIieIpJsx1w5xrpy9SGYua7MDFhTNZ4W452+A2beerX51khMfF9BZBqWujC21pq+cQ DNNUWdFzaOSSBo7AYta3y1bUdba/4vpp/IVugmRKhHZv8HnK+KimLma8DJXNGMLm3D61 EviA== X-Forwarded-Encrypted: i=1; AJvYcCWnzXXSg3sc/xA/YrZGe+pr3MH1FxN2OUKjsyI6kGcsR7x6ldVY09z9DI6XEKj8uNa33td2lAJM+J5aiQ==@lists.infradead.org X-Gm-Message-State: AOJu0Yy5PnPsYtgrzSRY9ciFHCzFDArskSAafcnCatpx3Yrs9ImtcTKJ FC8nYdjmYO0zHiwbGQE/lldOGfb18iRtR5DndoN7WerXQRDhNoWm X-Gm-Gg: ASbGncvqGOBwZSqb46myw6jU+UIBK9JChToHfajIDtZf4FnCo71G/7NnOd4Roe61wnb CpkOsn2VZuSRjXF7k0IwJE5J8BXu6dFsS0loDHwPFLitmJNU2YeD7u48o0O6UrNzDNBkuruPlQP dfeLJqtiIefkik4OMHBdwIeYP/jf0UEXgzr+x8zLs7wX/g41wNTp4sZLPgJCKK7OMspT98QYU0z tpNQisx5QCj8An5MHCFWC02BCBZj5PJ8TGDU7pgpVaNdA64Vtbkz/JsArkn X-Google-Smtp-Source: AGHT+IGmImEDzFh8sIAAPI0/7eiLKaOccUhREzWI4+bMl5GKhrC4BuLz5gHeJhmGOaOCZkUsv0Go6g== X-Received: by 2002:a05:6870:9571:b0:29f:b1d4:7710 with SMTP id 586e51a60fabf-29fb1d5172fmr2511485fac.24.1733728303752; Sun, 08 Dec 2024 23:11:43 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-29f56665801sm2532803fac.4.2024.12.08.23.11.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Dec 2024 23:11:43 -0800 (PST) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com Subject: [PATCH v2 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI Date: Mon, 9 Dec 2024 15:11:29 +0800 Message-Id: <8f857ba0d281010ddfb53d12b3dd66733ee6a810.1733726057.git.unicorn_wang@outlook.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241208_231144_838789_0084F484 X-CRM114-Status: GOOD ( 11.90 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Add binding for Sophgo SG2042 MSI controller. Signed-off-by: Chen Wang --- .../sophgo,sg2042-msi.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml new file mode 100644 index 000000000000..0c9e9d07e5ae --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 MSI Controller + +maintainers: + - Chen Wang + +description: + This interrupt controller is in Sophgo SG2042 for transforming interrupts from + PCIe MSI to PLIC interrupts. + +allOf: + - $ref: /schemas/interrupts.yaml# + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +properties: + compatible: + const: sophgo,sg2042-msi + + reg: + items: + - description: clear register + + reg-names: + items: + - const: clr + + msi-controller: true + + msi-ranges: + maxItems: 1 + + sophgo,msi-doorbell-addr: + description: + u64 value of the MSI doorbell address + $ref: /schemas/types.yaml#/definitions/uint64 + +required: + - compatible + - reg + - reg-names + - msi-controller + - msi-ranges + - sophgo,msi-doorbell-addr + +additionalProperties: true + +examples: + - | + #include + msi: msi-controller@30000000 { + compatible = "sophgo,sg2042-msi"; + reg = <0x30000000 0x4>; + reg-names = "clr"; + msi-controller; + msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>; + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; + interrupt-parent = <&plic>; + }; From patchwork Mon Dec 9 07:12:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 13898978 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7C61E77173 for ; Mon, 9 Dec 2024 07:12:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EL7dVj9ZCwd4pudjhBwLGuSJcmWXxrLU8mDis0Iart0=; b=ARe5bFdQZNkbYB B/oIMB4AKbYmAb4FBCjr+cZ6sOhF1a7hZkyaghMJ4lLRhZCi3ngUh/jfe/qnSrU4Uo0TtUIdC02x/ gHSHC96HlQZ8nUsPs+ohlFXFufZtuwCbxpjhd43lUEn7szhcTDUNkygLcsCSnaiz69Pn7PqtbRXV5 CeFTvR86phyiSV8bCX4B3UoYyHlmeVEYpj55aic1ML52XArjX9fZsVOPBPkvayzpGm59WDBlf2fJu FeI6TlZ8WBUXvxH6f7swdE2B640pcRp3RnF2Hpu3y/Ilqj4euY+g+FHq+U9eVyn1hFhl3O9y5apcf US9CheU4kUTSwoX1f+Hw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tKXwB-00000006fam-2qlA; Mon, 09 Dec 2024 07:12:11 +0000 Received: from mail-oa1-x2f.google.com ([2001:4860:4864:20::2f]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tKXw9-00000006fYw-45hC for linux-riscv@lists.infradead.org; Mon, 09 Dec 2024 07:12:11 +0000 Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-29f9e76802aso696929fac.1 for ; Sun, 08 Dec 2024 23:12:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733728329; x=1734333129; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=sZQ8cjmGeH2omjQOFg/Y4/RVhyCVeY7LvUq7HoVDLNA=; b=f9BhJv4z5II7ZCOsIyDwqu8fVNHhbYakVRWyw9oNmSqiipiu2UoDaKeXOndoTpes9W BOZzSl62PDsTnRU91T/A7gkOiXbLUc9dRZeIKY+Lbt/o7zky2Db4Bo04cmmCFyvOl9bL 1EEFr+Rzn02sE+CkKHpOHkAJGVqT/6v3mhlxXKQfYy61opxAfl1FoLovgDrJeFqaR2/v pCVAoYkVf1EFdVXyn5pSFiqbjaRCOc4E+2SLou5Q/RHmCupHEoiQmu4WFV3NUTP2rShY y+gTcieilUWDFgTcNbnTASTbsY/ykTsLPChfOb+13BespLqKwALPnZtbfXPSP2Y9kk2q da8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733728329; x=1734333129; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sZQ8cjmGeH2omjQOFg/Y4/RVhyCVeY7LvUq7HoVDLNA=; b=DK8HyGvLyDTMLqtCaKRuBIUhiPxhxOVAgWv1h3+G/SoF1NIgaymMK6iDt1DrrpOLY/ MoR4bgKnTBt8BbElZqg1y/1OJnHI6m0S/w5xNywUTAKSpDOTwI9+j19wZwiyrkeU7ZU8 zM1n3yQjy7tKpvluuFVMoyH021il4W6Ug0UC4zDnNE1Lw8RwefgH2giypJ1t3j9jOeqO +7EsSkIpAf6Z4hanf3Duko/bQujgJDQk5URI0zl1kHaoPFmo30pplhS/4oWPSGtIoy1w TswWxlisaZ4zFvtcmJGK/IFd5wnDzLnx+svZX5EWC/2C+YPvCpelvqoFChuBjEyintwl 3rGw== X-Forwarded-Encrypted: i=1; AJvYcCVH3Rb++OMeIF9QFaw8L72pUg33uIgIN+ujM9zHcLkhWoDXz+NnoC80L9ReW6lrGgsME9iPy8mAVItpuQ==@lists.infradead.org X-Gm-Message-State: AOJu0YymRoLPcOSZj8nCCA1QdUFGswj9CbD09KUGRJBe0Z2sHcMx3+rF pQeMz1s/qIb2IxOsyPsC9HGB2Y2Z90PajhsSibB10Ne6iFJZqht2 X-Gm-Gg: ASbGncsjF748L3rnhUszkKq4hj4UW/fy9a9rSgwX3Ppn9e6m+PAvsm6szqpHJ3Rrjiv oZzVFY4s3yaGdS6sPwVD1BnkkkCN+/0uTczHg7SDVTwOAi4Cy2mTkodAnY43J2VCOa4W+ioZ610 Fo/oqC2kcDdEbCfGvXEAHmU0uLRa6EsoUXRZCMi2WhtVocascCERaA1aJffF+ETuuqq7s60q5aQ /AutGfxxqnE5K9t1CnyUYyR+vxcd5uOOpqbPiPbrj23qcLw4JMyzSpyIpA5 X-Google-Smtp-Source: AGHT+IEBoLa9cvZyfxoV+5TLivJeNvZCEqunJBtUgy0UO6Zk7+DZe+syCil5pQZlT/J3QZQvF8n/yw== X-Received: by 2002:a05:6870:7b49:b0:29e:4c3e:a007 with SMTP id 586e51a60fabf-29f504621dcmr9316990fac.21.1733728328874; Sun, 08 Dec 2024 23:12:08 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-5f2b98bc9d9sm421924eaf.18.2024.12.08.23.12.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Dec 2024 23:12:07 -0800 (PST) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com Subject: [PATCH v2 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt controller Date: Mon, 9 Dec 2024 15:12:00 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241208_231210_029959_599647EA X-CRM114-Status: GOOD ( 24.65 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Add driver for Sophgo SG2042 MSI interrupt controller. Signed-off-by: Chen Wang --- drivers/irqchip/Kconfig | 12 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sg2042-msi.c | 285 +++++++++++++++++++++++++++++++ 3 files changed, 298 insertions(+) create mode 100644 drivers/irqchip/irq-sg2042-msi.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 9bee02db1643..161fb5df857f 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -749,6 +749,18 @@ config MCHP_EIC help Support for Microchip External Interrupt Controller. +config SOPHGO_SG2042_MSI + bool "Sophgo SG2042 MSI Controller" + depends on ARCH_SOPHGO || COMPILE_TEST + depends on PCI + select IRQ_DOMAIN_HIERARCHY + select IRQ_MSI_LIB + select PCI_MSI + help + Support for the Sophgo SG2042 MSI Controller. + This on-chip interrupt controller enables MSI sources to be + routed to the primary PLIC controller on SoC. + config SUNPLUS_SP7021_INTC bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST default SOC_SP7021 diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 25e9ad29b8c4..dd60e597491d 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -128,4 +128,5 @@ obj-$(CONFIG_WPCM450_AIC) += irq-wpcm450-aic.o obj-$(CONFIG_IRQ_IDT3243X) += irq-idt3243x.o obj-$(CONFIG_APPLE_AIC) += irq-apple-aic.o obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o +obj-$(CONFIG_SOPHGO_SG2042_MSI) += irq-sg2042-msi.o obj-$(CONFIG_SUNPLUS_SP7021_INTC) += irq-sp7021-intc.o diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-msi.c new file mode 100644 index 000000000000..495ee2b45eb2 --- /dev/null +++ b/drivers/irqchip/irq-sg2042-msi.c @@ -0,0 +1,285 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SG2042 MSI Controller + * + * Copyright (C) 2024 Sophgo Technology Inc. + * Copyright (C) 2024 Chen Wang + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "irq-msi-lib.h" + +#define SG2042_VECTOR_MIN 64 +#define SG2042_VECTOR_MAX 95 + +struct sg2042_msi_data { + void __iomem *reg_clr; // clear reg, see TRM, 10.1.33, GP_INTR0_CLR + + u64 doorbell_addr; // see TRM, 10.1.32, GP_INTR0_SET + + u32 irq_first; // The vector number that MSIs starts + u32 num_irqs; // The number of vectors for MSIs + + unsigned long *msi_map; + struct mutex msi_map_lock; // lock for msi_map +}; + +static int sg2042_msi_allocate_hwirq(struct sg2042_msi_data *priv, int num_req) +{ + int first; + + guard(mutex)(&priv->msi_map_lock); + first = bitmap_find_free_region(priv->msi_map, priv->num_irqs, + get_count_order(num_req)); + return first >= 0 ? priv->irq_first + first : -ENOSPC; +} + +static void sg2042_msi_free_hwirq(struct sg2042_msi_data *priv, + int hwirq, int num_req) +{ + int first = hwirq - priv->irq_first; + + guard(mutex)(&priv->msi_map_lock); + bitmap_release_region(priv->msi_map, first, get_count_order(num_req)); +} + +static void sg2042_msi_irq_ack(struct irq_data *d) +{ + struct sg2042_msi_data *data = irq_data_get_irq_chip_data(d); + int bit_off = d->hwirq - data->irq_first; + + writel(1 << bit_off, (unsigned int *)data->reg_clr); + + irq_chip_ack_parent(d); +} + +static void sg2042_msi_irq_compose_msi_msg(struct irq_data *data, + struct msi_msg *msg) +{ + struct sg2042_msi_data *priv = irq_data_get_irq_chip_data(data); + + msg->address_hi = upper_32_bits(priv->doorbell_addr); + msg->address_lo = lower_32_bits(priv->doorbell_addr); + msg->data = 1 << (data->hwirq - priv->irq_first); + + pr_debug("%s hwirq[%ld]: address_hi[%#x], address_lo[%#x], data[%#x]\n", + __func__, data->hwirq, msg->address_hi, msg->address_lo, msg->data); +} + +static struct irq_chip sg2042_msi_middle_irq_chip = { + .name = "SG2042 MSI", + .irq_ack = sg2042_msi_irq_ack, + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, +#ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, +#endif + .irq_compose_msi_msg = sg2042_msi_irq_compose_msi_msg, +}; + +static int sg2042_msi_parent_domain_alloc(struct irq_domain *domain, + unsigned int virq, int hwirq) +{ + struct irq_fwspec fwspec; + struct irq_data *d; + int ret; + + fwspec.fwnode = domain->parent->fwnode; + fwspec.param_count = 2; + fwspec.param[0] = hwirq; + fwspec.param[1] = IRQ_TYPE_EDGE_RISING; + + ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); + if (ret) + return ret; + + d = irq_domain_get_irq_data(domain->parent, virq); + return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING); +} + +static int sg2042_msi_middle_domain_alloc(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs, void *args) +{ + struct sg2042_msi_data *priv = domain->host_data; + int hwirq, err, i; + + hwirq = sg2042_msi_allocate_hwirq(priv, nr_irqs); + if (hwirq < 0) + return hwirq; + + for (i = 0; i < nr_irqs; i++) { + err = sg2042_msi_parent_domain_alloc(domain, virq + i, hwirq + i); + if (err) + goto err_hwirq; + + pr_debug("%s: virq[%d], hwirq[%d]\n", __func__, virq + i, hwirq + i); + + irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, + &sg2042_msi_middle_irq_chip, priv); + } + + return 0; + +err_hwirq: + sg2042_msi_free_hwirq(priv, hwirq, nr_irqs); + irq_domain_free_irqs_parent(domain, virq, i); + + return err; +} + +static void sg2042_msi_middle_domain_free(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs) +{ + struct irq_data *d = irq_domain_get_irq_data(domain, virq); + struct sg2042_msi_data *priv = irq_data_get_irq_chip_data(d); + + irq_domain_free_irqs_parent(domain, virq, nr_irqs); + sg2042_msi_free_hwirq(priv, d->hwirq, nr_irqs); +} + +static const struct irq_domain_ops sg2042_msi_middle_domain_ops = { + .alloc = sg2042_msi_middle_domain_alloc, + .free = sg2042_msi_middle_domain_free, + .select = msi_lib_irq_domain_select, +}; + +#define SG2042_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS) + +#define SG2042_MSI_FLAGS_SUPPORTED MSI_GENERIC_FLAGS_MASK + +static struct msi_parent_ops sg2042_msi_parent_ops = { + .required_flags = SG2042_MSI_FLAGS_REQUIRED, + .supported_flags = SG2042_MSI_FLAGS_SUPPORTED, + .bus_select_mask = MATCH_PCI_MSI, + .bus_select_token = DOMAIN_BUS_NEXUS, + .prefix = "SG2042-", + .init_dev_msi_info = msi_lib_init_dev_msi_info, +}; + +static int sg2042_msi_init_domains(struct sg2042_msi_data *priv, + struct device_node *node) +{ + struct fwnode_handle *fwnode = of_node_to_fwnode(node); + struct irq_domain *plic_domain, *middle_domain; + struct device_node *plic_node; + + if (!of_find_property(node, "interrupt-parent", NULL)) { + pr_err("Can't find interrupt-parent!\n"); + return -EINVAL; + } + + plic_node = of_irq_find_parent(node); + if (!plic_node) { + pr_err("Failed to find the PLIC node!\n"); + return -ENXIO; + } + + plic_domain = irq_find_host(plic_node); + of_node_put(plic_node); + if (!plic_domain) { + pr_err("Failed to find the PLIC domain\n"); + return -ENXIO; + } + + middle_domain = irq_domain_create_hierarchy(plic_domain, 0, priv->num_irqs, + fwnode, + &sg2042_msi_middle_domain_ops, + priv); + if (!middle_domain) { + pr_err("Failed to create the MSI middle domain\n"); + return -ENOMEM; + } + + irq_domain_update_bus_token(middle_domain, DOMAIN_BUS_NEXUS); + + middle_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT; + middle_domain->msi_parent_ops = &sg2042_msi_parent_ops; + + return 0; +} + +static int sg2042_msi_probe(struct platform_device *pdev) +{ + struct of_phandle_args args = {}; + struct sg2042_msi_data *data; + int ret; + + data = devm_kzalloc(&pdev->dev, sizeof(struct sg2042_msi_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->reg_clr = devm_platform_ioremap_resource_byname(pdev, "clr"); + if (IS_ERR(data->reg_clr)) { + dev_err(&pdev->dev, "Failed to map clear register\n"); + return PTR_ERR(data->reg_clr); + } + + if (of_property_read_u64(pdev->dev.of_node, "sophgo,msi-doorbell-addr", + &data->doorbell_addr)) { + dev_err(&pdev->dev, "Unable to parse MSI doorbell addr\n"); + return -EINVAL; + } + + ret = of_parse_phandle_with_args(pdev->dev.of_node, "msi-ranges", + "#interrupt-cells", 0, &args); + if (ret) { + dev_err(&pdev->dev, "Unable to parse MSI vec base\n"); + return ret; + } + data->irq_first = (u32)args.args[0]; + + ret = of_property_read_u32_index(pdev->dev.of_node, "msi-ranges", + args.args_count + 1, &data->num_irqs); + if (ret) { + dev_err(&pdev->dev, "Unable to parse MSI vec number\n"); + return ret; + } + + if (data->irq_first < SG2042_VECTOR_MIN || + (data->irq_first + data->num_irqs - 1) > SG2042_VECTOR_MAX) { + dev_err(&pdev->dev, "msi-ranges is incorrect!\n"); + return -EINVAL; + } + + mutex_init(&data->msi_map_lock); + + data->msi_map = bitmap_zalloc(data->num_irqs, GFP_KERNEL); + if (!data->msi_map) + return -ENOMEM; + + ret = sg2042_msi_init_domains(data, pdev->dev.of_node); + if (ret) + bitmap_free(data->msi_map); + + return ret; +} + +static const struct of_device_id sg2042_msi_of_match[] = { + { .compatible = "sophgo,sg2042-msi" }, + {} +}; + +static struct platform_driver sg2042_msi_driver = { + .driver = { + .name = "sg2042-msi", + .of_match_table = of_match_ptr(sg2042_msi_of_match), + }, + .probe = sg2042_msi_probe, +}; +builtin_platform_driver(sg2042_msi_driver); From patchwork Mon Dec 9 07:12:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 13898979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9114E77173 for ; Mon, 9 Dec 2024 07:12:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3+d12Pokx7xDGBDX51e/1StDwTjpWyWllcGfz/D8vns=; b=SQWimRtCWw0VGe kfqxnBcoaJs/iQv9O0vngYZuriy+L6W+pUdoqOXPndYYg6dGpZC/LKbkfHukEW5D0lceNusdbYAAP 6OOtfuD4wUcROoKu12cNxoPbHCE4AaDTRKsx1OFVn5K4/djKUtQKd48Zxktr+3qQ5zZeYlQnWG4cw N+I7LcBGmWgFRLhPQzixJlLWNfPzo/SsJOiPDg53e0Juo4o+pTaXFBkTPsheJRwiSHXi/rujWvnQS c7cRqlqhQnZdtvPK39YUmo4qy7ahAXadl2IsPGNw1ThmWRguTWGWxKnpk9hkv4KoveZlbWchWWqyg 54fLjgLV6hbBd7d0AL0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tKXwb-00000006fmM-1LTS; Mon, 09 Dec 2024 07:12:37 +0000 Received: from mail-oi1-x22f.google.com ([2607:f8b0:4864:20::22f]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tKXwY-00000006flM-2176 for linux-riscv@lists.infradead.org; Mon, 09 Dec 2024 07:12:35 +0000 Received: by mail-oi1-x22f.google.com with SMTP id 5614622812f47-3eb5a870158so208051b6e.3 for ; Sun, 08 Dec 2024 23:12:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733728353; x=1734333153; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=CBYCDLmiI5Ul4WtnczXeDvi2MdVWE89AendZ5YRaAK0=; b=bRS2vYzvMVXbK3N8XhKqZ609G3ARqOVbKoNxN09tV8iIbViXMjsQxy5Adt2X1WRl/H chH++9BTUViSE8e6Xbyo+z0+R/yTxQ0ZdNLbQW/UxC2423l7plyE3wgjcNo92xqDrpL3 ORPjjCUxt86r+AHjiHKJlr7W6wjMRL9aDqsVxcpH7QVCiEPZDzB/iqxkKsBBvG95ShWt ZCTihqw533+ArH7G3GvOpYl+VQWJHvFvKz8g6F/9U7Dgr4UDbiqf6tk1WjxUxQD8Beid xLHkPCmlirKiR20Ck4/r+W2dwbCB2ry1/qKU6jHUrr0LTPZwiWmuopnauRhlcCVBWu1Z lHeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733728353; x=1734333153; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CBYCDLmiI5Ul4WtnczXeDvi2MdVWE89AendZ5YRaAK0=; b=C5VUeKkn1oQvqY2FwlzKWQ2Y2XAyL2bx+s30ownPF/b/oMD29oZeMK7hiB9VNma5ON YWUk+IYxCjU/5bZ1vQHjT5eBAEANkOgCSLzib19iVaS3OiCgJjhHldiqFCfSX2iFX6il UrZItIpmcbjnEvpfjzGNP8N1TTpu+Eg1MceU2zL+ErzREgQiRq5oKP8h8zpUxGrGU8NA cgC17Z98JuKmKJUKAq+L7sbpU794WSocEWOUM0zu4Uv1+hPn7rnvtWDaoxoYmSC2k0Wa Rgpyku5I+UejEs7+NPhm/BS5gX43PO0byZ9+f7MMDSRUp6jWzjuW5/VJwh8kW8ayfezS p1fA== X-Forwarded-Encrypted: i=1; AJvYcCVZn776Z9YE7REZW9PiYN4UlXrIbZ/WMbuFblGqD2Y2RqASeumRBoVosZaYTq+UJfvISy/cOFt9Baj/hg==@lists.infradead.org X-Gm-Message-State: AOJu0YzYVvHQG+cr0gdFluvfF90gRIFM/guvx/JyjTA+6x+wOjuoH2gg /uHHvo3XWHdvWQJvAsFMr5Le+FVQCA579rD6n/IVC0ysqJFgBXTg X-Gm-Gg: ASbGncujuP4rJRF/xRVtwbzZdYnPceyH11JQq4RO1aQA9Q7LDZ5hXKY+Mu642ZwTDHI 5DMNGpuLG6KQAyvgowvqYy66RH07U0mdDfwetufkahb1zl5uEbIAExY9DbJseOe/vdzjmSi0+Gs hB6eRsePQXEaoR6/0/GtIAXzJy8bl03V9VxDwZyGWgDYs+R8dAi3NczzgVvoyQfMPiPqnzDYO9p I6TS1Gs78bod/taFe3WwucQcG4pDWE+rK8gN+kSkJdPgTGPCuuZqHP0OZMF X-Google-Smtp-Source: AGHT+IFxb8pbBX+e/TYceKryXxdB/wQe+lQAG69/HoUcIQJsTXDcI32zHcg1iLxG5yHXc/sDK/0Ojw== X-Received: by 2002:a05:6808:1802:b0:3e5:f4f9:3280 with SMTP id 5614622812f47-3eb19c770c5mr9478218b6e.10.1733728353439; Sun, 08 Dec 2024 23:12:33 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-5f2793249e8sm2011256eaf.39.2024.12.08.23.12.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Dec 2024 23:12:32 -0800 (PST) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com Subject: [PATCH v2 3/3] riscv: sophgo: dts: add msi controller for SG2042 Date: Mon, 9 Dec 2024 15:12:24 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241208_231234_538488_D0D75914 X-CRM114-Status: UNSURE ( 8.42 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Add msi-controller node to dts for SG2042. Signed-off-by: Chen Wang --- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index e62ac51ac55a..bda49a398daf 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -173,6 +173,16 @@ pllclk: clock-controller@70300100c0 { #clock-cells = <1>; }; + msi: msi-controller@7030010304 { + compatible = "sophgo,sg2042-msi"; + reg = <0x70 0x30010304 0x0 0x4>; + reg-names = "clr"; + msi-controller; + msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>; + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; + interrupt-parent = <&intc>; + }; + rpgate: clock-controller@7030010368 { compatible = "sophgo,sg2042-rpgate"; reg = <0x70 0x30010368 0x0 0x98>;