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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: BRlsCWuPmoPy8sm5DQNs7grn8wZh325ysb2STOOcERatgUWnVTech5NwoG3f/DjHi3ALzaD2Tl46hjiFqMPfSpTXLBQfnAraEbdHtT/ZpSdFJdJFq7Wf9YskmBwdh135C3cPRomqGojOjSv24ILpakKslLnfwAO01xB3AWqD3+CRN7HVK5EI3SrKAQ4XacXYtJY821CslitdVOGFluiif4+0o93Vfi4NenZ7AfWn7ROEA0LQhd7+uuXtLZaSVNn1MUOGwyw3o9o0cwbkV/h+bDnv6vRa5Lef4PfiVVy6pBnWTS5MBYJ3fjf8AU9V0agkm/AEcqnS2B5IoOKIeDWu+dHqurvY0WEyjUtEZI77RQJ8b5HUmRbW+/Tr7iH3O/n7IFYyUTBYfiZJcdqmtbi8uNres2ic1t5/3qctFK3bFAQs+ohG16LMhQBpTqmr9v/jFbwOxGVLEuU4uiIJjAifpkOayqftBnD4dBoGP0T8HvEEG3MkNSercG5lGdg73QbqS9PG/xQbygMCztDYX37yMgU73WVk6dHS1Z1tzRZ4nSQ0vG9jUBpB/sMzdOHPm9xYAjONCRhJrBxcUUTOe0dn0kp2M1pcqL/Yh6BAwB0XyQHCXMEzyo9G1Zl0KhfhMnyorsyF5bNxzGozOEp9Gnxxw0QfxLJBrcLL5RqQOhDmo/UBqmi+8v1dToqsv+3uk3yhOEJvXkA+bgDDHCSoyAFv9JzTnIlwCiaJwkwC7LJSnBGG1ej5C0x7G4XLeCNCt7FqF5Wrttlo7mu+0+FcI57RnRO6wFVyOOKqUBfWv0/pREeJpQAdotZPMbOUIhLeiOZogRKzbKjU+LDDI2O/XYKFiXcBEMu00Gos++D2eqg7K+DiikxKSqVMlprhH5YPOReebCsT6byWkgl6srErc0s88o30P+xDGXizePAuQ+WHN6FO9BHJ9izhEUxi1moiVyF7Tf6MjuIxbqu9aUpxN1RbDsvy8D7mJeYaVK+/j6KB05i3k6PBtMqlorHz6RfFCaAkbqwGjobZ1EwobbY78he8azL5SLsGn3mAqdIzBSPGSzvjdAchcITl3ec7XeyagF7/w9O1ewzILNPbGr7Iw1Jo2BlYXBbTMO3ZSGVM8uO8VAYE+R+doZ7qV87t+EGLz8HTV3k1IXKU+EPchiRNaomKs52/+9JRl1ObzWkb3wfv9/FsNMkL1lupKlWlFrE47oSWLr5GQz7ky3CFm3fwYBqTA7+IVl8Nx9v16CRsucR9TJOAUn9eFdOGwXPJQ/eK8lloDZiPZqEVb92IUx83PI4GqTg0kmyReclnoXESy4R44ANDpv5KqCEfRxkuJUipcJCs8KZTSH5wzGKFzKtb2cMKKLx14O8LONwkAnrdP33AWJlQBQ1BMwMcoFY7FyTWvpQ/7idcCGJnOapCJNalme7a4BqtrTWy2IH0J6yWaOzFm60ggRPReZhjenlb+J8dRg9AKg8ymbywb9oRQqXAqemkHDuMhSxwbPaC8wI1v/jqaab8jBcFqi/u+X1hztYa+lx/k7Z++nLpP3sAITFIKK1RICSDNwhIPfLqfeIG2rb5T4ydcyHiLSoo4zklLdwtlaKO X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0bbcc89f-9111-4100-9323-08dd1824b7f1 X-MS-Exchange-CrossTenant-AuthSource: AS8PR04MB8676.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2024 07:40:14.2561 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IQ5b5qA0x6napWzljJwjPwYFRht0KJfg7dzFRbUPoH8ngewc0rYBJwSkW0E/n5GUyQB4Pfq2LgJy7QMZFG2piA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR04MB9927 The dw_pcie_suspend_noirq() function currently returns success directly if no endpoint (EP) device is connected. However, on some platforms, power loss occurs during suspend, causing dw_resume() to do nothing in this case. This results in a system halt because the DWC controller is not initialized after power-on during resume. Call deinit() in suspend and init() at resume regardless of whether there are EP device connections or not. It is not harmful to perform deinit() and init() again for the no power-off case, and it keeps the code simple and consistent in logic. Fixes: 4774faf854f5 ("PCI: dwc: Implement generic suspend/resume functionality") Signed-off-by: Richard Zhu Reviewed-by: Frank Li --- .../pci/controller/dwc/pcie-designware-host.c | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index f882b11fd7b94..11563402c571b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -982,23 +982,23 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci) if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1) return 0; - if (dw_pcie_get_ltssm(pci) <= DW_PCIE_LTSSM_DETECT_ACT) - return 0; - - if (pci->pp.ops->pme_turn_off) - pci->pp.ops->pme_turn_off(&pci->pp); - else - ret = dw_pcie_pme_turn_off(pci); + /* Only send out PME_TURN_OFF when PCIE link is up */ + if (dw_pcie_get_ltssm(pci) > DW_PCIE_LTSSM_DETECT_ACT) { + if (pci->pp.ops->pme_turn_off) + pci->pp.ops->pme_turn_off(&pci->pp); + else + ret = dw_pcie_pme_turn_off(pci); - if (ret) - return ret; + if (ret) + return ret; - ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, - PCIE_PME_TO_L2_TIMEOUT_US/10, - PCIE_PME_TO_L2_TIMEOUT_US, false, pci); - if (ret) { - dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); - return ret; + ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, + PCIE_PME_TO_L2_TIMEOUT_US/10, + PCIE_PME_TO_L2_TIMEOUT_US, false, pci); + if (ret) { + dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); + return ret; + } } if (pci->pp.ops->deinit) From patchwork Mon Dec 9 07:39:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 13899026 Received: from EUR02-AM0-obe.outbound.protection.outlook.com (mail-am0eur02on2073.outbound.protection.outlook.com [40.107.247.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79108215041; Mon, 9 Dec 2024 07:40:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.247.73 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733730024; cv=fail; b=VYsn+HgdTvzynsLLqKqb5RvdIbg1gnSHx3Jp1xYoI0f3C0nrBTr+67WQA/d9UcjfxiFOU3MRRv1sRJKizweykL1SSEv1goNANysKBkRzsfPUSEZ3gu8lVPxl0MC3mr5jcx09urmPDk3jm1QsIJPVkvl1I911lhL2Pn6eezEMNqg= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; 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Add dw_pcie_stop_link() into dw_pcie_suspend_noirq() to fix this issue and keep symmetric in suspend/resume function since there is dw_pcie_start_link() in dw_pcie_resume_noirq(). Fixes: 4774faf854f5 ("PCI: dwc: Implement generic suspend/resume functionality") Signed-off-by: Richard Zhu Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware-host.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 11563402c571b..14e95c2952bbe 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -1001,6 +1001,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci) } } + dw_pcie_stop_link(pci); if (pci->pp.ops->deinit) pci->pp.ops->deinit(&pci->pp); From patchwork Mon Dec 9 07:39:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 13899027 Received: from EUR02-AM0-obe.outbound.protection.outlook.com (mail-am0eur02on2073.outbound.protection.outlook.com [40.107.247.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9831321517B; 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Since it's safe to send PME_TURN_OFF message regardless of whether the link is up or down. So, there would be no need to test the LTSSM state before sending PME_TURN_OFF message. Only print the message when ltssm_stat is not in DETECT and POLL. In the other words, there isn't an error message when no endpoint is connected at all. Signed-off-by: Richard Zhu Reviewed-by: Frank Li Reviewed-by: Manivannan Sadhasivam --- .../pci/controller/dwc/pcie-designware-host.c | 38 +++++++++++-------- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 23 insertions(+), 16 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 14e95c2952bbe..02e0e8c255c70 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -982,25 +982,31 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci) if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1) return 0; - /* Only send out PME_TURN_OFF when PCIE link is up */ - if (dw_pcie_get_ltssm(pci) > DW_PCIE_LTSSM_DETECT_ACT) { - if (pci->pp.ops->pme_turn_off) - pci->pp.ops->pme_turn_off(&pci->pp); - else - ret = dw_pcie_pme_turn_off(pci); - - if (ret) - return ret; + if (pci->pp.ops->pme_turn_off) + pci->pp.ops->pme_turn_off(&pci->pp); + else + ret = dw_pcie_pme_turn_off(pci); + if (ret) + return ret; - ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, - PCIE_PME_TO_L2_TIMEOUT_US/10, - PCIE_PME_TO_L2_TIMEOUT_US, false, pci); - if (ret) { - dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); - return ret; - } + ret = read_poll_timeout(dw_pcie_get_ltssm, val, + val == DW_PCIE_LTSSM_L2_IDLE || + val <= DW_PCIE_LTSSM_DETECT_WAIT, + PCIE_PME_TO_L2_TIMEOUT_US/10, + PCIE_PME_TO_L2_TIMEOUT_US, false, pci); + if (ret) { + /* Only dump message when ltssm_stat isn't in DETECT and POLL */ + dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); + return ret; } + /* + * Refer to r6.0, sec 5.3.3.2.1, software should wait at least + * 100ns after L2/L3 Ready before turning off refclock and + * main power. It's harmless too when no endpoint connected. + */ + udelay(1); + dw_pcie_stop_link(pci); if (pci->pp.ops->deinit) pci->pp.ops->deinit(&pci->pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 5c14ed2cb91ed..7efcb4af66da3 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -330,6 +330,7 @@ enum dw_pcie_ltssm { /* Need to align with PCIE_PORT_DEBUG0 bits 0:5 */ DW_PCIE_LTSSM_DETECT_QUIET = 0x0, DW_PCIE_LTSSM_DETECT_ACT = 0x1, + DW_PCIE_LTSSM_DETECT_WAIT = 0x6, DW_PCIE_LTSSM_L0 = 0x11, DW_PCIE_LTSSM_L2_IDLE = 0x15,