From patchwork Mon Dec 9 14:23:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899871 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E56335946 for ; Mon, 9 Dec 2024 14:23:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754206; cv=none; b=SzhMvxZ3eBbRTTFKODzTV93h2KDz4z7VzFpJWSavfIeENJeHhhL/b5yXNdA5Optpx6j6nYctAjjFdURQRuqUfq9qOcmwCzRnCynfCdN1aSX5UCGpQhZ/suKs7Im4824ZgEGiVpu+rAUqG+tj13c3uNQGl8qXsIIAHlqw9U2wdkE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754206; c=relaxed/simple; bh=evL1OQos5EuPDX/rUaBZj5SIFXLeAgYT/3PPMQsNIIQ=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=E8gPZqfkGfrkc+xmniZxLpDXJ0978Ffyumi6Pf7JoDE1/xEI9d2GLHPtk5GTN7Ps9siSgfhtm8J+8hT/I4l0s52tvXADRK7H7QMawu4PRbaFBZb1GUsmIbAkeMsgLtq5M9vyRRs0Kq/AJAYWDTqZXAaIdHeYjsBiCqBFqaXOsno= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=Qkg7Pq9f; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="Qkg7Pq9f" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=4+/h+G+UZmcLpKhAAeUc1gCUmuIP7h4zUAThZbIDIwU=; b=Qkg7Pq9fgs3KH9M648DYjiTrb1 zFHM0ky3BFhGlXmpG+aakRxVWoXspdaY9/BEIFt0GhW8t8L5vbkIZ3RPbMEGcwQ1wUFXl6UAXnPFU 7XulnadRE1BMCPLcDg8GZpR3BHQHyEnbIwEg/JzwiPGR/yZhwCa0BHRXiTF5lBC2XkvNy8eL/kf30 p1/KEGq3fr2ln2ih4K8OvwmSODWpltftIdePLc5P5H950i/PNWaxD6oA7u009SJTdiB0p2/TMKZv5 J0oA9cl7B9ENl0C099nl6Ery7aI8hTUpeefIcttkETCZUPiuypsxVghWmeqHG1yP5s+/dDLNo4qiK wbu5/J9g==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:39376 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefP-0000wF-1U; Mon, 09 Dec 2024 14:23:19 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefO-006SMM-3S; Mon, 09 Dec 2024 14:23:18 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 01/10] net: mdio: add definition for clock stop capable bit Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:18 +0000 X-Patchwork-Delegate: kuba@kernel.org Add a definition for the clock stop capable bit in the PCS MMD. This bit indicates whether the MAC is able to stop the transmit xMII clock while it is signalling LPI. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- include/uapi/linux/mdio.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h index f0d3f268240d..6975f182b22c 100644 --- a/include/uapi/linux/mdio.h +++ b/include/uapi/linux/mdio.h @@ -125,6 +125,7 @@ #define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */ #define MDIO_STAT1_LSTATUS BMSR_LSTATUS #define MDIO_STAT1_FAULT 0x0080 /* Fault */ +#define MDIO_PCS_STAT1_CLKSTOP_CAP 0x0040 #define MDIO_AN_STAT1_LPABLE 0x0001 /* Link partner AN ability */ #define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE #define MDIO_AN_STAT1_RFAULT BMSR_RFAULT From patchwork Mon Dec 9 14:23:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899872 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A782335946 for ; Mon, 9 Dec 2024 14:23:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754211; cv=none; b=arernDW5N80hIkm6LEtkSbMb1Xh0WLRIjipPV0wpcoAQd+CDzIiKzOoOfp6Ui7ZVsOfOYl5SvFbTqv29nT2U6ZyVk1unai3jVD2PgMXbOjq7KfVnZCmp5xEJLqQhwJ3uXOP5vjkh7bC9BRBnOXo104Q7Dfu7ZhZWc6rwZD6OPqY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754211; c=relaxed/simple; bh=MZYe5i/gCE9W+qO7CgFie9mOnhZOcd8fdPES9L6GszI=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=mxzWxTz+rXkDCe0YJ3zRHMwv5Ci8iDkNqPTrwqwxGAusoRmGSY+fDf+ao/Ut2MMq9XM/1mLFdxps3zXfKrfF8wWebJqcxLAz0dxpQ/+qYdqcFz2x0lmA4ydWOLpvGwVW8/4Dk1TGNbxBbRoY4ri89ZXbrlseqJexdPFygvUakf4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=ObSA/Svn; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="ObSA/Svn" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=KENiKZXXRHtKc0DZuMawWizxcvBnZqzaK5OBy4l7tt8=; b=ObSA/SvnxBW1W23bJP3AtcZQCE nFkqclfYSSR5LlaoN6lA9uhkeeMlHwJ1fUQTIH5EOgZhPpwIlze5Q1ajZlBmyAjRLi1uNM8bwPucY 8EyXT8uzswNHSo7Ucb9pQN3bWZrFTIJ5vse+90Zedz1dlsUnUqctf/8XCfVDQLULm78iuP8h51J4w LNg/wGiN8lVX24e/qEj+8MEY7D9pp9BSL6x5FUrub1FjvkH2IQdmlL3hjjZK4y6vUdwG0n5PtrX25 /YxpA3vZ6TVhCOsjgdWgWu/WaBK3plvtVg4JcGG05DnYdz4N4I/f4TT83Nd0JG0pgVqRTkuy7MIMm wrp5oxVw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:39380 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefU-0000wS-1p; Mon, 09 Dec 2024 14:23:25 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefT-006SMS-6y; Mon, 09 Dec 2024 14:23:23 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 02/10] net: phy: add support for querying PHY clock stop capability Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:23 +0000 X-Patchwork-Delegate: kuba@kernel.org Add support for querying whether the PHY allows the transmit xMII clock to be stopped while in LPI mode. This will be used by phylink to pass to the MAC driver so it can configure the generation of the xMII clock appropriately. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- drivers/net/phy/phy.c | 20 ++++++++++++++++++++ include/linux/phy.h | 1 + 2 files changed, 21 insertions(+) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index e4b04cdaa995..8fb4224c7576 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -1640,6 +1640,26 @@ void phy_mac_interrupt(struct phy_device *phydev) } EXPORT_SYMBOL(phy_mac_interrupt); +/** + * phy_eee_tx_clock_stop_capable() - indicate whether the MAC can stop tx clock + * @phydev: target phy_device struct + * + * Indicate whether the MAC can disable the transmit xMII clock while in LPI + * state. Returns 1 if the MAC may stop the transmit clock, 0 if the MAC must + * not stop the transmit clock, or negative error. + */ +int phy_eee_tx_clock_stop_capable(struct phy_device *phydev) +{ + int stat1; + + stat1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); + if (stat1 < 0) + return stat1; + + return !!(stat1 & MDIO_PCS_STAT1_CLKSTOP_CAP); +} +EXPORT_SYMBOL_GPL(phy_eee_tx_clock_stop_capable); + /** * phy_init_eee - init and check the EEE feature * @phydev: target phy_device struct diff --git a/include/linux/phy.h b/include/linux/phy.h index bb157136351e..267de08c227c 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -2072,6 +2072,7 @@ int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); int phy_unregister_fixup_for_id(const char *bus_id); int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); +int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); int phy_get_eee_err(struct phy_device *phydev); int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); From patchwork Mon Dec 9 14:23:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899873 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AEB21B0407 for ; Mon, 9 Dec 2024 14:23:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754217; cv=none; b=nDt0FPKnMIickYj6i/EhrJOud4G1R6YdmNJBS04+hLigMMyn+tkXsew+d7yBmYezUQK+jAP4K55KdAiAKm4UOItMaVD/8i4PYAUbUD9zx4kPAlDjjrHfpdbExSblhZl3989LfcCLQQlaKe/XPZ3FEEmXE/4NbJUvc4OEXTUwPP4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754217; c=relaxed/simple; bh=dcuYUPLjO0VlVJQlAOr7MKLiieYlV518TPBXLHWmNbI=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=EN9PDevmZML1YtBGaVW6B3j4peJUKZc5CUIHKDsm+PlgYw2z1DjJSvkEdVlovfkManQd2lDVO3PD/8QfdpNqnu0GbOrkvlEmPx4YPBkItiZfsSlZVu6nPkjMS68IGbCVNfnJLLXmkNVXhdc82bkzefdc6GTp62QwoFZM+xHOjqs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=hRENGoWm; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="hRENGoWm" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=b1OzkI5FeOyMcGqV2D4mMFhkDblO5taxKA6QVrLg4Ps=; b=hRENGoWm68TH0KJFB9jynDZnPC DeEcySV67A9wotYS3SrWsxNLX1cmhDApQIz321b7yf6kYs6ZgQRquckpbhaqPdOQ6wRFZDjz3teAe Euwj8T7nzIMVaD0xvRql6w4E58Sg+aJhUtmTHo3HDcTM3jptFjbpzAb5OpLB5K+wsWX0e/V87MKer lH3WNs4sUy3qUh+ObUMIHdYNePUy/T8Z81gpUDk3p50VBycWd1D/V0oPT0Qb69R8ZOyhvIbDJH+xn G4zJHvS1iwUlpigK1g58LPDhOTd49/7g35398b9aiMnYW4P9+MeoUCJFQe5RIlr+85Q6N2g0Z4g+j RA2kMR1Q==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:36578 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefZ-0000wh-2U; Mon, 09 Dec 2024 14:23:30 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefY-006SMd-Af; Mon, 09 Dec 2024 14:23:28 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 03/10] net: phy: add configuration of rx clock stop mode Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:28 +0000 X-Patchwork-Delegate: kuba@kernel.org Add a function to allow configuration of the PCS's clock stop enable bit, used to configure whether the xMII receive clock can be stopped during LPI mode. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- drivers/net/phy/phy.c | 27 ++++++++++++++++++++++----- include/linux/phy.h | 1 + 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 8fb4224c7576..caf472b5d4e5 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -1660,6 +1660,27 @@ int phy_eee_tx_clock_stop_capable(struct phy_device *phydev) } EXPORT_SYMBOL_GPL(phy_eee_tx_clock_stop_capable); +/** + * phy_eee_rx_clock_stop() - configure PHY receive clock in LPI + * @phydev: target phy_device struct + * @clk_stop_enable: flag to indicate whether the clock can be stopped + * + * Configure whether the PHY can disable its receive clock during LPI mode, + * See IEEE 802.3 sections 22.2.2.2, 35.2.2.10, and 45.2.3.1.4. + * + * Returns: 0 or negative error. + */ +int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable) +{ + /* Configure the PHY to stop receiving xMII + * clock while it is signaling LPI. + */ + return phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, + MDIO_PCS_CTRL1_CLKSTOP_EN, + clk_stop_enable ? MDIO_PCS_CTRL1_CLKSTOP_EN : 0); +} +EXPORT_SYMBOL_GPL(phy_eee_rx_clock_stop); + /** * phy_init_eee - init and check the EEE feature * @phydev: target phy_device struct @@ -1684,11 +1705,7 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable) return -EPROTONOSUPPORT; if (clk_stop_enable) - /* Configure the PHY to stop receiving xMII - * clock while it is signaling LPI. - */ - ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, - MDIO_PCS_CTRL1_CLKSTOP_EN); + ret = phy_eee_rx_clock_stop(phydev, true); return ret < 0 ? ret : 0; } diff --git a/include/linux/phy.h b/include/linux/phy.h index 267de08c227c..f865a8fc56c3 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -2073,6 +2073,7 @@ int phy_unregister_fixup_for_id(const char *bus_id); int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); +int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); int phy_get_eee_err(struct phy_device *phydev); int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); From patchwork Mon Dec 9 14:23:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899874 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8EE91ACEDB for ; Mon, 9 Dec 2024 14:23:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754224; cv=none; b=P+e9ufONzVqYjYY8Q8m6ef8cOeR2ktr4+HyN1BlE+9hAsy0jgUTQAn+ngGe5oNqaKbF/TENlrRsN7FZS0kmbMT50DzHTYCMCJWCmxcvCY9G3HmMu2nodD6sbazYiLFvCFqsre5wIIL+kQUlv2V9dSw9mITF7e/p4YnSl32FU6x8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754224; c=relaxed/simple; bh=JV/WwFp3fqXTfzMLEgGdwIWbg55XZ4woW6T5c8HEfCY=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=F7z+Kq9q04zsKwXZED3AlugLGE35+FZeYROwR5VjoaYQt3KT4amLMmGTZObQKJAPhgB63Cee6UNWUQ/JftZrr19U5FRAt2onhwFAlrTJOpbTMsmEjA5+dkZl0aZw0I5GahCSbfzwJ9cl82AVRt4prn9o/ug2zo0HtcypVobG79w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=Iwfumhix; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="Iwfumhix" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=8jCFq5Q5+3RurTDdH5R2Fu36cqAzrySp/SCeFUsRR7I=; b=IwfumhixGJYr/6hSWaM7EtlX+e /pWVpO22ayfIk/KsDgM8H+cssEqakd0ctYj8botGy9fy/FXESGyZiqKK4Skvc3l1Y2Vxy4lKmnn9Z 8VRQYMLZtMLRYCA2GjA9YOR5wjtui13Ihr7B4rKaAt8YidwLVZFQXIM2ocexcGMsqMyuW3XPwWXAI GbHsYk9APZxuA0nd8rRcfrWf4k1RLRqM6fis9TkScI9I9hvqE49VnWMdKJs637t9Zn6Ns/CGTFOiE ZQwFPu7jsRgZFTrRoVNcoHhgzlIeOAnfiTJQ9Apmoxj4rz0CqeIadyRlLJQhvBXJyfWC/N/rimdWB Ecpgz4cg==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:36586 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefe-0000ww-2k; Mon, 09 Dec 2024 14:23:35 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefd-006SMj-EI; Mon, 09 Dec 2024 14:23:33 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 04/10] net: phylink: add phylink_link_is_up() helper Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:33 +0000 X-Patchwork-Delegate: kuba@kernel.org Add a helper to determine whether the link is up or down. Currently this is only used in one location, but becomes necessary to test when reconfiguring EEE. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- drivers/net/phy/phylink.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 95fbc363f9a6..03509fdaa1ec 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1630,20 +1630,21 @@ static void phylink_link_down(struct phylink *pl) phylink_info(pl, "Link is Down\n"); } +static bool phylink_link_is_up(struct phylink *pl) +{ + return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; +} + static void phylink_resolve(struct work_struct *w) { struct phylink *pl = container_of(w, struct phylink, resolve); struct phylink_link_state link_state; - struct net_device *ndev = pl->netdev; bool mac_config = false; bool retrigger = false; bool cur_link_state; mutex_lock(&pl->state_mutex); - if (pl->netdev) - cur_link_state = netif_carrier_ok(ndev); - else - cur_link_state = pl->old_link_state; + cur_link_state = phylink_link_is_up(pl); if (pl->phylink_disable_state) { pl->link_failed = false; From patchwork Mon Dec 9 14:23:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899882 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A78A1ACEDB for ; Mon, 9 Dec 2024 14:23:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754228; cv=none; b=eUUOskDDgJlTqassDQFp5aXAxHbMJF12fvqyZdKGxvByCGUDDH5PbgS8X3lNECLY/JzIxvOd8jxMOq5rgsdfaZxLQZO2QLA9seim2E++AhlC0PfKWC9mkmXr9bbsgVMxup1v9trHTykJ9nmhyo5TI6u1owUXT68k35CvlCvlmJ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754228; c=relaxed/simple; bh=VZbHkrwZtXzqpm6cE0uuP48x8lWSDBtcAZX91R/oS+4=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=cZAZUF6Ykyv0qR+VrLE7yzfVKUpWho8iCi6T/AlySsadhSKNH/XC880VXP8hKTYRdwk/vxkAjFGtjDiqCESG7HXAfgjSWchIBmkyIEl7+hxVqYp2ER9p3ofhmkkFt5xPZnDH16zuM6hhsOS1CBC3lYOBevDV3ynTD9zPUj2oWHU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=xNfkxpD6; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="xNfkxpD6" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=sX6MUaW/5irHHue8jnHUdpZpbamqpXr3JKKiAJ8ido0=; b=xNfkxpD6lPE2eQmgvyG2RkBQq8 iHYXHQymMTIJ/Fiz5kCP7gGtgW1aRErDyUv/FWXygShl25V3uCpnPwwpeWfRN/341MI7s/JklKBZj rfMFPz4yBq8XO6QAAG/9HUNSZsoiAHF9g0trSp93EGtdtyHjA9KQnme91XBd5+s5tWqY8/sxbUUuy 5M+dzB2EJjjvkdhgBzM2mcuFg4kBoulGF0OpyF4Z/eNNwsw7I5acCM+pUq+tLXDK/aFpaMWcGbBFh 8vPAvLuMA/Hupoqk7pOJO5Sm33Y6RPhzh3VQYr4p+kDcT+JlxsnHg4rfEkmHS6Yus99PR6fGme/eF IGeVI9vw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:50602 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefk-0000xC-0L; Mon, 09 Dec 2024 14:23:40 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefi-006SMp-Hw; Mon, 09 Dec 2024 14:23:38 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 05/10] net: phylink: add EEE management Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:38 +0000 X-Patchwork-Delegate: kuba@kernel.org Add EEE management to phylink, making use of the phylib implementation. This will only be used where a MAC driver populates the methods and capabilities bitfield, otherwise we keep our old behaviour. Phylink will keep track of the EEE configuration, including the clock stop abilities at each end of the MAC to PHY link, programming the PHY appropriately and preserving the EEE configuration should the PHY go away. It will also call into the MAC driver when LPI needs to be enabled or disabled, with the expectation that the MAC have LPI disabled during probe. Support for phylink managed EEE is enabled by populating both tx_lpi MAC operations method pointers. Signed-off-by: Russell King (Oracle) --- drivers/net/phy/phylink.c | 123 ++++++++++++++++++++++++++++++++++++-- include/linux/phylink.h | 44 ++++++++++++++ 2 files changed, 163 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 03509fdaa1ec..750356b6a2e9 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -81,12 +81,19 @@ struct phylink { unsigned int pcs_state; bool link_failed; + bool mac_supports_eee; + bool phy_enable_tx_lpi; + bool mac_enable_tx_lpi; + bool mac_tx_clk_stop; + u32 mac_tx_lpi_timer; struct sfp_bus *sfp_bus; bool sfp_may_have_phy; DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); u8 sfp_port; + + struct eee_config eee_cfg; }; #define phylink_printk(level, pl, fmt, ...) \ @@ -1563,6 +1570,47 @@ static const char *phylink_pause_to_str(int pause) } } +static void phylink_deactivate_lpi(struct phylink *pl) +{ + if (pl->mac_enable_tx_lpi) { + pl->mac_enable_tx_lpi = false; + + phylink_dbg(pl, "disabling LPI\n"); + + pl->mac_ops->mac_disable_tx_lpi(pl->config); + } +} + +static void phylink_activate_lpi(struct phylink *pl) +{ + if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { + phylink_dbg(pl, "MAC does not support LPI with %s\n", + phy_modes(pl->cur_interface)); + return; + } + + phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", + pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); + + pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, + pl->mac_tx_clk_stop); + + pl->mac_enable_tx_lpi = true; +} + +static void phylink_phy_restrict_eee(struct phylink *pl, struct phy_device *phy) +{ + __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_supported); + + /* Convert the MAC's LPI capabilities to linkmodes */ + linkmode_zero(eee_supported); + phylink_caps_to_linkmodes(eee_supported, pl->config->lpi_capabilities); + + /* Mask out EEE modes that are not supported */ + linkmode_and(phy->supported_eee, phy->supported_eee, eee_supported); + linkmode_and(phy->advertising_eee, phy->advertising_eee, eee_supported); +} + static void phylink_link_up(struct phylink *pl, struct phylink_link_state link_state) { @@ -1609,6 +1657,9 @@ static void phylink_link_up(struct phylink *pl, pl->cur_interface, speed, duplex, !!(link_state.pause & MLO_PAUSE_TX), rx_pause); + if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) + phylink_activate_lpi(pl); + if (ndev) netif_carrier_on(ndev); @@ -1625,6 +1676,9 @@ static void phylink_link_down(struct phylink *pl) if (ndev) netif_carrier_off(ndev); + + phylink_deactivate_lpi(pl); + pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, pl->cur_interface); phylink_info(pl, "Link is Down\n"); @@ -1888,6 +1942,14 @@ struct phylink *phylink_create(struct phylink_config *config, return ERR_PTR(-EINVAL); } + pl->mac_supports_eee = mac_ops->mac_disable_tx_lpi && + mac_ops->mac_enable_tx_lpi; + + /* Set the default EEE configuration */ + pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; + pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; + pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; + pl->phy_state.interface = iface; pl->link_interface = iface; if (iface == PHY_INTERFACE_MODE_MOCA) @@ -1992,16 +2054,22 @@ static void phylink_phy_change(struct phy_device *phydev, bool up) pl->phy_state.link = up; if (!up) pl->link_failed = true; + + /* Get the LPI state from phylib */ + pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; + pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; mutex_unlock(&pl->state_mutex); phylink_run_resolve(pl); - phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", + phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", + up ? "up" : "down", phy_modes(phydev->interface), phy_speed_to_str(phydev->speed), phy_duplex_to_str(phydev->duplex), phy_rate_matching_to_str(phydev->rate_matching), - phylink_pause_to_str(pl->phy_state.pause)); + phylink_pause_to_str(pl->phy_state.pause), + phydev->enable_tx_lpi ? "" : "no"); } static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, @@ -2131,6 +2199,28 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, /* Restrict the phy advertisement according to the MAC support. */ linkmode_copy(phy->advertising, config.advertising); + + /* If the MAC supports phylink managed EEE, restrict the EEE + * advertisement according to the MAC's LPI capabilities. + */ + if (pl->mac_supports_eee) { + phy->eee_cfg.eee_enabled = pl->eee_cfg.eee_enabled; + + /* If EEE is enabled, then we need to call phy_support_eee() + * to ensure that the advertising mask is appropriately set. + */ + if (pl->eee_cfg.eee_enabled) + phy_support_eee(phy); + + phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; + phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; + + /* Restrict the PHYs EEE support/advertisement to the modes + * that the MAC supports. + */ + phylink_phy_restrict_eee(pl, phy); + } + mutex_unlock(&pl->state_mutex); mutex_unlock(&phy->lock); @@ -2146,7 +2236,13 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, if (pl->config->mac_managed_pm) phy->mac_managed_pm = true; - return 0; + /* Allow the MAC to stop its clock if the PHY has the capability */ + pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; + + /* Explicitly configure whether the PHY is allowed to stop it's + * receive clock. + */ + return phy_eee_rx_clock_stop(phy, pl->config->eee_rx_clk_stop_enable); } static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, @@ -2303,6 +2399,8 @@ void phylink_disconnect_phy(struct phylink *pl) mutex_lock(&phy->lock); mutex_lock(&pl->state_mutex); pl->phydev = NULL; + pl->phy_enable_tx_lpi = false; + pl->mac_tx_clk_stop = false; mutex_unlock(&pl->state_mutex); mutex_unlock(&phy->lock); flush_work(&pl->resolve); @@ -3071,12 +3169,29 @@ EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); */ int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) { + bool mac_eee = pl->mac_supports_eee; int ret = -EOPNOTSUPP; ASSERT_RTNL(); - if (pl->phydev) + phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", + mac_eee ? "supports" : "does not support", + eee->eee_enabled ? ", enabled" : "", + __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, + eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); + + /* Clamp the LPI timer maximum value */ + if (mac_eee && eee->tx_lpi_timer > pl->config->lpi_timer_limit_us) { + eee->tx_lpi_timer = pl->config->lpi_timer_limit_us; + phylink_dbg(pl, "LPI timer limited to %uus\n", + eee->tx_lpi_timer); + } + + if (pl->phydev) { ret = phy_ethtool_set_eee(pl->phydev, eee); + if (ret == 0) + eee_to_eeecfg(&pl->eee_cfg, eee); + } return ret; } diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 5462cc6a37dc..f72f0a1feb89 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -5,6 +5,8 @@ #include #include +#include + struct device_node; struct ethtool_cmd; struct fwnode_handle; @@ -143,11 +145,17 @@ enum phylink_op_type { * possible and avoid stopping it during suspend events. * @default_an_inband: if true, defaults to MLO_AN_INBAND rather than * MLO_AN_PHY. A fixed-link specification will override. + * @eee_rx_clk_stop_enable: if true, PHY can stop the receive clock during LPI * @get_fixed_state: callback to execute to determine the fixed link state, * if MAC link is at %MLO_AN_FIXED mode. * @supported_interfaces: bitmap describing which PHY_INTERFACE_MODE_xxx * are supported by the MAC/PCS. + * @lpi_interfaces: bitmap describing which PHY interface modes can support + * LPI signalling. * @mac_capabilities: MAC pause/speed/duplex capabilities. + * @lpi_capabilities: MAC speeds which can support LPI signalling + * @eee: default EEE configuration. + * @lpi_timer_limit_us: Maximum (inclusive) value of the EEE LPI timer. */ struct phylink_config { struct device *dev; @@ -156,10 +164,16 @@ struct phylink_config { bool mac_managed_pm; bool mac_requires_rxc; bool default_an_inband; + bool eee_rx_clk_stop_enable; void (*get_fixed_state)(struct phylink_config *config, struct phylink_link_state *state); DECLARE_PHY_INTERFACE_MASK(supported_interfaces); + DECLARE_PHY_INTERFACE_MASK(lpi_interfaces); unsigned long mac_capabilities; + unsigned long lpi_capabilities; + u32 lpi_timer_limit_us; + u32 lpi_timer_default; + bool eee_enabled_default; }; void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed); @@ -173,6 +187,8 @@ void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed); * @mac_finish: finish a major reconfiguration of the interface. * @mac_link_down: take the link down. * @mac_link_up: allow the link to come up. + * @mac_disable_tx_lpi: disable LPI. + * @mac_enable_tx_lpi: enable and configure LPI. * * The individual methods are described more fully below. */ @@ -193,6 +209,9 @@ struct phylink_mac_ops { struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); + void (*mac_disable_tx_lpi)(struct phylink_config *config); + void (*mac_enable_tx_lpi)(struct phylink_config *config, u32 timer, + bool tx_clk_stop); }; #if 0 /* For kernel-doc purposes only. */ @@ -387,6 +406,31 @@ void mac_link_down(struct phylink_config *config, unsigned int mode, void mac_link_up(struct phylink_config *config, struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); + +/** + * mac_disable_tx_lpi() - disable LPI generation at the MAC + * @config: a pointer to a &struct phylink_config. + * + * Disable generation of LPI at the MAC, effectively preventing the MAC + * from indicating that it is idle. + */ +void mac_disable_tx_lpi(struct phylink_config *config); + +/** + * mac_enable_tx_lpi() - configure and enable LPI generation at the MAC + * @config: a pointer to a &struct phylink_config. + * @timer: LPI timeout in microseconds. + * @tx_clk_stop: allow xMII transmit clock to be stopped during LPI + * + * Configure the LPI timeout accordingly. This will only be called when + * the link is already up, to cater for situations where the hardware + * needs to be programmed according to the link speed. + * + * Enable LPI generation at the MAC, and configure whether the xMII transmit + * clock may be stopped. + */ +void mac_enable_tx_lpi(struct phylink_config *config, u32 timer, + bool tx_clk_stop); #endif struct phylink_pcs_ops; From patchwork Mon Dec 9 14:23:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899883 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D5FC35946 for ; Mon, 9 Dec 2024 14:23:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754232; cv=none; b=c1ZnvyALBYblpG5CS5aKO2VU1oBhJ/dyN/8j/lIqrwOKcTZFryo4+uWtTHS0sV3KMNo7J2HOHT3VlqjJhvHxWQyUWBjnoi5PaqBgPIeMKTcQRRtxwB9X/qH0lPzTiC9UPuOb4ZQlLQBJMJTharFe3KfnxJ74B31cpJwigZYrGq8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754232; c=relaxed/simple; bh=ih3lHqZufWcfLCTi/cQCRDbqI7hdUi3I+y9zQpeAY8w=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=u2hdz1rxD4HVHzHHI3VJTZNGyMxFvtUD0W/NJ0qxcmMrwgToDbsnBx3XZPUAfVCrCdR5tx6mXv66C+4/i9BNq0p7eWoYfUVs4mWX2a0Av2NgEInoIHd/juDw2E3h4SBWYduip7FozvEUU7i3yG/wydFOLXlNjAHce0eftn5A+qY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=jawGFAzD; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="jawGFAzD" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=vbgKtkwavWHQPAjV7lOJL+jWNxfzGH3YYncPjKA6/FU=; b=jawGFAzDAy+VYbUfq9HE3Ss9ob skLKHnYWyV84Xt23dQrk/5i/CLXpPdeY8dnhFw4HQESoBD/jGqPbcd+1t5lh2YSf+X38tPgUgkgjn 33sipjLiVjPJnarBZJGaChPcdhsP1I4FRqdeVUwA+H7Ep5HEQ8v5XbpMRCNN4S3egv0V47PIGUeM8 +fZ3R4lNtUjQj4XSRC34IGvTsHYX10dZaBvbAD/pY3PxmueDYWIfhZ6s5DyySU3IMGEjsNesvktNf gn6IEaPkjOeb6dPCj+HvaOvVzEfBWMV3UvVtQt/XPV7jBCZW+Q2lT7xPV6RUviKySGa+gPQy6ypb/ VMUKJ5/w==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:50618 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefp-0000xU-0L; Mon, 09 Dec 2024 14:23:45 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefn-006SMv-Lg; Mon, 09 Dec 2024 14:23:43 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 06/10] net: phylink: allow MAC driver to validate eee params Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:43 +0000 X-Patchwork-Delegate: kuba@kernel.org Allow the MAC driver to validate EEE parameters before accepting the set_eee() call. Signed-off-by: Russell King (Oracle) --- drivers/net/phy/phylink.c | 16 +++++++++++++++- include/linux/phylink.h | 15 +++++++++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 750356b6a2e9..995bfbbd18e9 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1570,6 +1570,14 @@ static const char *phylink_pause_to_str(int pause) } } +static int phylink_validate_tx_lpi(struct phylink *pl, struct ethtool_keee *eee) +{ + if (!pl->mac_ops->mac_validate_tx_lpi) + return 0; + + return pl->mac_ops->mac_validate_tx_lpi(pl->config, eee); +} + static void phylink_deactivate_lpi(struct phylink *pl) { if (pl->mac_enable_tx_lpi) { @@ -3170,7 +3178,7 @@ EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) { bool mac_eee = pl->mac_supports_eee; - int ret = -EOPNOTSUPP; + int ret; ASSERT_RTNL(); @@ -3187,6 +3195,12 @@ int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) eee->tx_lpi_timer); } + ret = phylink_validate_tx_lpi(pl, eee); + if (ret) + return ret; + + ret = -EOPNOTSUPP; + if (pl->phydev) { ret = phy_ethtool_set_eee(pl->phydev, eee); if (ret == 0) diff --git a/include/linux/phylink.h b/include/linux/phylink.h index f72f0a1feb89..03e790579203 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -187,6 +187,7 @@ void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed); * @mac_finish: finish a major reconfiguration of the interface. * @mac_link_down: take the link down. * @mac_link_up: allow the link to come up. + * @mac_validate_tx_lpi: validate LPI configuration. * @mac_disable_tx_lpi: disable LPI. * @mac_enable_tx_lpi: enable and configure LPI. * @@ -209,6 +210,8 @@ struct phylink_mac_ops { struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); + int (*mac_validate_tx_lpi)(struct phylink_config *config, + struct ethtool_keee *e); void (*mac_disable_tx_lpi)(struct phylink_config *config); void (*mac_enable_tx_lpi)(struct phylink_config *config, u32 timer, bool tx_clk_stop); @@ -407,6 +410,18 @@ void mac_link_up(struct phylink_config *config, struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); +/** + * mac_validate_tx_lpi() - validate the LPI parameters in EEE + * @config: a pointer to a &struct phylink_config. + * @e: EEE configuration to be validated. + * + * Validate the LPI configuration parameters in @e, returning an appropriate + * error. This will be called prior to any changes being made, and must not + * make any changes to existing configuration. Returns zero on success. + */ +int (*mac_validate_tx_lpi)(struct phylink_config *config, + struct ethtool_keee *e); + /** * mac_disable_tx_lpi() - disable LPI generation at the MAC * @config: a pointer to a &struct phylink_config. From patchwork Mon Dec 9 14:23:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899884 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B5D735946 for ; Mon, 9 Dec 2024 14:23:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754240; cv=none; b=cL3FXjDC7TusrSuJZQuoKHKPjbfUbp1nCkIUQhXtTqRMon3gT0qtxTkApmtNmGRf+oudsrCnyfDd645OY1qMZuaB2SviZi0wLPYOMIgNXVNY+Sw8Og9RGvu5SCPLwAbTzb4jlDJ28H7MZfRAOt3jBJk2Tqv6L3rqqSRCwvHgMeo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754240; c=relaxed/simple; bh=Ut+MLWeVVX3Tqn7k7kH8xDJedxquIquKyUy3HJ4NCRU=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=mD3es7aOr/CLZdk6gbNfCCS1TdH1FGKyFvIVvYHFazX0oBxWQuZr0mqRdoOLYCmt6Fng7kfC+XMeRQWfwFRNj1c0N5e8kUDg0T5Mz7eOwn+xPcLGfAAS0848H819Vu3dpi9tYgg2ofTUvBqigbjpmJFSnhSLH+wDJqbZw/hQMrw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=EfDHCf4d; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="EfDHCf4d" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=PzYT7uDGh6+XxHUfd7PRftdRV2iZfucndhng4hsZqTo=; b=EfDHCf4dII9PTtHLnWcU9A7xkN oKRIlUnGa+C68W4EDH7s3ZWSbIcAMkooDlvpewRDBohD1Lx8Gy9oMNzfR8ob36k+yFEoAFRjnaH8e qjdkqa4JEfbcRERYZ/4nG0Go5gbyexpo0kGXijFVCFR6vPJHNioTGG5QJtdejIxMZJYuVPw1D/8i3 mZNKCWDlq8oy/xL293r1wMmgVaaYWiB5Ajh1a9tW0qBGAFrXRo04+mHdAYqdtn21lUs/KOHRJvZM/ Aa1Q6NNor67MJczAoo8cGb4F9n31XT1Y8GJQYPwnTiqgzBh4b5yQT3PS3NNpAFO4XXnqJWucMBS2X Y/cKRPUA==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:59058 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefv-0000xk-1H; Mon, 09 Dec 2024 14:23:52 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefs-006SN1-PG; Mon, 09 Dec 2024 14:23:48 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 07/10] net: mvneta: convert to phylink EEE implementation Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:48 +0000 X-Patchwork-Delegate: kuba@kernel.org Convert mvneta to use phylink's EEE implementation, which means we just need to implement the two methods for LPI control, and adding the initial configuration. Disabling LPI requires clearing a single bit. Enabling LPI needs a full configuration of several values, as the timer values are dependent on the MAC operating speed. As Armada 388 states that EEE is only supported in "SGMII" modes, mark this in lpi_interfaces. Testing with RGMII on the Clearfog platform indicates that the receive path fails to detect LPI over RGMII. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- drivers/net/ethernet/marvell/mvneta.c | 127 ++++++++++++++++---------- 1 file changed, 79 insertions(+), 48 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index fe6261b81540..2b0758c11664 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -284,8 +284,12 @@ MVNETA_TXQ_BUCKET_REFILL_PERIOD)) #define MVNETA_LPI_CTRL_0 0x2cc0 +#define MVNETA_LPI_CTRL_0_TS (0xff << 8) #define MVNETA_LPI_CTRL_1 0x2cc4 -#define MVNETA_LPI_REQUEST_ENABLE BIT(0) +#define MVNETA_LPI_CTRL_1_REQUEST_ENABLE BIT(0) +#define MVNETA_LPI_CTRL_1_REQUEST_FORCE BIT(1) +#define MVNETA_LPI_CTRL_1_MANUAL_MODE BIT(2) +#define MVNETA_LPI_CTRL_1_TW (0xfff << 4) #define MVNETA_LPI_CTRL_2 0x2cc8 #define MVNETA_LPI_STATUS 0x2ccc @@ -541,10 +545,6 @@ struct mvneta_port { struct mvneta_bm_pool *pool_short; int bm_win_id; - bool eee_enabled; - bool eee_active; - bool tx_lpi_enabled; - u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; u32 indir[MVNETA_RSS_LU_TABLE_SIZE]; @@ -1354,6 +1354,13 @@ static void mvneta_port_enable(struct mvneta_port *pp) val = mvreg_read(pp, MVNETA_GMAC_CTRL_0); val |= MVNETA_GMAC0_PORT_ENABLE; mvreg_write(pp, MVNETA_GMAC_CTRL_0, val); + + /* Ensure LPI is disabled */ + val = mvreg_read(pp, MVNETA_LPI_CTRL_1); + val &= ~(MVNETA_LPI_CTRL_1_REQUEST_ENABLE | + MVNETA_LPI_CTRL_1_REQUEST_FORCE | + MVNETA_LPI_CTRL_1_MANUAL_MODE); + mvreg_write(pp, MVNETA_LPI_CTRL_1, val); } /* Disable the port and wait for about 200 usec before retuning */ @@ -4213,18 +4220,6 @@ static int mvneta_mac_finish(struct phylink_config *config, unsigned int mode, return 0; } -static void mvneta_set_eee(struct mvneta_port *pp, bool enable) -{ - u32 lpi_ctl1; - - lpi_ctl1 = mvreg_read(pp, MVNETA_LPI_CTRL_1); - if (enable) - lpi_ctl1 |= MVNETA_LPI_REQUEST_ENABLE; - else - lpi_ctl1 &= ~MVNETA_LPI_REQUEST_ENABLE; - mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi_ctl1); -} - static void mvneta_mac_link_down(struct phylink_config *config, unsigned int mode, phy_interface_t interface) { @@ -4240,9 +4235,6 @@ static void mvneta_mac_link_down(struct phylink_config *config, val |= MVNETA_GMAC_FORCE_LINK_DOWN; mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); } - - pp->eee_active = false; - mvneta_set_eee(pp, false); } static void mvneta_mac_link_up(struct phylink_config *config, @@ -4291,11 +4283,61 @@ static void mvneta_mac_link_up(struct phylink_config *config, } mvneta_port_up(pp); +} + +static int mvneta_mac_validate_tx_lpi(struct phylink_config *config, + struct ethtool_keee *eee) +{ + if (eee->tx_lpi_timer > 255) + return -EINVAL; + + return 0; +} + +static void mvneta_mac_disable_tx_lpi(struct phylink_config *config) +{ + struct mvneta_port *pp = netdev_priv(to_net_dev(config->dev)); + u32 lpi1; + + lpi1 = mvreg_read(pp, MVNETA_LPI_CTRL_1); + lpi1 &= ~MVNETA_LPI_CTRL_1_REQUEST_ENABLE; + mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi1); +} - if (phy && pp->eee_enabled) { - pp->eee_active = phy_init_eee(phy, false) >= 0; - mvneta_set_eee(pp, pp->eee_active && pp->tx_lpi_enabled); +static void mvneta_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, + bool tx_clk_stop) +{ + struct mvneta_port *pp = netdev_priv(to_net_dev(config->dev)); + u32 ts, tw, lpi0, lpi1, status; + + status = mvreg_read(pp, MVNETA_GMAC_STATUS); + if (status & MVNETA_GMAC_SPEED_1000) { + /* At 1G speeds, the timer resolution are 1us, and + * 802.3 says tw is 16.5us. Round up to 17us. + */ + tw = 17; + ts = timer; + } else { + /* At 100M speeds, the timer resolutions are 10us, and + * 802.3 says tw is 30us. + */ + tw = 3; + ts = DIV_ROUND_UP(timer, 10); } + + if (ts > 255) + ts = 255; + + /* Configure ts */ + lpi0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); + lpi0 = u32_replace_bits(lpi0, MVNETA_LPI_CTRL_0_TS, ts); + mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi0); + + /* Configure tw and enable LPI generation */ + lpi1 = mvreg_read(pp, MVNETA_LPI_CTRL_1); + lpi1 = u32_replace_bits(lpi1, MVNETA_LPI_CTRL_1_TW, tw); + lpi1 |= MVNETA_LPI_CTRL_1_REQUEST_ENABLE; + mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi1); } static const struct phylink_mac_ops mvneta_phylink_ops = { @@ -4305,6 +4347,9 @@ static const struct phylink_mac_ops mvneta_phylink_ops = { .mac_finish = mvneta_mac_finish, .mac_link_down = mvneta_mac_link_down, .mac_link_up = mvneta_mac_link_up, + .mac_validate_tx_lpi = mvneta_mac_validate_tx_lpi, + .mac_disable_tx_lpi = mvneta_mac_disable_tx_lpi, + .mac_enable_tx_lpi = mvneta_mac_enable_tx_lpi, }; static int mvneta_mdio_probe(struct mvneta_port *pp) @@ -5106,14 +5151,6 @@ static int mvneta_ethtool_get_eee(struct net_device *dev, struct ethtool_keee *eee) { struct mvneta_port *pp = netdev_priv(dev); - u32 lpi_ctl0; - - lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); - - eee->eee_enabled = pp->eee_enabled; - eee->eee_active = pp->eee_active; - eee->tx_lpi_enabled = pp->tx_lpi_enabled; - eee->tx_lpi_timer = (lpi_ctl0) >> 8; // * scale; return phylink_ethtool_get_eee(pp->phylink, eee); } @@ -5122,23 +5159,6 @@ static int mvneta_ethtool_set_eee(struct net_device *dev, struct ethtool_keee *eee) { struct mvneta_port *pp = netdev_priv(dev); - u32 lpi_ctl0; - - /* The Armada 37x documents do not give limits for this other than - * it being an 8-bit register. - */ - if (eee->tx_lpi_enabled && eee->tx_lpi_timer > 255) - return -EINVAL; - - lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); - lpi_ctl0 &= ~(0xff << 8); - lpi_ctl0 |= eee->tx_lpi_timer << 8; - mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi_ctl0); - - pp->eee_enabled = eee->eee_enabled; - pp->tx_lpi_enabled = eee->tx_lpi_enabled; - - mvneta_set_eee(pp, eee->tx_lpi_enabled && eee->eee_enabled); return phylink_ethtool_set_eee(pp->phylink, eee); } @@ -5453,6 +5473,9 @@ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode) !phy_interface_mode_is_rgmii(phy_mode)) return -EINVAL; + /* Ensure LPI is disabled */ + mvneta_mac_disable_tx_lpi(&pp->phylink_config); + return 0; } @@ -5544,6 +5567,14 @@ static int mvneta_probe(struct platform_device *pdev) pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD; + /* Setup EEE. Choose 250us idle. Only supported in SGMII modes. */ + __set_bit(PHY_INTERFACE_MODE_QSGMII, pp->phylink_config.lpi_interfaces); + __set_bit(PHY_INTERFACE_MODE_SGMII, pp->phylink_config.lpi_interfaces); + pp->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD; + pp->phylink_config.lpi_timer_limit_us = 255; + pp->phylink_config.lpi_timer_default = 250; + pp->phylink_config.eee_enabled_default = true; + phy_interface_set_rgmii(pp->phylink_config.supported_interfaces); __set_bit(PHY_INTERFACE_MODE_QSGMII, pp->phylink_config.supported_interfaces); From patchwork Mon Dec 9 14:23:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899885 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1686D1B0419 for ; Mon, 9 Dec 2024 14:24:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754242; cv=none; b=Nh5g7HX2h3pSL8b6jtJyKKq8oiOi2Q06umy+4TsHLKGsETKpKxeQKeZoMjveaeM+1Cux1xYRsjqXKm+4+mcOERbw/pquWZ240jRoOOF+J4/7XeFU2SyCkkO+VIpCgSSjsn6XjqALTYRBYGsGgqh3vS4EGppj/SOwed3HE8//O2Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754242; c=relaxed/simple; bh=RhWZeAf6/6JNJ7EN+DU0WhMmrgZv8LS6U9GhB+OQSpo=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=kLs/HIqb41uIHOI6KPBpHgCWy/jGo8GCN/CKErpHFX38q2bupxh1Ltr4zeMD3HTJtcQ9H+nDSiH8BqV91uz3ItlYkYEK060AJHdyCtNfNM0gXxlmOeLw11LubGdYYuq02i4/TFeAILvWjqZEMB/POj3vciEoh488w8fsNg6tmd8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=q1k5K4zJ; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="q1k5K4zJ" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=v1w93bhCVXoloCZzzEXluBB+s1NbuoL6S7cXVQu134c=; b=q1k5K4zJWuuHOYkTu/3DYFdNKr nnQT64/4/27Z59Jln1qbrM6BHWmaRaSV4tAnwFrnjOFAas45BpD1mfWmiSwbclLADhBeHJ4ZT0BeV W6iR8PSeb4SFgeAVqjUsUaHtMcgvOrN5C569PWmUOULYZHDG1OWAZkaVjcWpuPlgjQsavxgcrDnZ3 icYEfnCL5v3F4mvhSzTxexObaagY/xeVwn96jmDh+R3xmS0tUQ2oEHyOJJW89hMnztA4cYNyWhmKL fkWdOYm12h08aC3+I/o86iG0c5Jn2tm3xLhlk67DNsIZsEKzzyg7X9eJFmxUbRvFvSL2uea36/lHy +vFaXw1w==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:59068 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKefz-0000xw-1P; Mon, 09 Dec 2024 14:23:55 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKefx-006SN7-U2; Mon, 09 Dec 2024 14:23:53 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 08/10] net: mvpp2: add EEE implementation Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:53 +0000 X-Patchwork-Delegate: kuba@kernel.org Add EEE support for mvpp2, using phylink's EEE implementation, which means we just need to implement the two methods for LPI control, and with the initial configuration. Only SGMII mode is supported, so only 100M and 1G speeds. Disabling LPI requires clearing a single bit. Enabling LPI needs a full configuration of several values, as the timer values are dependent on the MAC operating speed. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 5 + .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 98 +++++++++++++++++++ 2 files changed, 103 insertions(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index 9e02e4367bec..364d038da7ea 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -481,6 +481,11 @@ #define MVPP22_GMAC_INT_SUM_MASK 0xa4 #define MVPP22_GMAC_INT_SUM_MASK_LINK_STAT BIT(1) #define MVPP22_GMAC_INT_SUM_MASK_PTP BIT(2) +#define MVPP2_GMAC_LPI_CTRL0 0xc0 +#define MVPP2_GMAC_LPI_CTRL0_TS_MASK GENMASK(8, 8) +#define MVPP2_GMAC_LPI_CTRL1 0xc4 +#define MVPP2_GMAC_LPI_CTRL1_REQ_EN BIT(0) +#define MVPP2_GMAC_LPI_CTRL1_TW_MASK GENMASK(15, 4) /* Per-port XGMAC registers. PPv2.2 and PPv2.3, only for GOP port 0, * relative to port->base. diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index f85229a30844..cb5f8e5965d9 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -5757,6 +5757,28 @@ static int mvpp2_ethtool_set_rxfh(struct net_device *dev, return mvpp2_modify_rxfh_context(dev, NULL, rxfh, extack); } +static int mvpp2_ethtool_get_eee(struct net_device *dev, + struct ethtool_keee *eee) +{ + struct mvpp2_port *port = netdev_priv(dev); + + if (!port->phylink) + return -EOPNOTSUPP; + + return phylink_ethtool_get_eee(port->phylink, eee); +} + +static int mvpp2_ethtool_set_eee(struct net_device *dev, + struct ethtool_keee *eee) +{ + struct mvpp2_port *port = netdev_priv(dev); + + if (!port->phylink) + return -EOPNOTSUPP; + + return phylink_ethtool_set_eee(port->phylink, eee); +} + /* Device ops */ static const struct net_device_ops mvpp2_netdev_ops = { @@ -5802,6 +5824,8 @@ static const struct ethtool_ops mvpp2_eth_tool_ops = { .create_rxfh_context = mvpp2_create_rxfh_context, .modify_rxfh_context = mvpp2_modify_rxfh_context, .remove_rxfh_context = mvpp2_remove_rxfh_context, + .get_eee = mvpp2_ethtool_get_eee, + .set_eee = mvpp2_ethtool_set_eee, }; /* Used for PPv2.1, or PPv2.2 with the old Device Tree binding that @@ -6672,6 +6696,65 @@ static void mvpp2_mac_link_down(struct phylink_config *config, mvpp2_port_disable(port); } +static int mvpp2_mac_validate_tx_lpi(struct phylink_config *config, + struct ethtool_keee *eee) +{ + if (eee->tx_lpi_timer > 255) + return -EINVAL; + + return 0; +} + +static void mvpp2_mac_disable_tx_lpi(struct phylink_config *config) +{ + struct mvpp2_port *port = mvpp2_phylink_to_port(config); + + mvpp2_modify(port->base + MVPP2_GMAC_LPI_CTRL1, + MVPP2_GMAC_LPI_CTRL1_REQ_EN, 0); +} + +static void mvpp2_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, + bool tx_clk_stop) +{ + struct mvpp2_port *port = mvpp2_phylink_to_port(config); + u32 ts, tw, lpi1, status; + + status = readl(port->base + MVPP2_GMAC_STATUS0); + if (status & MVPP2_GMAC_STATUS0_GMII_SPEED) { + /* At 1G speeds, the timer resolution are 1us, and + * 802.3 says tw is 16.5us. Round up to 17us. + */ + tw = 17; + ts = timer; + } else { + /* At 100M speeds, the timer resolutions are 10us, and + * 802.3 says tw is 30us. + */ + tw = 3; + ts = DIV_ROUND_UP(timer, 10); + } + + if (ts > 255) + ts = 255; + + /* Ensure LPI generation is disabled */ + lpi1 = readl(port->base + MVPP2_GMAC_LPI_CTRL1); + writel(lpi1 & ~MVPP2_GMAC_LPI_CTRL1_REQ_EN, + port->base + MVPP2_GMAC_LPI_CTRL1); + + /* Configure ts */ + mvpp2_modify(port->base + MVPP2_GMAC_LPI_CTRL0, + MVPP2_GMAC_LPI_CTRL0_TS_MASK, + FIELD_PREP(MVPP2_GMAC_LPI_CTRL0_TS_MASK, ts)); + + /* Configure tw */ + lpi1 = u32_replace_bits(lpi1, MVPP2_GMAC_LPI_CTRL1_TW_MASK, tw); + + /* Enable LPI generation */ + writel(lpi1 | MVPP2_GMAC_LPI_CTRL1_REQ_EN, + port->base + MVPP2_GMAC_LPI_CTRL1); +} + static const struct phylink_mac_ops mvpp2_phylink_ops = { .mac_select_pcs = mvpp2_select_pcs, .mac_prepare = mvpp2_mac_prepare, @@ -6679,6 +6762,9 @@ static const struct phylink_mac_ops mvpp2_phylink_ops = { .mac_finish = mvpp2_mac_finish, .mac_link_up = mvpp2_mac_link_up, .mac_link_down = mvpp2_mac_link_down, + .mac_validate_tx_lpi = mvpp2_mac_validate_tx_lpi, + .mac_enable_tx_lpi = mvpp2_mac_enable_tx_lpi, + .mac_disable_tx_lpi = mvpp2_mac_disable_tx_lpi, }; /* Work-around for ACPI */ @@ -6957,6 +7043,16 @@ static int mvpp2_port_probe(struct platform_device *pdev, port->phylink_config.mac_capabilities = MAC_2500FD | MAC_1000FD | MAC_100 | MAC_10; + __set_bit(PHY_INTERFACE_MODE_SGMII, + port->phylink_config.lpi_interfaces); + + port->phylink_config.lpi_capabilities = MAC_1000FD | MAC_100FD; + + /* Setup EEE. Choose 250us idle. */ + port->phylink_config.lpi_timer_limit_us = 255; + port->phylink_config.lpi_timer_default = 250; + port->phylink_config.eee_enabled_default = true; + if (port->priv->global_tx_fc) port->phylink_config.mac_capabilities |= MAC_SYM_PAUSE | MAC_ASYM_PAUSE; @@ -7031,6 +7127,8 @@ static int mvpp2_port_probe(struct platform_device *pdev, goto err_free_port_pcpu; } port->phylink = phylink; + + mvpp2_mac_disable_tx_lpi(&port->phylink_config); } else { dev_warn(&pdev->dev, "Use link irqs for port#%d. FW update required\n", port->id); port->phylink = NULL; From patchwork Mon Dec 9 14:23:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899886 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D09641B0403 for ; Mon, 9 Dec 2024 14:24:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754248; cv=none; b=eQmbJrnlL63IJlsFj2KX8UjZhk4rR6N4R/R6W0NFwULZzyIwqMgqq/nYazVH1W1JaEOw467TlNBfWi2S9OIa6Ew0n3MlTk/G+V9EHOLIJLcFjpY0aJaf3M1VowDZG+VZycjHHI8w8Yg6XwElMhTXvbvZdYCR8fpZI0pY2y2SvIU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754248; c=relaxed/simple; bh=HEp7B9GnUR6cNuSHfTUAJBygYSYS2jZhGp2PsZHBn6E=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=sLd5rOlah26vgBYXgSyhlzkIZ5u0OjoXDjMcigt/Gkxz0zcGa7SG7BJ02cYFu/lYBx6Y3mjW0QgYVbi1iGZ5QXT/SgOfTBTR6MKZgfmROxDpn102tDjc/IDE8qMiYXgePlN/J9pudtrGlHkFwJ+j/iS5jtnEcra3C6oND3m++LQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=lRNsK8Hw; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="lRNsK8Hw" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=tFHx7Hpa/Wx2HX4vYATVmQHXD/1eII6Z1rk5n+BqG/I=; b=lRNsK8HwUGOHUntiFYK5lxZmOj MZuHz1DLvkQmy7WF/hrTwDdkAL4xjdbt3vTY9lys8WpJGJQltwZug1vca4JGuD4LPEAgE0PBXlIgg gtQkXQyFQOr/GnlwVZ6kIEMW9/QcjTd2ZEow9NSkuyMSjcQQg+looG2l4zRzsbSyTrlRUeq2qPPsr +ljvq2aKHxErgp26407PMpg0blWaSI2qAFYsxVvqAlcwZqZ2VLyGJWPaPGyhSI6F7pSl+6OO435wo qv7iC3g7O38cs1kKBOh0uF//v5ryFM0z3PmZ5U4clY8mxXIqwIDF3xFwdh8w9HyjG/OpXKL5d3bh1 IScb5f7Q==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:55044 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKeg4-0000yE-1a; Mon, 09 Dec 2024 14:24:00 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKeg3-006SND-0e; Mon, 09 Dec 2024 14:23:59 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 09/10] net: lan743x: use netdev in lan743x_phylink_mac_link_down() Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:23:59 +0000 X-Patchwork-Delegate: kuba@kernel.org Use the netdev that we already have in lan743x_phylink_mac_link_down(). Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn --- drivers/net/ethernet/microchip/lan743x_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c index 4dc5adcda6a3..8d7ad021ac70 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.c +++ b/drivers/net/ethernet/microchip/lan743x_main.c @@ -3029,7 +3029,7 @@ static void lan743x_phylink_mac_link_down(struct phylink_config *config, struct net_device *netdev = to_net_dev(config->dev); struct lan743x_adapter *adapter = netdev_priv(netdev); - netif_tx_stop_all_queues(to_net_dev(config->dev)); + netif_tx_stop_all_queues(netdev); lan743x_mac_eee_enable(adapter, false); } From patchwork Mon Dec 9 14:24:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13899887 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A1771B0403 for ; Mon, 9 Dec 2024 14:24:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754252; cv=none; b=AFzj5RmyvrsASaV/KqSmR7XBq2eUjp+WiUz1fzJTTq3M6g3z2LDXgFA3sqQ8o7Dd1ymHMpVgevWVcmlhvJTZ7FLOwOvJs0cNZnVYtpEg4nqO4rHb0Zn8bW0nbS/4Cm4vr8eWZvqvGuNHW2zA2i9VnVWgBw1rOHI+QE11jAYm4K4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733754252; c=relaxed/simple; bh=KRAIHUVBwYgyWavcd2jXfBUALyYN6V96AscSgihvkSA=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=awT1Vvnc5Ktm6wyChfl02xtylMhamiSdgaV25sfsQteJy5iLl3RZV0yS4BThideoquswY/oPEyzc4+viqJXWF0/p2NKH1JRLB5TQzKIuegfWK3xHQl1CSMJWJN2jYKGIi1K80S5OPN4PvjAdx1E3jHEVKutwhU3ysGsXr1K1nPc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=XsNtkKDN; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="XsNtkKDN" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=86MjfvWnJQi9fO+/XaHjcVwzFGECVkyvIJk5JlTA9Ng=; b=XsNtkKDNOTvbeJr7G3bPtnIFlU NFjtQ+yAOGGuTM3WpG3Y5kiK5gj0PE0tTbdANpt1vS3gePlxZyOxqZi2r0XXqO9flURylofgm02NA eARRxxRmATzzn7iL4ULOudJ+6YqNFz+DRvms8KOEYEef7kAVBVev/VFvm/1fz9Mg4BAouZGA9RIb1 vpXknjM5LpHf5hyASCsInd4v044duH7lH3VsPgdh6qB8Nhk2RkyvAl1uXrmpk26A2o4mc7UnVFdAt 1iHqrqvZ4E3KAHkmQQdFPGVRMOPXyqKa2gB30bKdjzKdYglAzNiv6LKOgioekq0SB/BBmN5yjnZoZ V2/Z/LnQ==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:55058 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tKeg9-0000yS-1o; Mon, 09 Dec 2024 14:24:06 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tKeg8-006SNJ-4Q; Mon, 09 Dec 2024 14:24:04 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Andrew Lunn , Bryan Whitehead , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Marcin Wojtas , netdev@vger.kernel.org, Paolo Abeni , UNGLinuxDriver@microchip.com Subject: [PATCH net-next 10/10] net: lan743x: convert to phylink managed EEE Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Mon, 09 Dec 2024 14:24:04 +0000 X-Patchwork-Delegate: kuba@kernel.org Convert lan743x to phylink managed EEE: - Set the lpi_capabilties. - Move the call to lan743x_mac_eee_enable() into the enable/disable tx_lpi functions. - Ensure that EEEEN is clear during probe. - Move the setting of the LPI timer into mac_enable_tx_lpi(). - Move reading of LPI timer to phylink initialisation to set the default timer value. Signed-off-by: Russell King (Oracle) --- .../net/ethernet/microchip/lan743x_ethtool.c | 21 ----------- drivers/net/ethernet/microchip/lan743x_main.c | 37 ++++++++++++++++--- drivers/net/ethernet/microchip/lan743x_main.h | 1 - 3 files changed, 31 insertions(+), 28 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan743x_ethtool.c b/drivers/net/ethernet/microchip/lan743x_ethtool.c index 1a1cbd034eda..1459acfb1e61 100644 --- a/drivers/net/ethernet/microchip/lan743x_ethtool.c +++ b/drivers/net/ethernet/microchip/lan743x_ethtool.c @@ -1055,9 +1055,6 @@ static int lan743x_ethtool_get_eee(struct net_device *netdev, { struct lan743x_adapter *adapter = netdev_priv(netdev); - eee->tx_lpi_timer = lan743x_csr_read(adapter, - MAC_EEE_TX_LPI_REQ_DLY_CNT); - return phylink_ethtool_get_eee(adapter->phylink, eee); } @@ -1065,24 +1062,6 @@ static int lan743x_ethtool_set_eee(struct net_device *netdev, struct ethtool_keee *eee) { struct lan743x_adapter *adapter = netdev_priv(netdev); - u32 tx_lpi_timer; - - tx_lpi_timer = lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT); - if (tx_lpi_timer != eee->tx_lpi_timer) { - u32 mac_cr = lan743x_csr_read(adapter, MAC_CR); - - /* Software should only change this field when Energy Efficient - * Ethernet Enable (EEEEN) is cleared. - * This function will trigger an autonegotiation restart and - * eee will be reenabled during link up if eee was negotiated. - */ - lan743x_mac_eee_enable(adapter, false); - lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, - eee->tx_lpi_timer); - - if (mac_cr & MAC_CR_EEE_EN_) - lan743x_mac_eee_enable(adapter, true); - } return phylink_ethtool_set_eee(adapter->phylink, eee); } diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c index 8d7ad021ac70..25d37a2cb4a6 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.c +++ b/drivers/net/ethernet/microchip/lan743x_main.c @@ -2966,7 +2966,7 @@ static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter) return lan743x_pcs_power_reset(adapter); } -void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable) +static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable) { u32 mac_cr; @@ -3027,10 +3027,8 @@ static void lan743x_phylink_mac_link_down(struct phylink_config *config, phy_interface_t interface) { struct net_device *netdev = to_net_dev(config->dev); - struct lan743x_adapter *adapter = netdev_priv(netdev); netif_tx_stop_all_queues(netdev); - lan743x_mac_eee_enable(adapter, false); } static void lan743x_phylink_mac_link_up(struct phylink_config *config, @@ -3072,16 +3070,32 @@ static void lan743x_phylink_mac_link_up(struct phylink_config *config, cap & FLOW_CTRL_TX, cap & FLOW_CTRL_RX); - if (phydev) - lan743x_mac_eee_enable(adapter, phydev->enable_tx_lpi); - netif_tx_wake_all_queues(netdev); } +static void mac_disable_tx_lpi(struct phylink_config *config) +{ + lan743x_mac_eee_enable(adapter, false); +} + +static void mac_enable_tx_lpi(struct phylink_config *config, u32 timer, + bool tx_clk_stop) +{ + /* Software should only change this field when Energy Efficient + * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing + * EEEEN during probe, and phylink itself guarantees that + * mac_disable_tx_lpi() will have been previously called. + */ + lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer); + lan743x_mac_eee_enable(adapter, true); +} + static const struct phylink_mac_ops lan743x_phylink_mac_ops = { .mac_config = lan743x_phylink_mac_config, .mac_link_down = lan743x_phylink_mac_link_down, .mac_link_up = lan743x_phylink_mac_link_up, + .mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi, + .mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi, }; static int lan743x_phylink_create(struct lan743x_adapter *adapter) @@ -3095,6 +3109,10 @@ static int lan743x_phylink_create(struct lan743x_adapter *adapter) adapter->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; + adapter->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD; + adapter->phylink_config.lpi_timer_max = U32_MAX; + adapter->phylink_config.lpi_timer_default = + lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT); lan743x_phy_interface_select(adapter); @@ -3120,6 +3138,10 @@ static int lan743x_phylink_create(struct lan743x_adapter *adapter) phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces); } + memcpy(adapter->phylink_config.lpi_interfaces, + adapter->phylink_config.supported_interfaces, + sizeof(adapter->phylink_config.lpi_interfaces)); + pl = phylink_create(&adapter->phylink_config, NULL, adapter->phy_interface, &lan743x_phylink_mac_ops); @@ -3517,6 +3539,9 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter, spin_lock_init(&tx->ring_lock); } + /* Ensure EEEEN is clear */ + lan743x_mac_eee_enable(adapter, false); + return 0; } diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/ethernet/microchip/lan743x_main.h index 8ef897c114d3..7f73d66854be 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.h +++ b/drivers/net/ethernet/microchip/lan743x_main.h @@ -1206,6 +1206,5 @@ void lan743x_hs_syslock_release(struct lan743x_adapter *adapter); void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, bool tx_enable, bool rx_enable); int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr); -void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable); #endif /* _LAN743X_H */