From patchwork Tue Dec 10 06:41:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikanta Mylavarapu X-Patchwork-Id: 13900925 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2015522CBE6; Tue, 10 Dec 2024 06:42:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733812922; cv=none; b=rL07nxUqt8Z+pVGn8Eqrc4jFJIyTe3Ry4m7P0kFBsyOWasjGYoFQoAbrCCmysVYx4m3yo38TxHD4irCZEMqSDLcMDu4Tk5meIDG8t0OUfywK7lVYrLFGiIa7hHciLVyRGDq5EyacA5Z67QFl3DQQa68ZXYHKZCBf7jcbb8n/XmU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733812922; c=relaxed/simple; bh=BsoBcojpieF1jKwq+H06eJHBNXtzuAuwFUG746vQQwg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PdNehcvQKF4I0h+lPr0U+aOEH8VvHhm4dwDcTZdEZ+r1HbkG858liQdcCoFKYL2nMvsspw5gaKycT9ZzexAY2kuJWjxa344EVE4jdDSGG3KAieGige08UpExoaMZVySD4y7ko9St1gqQLzp0VATbocctUqGGO2S05pyHzb7MrQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=iOMORIXi; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="iOMORIXi" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B9NpNvM018804; Tue, 10 Dec 2024 06:41:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= B/onXrgi/qg+1J8Msc93pvegGSEr0lb+kIz7H9hy71A=; b=iOMORIXiqlJuYQXX lmSY5sReeLX3zS9+iiWMwOqG41rQrttr0WW9++kU3+d66LWnNf/4ONTfcY9J+m9q kNJ1+SOm7wOJH+Fn4DJ7rCTHytNu1KrKRQgAEYH9cHXrrGS1LSeOLjOffcy3CSB8 1XvFli3Q8zxw6e0BiHhaBMNB8b0tAg80g+8yVn9T1T2zEs9Wl3Hwkmm/8AaG/5xE 2FMv0hQh5eks3Lus7BLr6iqCVu5MYPCkOJ8X24qt/K/H3+IxIfhPVMk9vXAjZq4E pYf+OHG6pNq+Ty8TSzNcNCxc0rGtR1ZSJm8x/BtgGduUpZf0YZ7j8irRIi0RXR+7 63P5ww== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43eak38uxq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 10 Dec 2024 06:41:57 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BA6fvSw012385 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 10 Dec 2024 06:41:57 GMT Received: from hu-mmanikan-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 22:41:52 -0800 From: Manikanta Mylavarapu To: , , , , , , , , , CC: , Subject: [PATCH 1/2] dt-bindings: clock: qcom: gcc-ipq5424: add gcc_xo_clk macro Date: Tue, 10 Dec 2024 12:11:09 +0530 Message-ID: <20241210064110.130466-2-quic_mmanikan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241210064110.130466-1-quic_mmanikan@quicinc.com> References: <20241210064110.130466-1-quic_mmanikan@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ZbYiOe3ADGmO8NBex8UgMvfWPpQmP-ll X-Proofpoint-GUID: ZbYiOe3ADGmO8NBex8UgMvfWPpQmP-ll X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=998 clxscore=1015 spamscore=0 mlxscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 bulkscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412100050 The GCC_XO_CLK is required for the functionality of the WiFi copy engine block. Therefore, add the GCC_XO_CLK macro. Signed-off-by: Manikanta Mylavarapu Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/qcom,ipq5424-gcc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/qcom,ipq5424-gcc.h b/include/dt-bindings/clock/qcom,ipq5424-gcc.h index 755ce7a71c7c..cad46811ba6b 100644 --- a/include/dt-bindings/clock/qcom,ipq5424-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq5424-gcc.h @@ -152,5 +152,6 @@ #define GCC_PCIE3_RCHNG_CLK_SRC 142 #define GCC_PCIE3_RCHNG_CLK 143 #define GCC_IM_SLEEP_CLK 144 +#define GCC_XO_CLK 145 #endif From patchwork Tue Dec 10 06:41:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikanta Mylavarapu X-Patchwork-Id: 13900926 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68EB122CBD2; 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Tue, 10 Dec 2024 06:42:02 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BA6g1ag030986 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 10 Dec 2024 06:42:01 GMT Received: from hu-mmanikan-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 22:41:57 -0800 From: Manikanta Mylavarapu To: , , , , , , , , , CC: , Subject: [PATCH 2/2] clk: qcom: ipq5424: add gcc_xo_clk Date: Tue, 10 Dec 2024 12:11:10 +0530 Message-ID: <20241210064110.130466-3-quic_mmanikan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241210064110.130466-1-quic_mmanikan@quicinc.com> References: <20241210064110.130466-1-quic_mmanikan@quicinc.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Ek_nEVzDo36iugzqJm9SqYgKtqbocvw9 X-Proofpoint-ORIG-GUID: Ek_nEVzDo36iugzqJm9SqYgKtqbocvw9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 mlxlogscore=847 mlxscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 malwarescore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412100050 The gcc_xo_clk is required for the functionality of the WiFi copy engine block. Therefore, add the gcc_xo_clk in gcc driver. Signed-off-by: Manikanta Mylavarapu --- drivers/clk/qcom/gcc-ipq5424.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq5424.c b/drivers/clk/qcom/gcc-ipq5424.c index 88a7d5b2e751..a30287f6a517 100644 --- a/drivers/clk/qcom/gcc-ipq5424.c +++ b/drivers/clk/qcom/gcc-ipq5424.c @@ -325,6 +325,24 @@ static struct clk_rcg2 gcc_xo_clk_src = { }, }; +static struct clk_branch gcc_xo_clk = { + .halt_reg = 0x34018, + .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0x34018, + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data) { + .name = "gcc_xo_clk", + .parent_hws = (const struct clk_hw*[]) { + &gcc_xo_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_fixed_factor gcc_xo_div4_clk_src = { .mult = 1, .div = 4, @@ -2920,6 +2938,7 @@ static struct clk_regmap *gcc_ipq5424_clocks[] = { [GCC_QPIC_CLK_SRC] = &gcc_qpic_clk_src.clkr, [GCC_QPIC_AHB_CLK] = &gcc_qpic_ahb_clk.clkr, [GCC_XO_CLK_SRC] = &gcc_xo_clk_src.clkr, + [GCC_XO_CLK] = &gcc_xo_clk.clkr, [GCC_QDSS_DAP_CLK] = &gcc_qdss_dap_clk.clkr, [GCC_QDSS_AT_CLK] = &gcc_qdss_at_clk.clkr, [GPLL0] = &gpll0.clkr,