From patchwork Tue Dec 10 09:55:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13901184 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7F8623DEA9; Tue, 10 Dec 2024 09:55:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733824556; cv=none; b=qIjlIBnt/iC6CswYcNELIOsaQcmFOrUIehJDdIq6uwiNp77RVp1IO3fMEzNt5oEfIP6XLbNsGMPkp+4JuQTSMWaOKjvSWwvMVUaHqVxrVb+W/Q5RFKbiHiQeuAfQrXmi0ipvzjwgvlBfc60dlw0ul2YBRe5q+a7ajVU577XcnCI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733824556; c=relaxed/simple; bh=dtws+xTfRyfYsfpfaoqnJE1PMScGu2ZJPYsHN4ug8tY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=I6v2CJJvUCHQRqyGXPvwsCK/SG61Tc+mirTKvJY9JQ8Npwp1NoH/T/TM8Dz1+BwzjF8Yq992LkkWHbILzabqQ3IelpGs2MokBjIDVjz1LERL6nusdBWnaUfxpMnUUOBYZwaSWPKhelLHyfKPdUGMKV370IApfQQEzJDNH0YbKS4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PcgeLKFN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PcgeLKFN" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6C622C4AF0B; Tue, 10 Dec 2024 09:55:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733824555; bh=dtws+xTfRyfYsfpfaoqnJE1PMScGu2ZJPYsHN4ug8tY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=PcgeLKFNbNCqKSb4CYsVwYYgRxC1jZQTOWH1JyUQCsrqPu47t6EP7Xdal7rnWdUpN dmoYZ9JAPGUgilM/qsuWC3eYNVz5K1MNDma2KBmt56Dj9A0ghLxLs8f2+sSIvez4gt XSiGi0UI9kuKaKngs5UJzMT6JlYbgkINnijRN7zdZm/ur6GP50Ua/V5Dj9RjCSfEo2 Iel8SslgulMKHOhpjhMo9cuyHzbongu2NN44n8OaPMqBj588hbTDNz6hGElKkvD63C znt5XIviluL0syQGjdMS2Nl4LOT6FkR8aNmnVANLRNpSv8HzWfYFfxhv2QrB7Clzzp ccnyqcINNx7Aw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 511D0E7717F; Tue, 10 Dec 2024 09:55:55 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Tue, 10 Dec 2024 15:25:24 +0530 Subject: [PATCH 1/4] PCI/pwrctrl: Move creation of pwrctrl devices to pci_scan_device() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241210-pci-pwrctrl-slot-v1-1-eae45e488040@linaro.org> References: <20241210-pci-pwrctrl-slot-v1-0-eae45e488040@linaro.org> In-Reply-To: <20241210-pci-pwrctrl-slot-v1-0-eae45e488040@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Qiang Yu , Manivannan Sadhasivam , Lukas Wunner X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5633; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=GinDskZVmFepaqp98uluvUEcjhOnCoWV9VY09n/bR2U=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnWBAoSH3T7UjzTNeR+h+rrUmnBwDRsENn7kie2 nzb2Kc5dl2JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ1gQKAAKCRBVnxHm/pHO 9S1PB/sFQnFuj9UwelD7bwdSeGth72wCnLGSlrQ7dgKBIQ3W8bOBUqPdVPdzQizvlJSsTb5z3oN nWO/mi+XgkIu0BMI7cM3Q7PCfUNbxsLGbOBr0ojTofJ6WwlYZObcg1VOosrNWifgefVkpQicBHa Rv4cWSgpaGdqTEAfsjaW/JejLA7LGw5g2xJVByZllhH4OLkO8gkF/jOw8nV4ut8TOJAtzHAMqXw GjVzdyve/HSlTePj7Qj5h39EYgDV0v8FSC4aWDTRXmeD0GDE0MszbaGPguGzjZOm+eFsbFruG7x 3NEswv68+EEmF6gqtyJL2dJ9uVHxYELQwDCpokylODAauZ5X X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam Current way of creating pwrctrl devices requires iterating through the child devicetree nodes of the PCI bridge in pci_pwrctrl_create_devices(). Even though it works, it creates confusion as there is no symmetry between this and pci_pwrctrl_unregister() function that removes the pwrctrl devices. So to make these two functions symmetric, move the creation of pwrctrl devices to pci_scan_device(). During the scan of each device in a slot, the devicetree node (if exists) for the PCI device will be checked. If it has the supplies populated, then the pwrctrl device will be created. Since the PCI device scan happens so early, there would be no 'struct pci_dev' available for the device. So the host bridge is used as the parent of all pwrctrl devices. One nice side effect of this move is that, it is now possible to have pwrctrl devices for PCI bridges as well (to control the supplies of PCI slots). Suggested-by: Lukas Wunner Signed-off-by: Manivannan Sadhasivam --- drivers/pci/bus.c | 43 ------------------------------------------- drivers/pci/probe.c | 34 ++++++++++++++++++++++++++++++++++ drivers/pci/pwrctrl/core.c | 2 +- 3 files changed, 35 insertions(+), 44 deletions(-) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 98910bc0fcc4..b6851101ac36 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -331,47 +331,6 @@ void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { } void __weak pcibios_bus_add_device(struct pci_dev *pdev) { } -/* - * Create pwrctrl devices (if required) for the PCI devices to handle the power - * state. - */ -static void pci_pwrctrl_create_devices(struct pci_dev *dev) -{ - struct device_node *np = dev_of_node(&dev->dev); - struct device *parent = &dev->dev; - struct platform_device *pdev; - - /* - * First ensure that we are starting from a PCI bridge and it has a - * corresponding devicetree node. - */ - if (np && pci_is_bridge(dev)) { - /* - * Now look for the child PCI device nodes and create pwrctrl - * devices for them. The pwrctrl device drivers will manage the - * power state of the devices. - */ - for_each_available_child_of_node_scoped(np, child) { - /* - * First check whether the pwrctrl device really - * needs to be created or not. This is decided - * based on at least one of the power supplies - * being defined in the devicetree node of the - * device. - */ - if (!of_pci_supply_present(child)) { - pci_dbg(dev, "skipping OF node: %s\n", child->name); - return; - } - - /* Now create the pwrctrl device */ - pdev = of_platform_device_create(child, NULL, parent); - if (!pdev) - pci_err(dev, "failed to create OF node: %s\n", child->name); - } - } -} - /** * pci_bus_add_device - start driver for a single device * @dev: device to add @@ -396,8 +355,6 @@ void pci_bus_add_device(struct pci_dev *dev) pci_proc_attach_device(dev); pci_bridge_d3_update(dev); - pci_pwrctrl_create_devices(dev); - /* * If the PCI device is associated with a pwrctrl device with a * power supply, create a device link between the PCI device and diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2e81ab0f5a25..db928d5cb753 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include #include @@ -2446,6 +2448,36 @@ bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, } EXPORT_SYMBOL(pci_bus_read_dev_vendor_id); +/* + * Create pwrctrl devices (if required) for the PCI devices to handle the power + * state. + */ +static void pci_pwrctrl_create_devices(struct pci_bus *bus, int devfn) +{ + struct pci_host_bridge *host = pci_find_host_bridge(bus); + struct platform_device *pdev; + struct device_node *np; + + np = of_pci_find_child_device(dev_of_node(&bus->dev), devfn); + if (!np || of_find_device_by_node(np)) + return; + + /* + * First check whether the pwrctrl device really needs to be created or + * not. This is decided based on at least one of the power supplies + * being defined in the devicetree node of the device. + */ + if (!of_pci_supply_present(np)) { + pr_debug("PCI/pwrctrl: Skipping OF node: %s\n", np->name); + return; + } + + /* Now create the pwrctrl device */ + pdev = of_platform_device_create(np, NULL, &host->dev); + if (!pdev) + pr_err("PCI/pwrctrl: Failed to create pwrctrl device for node: %s\n", np->name); +} + /* * Read the config data for a PCI device, sanity-check it, * and fill in the dev structure. @@ -2455,6 +2487,8 @@ static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) struct pci_dev *dev; u32 l; + pci_pwrctrl_create_devices(bus, devfn); + if (!pci_bus_read_dev_vendor_id(bus, devfn, &l, 60*1000)) return NULL; diff --git a/drivers/pci/pwrctrl/core.c b/drivers/pci/pwrctrl/core.c index 2fb174db91e5..9cc7e2b7f2b5 100644 --- a/drivers/pci/pwrctrl/core.c +++ b/drivers/pci/pwrctrl/core.c @@ -44,7 +44,7 @@ static void rescan_work_func(struct work_struct *work) struct pci_pwrctrl, work); pci_lock_rescan_remove(); - pci_rescan_bus(to_pci_dev(pwrctrl->dev->parent)->bus); + pci_rescan_bus(to_pci_host_bridge(pwrctrl->dev->parent)->bus); pci_unlock_rescan_remove(); } From patchwork Tue Dec 10 09:55:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13901185 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7FC523DEB6; Tue, 10 Dec 2024 09:55:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733824556; cv=none; b=HHmRYMH4SaHclfUEruapHFRffzcdpsAeunV1ynyTT9pBkmZzjMb8/xr88JyWanhLMjGeLYlrcPGHPENjC+VggbaqR2KQTjhuATkeN/UuHA9+tAI8tq7nf4qW6LR8N0j8/uA+tlt5dF/0/rBQLP+bePC8kLJR7ajfP06tKwRj5FE= ARC-Message-Signature: i=1; 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b=Xa7rQcJRE/Yb9KjlR2znp4DDy7vRdk5maCGNAmnc0rOjhawqorWYUFBcBp6gIWamp 0XL2xuTY7A/WPGev0GYLTf1mtU0ol2qUF5zQfEqQHaXpvT1vFVdF9dlcsE+wPMCWTU VTyXoBOxwrbehOmjhY83KRb53DyN2B3VT2WfO6Rf0QXRMlPIUhFSv8JEkm0Cs4Np+0 uxxsI3wM+AQxZKXOpk3qO6XwhFM4nwgBejbO1btSYE3RGXfWiLgmyii0XFVJsRAnYD yehXa6v9xi/lsATBwhyhAvMIMdMVLx6OoYGGUGkzaMBZQbyznciGh1sBoWpnbGdbvO gmdV8zK9vOQzA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66FF8E77181; Tue, 10 Dec 2024 09:55:55 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Tue, 10 Dec 2024 15:25:25 +0530 Subject: [PATCH 2/4] PCI/pwrctrl: Move pci_pwrctrl_unregister() to pci_destroy_dev() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241210-pci-pwrctrl-slot-v1-2-eae45e488040@linaro.org> References: <20241210-pci-pwrctrl-slot-v1-0-eae45e488040@linaro.org> In-Reply-To: <20241210-pci-pwrctrl-slot-v1-0-eae45e488040@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Qiang Yu , Manivannan Sadhasivam , Lukas Wunner X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1183; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=AayP0uLiPqt9crxsUCoYXhcBPjoCZ1TdOHW8vyCvx84=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnWBAo0ccwM9RwPmxonJZbhJqQZ/aygLDUZl/ho zzelFF38iaJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ1gQKAAKCRBVnxHm/pHO 9ZRSB/9NkA7rMJDFCACTjRyMDLunQF78A/Py/7vGsmzIRWlriF3rwvg8Zn59bTAyFjcrmPezP2j iglCPGrVcbwDjDuCGb0rInMbEBj/hwFyITq6FQEeZjE3ryXMqZZwjKXFBi6qhLIYY11Ias4y2M1 Le3mJBEigq9t0wOZVmrIkYVoUokAfHTtDJ6HWlyXRabI2pzKNETFu61qCgVmdHAjsTyf98TV340 iXVA6tsUnm3ZWk9NvLG740865eD7uTK73FsZ44XRFxeWey/60+05stSiNAL8Uzq/y9SvCGeOCvA R2GQ+y7DVlO61DKQu80mpbj8uDWTLdyIlebhFN7mTAjw4BVk X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam PCI core will try to access the devices even after pci_stop_dev() for things like Data Object Exchange (DOE), ASPM etc... So move pci_pwrctrl_unregister() to the near end of pci_destroy_dev() to make sure that the devices are powered down only after the PCI core is done with them. Suggested-by: Lukas Wunner Signed-off-by: Manivannan Sadhasivam Reviewed-by: Lukas Wunner --- drivers/pci/remove.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c index efc37fcb73e2..58859f9d92f7 100644 --- a/drivers/pci/remove.c +++ b/drivers/pci/remove.c @@ -41,7 +41,6 @@ static void pci_stop_dev(struct pci_dev *dev) if (!pci_dev_test_and_clear_added(dev)) return; - pci_pwrctrl_unregister(&dev->dev); device_release_driver(&dev->dev); pci_proc_detach_device(dev); pci_remove_sysfs_dev_files(dev); @@ -64,6 +63,7 @@ static void pci_destroy_dev(struct pci_dev *dev) pci_doe_destroy(dev); pcie_aspm_exit_link_state(dev); pci_bridge_d3_update(dev); + pci_pwrctrl_unregister(&dev->dev); pci_free_resources(dev); put_device(&dev->dev); } From patchwork Tue Dec 10 09:55:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13901186 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C0C71DC9BD; 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So document it in the non-vendor prefix list. Signed-off-by: Manivannan Sadhasivam Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index da01616802c7..0539aea6af5a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -18,7 +18,7 @@ patternProperties: # DO NOT ADD NEW PROPERTIES TO THIS LIST "^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*": true "^(keypad|m25p|max8952|max8997|max8998|mpmc),.*": true - "^(pinctrl-single|#pinctrl-single|PowerPC),.*": true + "^(pciclass|pinctrl-single|#pinctrl-single|PowerPC),.*": true "^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*": true "^(simple-audio-card|st-plgpio|st-spics|ts),.*": true From patchwork Tue Dec 10 09:55:27 2024 Content-Type: text/plain; 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Tue, 10 Dec 2024 09:55:55 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Tue, 10 Dec 2024 15:25:27 +0530 Subject: [PATCH 4/4] PCI/pwrctrl: Add pwrctrl driver for PCI Slots Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241210-pci-pwrctrl-slot-v1-4-eae45e488040@linaro.org> References: <20241210-pci-pwrctrl-slot-v1-0-eae45e488040@linaro.org> In-Reply-To: <20241210-pci-pwrctrl-slot-v1-0-eae45e488040@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Qiang Yu , Manivannan Sadhasivam X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4981; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=YiO/Xkyr66zpr8ftXrJsgVMQidcdDYAQ3s8kybejH8U=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnWBAoSZbAO7NaYQtUqGwmqySbRc0IDno/0dpQV ko9F8LAGXSJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ1gQKAAKCRBVnxHm/pHO 9Q/8B/40OUYeHncAGg4SaeSyebHtqnHyoJPGUElGT6EWialymhoBEGsobAx92+JXAzxpOASf4rE c2lxg3v4VY1jcbui5Vdq8sCwn43x2g+ObBVIZe3qoae7GE2cPv5xqfibsLxvAO4e0ozdTx7TiPJ mVwhTMlJLC10JlWeNwn/Nim/85nzOrbbhAr+y5RfjwVaBAa+/Gfb3z4C6aqDM9Tg0XXr31OnWAw /bldwQX0teFk3ZgPt6o0sLzCAnQfhvJbKnT0nVCBotMsfLVYWtvjkC4atbW7iPPNapGSVzajM9l KkBaLkk5QSO88iBcvPSJxZQVbMawc4WiSA1cF72rd/LCXk+t X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam This driver is used to control the power state of the devices attached to the PCI slots. Currently, it controls the voltage rails of the PCI slots defined in the devicetree node of the root port. The voltage rails for PCI slots are documented in the dt-schema: https://github.com/devicetree-org/dt-schema/blob/v2024.11/dtschema/schemas/pci/pci-bus-common.yaml#L153 Since this driver has to work with different kind of slots (x{1/4/8/16} PCIe, Mini PCIe, PCI etc...), the driver is using the of_regulator_bulk_get_all() API to obtain the voltage regulators defined in the DT node, instead of hardcoding them. The DT node of the root port should define the relevant supply properties corresponding to the voltage rails of the PCI slot. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/pwrctrl/Kconfig | 11 ++++++ drivers/pci/pwrctrl/Makefile | 3 ++ drivers/pci/pwrctrl/slot.c | 93 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 107 insertions(+) diff --git a/drivers/pci/pwrctrl/Kconfig b/drivers/pci/pwrctrl/Kconfig index 54589bb2403b..990cab67d413 100644 --- a/drivers/pci/pwrctrl/Kconfig +++ b/drivers/pci/pwrctrl/Kconfig @@ -10,3 +10,14 @@ config PCI_PWRCTL_PWRSEQ tristate select POWER_SEQUENCING select PCI_PWRCTL + +config PCI_PWRCTL_SLOT + tristate "PCI Power Control driver for PCI slots" + select PCI_PWRCTL + help + Say Y here to enable the PCI Power Control driver to control the power + state of PCI slots. + + This is a generic driver that controls the power state of different + PCI slots. The voltage regulators powering the rails of the PCI slots + are expected to be defined in the devicetree node of the PCI bridge. diff --git a/drivers/pci/pwrctrl/Makefile b/drivers/pci/pwrctrl/Makefile index 75c7ce531c7e..ddfb12c5aadf 100644 --- a/drivers/pci/pwrctrl/Makefile +++ b/drivers/pci/pwrctrl/Makefile @@ -4,3 +4,6 @@ obj-$(CONFIG_PCI_PWRCTL) += pci-pwrctrl-core.o pci-pwrctrl-core-y := core.o obj-$(CONFIG_PCI_PWRCTL_PWRSEQ) += pci-pwrctrl-pwrseq.o + +obj-$(CONFIG_PCI_PWRCTL_SLOT) += pci-pwrctl-slot.o +pci-pwrctl-slot-y := slot.o diff --git a/drivers/pci/pwrctrl/slot.c b/drivers/pci/pwrctrl/slot.c new file mode 100644 index 000000000000..18becc144913 --- /dev/null +++ b/drivers/pci/pwrctrl/slot.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include + +struct pci_pwrctrl_slot_data { + struct pci_pwrctrl ctx; + struct regulator_bulk_data *supplies; + int num_supplies; +}; + +static void devm_pci_pwrctrl_slot_power_off(void *data) +{ + struct pci_pwrctrl_slot_data *slot = data; + + regulator_bulk_disable(slot->num_supplies, slot->supplies); + regulator_bulk_free(slot->num_supplies, slot->supplies); +} + +static int pci_pwrctrl_slot_probe(struct platform_device *pdev) +{ + struct pci_pwrctrl_slot_data *slot; + struct device *dev = &pdev->dev; + int ret; + + slot = devm_kzalloc(dev, sizeof(*slot), GFP_KERNEL); + if (!slot) + return -ENOMEM; + + ret = of_regulator_bulk_get_all(dev, dev_of_node(dev), + &slot->supplies); + if (ret < 0) { + dev_err_probe(dev, ret, "Failed to get slot regulators\n"); + return ret; + } + + slot->num_supplies = ret; + ret = regulator_bulk_enable(slot->num_supplies, slot->supplies); + if (ret < 0) { + dev_err_probe(dev, ret, "Failed to enable slot regulators\n"); + goto err_regulator_free; + } + + ret = devm_add_action_or_reset(dev, devm_pci_pwrctrl_slot_power_off, + slot); + if (ret) + goto err_regulator_disable; + + pci_pwrctrl_init(&slot->ctx, dev); + + ret = devm_pci_pwrctrl_device_set_ready(dev, &slot->ctx); + if (ret) + return dev_err_probe(dev, ret, "Failed to register pwrctrl driver\n"); + + return 0; + +err_regulator_disable: + regulator_bulk_disable(slot->num_supplies, slot->supplies); +err_regulator_free: + regulator_bulk_free(slot->num_supplies, slot->supplies); + + return ret; +} + +static const struct of_device_id pci_pwrctrl_slot_of_match[] = { + { + .compatible = "pciclass,0604", + }, + { } +}; +MODULE_DEVICE_TABLE(of, pci_pwrctrl_slot_of_match); + +static struct platform_driver pci_pwrctrl_slot_driver = { + .driver = { + .name = "pci-pwrctrl-slot", + .of_match_table = pci_pwrctrl_slot_of_match, + }, + .probe = pci_pwrctrl_slot_probe, +}; +module_platform_driver(pci_pwrctrl_slot_driver); + +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("Generic PCI Power Control driver for PCI Slots"); +MODULE_LICENSE("GPL");