From patchwork Tue Dec 10 23:35:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13902454 Received: from mail-qv1-f52.google.com (mail-qv1-f52.google.com [209.85.219.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0E4E21129E; Tue, 10 Dec 2024 23:35:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873753; cv=none; b=cax9PgML/H2pIIa0tcNs6aG3CQQZJGqtFqBXogck2k0dLQBriUsmaogLlZQUlYK5hZmrm3fjyE+MBiSkrzRTI9gahC4akfn0VNMHfGcoJqyNhbPDXOT4dbKygYP7EL6p7MGoPzMkYEpJQnBwZVLKnJ7Z6+ZiXzcsmcmmEdjAGd4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873753; c=relaxed/simple; bh=j1nmSz4h9xbZuxtFBuqrqJx2eZckGLAAhtREhszTjdE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RndPmdY925KmajxhuzF0p51+eMFyfQXn8+yMMkvWpicxr01GnTmFVJo1S8qdFSihntMFcZPQ/XPvfoHh0Xli42LWy3X2qMw9Hr36EwRa5/D4AV1cRbgSu7LMtGPXbmF3Yl4nHIQySBsWH/5Gr8/j43E6TB3j4HHHLwVsS0sJYIQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TqHLYepl; arc=none smtp.client-ip=209.85.219.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TqHLYepl" Received: by mail-qv1-f52.google.com with SMTP id 6a1803df08f44-6d8adbda583so69017556d6.0; Tue, 10 Dec 2024 15:35:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733873750; x=1734478550; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LumiF4eO+NG7cdcWuV/5Rou+YqcDG+HnDje6/Mwwnx4=; b=TqHLYepl96Hapo4hdpKv2/ANiLUa8ZXvt0M0nnYz52Nsz+H8r9QMQZv13xkCvRx+Dh lCrqS8938oUFbbPXIgsBslirCuHCmE+FZCcVLEEPaVCDkjAcf8oqZgVuoB9IHbhAvURP 86xLIAIHkF9ArP16wiQKucGHoRPJpUA/Rbxf+2RHhudzWIgDZ9zi7Usm9u/hlFtTwudK liGYPPhImILAq1/dDDDZpkFkXG4N1Iop0mXapAVdM8FSuBjOVLH474DmHxYRAmWNga98 ExW8rfUXPNCQjGwUreZ/IsGfvs5piQFl5r6gnLN46gl/WVQCpy/Vw/BGVwuNuf5GgO2O eu8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733873750; x=1734478550; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LumiF4eO+NG7cdcWuV/5Rou+YqcDG+HnDje6/Mwwnx4=; b=qKKd79mjyEgDEdZGEYC3XTuBZvLkpEzWYWZj2002ZzQC8AbJFs3MDWTdNdGwARb3rh dU7H4KkFn08hivXIYrAEEzbsHS3HrJ91vr4i4C/RWylnYMoJ8b0fkJZOjF5+IUA7bMPW ho6H+O5BIqgmu+7mgvZ4yVqoPiAuiSez2uMrsdZIS9HxKoL3aE93s6CEjwfDJt5Uuh51 HnOmni9cHL3pYLOBesCG+4murmNfwuSPqU+bw0YjeUL3J/e7nRRJVHXDXlnf8sr7ek/+ u+46ts6jlfSZsNtJkemd4MQ/WEyCpb7ypUqkwaSHYM5hVWCg51hYZVSaS/akLycah0FG g42Q== X-Forwarded-Encrypted: i=1; AJvYcCUbBfz8FI8QRRiMyadea7thTVJZ7XewRGpwrDP8SWYEPx/NJzPkHRV+PHlq36tytEE3yqYny+6Sk878@vger.kernel.org, AJvYcCVlBIqx8XSkzbK4VGy69gzrJ3SaCETPReRcMemnhKXejdp2NXq5z8tCiizZi5asYHmj3tmgCvBSbhoxiYs=@vger.kernel.org, AJvYcCVqQv/BCYYTk7CC5rDdEBtdwAJ5hRw/uOzJxdAus9ZhTF6LswF6uTRBdzT4szAaMLiJu/fnDpsPRFm6+iBKoQ==@vger.kernel.org, AJvYcCWq4XJd7uIaYXVn1tCOTCVf/x0v6o0SFRXM2Y/4KKkXTAjZmqxTSLNMg1npH/s9OsRU81j0azhsfTwo@vger.kernel.org X-Gm-Message-State: AOJu0YyL76iojla4300rgqGBsv0BoMel9CmKalgkrBP0tIcnp6X1XD1F eJ/b/PsdlwB+9VofLVmPVLeVA6N+9PRBzR/ETxcmW9Y6zkIewP9f X-Gm-Gg: ASbGncuJwxI9xta+hNaTw54kUR07Out6hwJE9FL+XnrMgen39E8QMgK8zY5A6xbaz+J 5CF3HV00EhzO2ZfXZQp6g1PA8u2dfh9HuJ+43/O/lRrkDi9VE7yPiSNOxpziKz9aM+qbxx0d6Hl RJXwXFFJrNulj8lCtr5KHrNSNu/jDGCEWTLszU6JK8kfBT0nH0C2/Y41kB/JXYUnQR5bXLdbiI7 0s2vEszvjCwU+EkZwHCZ4dsU5XeZ0/O9hfIGnZZwQ== X-Google-Smtp-Source: AGHT+IGh2a2jn62iij3zp2LGdcGLV1AuZP02+mzsylMpP6HrtGNttL3u8FTOzSkzoIvLkGgAREx2Ew== X-Received: by 2002:a05:6214:5190:b0:6d4:4100:75a1 with SMTP id 6a1803df08f44-6d934be0752mr14825996d6.39.1733873750662; Tue, 10 Dec 2024 15:35:50 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::6d3f]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6d930b41334sm6372596d6.21.2024.12.10.15.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 15:35:50 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v7 1/5] dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible Date: Tue, 10 Dec 2024 18:35:36 -0500 Message-ID: <20241210233534.614520-8-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241210233534.614520-7-mailingradian@gmail.com> References: <20241210233534.614520-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clocks on SDM670 and SDM845 have no significant differences that would require a change in the clock controller driver. The only difference is the clock frequency at each level of the power domains, which is not specified in the clock driver. There should still be a compatible specific to the SoC, so add the compatible for SDM670 with the SDM845 compatible as fallback. Link: https://android.googlesource.com/kernel/msm/+/d4dc50c0a9291bd99895d4844f973421c047d267/drivers/clk/qcom/camcc-sdm845.c#2048 Suggested-by: Vladimir Zapolskiy Suggested-by: Konrad Dybcio Link: https://lore.kernel.org/linux-arm-msm/7d26a62b-b898-4737-bd53-f49821e3b471@linaro.org Signed-off-by: Richard Acayan Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,sdm845-camcc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml index 810b852ae371..fa95c3a1ba3a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml @@ -20,7 +20,11 @@ allOf: properties: compatible: - const: qcom,sdm845-camcc + oneOf: + - items: + - const: qcom,sdm670-camcc + - const: qcom,sdm845-camcc + - const: qcom,sdm845-camcc clocks: items: From patchwork Tue Dec 10 23:35:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13902455 Received: from mail-qv1-f53.google.com (mail-qv1-f53.google.com [209.85.219.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8D1021129E; Tue, 10 Dec 2024 23:35:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873756; cv=none; b=YMMHTyOLDMoRUnMQopHpNl63CIyqDdkpTX8NVgKeeRRWJ+WoHi1LpfJPmv4DNvdINEztb+W9xT/sWaBDVJ0w56qx3DOUdwxqU1ngEMtlA22HMFSiNE0M0n91JaE0P75WL9sg+p4uc5J3+U37FvekgaK64sJ+quPjcDN9P721biE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873756; c=relaxed/simple; bh=6eoSohtPLt7o5mhSZsHqU0DPbJowFOpNbZEPWw8ix0s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=utrUvWiWDGadFf9GI5DvfjKJ4CLq+PWh4FlVKOtriL78PD8Pdv2zxaimOzExZbDvofF7/PL0s3pQ0H2fT39JzZOUXiBjLNLMBWNaHR7N2vMwc90tSqb355BFf04FqBL77JHlz/ojKxVHvNmd/6fk4jvql6HUGgQLYY56rDTBhdk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FF9q0scZ; arc=none smtp.client-ip=209.85.219.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FF9q0scZ" Received: by mail-qv1-f53.google.com with SMTP id 6a1803df08f44-6d8f544d227so25510496d6.1; Tue, 10 Dec 2024 15:35:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733873752; x=1734478552; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iVtvsX1VX7OA3FwGU9zRQjPhHjvc9P0ydo96eJR3gGo=; b=FF9q0scZ73Slj1aCxh8cqYxsvdDB6shprP8z4xHUPecRCj08ChL1QS7mRkZQ482Y0c 5Sc/rOWyMK+mYgrzefmJuKXurI8KIlDdIqvtd7jp6bDTOIv4cEQYjP9laVlrggkW/AEf /syjDpbnyY1Bk5zHGDllQxeUBdqErrP+zy+N6nu6EqgNfcnroi74VmwLJoSxiNL2udmJ LjLPyCM3AHmhDJEP+UfbniIQZjuDlIfF/ywWitZTNx7jdkp81gQHrUrXPrw8IJplN+Wo vzNd7n9MEGfspYEs/lYoaVR2Bfwil8Q5ytyUAbMPIyUHnRBrxbQckXp0KK5bxHjaazsr K7rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733873752; x=1734478552; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iVtvsX1VX7OA3FwGU9zRQjPhHjvc9P0ydo96eJR3gGo=; b=knmdmJ0EsHoQ0xy+DXjJS7l0HwDWKJJUkxzYUC1oB+Bz62uEe3XE0r0+ANoZ4cG+5r 3ViYEhdD6OL6QCEdxUzTQJst7lUtB1DtC5diVqcLQivHX3076Byx2yzGH/0yFfNATTMZ suHe69dw2d2X8DpuwpraMQgRuVzU1xwj0tFTCuu4KaYggj83B6tQhQm8Uarqw9rq3f7O T3PejHTt+4VywRyW2zZr+/phDc5ZujoNQjZL5VtCxJkuUXqiKXuMOAmJaKCyLe3aO/yA FpJycLN8+OpHVAteGYHAESBYET+v2/ve+0HBsgGvIfknQsxvQOYAAJYZGVNsPynFc/Xm la/A== X-Forwarded-Encrypted: i=1; AJvYcCVzTFkEWpe/eoQNGqgqengzNqAN/0HGoLOC63tR1is2bmdTBealdHJYaUgTwIe72ui317JM/W2tdrKP@vger.kernel.org, AJvYcCWIabgJcyKBQ38BJvlpkVjP4UMWme6u+c3rSyAFTVBThYvkYke3zYQ5g5keojI5u0NfcqRTMOHwpCby1UI=@vger.kernel.org, AJvYcCXemYw1cFff5xJIwl8dm63SIQZpZqeILhQSxaJKvQx9MvtIzon+8dppAYRN38g1fCg7XuD1XdDDJtNlE9YsOA==@vger.kernel.org, AJvYcCXh1lNNr8Slz4qIThIO5/OV12u42mvrFys3Ie6chAfVEdf28wXzauHX4qyyRyzrLgEqE+dIMTHDZJ/N@vger.kernel.org X-Gm-Message-State: AOJu0Yz1uX+EJ9aXZBac8l3mUtMv71y+x+IQVs8d/X2CCw2KHfII1/17 ByyGhE4/q3XeZnEk6GSZvKztFyB/9AqGBnbFbyDDUoYTz/Kim2UGt+v5dsaT X-Gm-Gg: ASbGncthL2DgOSf3cu9At7grmle5I5WlNle4V50vrwX6SIYXonTTo+94CdFBJAbd6F3 GMzQSBBZ2aQT64GbHos2nSLuC2wyGI0tTYb6PwJCI0IEoCn4zDse7D47pagIk7+5OMys0EsC9s5 3EWe/pDcWQNt5M3tk4r4LnjsOJSFPpDOl4CygLm5TXngP1h5laGtbz3qse6Z15C9pI1HVeQBGUu +yC77RcrUi0jEFr3P+rHEDVNcqaqLLBBw9Xqi3l9Q== X-Google-Smtp-Source: AGHT+IHSC4LbRoXFyWs/OLsmbqI9o7secRuP+kJ/j9y3Siyxrwd9CBx6Ny/2DVpSH+AHxV4XFzXlSA== X-Received: by 2002:a05:6214:2628:b0:6d8:899e:c3bf with SMTP id 6a1803df08f44-6d934b7c98cmr17068446d6.34.1733873752568; Tue, 10 Dec 2024 15:35:52 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::6d3f]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6d8e7883a0dsm55183416d6.45.2024.12.10.15.35.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 15:35:52 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v7 2/5] dt-bindings: media: camss: Add qcom,sdm670-camss Date: Tue, 10 Dec 2024 18:35:37 -0500 Message-ID: <20241210233534.614520-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241210233534.614520-7-mailingradian@gmail.com> References: <20241210233534.614520-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As found in the Pixel 3a, the Snapdragon 670 has a camera subsystem with 3 CSIDs and 3 VFEs (including 1 VFE lite). Add this camera subsystem to the bindings. Adapted from SC8280XP camera subsystem. Signed-off-by: Richard Acayan --- .../bindings/media/qcom,sdm670-camss.yaml | 318 ++++++++++++++++++ 1 file changed, 318 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml new file mode 100644 index 000000000000..7c3636f63add --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -0,0 +1,318 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM670 Camera Subsystem (CAMSS) + +maintainers: + - Richard Acayan + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sdm670-camss + + reg: + maxItems: 9 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + clocks: + maxItems: 22 + + clock-names: + items: + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: vfe0_axi + - const: vfe0 + - const: vfe0_cphy_rx + - const: vfe1_axi + - const: vfe1 + - const: vfe1_cphy_rx + - const: vfe_lite + - const: vfe_lite_cphy_rx + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + iommus: + maxItems: 4 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY0. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY1. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY2. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + +required: + - reg + - reg-names + - clock-names + - clocks + - compatible + - interrupts + - interrupt-names + - iommus + - power-domains + - power-domain-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss@acb3000 { + compatible = "qcom,sdm670-camss"; + + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + vdda-phy-supply = <&vreg_l1a_1p225>; + vdda-pll-supply = <&vreg_l8a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csiphy_ep0: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&front_sensor_ep>; + }; + }; + }; + }; + }; From patchwork Tue Dec 10 23:35:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13902456 Received: from mail-qt1-f180.google.com (mail-qt1-f180.google.com [209.85.160.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 928041F1932; Tue, 10 Dec 2024 23:35:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873757; cv=none; b=JpnQePd22O8092BAUb2h6G07lOa7nWuee+rIdE8WxkuQia6Zf2rJZRwqnmS1eSgIV/Ae5rrkNgpUYic72vs8pfJokOULmVZJ5ZfoDbYmsZVfoacRsYEIe6baqD6ezRJnTUL6YbXcrwClgEsFZN0oZjICEgzRPor8Es3OyoZxOvQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873757; c=relaxed/simple; bh=zpb1PukpUEAT2rRoF32/BvqI9/iIDz2atx+JmRnxKk0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=U9HVS1gEcpm/0a25dkcbcix0aBKEijQLvgCeRpTs1DbtlixHxtSJm4HUkfBUjtEHEVXvYPjKXEC3ubmX/czzrT0w7b3N3QUf8btKiQO15yIbqVubNAF8U4gacEmqbKlBEIkgTW6GRM7ZEUuxEKV0mUT5bNizr/oaAsYy4yQESFw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=NQvPY8LF; arc=none smtp.client-ip=209.85.160.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NQvPY8LF" Received: by mail-qt1-f180.google.com with SMTP id d75a77b69052e-4678afeb133so329101cf.0; Tue, 10 Dec 2024 15:35:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733873754; x=1734478554; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bBXhqjzZSTDhZeWofLNy730iza/n5rBi0iwRihxEpGg=; b=NQvPY8LFwyDZ6W5iAIx3spcRqrhluG/F2VLoo7wt9DVFp/2OyIhsikCOiX42WneZBY r8qGsfY0IpjACM9XXtGiulKO8DMcdCTCBIa365B/P0vkqg8rUvIPGXTDJgpvo/UPz0BF dWYJFcGGetjMNMBhgGim5hBUT/B1J2mGTnPPnM+eXW7LKU8+ZUPVfevk2Ts2sSXr/UH5 W+yirnkmpjUpOjkRX6JdS4ZzQEgmZHHCHTaHDLestAd0ctBJnPsUrEHFIE8eiJAOGEZN 71cRzwhQYdIPTwTkrPJH6X5Vw7P1xsBa3QiOSfCG5Gs0L/jpPl9T3DP8M4+WgW1tenNn 8QuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733873754; x=1734478554; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bBXhqjzZSTDhZeWofLNy730iza/n5rBi0iwRihxEpGg=; b=DTPzuFUAAAGauo1vcsjjWkvsjoXpZ5CquzMzN9EUD0iM+ilYFA6yEK7h5p1hVoc4c1 5ICVqwpsvT3bJ4kBjwzNhQMRpBrn3vs1fl4MpTiBuqr7/k7j8Xw3XSdtPDWy//B0/aM0 /9Ilo/+DBbQa7GwkUpeOqUtuu2ChvACpSWLuLmh6KiAhgrgzy4bK3Oir1uJ5jGzIY2ya tv7bHup8kWu7HCrAN7NttRvfgVfHHjU+uPVGn1rQFwtb1MOpueFaIsQ+E63B2q55aPY4 lJj9+sowzaySSCP/tMksaDJ00aElYqgIJlzRwpGtov468UUba8cx8em3KDMXABMRcxXp T6Gg== X-Forwarded-Encrypted: i=1; AJvYcCUzMBJblqaZg0f8GvTQqkBtw63eJIT948mtTOUqyx8gcSB4zEuAxpbRYtsTyQmf2V2qF4jmC1FhR7iV@vger.kernel.org, AJvYcCUzYAgj1MGXyskNLAKsC4dEK7Y3uck8HHSQcC18BeWgYN43dcsPDkuk4DPquKNGnq5s7PRD7ZHAyXS1MG0=@vger.kernel.org, AJvYcCXBeXMSytymulAU6F8PsI9YajMLqo0NuDzqK3Gtjd8RGNT4amyyf+jMJFFIjDqnF2DPEuRFFkY1MfRg@vger.kernel.org, AJvYcCXWdaRisFUaeTco0bZ8UPmt6JhmAf44N5Z+yeUiFz9YhNjPITSmPwq2hV5/C6lIPPj5kSDaSRfKri2VkOtMeg==@vger.kernel.org X-Gm-Message-State: AOJu0YyP3XXgydqWKZSrBCcwed84JaI0005t72/HHjCktGZspZ2IM3Tl TcSKN+XzmIUPsAwQPbV8U1VVKWUXKTwzL+YOMRqp1xx0PPG1sKHM X-Gm-Gg: ASbGncvV3h0duM1YEPLYY1H0ud7NOsmXvRRgAP1ttlYflVpqlyVWTxfaQinEjdNIi2i swH/Wa6QiU3wnMPNCb5hxIM4XamoG7LzPLYsFhb+8WDp87TU79/tmri+VfHuD95ydrQNd30AlST 0qTH90YfdPQKQVerdVxXoNtPl0fgcHyF7fhcwBbVYUtkAyKb6hEeg+SDm0L0dk6tyRJWRDv/vuo iVYolEvcifotJyMUcTtG0pWComeVdivqC2tc2fvGw== X-Google-Smtp-Source: AGHT+IEFZ2nvfhqQGxGE7Tq7fp1+cOhQ836nNcKT+3A0E3FqoIMS2YKWHfeUBaWjUFLwUt0kUAbUiQ== X-Received: by 2002:a05:6214:528e:b0:6d8:b733:47c with SMTP id 6a1803df08f44-6d93531a29cmr10433446d6.22.1733873754540; Tue, 10 Dec 2024 15:35:54 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::6d3f]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6d8edb76ce7sm51717786d6.90.2024.12.10.15.35.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 15:35:54 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v7 3/5] media: qcom: camss: add support for SDM670 camss Date: Tue, 10 Dec 2024 18:35:38 -0500 Message-ID: <20241210233534.614520-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241210233534.614520-7-mailingradian@gmail.com> References: <20241210233534.614520-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera subsystem for the SDM670 the same as on SDM845 except with 3 CSIPHY ports instead of 4. Add support for the SDM670 camera subsystem. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Acked-by: Bryan O'Donoghue Reviewed-by: Vladimir Zapolskiy --- drivers/media/platform/qcom/camss/camss.c | 191 ++++++++++++++++++++++ 1 file changed, 191 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 9fb31f4c18ad..389b49606be0 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -738,6 +738,185 @@ static const struct camss_subdev_resources vfe_res_660[] = { } }; +static const struct camss_subdev_resources csiphy_res_670[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY2 */ + { + .regulators = {}, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + } +}; + +static const struct camss_subdev_resources csid_res_670[] = { + /* CSID0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe0", + "vfe0_cphy_rx", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe1", + "vfe1_cphy_rx", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe_lite", + "vfe_lite_cphy_rx", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + } +}; + +static const struct camss_subdev_resources vfe_res_670[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE-lite */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .is_lite = true, + .line_num = 4, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + } +}; + static const struct camss_subdev_resources csiphy_res_845[] = { /* CSIPHY0 */ { @@ -2582,6 +2761,17 @@ static const struct camss_resources sdm660_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sdm670_resources = { + .version = CAMSS_845, + .csiphy_res = csiphy_res_670, + .csid_res = csid_res_670, + .vfe_res = vfe_res_670, + .csiphy_num = ARRAY_SIZE(csiphy_res_670), + .csid_num = ARRAY_SIZE(csid_res_670), + .vfe_num = ARRAY_SIZE(vfe_res_670), + .link_entities = camss_link_entities +}; + static const struct camss_resources sdm845_resources = { .version = CAMSS_845, .csiphy_res = csiphy_res_845, @@ -2627,6 +2817,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, + { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, From patchwork Tue Dec 10 23:35:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13902457 Received: from mail-qt1-f170.google.com (mail-qt1-f170.google.com [209.85.160.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B96F71F1932; Tue, 10 Dec 2024 23:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873760; cv=none; b=Kys1lQrEcwnjFKFqaNmfAHUWs7EM82oYaghALHm98tLy2GeA0Ih3i3uOXBa0uggM4v1MNXktuO+0rbCEjgK3yi5+bPsuEYJzJd+oB2ZNIyfSzmLxjcQhw3q7d9bq9FCfwRQjI77hQzvOoXDPIuGvkUZnwkg0Wf6omee2FWBj0c4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873760; c=relaxed/simple; bh=cA8ia9gUiiYNXiF6cnwGU5yb3IDiwQmbEW9UlFxwV/c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EfgsBXG9Rw8E3oR/Mm3JFl0S/c/HWNldEIG1ZLv3oQVKleuja0f99Qfe99YJoNCL35suR2iQ4blAtcrsBAQc0KXaEtKtJxRXMVN0RIpqC42nXrTURTo0uSvItxAK77ecWYViKdUNwc2pAx9/ocaZriv1SWW8aOLZgXdo9BxM2UU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=i+XxZ3qn; arc=none smtp.client-ip=209.85.160.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="i+XxZ3qn" Received: by mail-qt1-f170.google.com with SMTP id d75a77b69052e-467745731fdso11140121cf.2; Tue, 10 Dec 2024 15:35:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733873758; x=1734478558; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=riRl3ZaZxwmWu/pRGOcAcSHXuWSTMJ3QmPDQGJ4LbYU=; b=i+XxZ3qnGq+xHW4LhhxBA26Y0OPp8DNrcH5yNsoee+MqIs1FSZ4V7ydO+irw2go+D2 REL6xw1/JuwteYm/oumxRBoAFll3hy3IY2G3jaZqgK9ao8FFjhsOJ03qAftvxguX9zGr Nfi9FAGiEnq0rsAmGCh0PlotQb69Fn47p09IZZaQgEBSFfv1c7ZeLKzBumI++dsPac7+ yU6/INn1gQuSrTM3GcK00eK+qpE/mnOe4TxU27v09gSmsu0c3UAwhGRd3b2v57w2ut8q eI/LFWr9IXp4tnQz1n/YEAoeh2+nkqqvLPner6ptf6drUBxOSpzswsTr7B/JeyqLjTJi q2jQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733873758; x=1734478558; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=riRl3ZaZxwmWu/pRGOcAcSHXuWSTMJ3QmPDQGJ4LbYU=; b=tRjq5a9EbZUPFCL7zZleHYp5GTpM2MiN22/s3o9UFndQTv/ceKAxIZe0tI+so6FFGm vgl4fMDhudYJA9rHf19ID880SRt80iVGbEbpU5kUq/UcyhJxqjH3euD25BgV7g3AQ6H4 yPTj2tg/jnupF0/fI1gWiX5KmeRub6fSbS3zjA1iNray/CGyukGybkfoayBGrqBAw502 G12AMLnh6fKn7MB82/mYVisapSv847eZ1eXaL++cxgyrc+y6y/AXEHLXyKzUJuA5Fqk+ ep9dMw1PbijtamP8/qIdnASF/X3uRL4yZiyheWNewLBqlsgmV/58Rv0ioVkqo/54feD3 c/Vw== X-Forwarded-Encrypted: i=1; AJvYcCUKoDlJ/s5bzgU/rTQyKfDcVjxTmLdAEUeLkD5a68hMYC2rvMrzBsgz0Cjo+RpOYWMY4/wx2Bg/US/TKqQ=@vger.kernel.org, AJvYcCUMw5Q9PU+VXE/INgioz6MfP5kNw3lq+xbCZ50Ng8haB/Pb/inoBxLAnnCswBwFGiqKhox8XI1qlM8F5GWflA==@vger.kernel.org, AJvYcCVczVL94DO6Z2EcrtlfnsulVJHrkgtwbmZVwBCcLbRSEo+xvKNF/jSVqD0jmtahvYFAMToN1H9WBgUx@vger.kernel.org, AJvYcCWCwuGOZEpHKvFXu38FTC1xxNvNoJU46EwvK7W83tNDRKRKI2ENApw7YIhp/ZQBzZKiAaeh0L+qKkg3@vger.kernel.org X-Gm-Message-State: AOJu0YzmGO5KNQY4a2jtIs5z4okcwre/z/ss0vtjMDqMtiJifA7+0Fsx MonJJpsizXIl+od1D/b5iB0BgZ6V2bVEuCyVRVhB8rNpgnYoCj3D X-Gm-Gg: ASbGncsg1hq+Dg8ckc0WUw3P7X5cZZwSaBw6C1iA9ZE6fDM3piVpB3oB3fGfPpfBzd8 t0Zr0Y/bMV0kCqiKL95U08Dy6WleHuxmfk+8NYtGUsXfHuKDCYxL7gVoTK2ZCTiDWJnSPXuUx2S 4P4zHhmYuMrLw7RpirBG0T7jW9RAJt9GRklOaCXrbKYQFqTYYQflveGlNX03l6/mSKtQS3KBxqH g0tmyit3uM08XikLjUPQLeHPECaBWjN1p49HKvEXg== X-Google-Smtp-Source: AGHT+IG8bQpXMB4K78RniAOkROkYshe2jwWRSyk3U26ua6C10ZSahucB783jNSOLyRByYNJn/TShcA== X-Received: by 2002:a05:622a:164f:b0:467:7725:8b69 with SMTP id d75a77b69052e-4678939d7c9mr14902961cf.40.1733873757716; Tue, 10 Dec 2024 15:35:57 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::6d3f]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-46782386ef2sm8631871cf.26.2024.12.10.15.35.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 15:35:57 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v7 4/5] arm64: dts: qcom: sdm670: add camcc Date: Tue, 10 Dec 2024 18:35:39 -0500 Message-ID: <20241210233534.614520-11-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241210233534.614520-7-mailingradian@gmail.com> References: <20241210233534.614520-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clock controller on SDM670 controls the clocks that drive the camera subsystem. The clocks are the same as on SDM845. Add the camera clock controller for SDM670. Reviewed-by: Bryan O'Donoghue Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index c93dd06c0b7d..328096b91126 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1400,6 +1400,16 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: display-subsystem@ae00000 { compatible = "qcom,sdm670-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Tue Dec 10 23:35:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13902458 Received: from mail-qv1-f43.google.com (mail-qv1-f43.google.com [209.85.219.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCA14227581; Tue, 10 Dec 2024 23:36:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873762; cv=none; b=bZxK6p25H12wsrjUoeNmP7FLP27M0HqpjTyAVuGS1NwqJ3n71yPmM1A6WTdQT/f8SXmgPCg0tZYGH9oOlBJdwhQyrb2XnW2MmbLP3b5gmTHE1EI8ulokEDkbF69KIUgdjHEZqbQb8Ga/dv8kj69EIgHFqZk2Uy9rvol0AxLqRRg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733873762; c=relaxed/simple; bh=VVKqiqISW/ONQpIkdsvkkK7xVexqVHvQ/scrYExzw7w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IkWwCdjD88Z88XQ+YX+h/EoG1LgsIGYEKgOSpjS3ATfKSVv5I5M1wxn9DZB1crYS8+K+vsvqqhmejrNPdjJIZ96A8Q8g+xBM4ZZVSZjp8ZjDBziRn18mxRHB2jYh9xe2kbH3flB4aqcOXxJ6yUr5O3F9PdDzyX1aMACJDFYOKyE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=fJ05nr0Z; arc=none smtp.client-ip=209.85.219.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fJ05nr0Z" Received: by mail-qv1-f43.google.com with SMTP id 6a1803df08f44-6d8fa32d3d6so46455916d6.2; Tue, 10 Dec 2024 15:36:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1733873759; x=1734478559; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GA9lE8Sp5jyUWZ7a2rWqO2S0lPYRAcCaGaOYmXKfUlo=; b=fJ05nr0ZPcmBjhT6ggB1POLNchl8bKQolOC8sN4YVrLDmb+vXg/JsF5deJozUA+yDV 84pRl1E+6XCVvKTzuGKFA1VaxRa5JfEvhMS+IkljYgjzI6e8f85FpCfRQNMaCS+Eow67 rDyhOCs0kHvB31XdX6IKTviYsUUJDW4BRIp1h7Fvo1QasptQx3/44ad3y6btVSqKUiyp tBT5s/+bb2ssaXQr+SHiOmVIH34/fASW8iCkOsfOo4G1UD3W0dKnv+kreDe0zMMCKDYb U5teJQdUz2gB3UEERpHsmgVDdirLTgHr99RXeXJIasUEaYld/SIZ+VXCosi4n9uO4LUL l7oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733873759; x=1734478559; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GA9lE8Sp5jyUWZ7a2rWqO2S0lPYRAcCaGaOYmXKfUlo=; b=caCqQxwZVt41dYoplZQRzXgKuX9qMdsZDC4DXIylAouoCKkema0OTdRIGCjh0Lt3XN dJ9UgNUV937N64dnmHAp+8te0CyteUG0I/R8vxi0V7kFeROiXrFBgDXrNP+6wLszasr8 FowSqAmS28aLouaVmqK+2hzoZDLmpPxOLdk+azNQnyiSa8z75iQ4uny3LE/OWFYtXaah 8XIL4Lp9ZEIj1fZMjGLWm8q98EdjnxWUIRu6nrNYQUvAiWPdWlruYDA8ahU+wsyEcar5 sYjJuf105Dh+ULfhtFifF3hq2q0bHeAML5j4Aqzs03XlNU9myqXtkpra0ZpgNXvhhc9Y 9W6A== X-Forwarded-Encrypted: i=1; AJvYcCVIjcaEGUmOqWImtnPnNyDL4oKqlAKK2BZMWUdDGJE4VoeYSsVQilYoeihn3CUFnH82CYW6zE1MTedG@vger.kernel.org, AJvYcCVvh1c9kAdyo+ti6SJcpnV8rZTdzvtshBij5V/oVTbeALjE562QUrw+zpq4d2KNcdpkZqpekbISc77fiKBMlA==@vger.kernel.org, AJvYcCXIGvJxzpkFHo/lRj3J14t+rIo7QmfU0y4UoVyKsjYtkW9EqF08H0pgUch7/wQsReoASrexoGBpky/Pbzw=@vger.kernel.org, AJvYcCXwFqhQM4BUavJC86G9sZPwoPHA+fzzE1WlPrF4Q2lk7mVVS32jg6W0gxDNlGfhfLpVXEwH3Rt1r35p@vger.kernel.org X-Gm-Message-State: AOJu0Yzw9ZJOxfsiUM2pFWPaUnuMdiPoesAb9UPHHTECAFB9O2w8zNAj lbfzgDc07z1gzgNmqSZdc1izJ9O2a+xFa7NWoh8wMUuplabEiwex X-Gm-Gg: ASbGncvNXTgxTLZIavmELQbMOoOmQqYrDvdbPskjvYNF2u1rsAaa6WpFIQ9LPmVlVx9 KURRas7QT1m7gOZ7K/tbDNykATaom5Jp9KDzyYsrA9XInSlqKW2oh4LLrIjRTrcM5L6nlzfKdAc yflFpsIV83rUBRf3ZkC/1Vg9ViYxx6fyI00CAgf3OfQNOn4cqMnkOQnGkDzesK/5RbtiqVTpAQr NMzlT1HGK6xNl5WEiepGYxJukmitHb6wp/W3YKSvg== X-Google-Smtp-Source: AGHT+IGgQ7yYCyHB0Deo33wsSdyGdAgh1ekuW86gzhiFvkQxDzaVAUb/knxXieaEX/BuRXk3T2+iPA== X-Received: by 2002:a05:6214:2527:b0:6d8:a32e:8430 with SMTP id 6a1803df08f44-6d934ad175fmr16140436d6.8.1733873759683; Tue, 10 Dec 2024 15:35:59 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::6d3f]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7b6d1aae961sm292125385a.93.2024.12.10.15.35.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 15:35:59 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v7 5/5] arm64: dts: qcom: sdm670: add camss and cci Date: Tue, 10 Dec 2024 18:35:40 -0500 Message-ID: <20241210233534.614520-12-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241210233534.614520-7-mailingradian@gmail.com> References: <20241210233534.614520-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 670. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 185 +++++++++++++++++++++++++++ 1 file changed, 185 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 328096b91126..aa486602a2db 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2022, Richard Acayan. All rights reserved. */ +#include #include #include #include @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 { gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + qup_i2c0_default: qup-i2c0-default-state { pins = "gpio0", "gpio1"; function = "qup0"; @@ -1400,6 +1429,162 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + cci: cci@ac4a000 { + compatible = "qcom,sdm670-cci", "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + + reg = <0 0x0ac4a000 0 0x4000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_CLK>; + clock-names = "camnoc_axi", + "soc_ahb", + "cpas_ahb", + "cci"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + camss: camera-controller@acb3000 { + compatible = "qcom,sdm670-camss"; + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + camss_port0: port@0 { + reg = <0>; + }; + + camss_port1: port@1 { + reg = <1>; + }; + + camss_port2: port@2 { + reg = <2>; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc"; reg = <0 0x0ad00000 0 0x10000>;