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[93.34.91.161]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3878251dcdesm1041292f8f.104.2024.12.11.03.23.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 03:23:28 -0800 (PST) From: Christian Marangi To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, upstream@airoha.com Cc: Christian Marangi Subject: [PATCH 1/2] dt-bindings: clock: add ID for eMMC for EN7581 Date: Wed, 11 Dec 2024 12:22:37 +0100 Message-ID: <20241211112253.27905-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.2 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add ID for eMMC for EN7581. This is to control clock selection of eMMC between 200MHz and 150MHz. Signed-off-by: Christian Marangi --- include/dt-bindings/clock/en7523-clk.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/en7523-clk.h b/include/dt-bindings/clock/en7523-clk.h index 717d23a5e5ae..78d16068228a 100644 --- a/include/dt-bindings/clock/en7523-clk.h +++ b/include/dt-bindings/clock/en7523-clk.h @@ -11,7 +11,8 @@ #define EN7523_CLK_NPU 5 #define EN7523_CLK_CRYPTO 6 #define EN7523_CLK_PCIE 7 +#define EN7581_CLK_EMMC 8 -#define EN7523_NUM_CLOCKS 8 +#define EN7523_NUM_CLOCKS 9 #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */ From patchwork Wed Dec 11 11:22:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13903374 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E54A237FC2; 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[93.34.91.161]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3878251dcdesm1041292f8f.104.2024.12.11.03.23.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 03:23:29 -0800 (PST) From: Christian Marangi To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, upstream@airoha.com Cc: Christian Marangi Subject: [PATCH 2/2] clk: en7523: Add clock for eMMC for EN7581 Date: Wed, 11 Dec 2024 12:22:38 +0100 Message-ID: <20241211112253.27905-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241211112253.27905-1-ansuelsmth@gmail.com> References: <20241211112253.27905-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add clock for eMMC for EN7581. This is used to give info of the current eMMC source clock and to switch it from 200MHz or 150MHz. Signed-off-by: Christian Marangi --- drivers/clk/clk-en7523.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c index e52c5460e927..a6f870f61a12 100644 --- a/drivers/clk/clk-en7523.c +++ b/drivers/clk/clk-en7523.c @@ -89,6 +89,7 @@ static const u32 npu_base[] = { 333000000, 400000000, 500000000 }; static const u32 emi7581_base[] = { 540000000, 480000000, 400000000, 300000000 }; static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 }; static const u32 crypto_base[] = { 540000000, 480000000 }; +static const u32 emmc_base[] = { 200000000, 150000000 }; static const struct en_clk_desc en7523_base_clks[] = { { @@ -279,6 +280,15 @@ static const struct en_clk_desc en7581_base_clks[] = { .base_shift = 0, .base_values = crypto_base, .n_base_values = ARRAY_SIZE(crypto_base), + }, { + .id = EN7581_CLK_EMMC, + .name = "emmc", + + .base_reg = REG_CRYPTO_CLKSRC2, + .base_bits = 1, + .base_shift = 12, + .base_values = emmc_base, + .n_base_values = ARRAY_SIZE(emmc_base), } };