From patchwork Wed Dec 11 23:53:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13904525 X-Patchwork-Delegate: kuba@kernel.org Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0B0D1F2C48 for ; Wed, 11 Dec 2024 23:53:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961243; cv=none; b=C1T3+wX5o+r25wYgsnXAnlj6+WB878wwaRNJaBewcupDNu15y5d/emIbPUYrG9BZtkUgLFnx8iKGaZ0AStqj8yP6+hoN1d7qgx3aCOYJIY6huSU/uHWqpU2yorisx7q4OK96pkFbGzrc456Hu3ei3j8tdfZLUvMJ7E17sB5kLDY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961243; c=relaxed/simple; bh=WY+IvHUR29Derdm9oKeGYx8bimB/pfp0kbRzRx+83rA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=skfp7naknRnLmClquktrOXUJDB+KbjSs0+1YUKS2HE4FSz/SN3gQ5PrvQtHlFrJIcm4aIg+eZY16pgtQ/WklNOPLrC2hiHqguH/fZQlyANiLx/Q2lFVGVZdFmPvdKF+mot0XgokfX5l9POx3/QHlfkvSEBBmiW2O+XTvreuLw80= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=UQofo8U5; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="UQofo8U5" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 776042C0308; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1733961231; bh=DJAxn+RsXDMiReO3mHLb5Az66I2HRZTNH/H/T7Kox2w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UQofo8U5AzZBjHKIO2tz8cMs+3iefKQA5Hew2hopSbAS11+hdxsZt8SCmW6NPls/Q qTa8Ls7Lc1IfOgFblfinCLRImd+pRzyy0Q//DNM4DgdhFvc1fEdGLbxtsUDNiwxHvJ j2SpLFO1JPvCwGjYKcIXX2+71Egq77VNYMpTT8xMSo/uJPI3NSHCS44trjuLmxxMjI Ql2W7HTkCNQgVSx10MRlutjIF/5Xhz3LgP99Nl51jazKIeSm6tsqu7Muql/OS3BVuo 8R6Ld34JoivaHBIhaRMhX2er1duV/6dHy2BXmCFyvFk/v/PVmqWz50UT9lTCE6BvoT SkA+6BfkQ3xPA== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 12 Dec 2024 12:53:51 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 225A813EE7B; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 1F82E280493; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de, hkallweit1@gmail.com, linux@armlinux.org.uk, markus.stockhausen@gmx.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH 1/4] dt-bindings: net: Add Realtek MDIO controller Date: Thu, 12 Dec 2024 12:53:39 +1300 Message-ID: <20241211235342.1573926-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> References: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=BNQQr0QG c=1 sm=1 tr=0 ts=675a260f a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=RZcAm9yDv7YA:10 a=gEfo2CItAAAA:8 a=G3VztrOQQWe42Su9FKoA:9 a=3ZKOabzyN94A:10 a=d8afv_qLQQFTBC2_4BOH:22 a=sptkURWiP4Gy88Gu7hUp:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Patchwork-Delegate: kuba@kernel.org Add dtschema for the MDIO controller found in the RTL9300 SoCs. The controller is slightly unusual in that direct MDIO communication is not possible. Instead, the SMI bus and PHY address are associated with a switch port and the port number is used when talking to the PHY. Signed-off-by: Chris Packham --- .../bindings/net/realtek,rtl9301-mdio.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml new file mode 100644 index 000000000000..95ed77ff8dcc --- /dev/null +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL9300 MDIO Controller + +maintainers: + - Chris Packham + +allOf: + - $ref: mdio.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - realtek,rtl9302b-mdio + - realtek,rtl9302c-mdio + - realtek,rtl9303-mdio + - const: realtek,rtl9301-mdio + - const: realtek,rtl9301-mdio + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + reg: + maxItems: 1 + +patternProperties: + '^ethernet-phy(@[a-f0-9]+)?': + type: object + $ref: ethernet-phy.yaml# + + properties: + reg: + description: + The MDIO communication on the RTL9300 is abstracted by the switch. At + the software level communication uses the switch port to address the + PHY with the actual MDIO bus and address having been setup via the + realtek,smi-address property. + + realtek,smi-address: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: SMI interface and address for the connected PHY + items: + - description: SMI interface number associated with the port. + - description: SMI address of the PHY for the port. + + unevaluatedProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + mdio@ca00 { + compatible = "realtek,rtl9301-mdio"; + reg = <0xca00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + realtek,smi-address = <0 1>; + }; + + ethernet-phy@8 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + realtek,smi-address = <1 1>; + }; + }; From patchwork Wed Dec 11 23:53:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13904523 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBC9A1F237F for ; Wed, 11 Dec 2024 23:53:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961241; cv=none; b=KhyWwrH5/+wOvU6sZ6V+BG/cyD9CHaED5pEN+aonuN6Sue81GzEAWG69qfThMEDRNTM+CMxr9/RuwMmiO4aari7qzsBZMyDeCCvqUYBMoP6vdD024P+BYroTYrGEskF8+Zn42vWDsRUFiFwhn9vn5zztaLTAxWt4srAtFR9nnxg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961241; c=relaxed/simple; bh=jiXhH9kxXSn2Nw0H+KTvppAK2X+q60j+e8YmqY9FWOI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=npJEn85OcqKBAzHakTJ4vUYimHfLfjrQDNQbkBxnJAxAT2iis0goLQ17enxN8XsnG8v3oKeVSCAoNafPHyIEY+fN8P8SFX3fpdARWjzgSIwzjWTy3sZJ20eUbZvXBx7ZYuTsseZFvRGnqrAPvBKl80c9f19YocLkvZ3AN23e2bA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=nAleCdE+; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="nAleCdE+" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 85FD32C04D0; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1733961231; bh=YYpbsxw/IWs9rcS8rKosIOXg91vbXIdTiqCuBpMbmaM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nAleCdE+4mBvOqZCsJtD9e/FtImUNu7U1cWCTJCNchoWuu9Jbv8vmmg2J3F/w/m7i JW4sRz2EZXKgQyselHquY9ZP6ArTC8dnbl9UGJYXbZikEaElF2OruttDiGjA/JjGAa b05KIxdckCDOuueCBVrZ8qCCnERYzOR8IcOdMSD153uBMgJdOZP5fy/z5S5dXBf0GH OWbcrgFLl544zQQJI5ORsGcmpGjUUT4RaHyOJLpJx8NokihI0t8ltk+94hOlDkBh8i CGgVD3lO4ZdIND/UF6E9clb9DYhJCXL6A4KC1w1pqnVkPRsmNeGE0QCIAuoW3sfwaL G7GDPiRb9BaUA== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 12 Dec 2024 12:53:51 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 24DEF13EE8E; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 2175A280964; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de, hkallweit1@gmail.com, linux@armlinux.org.uk, markus.stockhausen@gmx.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH 2/4] dt-bindings: mfd: Add MDIO interface to rtl9301-switch Date: Thu, 12 Dec 2024 12:53:40 +1300 Message-ID: <20241211235342.1573926-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> References: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=BNQQr0QG c=1 sm=1 tr=0 ts=675a260f a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=RZcAm9yDv7YA:10 a=0DcZ6JciK6r0_laEW2MA:9 a=3ZKOabzyN94A:10 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat The MDIO controller is part of the switch on the RTL9300 family of devices. Add a $ref to the mfd binding for these devices. Signed-off-by: Chris Packham --- .../bindings/mfd/realtek,rtl9301-switch.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml b/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml index f053303ab1e6..eeb08e7435fa 100644 --- a/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml +++ b/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml @@ -41,6 +41,9 @@ patternProperties: 'i2c@[0-9a-f]+$': $ref: /schemas/i2c/realtek,rtl9301-i2c.yaml# + 'mdio@[0-9a-f]+$': + $ref: /schemas/net/realtek,rtl9301-mdio.yaml# + required: - compatible - reg @@ -110,5 +113,17 @@ examples: }; }; }; + + mdio0: mdio@ca00 { + compatible = "realtek,rtl9301-mdio"; + reg = <0xca00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + reg = <0>; + realtek,smi-address = <0 1>; + }; + }; }; From patchwork Wed Dec 11 23:53:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13904527 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20A011F37AD for ; Wed, 11 Dec 2024 23:53:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961244; cv=none; b=GJqqTPtNLoyFKFGY5g+JPhXsmEsSvjtPbP2JY0rTa0YvqYSGkz2GITW8LDrBdATxRle7yafH3sV9Xvw+pkOdBgI3WX6swSFrNlkcz6OtueeW/0lBjuxvk0lWxLVchm5TTYKZ7CQmpY31aMda5wxB8umTDFECj56GTVHal3EdIAY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961244; c=relaxed/simple; bh=X2QwXuICU5MyEL6GvBw7KYtKAtGLcHp04+RMJqxizyc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BMZxQUgRBFqAYNCTAMk56Ftg3rXxm1U5/vFXJ2svVVOErmpjg78py9oan8TJaYWJHDEzckaDenQ6QCooQDpYJBHr/egy7hfP4G7CrO8Rp/2XrS8rfi5INnYXx4BsxRIriwMTCPbQAfzjQqVG1UlifOfQJBuPOKkyMyowNb+noDg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=ml+1IGmS; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="ml+1IGmS" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 9DBF72C0503; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1733961231; bh=LFjBzM7AnzD+pSilrv3gSaS33LM2nxGB7H/KuZNz+vs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ml+1IGmSMkbv/Xod3+mNvsE7VWxUHGnlrC5XKUmqAy8bnUdgbNFvddBRIFi2ppu4p w7WeSFbr/PsSFapg814Efq3IcMmRS9ayncx8EY+tVmJTJNGUv3LW6ywODtLMkBbg1T rZwiD1mV8gkz3jcXVf8Wyy2Wt8LbEVo0SQRcWRJtmurojZNDDHeB6t718nNWxNq1D/ uPXEi11bOHyJRpxqZxuaHItil5CfgCP2+ynjmQd9c39zXZxk0labe/NAjBK2yBRd1/ muFlUNWlWgs3OKx2kB+p3LO+2ycuK2wiuoprKBkP9Qt8BV4vYOpGMcpDjARlM+Lw4J 4tZ3zQIK794Dg== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 12 Dec 2024 12:53:51 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 288F413EE9B; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 273B12807DF; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de, hkallweit1@gmail.com, linux@armlinux.org.uk, markus.stockhausen@gmx.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH 3/4] mips: dts: realtek: Add MDIO controller Date: Thu, 12 Dec 2024 12:53:41 +1300 Message-ID: <20241211235342.1573926-4-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> References: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=BNQQr0QG c=1 sm=1 tr=0 ts=675a260f a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=RZcAm9yDv7YA:10 a=k4-7ynMye8UXlDNHH0IA:9 a=3ZKOabzyN94A:10 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Add a device tree node for the MDIO controller on the RTL9300 chips. Signed-off-by: Chris Packham --- arch/mips/boot/dts/realtek/rtl930x.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi index 17577457d159..5f74d121ce84 100644 --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi @@ -57,6 +57,14 @@ i2c1: i2c@388 { #size-cells = <0>; status = "disabled"; }; + + mdio0: mdio@ca00 { + compatible = "realtek,rtl9301-mdio"; + reg = <0xca00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; }; From patchwork Wed Dec 11 23:53:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13904526 X-Patchwork-Delegate: kuba@kernel.org Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1AC941F37A0 for ; Wed, 11 Dec 2024 23:54:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961243; cv=none; b=uIqblbpcBh0CWKngFV+raRxr2OCfGOM6h9o3FBkCZj8sSq0SyVpGeqAKo1pIIKkKN8ob3tuars3DsFCtLpZsHi8IUxRvPq0f23S7ff2+h0NbG1Yp7F8EsDmN1g05QYgaMbe+QX5tRVo+RWl8iQwBQkXGAvpd96fvGMvW1dJ2kIw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733961243; c=relaxed/simple; bh=/b64pgqyFjn+0zdYe/fZWQ7lPUA2K5N4MlLwvF597s0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lJP/+cNDOIFL8qGo3GxvL35TXeRNqMYCCXZc7fUahd2+igT+syMuc0pIzygMoIPv1yaVKfPC4oxp9+vvnEvzqsvDIbTh1AVTFSvlOSMgOiD/PFsJCaPSCAlVov8oj8rjyxKyoqHUId2xvJqlNLV5TrfpWqDrie9nQG9JkzraatM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=rBxY97+2; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="rBxY97+2" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id A1EA82C0504; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1733961231; bh=uFYPmlLq5/1jZhh75uLVt+XpKoL3iixWFn64Iqkf8sk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rBxY97+2xBLyQqft6CivvLQZcCnMsTS3lUG7jFHuVZ6PWSVNIgNFqUEArhjzLpHKT nQp0sJ0xT60yY9ZKZY812DwnUf1j+z9SrofxcPmhyFzMhqHLPnjuVsgMgsPh0RDAei y+2I5cvxIw0Mm09ujNG1r2b0Mdp1ZAGTP7hmv48kGGIZ8oyasbiwddGUMQfXGgDzRo HgU8Clez9usPwQjEYB2I5dnsdOdVJuikrwgdNbQXx1yYtL1/ahfq9qgAIdz+2gJ+NE IX9aq55V/ypgieq2g/xOCZj0SBUvJULsL+BuabqdlbgbrNLdI9kWuysE25R9EbS39e QgaZExZ/AAN6g== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 12 Dec 2024 12:53:51 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 2CD2913EE9C; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 2B9702807DF; Thu, 12 Dec 2024 12:53:51 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de, hkallweit1@gmail.com, linux@armlinux.org.uk, markus.stockhausen@gmx.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH 4/4] net: mdio: Add RTL9300 MDIO driver Date: Thu, 12 Dec 2024 12:53:42 +1300 Message-ID: <20241211235342.1573926-5-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> References: <20241211235342.1573926-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=BNQQr0QG c=1 sm=1 tr=0 ts=675a260f a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=RZcAm9yDv7YA:10 a=cUr0DCv8HDOHa6VSQHkA:9 a=3ZKOabzyN94A:10 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Patchwork-Delegate: kuba@kernel.org Add a driver for the MDIO controller on the RTL9300 family of Ethernet switches with integrated SoC. There are 4 physical SMI interfaces on the RTL9300 but access is done using the switch ports so a single MDIO bus is presented to the rest of the system. Signed-off-by: Chris Packham --- drivers/net/mdio/Kconfig | 7 + drivers/net/mdio/Makefile | 1 + drivers/net/mdio/mdio-realtek-rtl.c | 264 ++++++++++++++++++++++++++++ 3 files changed, 272 insertions(+) create mode 100644 drivers/net/mdio/mdio-realtek-rtl.c diff --git a/drivers/net/mdio/Kconfig b/drivers/net/mdio/Kconfig index 4a7a303be2f7..0c6240c4a7e9 100644 --- a/drivers/net/mdio/Kconfig +++ b/drivers/net/mdio/Kconfig @@ -185,6 +185,13 @@ config MDIO_IPQ8064 This driver supports the MDIO interface found in the network interface units of the IPQ8064 SoC +config MDIO_REALTEK_RTL + tristate "Realtek RTL9300 MDIO interface support" + depends on MACH_REALTEK_RTL || COMPILE_TEST + help + This driver supports the MDIO interface found in the Realtek + RTL9300 family of Ethernet switches with integrated SoC. + config MDIO_REGMAP tristate help diff --git a/drivers/net/mdio/Makefile b/drivers/net/mdio/Makefile index 1015f0db4531..2cd8b491f301 100644 --- a/drivers/net/mdio/Makefile +++ b/drivers/net/mdio/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o obj-$(CONFIG_MDIO_MVUSB) += mdio-mvusb.o obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o +obj-$(CONFIG_MDIO_REALTEK_RTL) += mdio-realtek-rtl.o obj-$(CONFIG_MDIO_REGMAP) += mdio-regmap.o obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o obj-$(CONFIG_MDIO_THUNDER) += mdio-thunder.o diff --git a/drivers/net/mdio/mdio-realtek-rtl.c b/drivers/net/mdio/mdio-realtek-rtl.c new file mode 100644 index 000000000000..27d1bc02e1e0 --- /dev/null +++ b/drivers/net/mdio/mdio-realtek-rtl.c @@ -0,0 +1,264 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * MDIO controller for RTL9300 switches with integrated SoC. + * + * The MDIO communication is abstracted by the switch. At the software level + * communication uses the switch port to address the PHY with the actual MDIO + * bus and address having been setup via the realtek,smi-address property. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define SMI_GLB_CTRL 0x000 +#define GLB_CTRL_INTF_SEL(intf) BIT(16 + (intf)) +#define SMI_PORT0_15_POLLING_SEL 0x008 +#define SMI_ACCESS_PHY_CTRL_0 0x170 +#define SMI_ACCESS_PHY_CTRL_1 0x174 +#define PHY_CTRL_RWOP BIT(2) +#define PHY_CTRL_TYPE BIT(1) +#define PHY_CTRL_CMD BIT(0) +#define PHY_CTRL_FAIL BIT(25) +#define SMI_ACCESS_PHY_CTRL_2 0x178 +#define SMI_ACCESS_PHY_CTRL_3 0x17c +#define SMI_PORT0_5_ADDR_CTRL 0x180 + +#define MAX_PORTS 32 +#define MAX_SMI_BUSSES 4 + +struct realtek_mdio_priv { + struct regmap *regmap; + u8 smi_bus[MAX_PORTS]; + u8 smi_addr[MAX_PORTS]; + bool smi_bus_isc45[MAX_SMI_BUSSES]; + u32 reg_base; +}; + +static int realtek_mdio_wait_ready(struct realtek_mdio_priv *priv) +{ + u32 val; + + return regmap_read_poll_timeout(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_1, + val, !(val & PHY_CTRL_CMD), 10, 500); +} + +static int realtek_mdio_read_c45(struct mii_bus *bus, int phy_id, int dev_addr, int regnum) +{ + struct realtek_mdio_priv *priv = bus->priv; + u32 val; + int err; + + err = realtek_mdio_wait_ready(priv); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_2, phy_id << 16); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_3, + dev_addr << 16 | (regnum & 0xffff)); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_1, + PHY_CTRL_TYPE | PHY_CTRL_CMD); + if (err) + return err; + + err = realtek_mdio_wait_ready(priv); + if (err) + return err; + + /* get_phy_c45_ids() will stop the mdio bus scan if we return an error + * here. So even though the SMI controller indicates an error for an + * absent device don't proagate it here. + */ + //if (val & BIT(25)) { + // err = -ENODEV; + // return err; + //} + + err = regmap_read(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_2, &val); + if (err) + return err; + + return val & 0xffff; +} + +static int realtek_mdio_write_c45(struct mii_bus *bus, int phy_id, int dev_addr, + int regnum, u16 value) +{ + struct realtek_mdio_priv *priv = bus->priv; + u32 val; + int err; + + err = realtek_mdio_wait_ready(priv); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_0, BIT(phy_id)); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_2, value << 16); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_3, + dev_addr << 16 | (regnum & 0xffff)); + if (err) + return err; + + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_1, + PHY_CTRL_RWOP | PHY_CTRL_TYPE | PHY_CTRL_CMD); + if (err) + return err; + + err = regmap_read_poll_timeout(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_1, + val, !(val & PHY_CTRL_CMD), 10, 100); + if (err) + return err; + + if (val & PHY_CTRL_FAIL) { + err = -ENXIO; + return err; + } + + return err; +} + +static int realtek_mdiobus_init(struct realtek_mdio_priv *priv) +{ + u32 port_addr[5] = { }; + u32 poll_sel[2] = { 0, 0 }; + u32 glb_ctrl_mask = 0, glb_ctrl_val = 0; + int i, err; + + for (i = 0; i < MAX_PORTS; i++) { + int pos; + + if (priv->smi_bus[i] > 3) + continue; + + pos = (i % 6) * 5; + port_addr[i / 6] |= priv->smi_addr[i] << pos; + + pos = (i % 16) * 2; + poll_sel[i / 16] |= priv->smi_bus[i] << pos; + } + + for (i = 0; i < MAX_SMI_BUSSES; i++) { + if (priv->smi_bus_isc45[i]) { + glb_ctrl_mask |= GLB_CTRL_INTF_SEL(i); + glb_ctrl_val |= GLB_CTRL_INTF_SEL(i); + } + } + + err = regmap_bulk_write(priv->regmap, priv->reg_base + SMI_PORT0_5_ADDR_CTRL, + port_addr, 5); + if (err) + return err; + + err = regmap_bulk_write(priv->regmap, priv->reg_base + SMI_PORT0_15_POLLING_SEL, + poll_sel, 2); + if (err) + return err; + + err = regmap_update_bits(priv->regmap, priv->reg_base + SMI_GLB_CTRL, + glb_ctrl_mask, glb_ctrl_val); + if (err) + return err; + + return 0; +} + +static int realtek_mdiobus_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct realtek_mdio_priv *priv; + struct fwnode_handle *child; + struct mii_bus *bus; + int err; + + bus = devm_mdiobus_alloc_size(dev, sizeof(*priv)); + if (!bus) + return -ENOMEM; + + bus->name = "Reaktek Switch MDIO Bus"; + bus->read_c45 = realtek_mdio_read_c45; + bus->write_c45 = realtek_mdio_write_c45; + bus->parent = dev; + priv = bus->priv; + + priv->regmap = syscon_node_to_regmap(dev->parent->of_node); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + err = device_property_read_u32(dev, "reg", &priv->reg_base); + if (err) + return err; + + snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); + + device_for_each_child_node(dev, child) { + u32 pn, smi_addr[2]; + + err = fwnode_property_read_u32(child, "reg", &pn); + if (err) + return err; + + if (pn > MAX_PORTS) + return dev_err_probe(dev, -EINVAL, "illegal port number %d\n", pn); + + err = fwnode_property_read_u32_array(child, "realtek,smi-address", smi_addr, 2); + if (err) { + smi_addr[0] = 0; + smi_addr[1] = pn; + } + + if (fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45")) + priv->smi_bus_isc45[smi_addr[0]] = true; + + priv->smi_bus[pn] = smi_addr[0]; + priv->smi_addr[pn] = smi_addr[1]; + } + + err = realtek_mdiobus_init(priv); + if (err) + return dev_err_probe(dev, err, "failed to initialise MDIO bus controller\n"); + + err = devm_of_mdiobus_register(dev, bus, dev->of_node); + if (err) + return dev_err_probe(dev, err, "cannot register MDIO bus\n"); + + return 0; +} + +static const struct of_device_id realtek_mdio_ids[] = { + { .compatible = "realtek,rtl9301-mdio" }, + { .compatible = "realtek,rtl9302b-mdio" }, + { .compatible = "realtek,rtl9302c-mdio" }, + { .compatible = "realtek,rtl9303-mdio" }, + {} +}; +MODULE_DEVICE_TABLE(of, realtek_mdio_ids); + +static struct platform_driver rtl9300_mdio_driver = { + .probe = realtek_mdiobus_probe, + .driver = { + .name = "mdio-rtl9300", + .of_match_table = realtek_mdio_ids, + }, +}; + +module_platform_driver(rtl9300_mdio_driver); + +MODULE_DESCRIPTION("RTL9300 MDIO driver"); +MODULE_LICENSE("GPL");