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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-215f8f29bcbsm126158075ad.262.2024.12.12.10.53.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 01/18] exec: Introduce 'user/guest-host.h' header Date: Thu, 12 Dec 2024 19:53:24 +0100 Message-ID: <20241212185341.2857-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Extract all declarations related to 'guest from/to host' address translation to a new "user/guest-host.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/exec/cpu-all.h | 34 +-------------- include/exec/cpu_ldst.h | 47 +-------------------- include/user/guest-host.h | 87 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 79 deletions(-) create mode 100644 include/user/guest-host.h diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 1c40e276728..1c8e0446d06 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -64,39 +64,7 @@ /* MMU memory access macros */ -#if defined(CONFIG_USER_ONLY) -#include "user/abitypes.h" - -/* - * If non-zero, the guest virtual address space is a contiguous subset - * of the host virtual address space, i.e. '-R reserved_va' is in effect - * either from the command-line or by default. The value is the last - * byte of the guest address space e.g. UINT32_MAX. - * - * If zero, the host and guest virtual address spaces are intermingled. - */ -extern unsigned long reserved_va; - -/* - * Limit the guest addresses as best we can. - * - * When not using -R reserved_va, we cannot really limit the guest - * to less address space than the host. For 32-bit guests, this - * acts as a sanity check that we're not giving the guest an address - * that it cannot even represent. For 64-bit guests... the address - * might not be what the real kernel would give, but it is at least - * representable in the guest. - * - * TODO: Improve address allocation to avoid this problem, and to - * avoid setting bits at the top of guest addresses that might need - * to be used for tags. - */ -#define GUEST_ADDR_MAX_ \ - ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \ - UINT32_MAX : ~0ul) -#define GUEST_ADDR_MAX (reserved_va ? : GUEST_ADDR_MAX_) - -#else +#if !defined(CONFIG_USER_ONLY) #include "exec/hwaddr.h" diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index dac12bd8eb3..a26ab49b0b4 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -72,52 +72,7 @@ #include "qemu/int128.h" #if defined(CONFIG_USER_ONLY) - -#include "user/guest-base.h" - -#ifndef TARGET_TAGGED_ADDRESSES -static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) -{ - return x; -} -#endif - -/* All direct uses of g2h and h2g need to go away for usermode softmmu. */ -static inline void *g2h_untagged(abi_ptr x) -{ - return (void *)((uintptr_t)(x) + guest_base); -} - -static inline void *g2h(CPUState *cs, abi_ptr x) -{ - return g2h_untagged(cpu_untagged_addr(cs, x)); -} - -static inline bool guest_addr_valid_untagged(abi_ulong x) -{ - return x <= GUEST_ADDR_MAX; -} - -static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) -{ - return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; -} - -#define h2g_valid(x) \ - (HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS || \ - (uintptr_t)(x) - guest_base <= GUEST_ADDR_MAX) - -#define h2g_nocheck(x) ({ \ - uintptr_t __ret = (uintptr_t)(x) - guest_base; \ - (abi_ptr)__ret; \ -}) - -#define h2g(x) ({ \ - /* Check if given address fits target address space */ \ - assert(h2g_valid(x)); \ - h2g_nocheck(x); \ -}) - +#include "user/guest-host.h" #endif /* CONFIG_USER_ONLY */ uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); diff --git a/include/user/guest-host.h b/include/user/guest-host.h new file mode 100644 index 00000000000..8d2079bbbba --- /dev/null +++ b/include/user/guest-host.h @@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: LGPL-2.1-or-later */ +/* + * guest <-> host helpers. + * + * Copyright (c) 2003 Fabrice Bellard + */ + +#ifndef USER_GUEST_HOST_H +#define USER_GUEST_HOST_H + +#include "user/abitypes.h" +#include "user/guest-base.h" +#include "cpu.h" + +/* + * If non-zero, the guest virtual address space is a contiguous subset + * of the host virtual address space, i.e. '-R reserved_va' is in effect + * either from the command-line or by default. The value is the last + * byte of the guest address space e.g. UINT32_MAX. + * + * If zero, the host and guest virtual address spaces are intermingled. + */ +extern unsigned long reserved_va; + +/* + * Limit the guest addresses as best we can. + * + * When not using -R reserved_va, we cannot really limit the guest + * to less address space than the host. For 32-bit guests, this + * acts as a sanity check that we're not giving the guest an address + * that it cannot even represent. For 64-bit guests... the address + * might not be what the real kernel would give, but it is at least + * representable in the guest. + * + * TODO: Improve address allocation to avoid this problem, and to + * avoid setting bits at the top of guest addresses that might need + * to be used for tags. + */ +#define GUEST_ADDR_MAX_ \ + ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \ + UINT32_MAX : ~0ul) +#define GUEST_ADDR_MAX (reserved_va ? : GUEST_ADDR_MAX_) + +#ifndef TARGET_TAGGED_ADDRESSES +static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) +{ + return x; +} +#endif + +/* All direct uses of g2h and h2g need to go away for usermode softmmu. */ +static inline void *g2h_untagged(abi_ptr x) +{ + return (void *)((uintptr_t)(x) + guest_base); +} + +static inline void *g2h(CPUState *cs, abi_ptr x) +{ + return g2h_untagged(cpu_untagged_addr(cs, x)); +} + +static inline bool guest_addr_valid_untagged(abi_ulong x) +{ + return x <= GUEST_ADDR_MAX; +} + +static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) +{ + return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; +} + +#define h2g_valid(x) \ + (HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS || \ + (uintptr_t)(x) - guest_base <= GUEST_ADDR_MAX) + +#define h2g_nocheck(x) ({ \ + uintptr_t __ret = (uintptr_t)(x) - guest_base; \ + (abi_ptr)__ret; \ +}) + +#define h2g(x) ({ \ + /* Check if given address fits target address space */ \ + assert(h2g_valid(x)); \ + h2g_nocheck(x); \ +}) + +#endif From patchwork Thu Dec 12 18:53:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 053CBE77182 for ; Thu, 12 Dec 2024 18:55:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLoKM-0004eH-AT; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7273beba847sm5963884b3a.174.2024.12.12.10.54.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 02/18] linux-user/aarch64: Include missing 'user/abitypes.h' header Date: Thu, 12 Dec 2024 19:53:25 +0100 Message-ID: <20241212185341.2857-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org arm_set_mte_tcf0() uses the abi_long type which is defined in "user/abitypes.h". Include it in order to avoid when refactoring: In file included from ../../target/arm/gdbstub64.c:28: ../linux-user/aarch64/mte_user_helper.h:30:42: error: unknown type name ‘abi_long’; did you mean ‘u_long’? 30 | void arm_set_mte_tcf0(CPUArchState *env, abi_long value); | ^~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- linux-user/aarch64/mte_user_helper.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/linux-user/aarch64/mte_user_helper.h b/linux-user/aarch64/mte_user_helper.h index 8685e5175a2..0c53abda222 100644 --- a/linux-user/aarch64/mte_user_helper.h +++ b/linux-user/aarch64/mte_user_helper.h @@ -9,6 +9,8 @@ #ifndef AARCH64_MTE_USER_HELPER_H #define AARCH64_MTE USER_HELPER_H +#include "user/abitypes.h" + #ifndef PR_MTE_TCF_SHIFT # define PR_MTE_TCF_SHIFT 1 # define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT) From patchwork Thu Dec 12 18:53:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905866 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0DE70C3DA4A for ; Thu, 12 Dec 2024 18:55:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLoKW-0004gI-AH; Thu, 12 Dec 2024 13:54:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLoKT-0004ez-M7 for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:54:29 -0500 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tLoKS-0006Ys-23 for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:54:29 -0500 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-2161eb95317so9263235ad.1 for ; Thu, 12 Dec 2024 10:54:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734029666; x=1734634466; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HazQIxFPlU3a2oysjMUdZiZcfaWSWluyVNuDTpHIcic=; b=bI3Fxu08aimMMzeMbRWNnaGvT0OYeDXGchKhbBUvHN7YoK0qzzcFcELs6XnGozIx2r GuPGvQ6k4K8IIzbNll7p6tVDRolM8HvXciuP5iEvcfKtZo84JwB3r3bqHvmoPrP4S8Uc Gz26TaEHQzda1J4uvwtxeJq3CoEUHyapfP7VHn4ep242jnP3Jf2MvbyIFHc33VHlyRyg 77ltblWonqTP9/7VcrTF8GEsJ1BKBhiFnfvOya6x+qoFyOaSqL79SPrMzcr2fLTOhTtE lKJeL3BJZrOlc+tpa89Kb8PvYQ7U7YQz64Vg4/66un/oq6wbyySHarz/oQ2qcy4PYjaf ypDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734029666; x=1734634466; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HazQIxFPlU3a2oysjMUdZiZcfaWSWluyVNuDTpHIcic=; b=X7nkZiFkUUJN5YZLQUoSqdUHgg7KlMjg4C0nIdSWD7qRA0tM8hFPPa9LA3gOr8MQRQ UPUm4n8Ht8i1dQDpgrt9LGTw62H5apumURFJ7IURc/+rbXXV8EguIlcaXXywyNWTBOUN mAM5YjEhT9/V/cNLFy6ixx05WB2Wla/G9EHqYeA8mnrIefwPtgyNSPvT7Ze2/juKlJ0W NOB8xcxrV52phIXAK2wakahuc+HPfVr0OhL0hidou7Yz6vgajTbgY+Gw4AGEvYJUnM4A r1m+wa/xtBQIoHmJ14qrX009HUWi157PdOnKH3M02ZA6SfU/tmjQCd2SLRHlJFT/8mKa PkpQ== X-Gm-Message-State: AOJu0YzW8aek+sXbhVRLTdX5lLHdhQo7tgYwtfy8yRDTtwV5OhARb8YP QXeG1YBVfjFnbKaImZrUIL2zmCgs5c1d4P8aczGJ+LVD2iCvmy6JMDuXkcszX8Bub/Dafkigyi1 y X-Gm-Gg: ASbGncv3r1XD+TvK35wEfDAqqCrvSYSJ1Y0j14RmmWeqLEMlA+W7c1BZs1cvyh/1TDP iFmmXxE+TLZ+hLGpiNAjr5Ph4jvUmY0fVjBPeE/6WLc/+vVz7hLJECqPSIRNLDWJIhfiRDKP/Nu sEu000P0+2FZMvKG2D+SX039qhODnJb3jK/At5zt057tjzIr3UizB27PDhcOnp7ce6s4pkM1SPg qGByHLOONF5Z7bpIJ2UgIh+4HcEI4DWswqXx/dN2wjR8e2gqGQKdFtpNb+QYrnM/OoJHsRwYZPo PpsHf95yWpcvUoqb7Gd1ou7SG2hO39g= X-Google-Smtp-Source: AGHT+IF9eQRkoasWzSOsCuqjBjOJchsppkPiVwxtqX7cI2BenpC8dZjjHVxSxItYhkeZG00J1A+63g== X-Received: by 2002:a17:903:1c2:b0:216:1ad2:1d5 with SMTP id d9443c01a7336-21778549cf8mr115840235ad.41.1734029665998; Thu, 12 Dec 2024 10:54:25 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21781ced307sm29179555ad.31.2024.12.12.10.54.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 03/18] include: Include missing 'qemu/clang-tsa.h' header Date: Thu, 12 Dec 2024 19:53:26 +0100 Message-ID: <20241212185341.2857-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The next commit will remove "qemu/clang-tsa.h" of "exec/exec-all.h", however the following files indirectly include it: $ git grep -L qemu/clang-tsa.h $(git grep -wl TSA_NO_TSA) block/create.c include/block/block_int-common.h tests/unit/test-bdrv-drain.c tests/unit/test-block-iothread.c util/qemu-thread-posix.c Explicitly include it so we can process with the removal in the next commit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/block/block_int-common.h | 1 + block/create.c | 1 + tests/unit/test-bdrv-drain.c | 1 + tests/unit/test-block-iothread.c | 1 + util/qemu-thread-posix.c | 1 + 5 files changed, 5 insertions(+) diff --git a/include/block/block_int-common.h b/include/block/block_int-common.h index ebb4e56a503..bb91a0f62fa 100644 --- a/include/block/block_int-common.h +++ b/include/block/block_int-common.h @@ -28,6 +28,7 @@ #include "block/block-common.h" #include "block/block-global-state.h" #include "block/snapshot.h" +#include "qemu/clang-tsa.h" #include "qemu/iov.h" #include "qemu/rcu.h" #include "qemu/stats64.h" diff --git a/block/create.c b/block/create.c index 6b23a216753..72abafb4c12 100644 --- a/block/create.c +++ b/block/create.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "block/block_int.h" +#include "qemu/clang-tsa.h" #include "qemu/job.h" #include "qemu/main-loop.h" #include "qapi/qapi-commands-block-core.h" diff --git a/tests/unit/test-bdrv-drain.c b/tests/unit/test-bdrv-drain.c index 7410e6f3528..98ad89b390c 100644 --- a/tests/unit/test-bdrv-drain.c +++ b/tests/unit/test-bdrv-drain.c @@ -28,6 +28,7 @@ #include "system/block-backend.h" #include "qapi/error.h" #include "qemu/main-loop.h" +#include "qemu/clang-tsa.h" #include "iothread.h" static QemuEvent done_event; diff --git a/tests/unit/test-block-iothread.c b/tests/unit/test-block-iothread.c index 26a6c051758..1de04a8a13d 100644 --- a/tests/unit/test-block-iothread.c +++ b/tests/unit/test-block-iothread.c @@ -29,6 +29,7 @@ #include "system/block-backend.h" #include "qapi/error.h" #include "qapi/qmp/qdict.h" +#include "qemu/clang-tsa.h" #include "qemu/main-loop.h" #include "iothread.h" diff --git a/util/qemu-thread-posix.c b/util/qemu-thread-posix.c index b2e26e21205..6fff4162ac6 100644 --- a/util/qemu-thread-posix.c +++ b/util/qemu-thread-posix.c @@ -17,6 +17,7 @@ #include "qemu-thread-common.h" #include "qemu/tsan.h" #include "qemu/bitmap.h" +#include "qemu/clang-tsa.h" #ifdef CONFIG_PTHREAD_SET_NAME_NP #include From patchwork Thu Dec 12 18:53:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 014C3E7717F for ; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21653b0d4f5sm69493115ad.70.2024.12.12.10.54.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:36 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 04/18] accel/tcg: Declare mmap_[un]lock() in 'exec/page-protection.h' Date: Thu, 12 Dec 2024 19:53:27 +0100 Message-ID: <20241212185341.2857-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Move mmap_lock(), mmap_unlock() declarations and the WITH_MMAP_LOCK_GUARD() definition to 'exec/page-protection.h'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/exec/exec-all.h | 17 ----------------- include/exec/page-protection.h | 24 ++++++++++++++++++++++++ accel/tcg/cpu-exec.c | 1 + accel/tcg/translate-all.c | 1 + accel/tcg/watchpoint.c | 1 + linux-user/flatload.c | 1 + target/arm/helper.c | 1 + 7 files changed, 29 insertions(+), 17 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 2e4c4cc4b46..b5ea607cf45 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -27,7 +27,6 @@ #endif #include "exec/mmu-access-type.h" #include "exec/translation-block.h" -#include "qemu/clang-tsa.h" /** * cpu_loop_exit_requested: @@ -520,18 +519,6 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env, } #if defined(CONFIG_USER_ONLY) -void TSA_NO_TSA mmap_lock(void); -void TSA_NO_TSA mmap_unlock(void); -bool have_mmap_lock(void); - -static inline void mmap_unlock_guard(void *unused) -{ - mmap_unlock(); -} - -#define WITH_MMAP_LOCK_GUARD() \ - for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \ - = (mmap_lock(), 0); _mmap_lock_iter == 0; _mmap_lock_iter = 1) /** * adjust_signal_pc: @@ -585,10 +572,6 @@ G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, uintptr_t ra); #else -static inline void mmap_lock(void) {} -static inline void mmap_unlock(void) {} -#define WITH_MMAP_LOCK_GUARD() - void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); diff --git a/include/exec/page-protection.h b/include/exec/page-protection.h index c43231af8b5..bae3355f62c 100644 --- a/include/exec/page-protection.h +++ b/include/exec/page-protection.h @@ -38,4 +38,28 @@ */ #define PAGE_PASSTHROUGH 0x0800 +#ifdef CONFIG_USER_ONLY + +#include "qemu/clang-tsa.h" + +void TSA_NO_TSA mmap_lock(void); +void TSA_NO_TSA mmap_unlock(void); +bool have_mmap_lock(void); + +static inline void mmap_unlock_guard(void *unused) +{ + mmap_unlock(); +} + +#define WITH_MMAP_LOCK_GUARD() \ + for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \ + = (mmap_lock(), 0); _mmap_lock_iter == 0; _mmap_lock_iter = 1) +#else + +static inline void mmap_lock(void) {} +static inline void mmap_unlock(void) {} +#define WITH_MMAP_LOCK_GUARD() + +#endif /* !CONFIG_USER_ONLY */ + #endif diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index c13f4a7cbbf..f82870a1e2a 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -25,6 +25,7 @@ #include "trace.h" #include "disas/disas.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "tcg/tcg.h" #include "qemu/atomic.h" #include "qemu/rcu.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index a8b24be0b96..d586ac9bb1d 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -44,6 +44,7 @@ #endif #include "exec/cputlb.h" +#include "exec/page-protection.h" #include "exec/translate-all.h" #include "exec/translator.h" #include "exec/tb-flush.h" diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index ca641eb95cf..8923301b8b8 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -22,6 +22,7 @@ #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/translate-all.h" +#include "exec/page-protection.h" #include "system/tcg.h" #include "system/replay.h" #include "hw/core/tcg-cpu-ops.h" diff --git a/linux-user/flatload.c b/linux-user/flatload.c index 0e4be5bf44a..d5cb1830ddf 100644 --- a/linux-user/flatload.c +++ b/linux-user/flatload.c @@ -34,6 +34,7 @@ #include "qemu/osdep.h" #include "qemu.h" +#include "exec/page-protection.h" #include "user-internals.h" #include "loader.h" #include "user-mmap.h" diff --git a/target/arm/helper.c b/target/arm/helper.c index 63fe4ba318b..c35cb0f6a54 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -13,6 +13,7 @@ #include "internals.h" #include "cpu-features.h" #include "exec/helper-proto.h" +#include "exec/page-protection.h" #include "qemu/main-loop.h" #include "qemu/timer.h" #include "qemu/bitops.h" From patchwork Thu Dec 12 18:53:28 2024 Content-Type: text/plain; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725ee10f928sm7499833b3a.32.2024.12.12.10.54.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:47 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 05/18] accel/tcg: Use tb_page_addr_t type in page_unprotect() Date: Thu, 12 Dec 2024 19:53:28 +0100 Message-ID: <20241212185341.2857-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Match with the page_protect() prototype, use a tb_page_addr_t argument instead of target_ulong. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/exec/translate-all.h | 2 +- accel/tcg/user-exec.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h index 85c9460c7ca..c50661a05d5 100644 --- a/include/exec/translate-all.h +++ b/include/exec/translate-all.h @@ -27,7 +27,7 @@ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); #ifdef CONFIG_USER_ONLY void page_protect(tb_page_addr_t page_addr); -int page_unprotect(target_ulong address, uintptr_t pc); +int page_unprotect(tb_page_addr_t address, uintptr_t pc); #endif #endif /* TRANSLATE_ALL_H */ diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 06016eb0301..4ed6dd19f30 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -696,7 +696,7 @@ void page_protect(tb_page_addr_t address) * immediately exited. (We can only return 2 if the 'pc' argument is * non-zero.) */ -int page_unprotect(target_ulong address, uintptr_t pc) +int page_unprotect(tb_page_addr_t address, uintptr_t pc) { PageFlagsNode *p; bool current_tb_invalidated; From patchwork Thu Dec 12 18:53:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D76DE77184 for ; Thu, 12 Dec 2024 18:55:15 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLoL2-0005Pt-1E; Thu, 12 Dec 2024 13:55:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLoL0-0005MR-7o for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:55:02 -0500 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tLoKy-0006ah-Gw for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:55:01 -0500 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-2eeb4d643a5so797642a91.3 for ; Thu, 12 Dec 2024 10:55:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734029699; x=1734634499; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wzjyx87cr+skPITGE7mdTMDmXSYN6jRMWc7DyfPZwow=; b=YhHQ769nD7Xxa6qwvZJ4RlhDc+cy/LyLYfkNVNG6EC7S97dUUBXSJ38dcQdnlc3cxC ypkzCsjKUYxQrtiQyDaVJ+HDWXc1HASzTMlaT8euncCCCQq2UhuiO2V79msxhjdoyyhd 1pc8Rpqw7wzvDYsuaSufgCVAKz5eVxdJVB+mWJqb6dUOlBAbhrf/lfXRL33bhESSFQAI wX0Tr30zgJhIo1LvJX4cCrNbMW6d1ia4st2ToHUUBgRa90zl6aadMZT5RX7LXsB8OxoE woIpJ6d5jMNmsssPbsZ6Gky8fbdpjThCad3eI7a+nzomDxOyDvKtF5UKGuv2XKwMQci0 3KKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734029699; x=1734634499; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wzjyx87cr+skPITGE7mdTMDmXSYN6jRMWc7DyfPZwow=; b=sQho6znuCzRm40FxnVaFdraVXkQOrBvVr6xZ5yZx0ik0I0Tm07KIWPN9V+lqK1KFwN SEDwaOkDZwDMzTVj1An7kxFBsfb64qkqie27brq36xN3WIeV9V6HHElOy7b3t7Sje+UB qaYcQp7761voKEUubJvPalUdkxkF074GkIuJH++5MaSp+tGdoII+UxCSFzM9NIPVj2QO MnrAoRet+ERYXQFylV38wGqf3P1zdZJF7fPCKjh1/2IAS370k3WIqIXjc/T8g0sDD85A GKZ8/rTKygEgoLb36ZMHWXZ4pkJX2J3GH13nkPtBaYfH7HPYf1gBpDijNAkw3scNts4v RGnQ== X-Gm-Message-State: AOJu0YxDdGgkm0Kndl0P30+6opZxCwh8hCy+LaKq6lSZV1RcAEpXD/hK PzYTqfOPTx7rYux/UapGLIQQ3Owzg7e6eMF9rWVr4BoVgMR9L11PE0OhCWyDrLOb5bwUrRfnmhP 0 X-Gm-Gg: ASbGnctUd+hFEZbIesjsd8rjwPemQCft0NW/lW9UOKsIfh0OClDRsKnr/D42Uv8JA1t okDoKfif5Htuqr5CIKP85xs9uuiv9CYywWzEgcczS9lD0V2CU7XSZrEXIrp+3unbwmYRV8pXKj0 b0D26t/Z8lhLckg9WRrq/D4GLPLaOALLK5oir8vlqKvQ3eDA0QhpNzNkh4Fu0iDgec4gBU1pSt6 XfFKUgroGUU9HA9u3KrPTlJLt1VlG5CKZdfKIVR3fiC9Dw+rUdIiu6PONka2W0U0OJKSTuESeem mHl+D7sIJeHEsB00eD8HpjoWxhXd/As= X-Google-Smtp-Source: AGHT+IEpGCCOj8kx4DZKiQn/bz1/tnVJbhk9n7xObcFHKKw2JXjOt5CZWWDoG2dnZnO8c2K1b32DMw== X-Received: by 2002:a17:90b:1647:b0:2ee:b2e6:4276 with SMTP id 98e67ed59e1d1-2f12802cf81mr11413213a91.27.1734029698931; Thu, 12 Dec 2024 10:54:58 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f142daeed8sm1740256a91.16.2024.12.12.10.54.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:58 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 06/18] accel/tcg: Move page_[un]protect() to 'user/page-protection.h' Date: Thu, 12 Dec 2024 19:53:29 +0100 Message-ID: <20241212185341.2857-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=philmd@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 1 + include/exec/translate-all.h | 5 ----- include/user/page-protection.h | 20 ++++++++++++++++++++ accel/tcg/user-exec.c | 2 +- linux-user/elfload.c | 2 +- 5 files changed, 23 insertions(+), 7 deletions(-) create mode 100644 include/user/page-protection.h diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index fe109724c68..a03c05315a4 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -37,6 +37,7 @@ void page_table_config_init(void); #endif #ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" /* * For user-only, page_protect sets the page read-only. * Since most execution is already on read-only pages, and we'd need to diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h index c50661a05d5..039668ff8ac 100644 --- a/include/exec/translate-all.h +++ b/include/exec/translate-all.h @@ -25,9 +25,4 @@ /* translate-all.c */ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); -#ifdef CONFIG_USER_ONLY -void page_protect(tb_page_addr_t page_addr); -int page_unprotect(tb_page_addr_t address, uintptr_t pc); -#endif - #endif /* TRANSLATE_ALL_H */ diff --git a/include/user/page-protection.h b/include/user/page-protection.h new file mode 100644 index 00000000000..448c7a03449 --- /dev/null +++ b/include/user/page-protection.h @@ -0,0 +1,20 @@ +/* + * QEMU page protection declarations. + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ +#ifndef USER_PAGE_PROTECTION_H +#define USER_PAGE_PROTECTION_H + +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + +#include "exec/translation-block.h" + +void page_protect(tb_page_addr_t page_addr); +int page_unprotect(tb_page_addr_t address, uintptr_t pc); + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 4ed6dd19f30..636932303bb 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -25,7 +25,7 @@ #include "qemu/rcu.h" #include "exec/cpu_ldst.h" #include "qemu/main-loop.h" -#include "exec/translate-all.h" +#include "user/page-protection.h" #include "exec/page-protection.h" #include "exec/helper-proto.h" #include "qemu/atomic128.h" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 471a384b222..521fdde0aa2 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -3918,7 +3918,7 @@ int load_elf_binary(struct linux_binprm *bprm, struct image_info *info) } #ifdef USE_ELF_CORE_DUMP -#include "exec/translate-all.h" +#include "user/page-protection.h" /* * Definitions to generate Intel SVR4-like core files. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725e9f70dc8sm8283864b3a.64.2024.12.12.10.55.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:55:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 07/18] system: Remove unnecessary 'exec/translate-all.h' include Date: Thu, 12 Dec 2024 19:53:30 +0100 Message-ID: <20241212185341.2857-8-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org At this point "exec/translate-all.h" only declare tb_check_watchpoint(), which isn't used by any of cpu-target.c or system/physmem.c, so remove its inclusion. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- cpu-target.c | 1 - system/physmem.c | 1 - 2 files changed, 2 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 5a7c3290814..4a88f1c6db8 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -41,7 +41,6 @@ #include "exec/cpu-common.h" #include "exec/exec-all.h" #include "exec/tb-flush.h" -#include "exec/translate-all.h" #include "exec/log.h" #include "hw/core/accel-cpu.h" #include "trace/trace-root.h" diff --git a/system/physmem.c b/system/physmem.c index 93c0ff60eb4..0fa6c37c774 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -61,7 +61,6 @@ #include "qemu/rcu_queue.h" #include "qemu/main-loop.h" -#include "exec/translate-all.h" #include "system/replay.h" #include "exec/memory-internal.h" From patchwork Thu Dec 12 18:53:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905871 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BCBCE7717F for ; Thu, 12 Dec 2024 18:55:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLoLi-0006XJ-CU; Thu, 12 Dec 2024 13:55:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLoLP-0006BG-4U for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:55:28 -0500 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tLoLK-0006ni-Lf for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:55:26 -0500 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-21675fd60feso11385765ad.2 for ; Thu, 12 Dec 2024 10:55:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734029721; x=1734634521; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Gpa7MaWk80JbZDJF1tLVqJgKe0L0noYL27xWxmaxilM=; b=jaUeTtWdqnpsXGeVxx3YbQMHiFyy/JVOXfeTC1hjluvcw8XrV6b99W2FNHKGnL0mIa YIXOfiQ0riTeiAZhITXy8sRYN12TxQ+TQxg0O01AOhKrPQqnhH2XunzEzGhdKKj9r6hb HSEqhtt0fFQYwNAp0i64fO0wvuw/hXzXf4rqJqAMgZm8/M1JqCouRyc4Dl2MXOOXji3X VueX/ugkmhe/lBu1keKSNCuwDkASyUPlk+lJklUsNPu3SJQxkUu+IiWXsxCzPMV8PMVt ApFiwImhDJUgEtEqzq0DN5xahWdpAacnJQtt/gzMlrg+otqCEFkexiE2JITj7CySnZMz uNjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734029721; x=1734634521; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gpa7MaWk80JbZDJF1tLVqJgKe0L0noYL27xWxmaxilM=; b=m4WavLunSCP/+d2gby2UFKrn/iLA4CLaRJaK+owUVH6SEVps3EpjwFsa5AATqsKnuS kEz/Z05W1rjNMFQT4CCsPmvDlyGywJShblAKCSSpSGcMfi9suCjIDdaWq8QLWrJDSOLy E+vtyeIDSa04jzQeuoqoCqFmIPNspp2ractG+JH5KC7N12fWqRQp+r/AN6x1s6TBInO2 NcXykvyTXn8RITY+d+6q16Dyql83FzFekP4RDA3xQhOgIJcOxi3lyUSGFW+qtu7Um8wr AEa53UCoqd0/44XjorvapGQcdV94KME82UUuTuYY/goQJg0nc1M8xsWzxZ/SCJwOLDu8 sC/w== X-Gm-Message-State: AOJu0YzhAE3M9lmyjW+5Bm+SEFmtMubTky2oWB2dvH2pIwrOxCXjm/QY m2Z6lH3feL2c6qAtz2chJ0hH5/bpEB+cksPHkN6WRhhobNaNFPoPOfeKZU5VNJUzuj9nUDnmx+v D X-Gm-Gg: ASbGncsyMw89KKgnAzEzJrtQa2TAOdLpEgImPqQsUXVaFd4K9O4Z90X9dI5WmINLtmI PFCa0m930IMZa3RtZ2ibwE06z3nMHXkaDjdxg+dzbzxQThqRk+kC0VTRE510twR2fGOp+zNGlOF yBAwatS5Jpk2FIv1FRnULwCMsYo/CU0ciY1T78pPM6m56cnY8AcsqvXbBjwOIhaIaXL69+RYQaL kcRHLF64H3KjAAsSN7+0qLN7WH/+rbs8Ol49HzG0G5KkGrnItRMCFqYzr7qbbtu/IX3aofOemUk xikbMJ0h+pm+RLOkt3FyT4S/AnA9Cdk= X-Google-Smtp-Source: AGHT+IFB8zxPhJitCrvNVqhB8G2wFOTAWji+InjjbMpKknt1K5wyHmkSCeo5TmD+7ST6E/PHdgbqgw== X-Received: by 2002:a17:902:f648:b0:216:6855:164 with SMTP id d9443c01a7336-2178aeefc23mr74158235ad.39.1734029721067; Thu, 12 Dec 2024 10:55:21 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7fd1570ae4esm11093308a12.43.2024.12.12.10.55.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:55:20 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 08/18] accel/tcg: Move 'exec/translate-all.h' -> 'tb-internal.h' Date: Thu, 12 Dec 2024 19:53:31 +0100 Message-ID: <20241212185341.2857-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=philmd@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org "exec/translate-all.h" is only useful to TCG accelerator, so move it to accel/tcg/, after renaming it 'tb-internal.h'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 2 +- accel/tcg/tb-internal.h | 14 ++++++++++++++ include/exec/translate-all.h | 28 ---------------------------- accel/tcg/cputlb.c | 2 +- accel/tcg/tb-maint.c | 2 +- accel/tcg/translate-all.c | 2 +- accel/tcg/user-exec.c | 1 + accel/tcg/watchpoint.c | 2 +- 8 files changed, 20 insertions(+), 33 deletions(-) create mode 100644 accel/tcg/tb-internal.h delete mode 100644 include/exec/translate-all.h diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index a03c05315a4..6f4ec0bd424 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -10,7 +10,7 @@ #define ACCEL_TCG_INTERNAL_TARGET_H #include "exec/exec-all.h" -#include "exec/translate-all.h" +#include "tb-internal.h" /* * Access to the various translations structures need to be serialised diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h new file mode 100644 index 00000000000..8313f90fd71 --- /dev/null +++ b/accel/tcg/tb-internal.h @@ -0,0 +1,14 @@ +/* + * TranslationBlock internal declarations (target specific) + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H +#define ACCEL_TCG_TB_INTERNAL_TARGET_H + +void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); + +#endif diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h deleted file mode 100644 index 039668ff8ac..00000000000 --- a/include/exec/translate-all.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Translated block handling - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ -#ifndef TRANSLATE_ALL_H -#define TRANSLATE_ALL_H - -#include "exec/exec-all.h" - - -/* translate-all.c */ -void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); - -#endif /* TRANSLATE_ALL_H */ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b76a4eac4e0..451cf13e876 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -37,7 +37,7 @@ #include "exec/helper-proto-common.h" #include "qemu/atomic.h" #include "qemu/atomic128.h" -#include "exec/translate-all.h" +#include "tb-internal.h" #include "trace.h" #include "tb-hash.h" #include "internal-common.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 97d2e39ec0d..bdf5a0b7d58 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -25,7 +25,7 @@ #include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/tb-flush.h" -#include "exec/translate-all.h" +#include "tb-internal.h" #include "system/tcg.h" #include "tcg/tcg.h" #include "tb-hash.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index d586ac9bb1d..bad3fce0ffb 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -45,7 +45,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" -#include "exec/translate-all.h" +#include "tb-internal.h" #include "exec/translator.h" #include "exec/tb-flush.h" #include "qemu/bitmap.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 636932303bb..815a39503f3 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -33,6 +33,7 @@ #include "tcg/tcg-ldst.h" #include "internal-common.h" #include "internal-target.h" +#include "tb-internal.h" __thread uintptr_t helper_retaddr; diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index 8923301b8b8..e24baead562 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -21,8 +21,8 @@ #include "qemu/main-loop.h" #include "qemu/error-report.h" #include "exec/exec-all.h" -#include "exec/translate-all.h" #include "exec/page-protection.h" +#include "tb-internal.h" #include "system/tcg.h" #include "system/replay.h" #include "hw/core/tcg-cpu-ops.h" From patchwork Thu Dec 12 18:53:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24F94E77180 for ; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f142de347esm1620629a91.25.2024.12.12.10.55.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:55:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 09/18] accel/tcg: Un-inline log_pc() Date: Thu, 12 Dec 2024 19:53:32 +0100 Message-ID: <20241212185341.2857-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=philmd@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org log_pc() is only used within cpu-exec.c, no need to expose it via "internal-target.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 10 ---------- accel/tcg/cpu-exec.c | 11 +++++++++++ 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index 6f4ec0bd424..0437d798295 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -72,16 +72,6 @@ G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc); -/* Return the current PC from CPU, which may be cached in TB. */ -static inline vaddr log_pc(CPUState *cpu, const TranslationBlock *tb) -{ - if (tb_cflags(tb) & CF_PCREL) { - return cpu->cc->get_pc(cpu); - } else { - return tb->pc; - } -} - /** * tcg_req_mo: * @type: TCGBar diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index f82870a1e2a..396fa6f4a6b 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -21,6 +21,7 @@ #include "qemu/qemu-print.h" #include "qapi/error.h" #include "qapi/type-helpers.h" +#include "hw/core/cpu.h" #include "hw/core/tcg-cpu-ops.h" #include "trace.h" #include "disas/disas.h" @@ -434,6 +435,16 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env) return tb->tc.ptr; } +/* Return the current PC from CPU, which may be cached in TB. */ +static vaddr log_pc(CPUState *cpu, const TranslationBlock *tb) +{ + if (tb_cflags(tb) & CF_PCREL) { + return cpu->cc->get_pc(cpu); + } else { + return tb->pc; + } +} + /* Execute a TB, and fix up the CPU state afterwards if necessary */ /* * Disable CFI checks. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f142de360fsm1612797a91.27.2024.12.12.10.55.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:55:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 10/18] accel/tcg: Move TranslationBlock declarations to 'tb-internal.h' Date: Thu, 12 Dec 2024 19:53:33 +0100 Message-ID: <20241212185341.2857-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=philmd@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Move declarations related to TranslationBlock out of the generic "internal-target.h" to "tb-internal.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 32 ------------------------------ accel/tcg/tb-internal.h | 39 +++++++++++++++++++++++++++++++++++++ accel/tcg/cpu-exec.c | 1 + accel/tcg/cputlb.c | 1 + accel/tcg/tb-maint.c | 1 + accel/tcg/translate-all.c | 1 + accel/tcg/translator.c | 1 + 7 files changed, 44 insertions(+), 32 deletions(-) diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index 0437d798295..1cfa318dc6c 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -36,42 +36,10 @@ static inline void page_table_config_init(void) { } void page_table_config_init(void); #endif -#ifdef CONFIG_USER_ONLY -#include "user/page-protection.h" -/* - * For user-only, page_protect sets the page read-only. - * Since most execution is already on read-only pages, and we'd need to - * account for other TBs on the same page, defer undoing any page protection - * until we receive the write fault. - */ -static inline void tb_lock_page0(tb_page_addr_t p0) -{ - page_protect(p0); -} - -static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1) -{ - page_protect(p1); -} - -static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { } -static inline void tb_unlock_pages(TranslationBlock *tb) { } -#else -void tb_lock_page0(tb_page_addr_t); -void tb_lock_page1(tb_page_addr_t, tb_page_addr_t); -void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t); -void tb_unlock_pages(TranslationBlock *); -#endif - #ifdef CONFIG_SOFTMMU -void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, - unsigned size, - uintptr_t retaddr); G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ -bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc); - /** * tcg_req_mo: * @type: TCGBar diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h index 8313f90fd71..90be61f296a 100644 --- a/accel/tcg/tb-internal.h +++ b/accel/tcg/tb-internal.h @@ -9,6 +9,45 @@ #ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H #define ACCEL_TCG_TB_INTERNAL_TARGET_H +#include "exec/cpu-all.h" +#include "exec/exec-all.h" +#include "exec/translation-block.h" + +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +/* + * For user-only, page_protect sets the page read-only. + * Since most execution is already on read-only pages, and we'd need to + * account for other TBs on the same page, defer undoing any page protection + * until we receive the write fault. + */ +static inline void tb_lock_page0(tb_page_addr_t p0) +{ + page_protect(p0); +} + +static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1) +{ + page_protect(p1); +} + +static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { } +static inline void tb_unlock_pages(TranslationBlock *tb) { } +#else +void tb_lock_page0(tb_page_addr_t); +void tb_lock_page1(tb_page_addr_t, tb_page_addr_t); +void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t); +void tb_unlock_pages(TranslationBlock *); +#endif + +#ifdef CONFIG_SOFTMMU +void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, + unsigned size, + uintptr_t retaddr); +#endif /* CONFIG_SOFTMMU */ + +bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc); + void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); #endif diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 396fa6f4a6b..e9eaab223f9 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -41,6 +41,7 @@ #include "tb-jmp-cache.h" #include "tb-hash.h" #include "tb-context.h" +#include "tb-internal.h" #include "internal-common.h" #include "internal-target.h" diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 451cf13e876..4f6eebd90ec 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -40,6 +40,7 @@ #include "tb-internal.h" #include "trace.h" #include "tb-hash.h" +#include "tb-internal.h" #include "internal-common.h" #include "internal-target.h" #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index bdf5a0b7d58..8e272cf790f 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -30,6 +30,7 @@ #include "tcg/tcg.h" #include "tb-hash.h" #include "tb-context.h" +#include "tb-internal.h" #include "internal-common.h" #include "internal-target.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index bad3fce0ffb..572a8a87972 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -62,6 +62,7 @@ #include "tb-jmp-cache.h" #include "tb-hash.h" #include "tb-context.h" +#include "tb-internal.h" #include "internal-common.h" #include "internal-target.h" #include "tcg/perf.h" diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index ff5dabc9014..ce5eae4349e 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -19,6 +19,7 @@ #include "tcg/tcg-op-common.h" #include "internal-target.h" #include "disas/disas.h" +#include "tb-internal.h" static void set_can_do_io(DisasContextBase *db, bool val) { From patchwork Thu Dec 12 18:53:34 2024 Content-Type: text/plain; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725da7e0181sm9392168b3a.134.2024.12.12.10.55.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:55:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 11/18] accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (1/4) Date: Thu, 12 Dec 2024 19:53:34 +0100 Message-ID: <20241212185341.2857-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/exec/cpu-all.h | 5 ----- include/user/page-protection.h | 8 ++++++++ bsd-user/main.c | 1 + bsd-user/mmap.c | 1 + linux-user/main.c | 1 + linux-user/mmap.c | 1 + linux-user/syscall.c | 1 + 7 files changed, 13 insertions(+), 5 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 1c8e0446d06..3d97323893b 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -127,11 +127,6 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) #if defined(CONFIG_USER_ONLY) -void page_dump(FILE *f); - -typedef int (*walk_memory_regions_fn)(void *, target_ulong, - target_ulong, unsigned long); -int walk_memory_regions(void *, walk_memory_regions_fn); int page_get_flags(target_ulong address); diff --git a/include/user/page-protection.h b/include/user/page-protection.h index 448c7a03449..ea11cf9e328 100644 --- a/include/user/page-protection.h +++ b/include/user/page-protection.h @@ -12,9 +12,17 @@ #error Cannot include this header from system emulation #endif +#include "cpu-param.h" +#include "exec/target_long.h" #include "exec/translation-block.h" void page_protect(tb_page_addr_t page_addr); int page_unprotect(tb_page_addr_t address, uintptr_t pc); +typedef int (*walk_memory_regions_fn)(void *, target_ulong, + target_ulong, unsigned long); + +int walk_memory_regions(void *, walk_memory_regions_fn); + +void page_dump(FILE *f); #endif diff --git a/bsd-user/main.c b/bsd-user/main.c index 61ca73c4781..0a5bc578365 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -38,6 +38,7 @@ #include "qemu/plugin.h" #include "exec/exec-all.h" #include "user/guest-base.h" +#include "user/page-protection.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c index 775e905960b..346f2cefd32 100644 --- a/bsd-user/mmap.c +++ b/bsd-user/mmap.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" #include "exec/page-protection.h" +#include "user/page-protection.h" #include "qemu.h" diff --git a/linux-user/main.c b/linux-user/main.c index b09af8d4365..06037304cb1 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -39,6 +39,7 @@ #include "qemu/module.h" #include "qemu/plugin.h" #include "user/guest-base.h" +#include "user/page-protection.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" #include "gdbstub/user.h" diff --git a/linux-user/mmap.c b/linux-user/mmap.c index e4bf5d5f39c..4e0444b4cbc 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -22,6 +22,7 @@ #include "exec/log.h" #include "exec/page-protection.h" #include "qemu.h" +#include "user/page-protection.h" #include "user-internals.h" #include "user-mmap.h" #include "target_mman.h" diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 1ce4c79784f..c54b199b6d3 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -135,6 +135,7 @@ #include "signal-common.h" #include "loader.h" #include "user-mmap.h" +#include "user/page-protection.h" #include "user/safe-syscall.h" #include "qemu/guest-random.h" #include "qemu/selfmap.h" From patchwork Thu Dec 12 18:53:35 2024 Content-Type: text/plain; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725e62bb302sm8328220b3a.139.2024.12.12.10.56.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:56:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 12/18] accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (2/4) Date: Thu, 12 Dec 2024 19:53:35 +0100 Message-ID: <20241212185341.2857-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- bsd-user/bsd-mem.h | 1 + include/exec/cpu-all.h | 55 -------------------------------- include/user/page-protection.h | 57 ++++++++++++++++++++++++++++++++++ target/arm/tcg/mte_helper.c | 3 ++ 4 files changed, 61 insertions(+), 55 deletions(-) diff --git a/bsd-user/bsd-mem.h b/bsd-user/bsd-mem.h index eef6b222d9e..f5ec0de24ca 100644 --- a/bsd-user/bsd-mem.h +++ b/bsd-user/bsd-mem.h @@ -57,6 +57,7 @@ #include "qemu-bsd.h" #include "exec/page-protection.h" +#include "user/page-protection.h" extern struct bsd_shm_regions bsd_shm_regions[]; extern abi_ulong target_brk; diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 3d97323893b..86cd40020c9 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -130,21 +130,6 @@ extern const TargetPageBits target_page; int page_get_flags(target_ulong address); -/** - * page_set_flags: - * @start: first byte of range - * @last: last byte of range - * @flags: flags to set - * Context: holding mmap lock - * - * Modify the flags of a page and invalidate the code if necessary. - * The flag PAGE_WRITE_ORG is positioned automatically depending - * on PAGE_WRITE. The mmap_lock should already be held. - */ -void page_set_flags(target_ulong start, target_ulong last, int flags); - -void page_reset_target_data(target_ulong start, target_ulong last); - /** * page_check_range * @start: first byte of range @@ -157,46 +142,6 @@ void page_reset_target_data(target_ulong start, target_ulong last); */ bool page_check_range(target_ulong start, target_ulong last, int flags); -/** - * page_check_range_empty: - * @start: first byte of range - * @last: last byte of range - * Context: holding mmap lock - * - * Return true if the entire range [@start, @last] is unmapped. - * The memory lock must be held so that the caller will can ensure - * the result stays true until a new mapping can be installed. - */ -bool page_check_range_empty(target_ulong start, target_ulong last); - -/** - * page_find_range_empty - * @min: first byte of search range - * @max: last byte of search range - * @len: size of the hole required - * @align: alignment of the hole required (power of 2) - * - * If there is a range [x, x+@len) within [@min, @max] such that - * x % @align == 0, then return x. Otherwise return -1. - * The memory lock must be held, as the caller will want to ensure - * the returned range stays empty until a new mapping can be installed. - */ -target_ulong page_find_range_empty(target_ulong min, target_ulong max, - target_ulong len, target_ulong align); - -/** - * page_get_target_data(address) - * @address: guest virtual address - * - * Return TARGET_PAGE_DATA_SIZE bytes of out-of-band data to associate - * with the guest page at @address, allocating it if necessary. The - * caller should already have verified that the address is valid. - * - * The memory will be freed when the guest page is deallocated, - * e.g. with the munmap system call. - */ -void *page_get_target_data(target_ulong address) - __attribute__((returns_nonnull)); #endif CPUArchState *cpu_copy(CPUArchState *env); diff --git a/include/user/page-protection.h b/include/user/page-protection.h index ea11cf9e328..d21fab1aaf9 100644 --- a/include/user/page-protection.h +++ b/include/user/page-protection.h @@ -18,6 +18,63 @@ void page_protect(tb_page_addr_t page_addr); int page_unprotect(tb_page_addr_t address, uintptr_t pc); + +/** + * page_set_flags: + * @start: first byte of range + * @last: last byte of range + * @flags: flags to set + * Context: holding mmap lock + * + * Modify the flags of a page and invalidate the code if necessary. + * The flag PAGE_WRITE_ORG is positioned automatically depending + * on PAGE_WRITE. The mmap_lock should already be held. + */ +void page_set_flags(target_ulong start, target_ulong last, int flags); + +void page_reset_target_data(target_ulong start, target_ulong last); + +/** + * page_check_range_empty: + * @start: first byte of range + * @last: last byte of range + * Context: holding mmap lock + * + * Return true if the entire range [@start, @last] is unmapped. + * The memory lock must be held so that the caller will can ensure + * the result stays true until a new mapping can be installed. + */ +bool page_check_range_empty(target_ulong start, target_ulong last); + +/** + * page_find_range_empty + * @min: first byte of search range + * @max: last byte of search range + * @len: size of the hole required + * @align: alignment of the hole required (power of 2) + * + * If there is a range [x, x+@len) within [@min, @max] such that + * x % @align == 0, then return x. Otherwise return -1. + * The memory lock must be held, as the caller will want to ensure + * the returned range stays empty until a new mapping can be installed. + */ +target_ulong page_find_range_empty(target_ulong min, target_ulong max, + target_ulong len, target_ulong align); + +/** + * page_get_target_data(address) + * @address: guest virtual address + * + * Return TARGET_PAGE_DATA_SIZE bytes of out-of-band data to associate + * with the guest page at @address, allocating it if necessary. The + * caller should already have verified that the address is valid. + * + * The memory will be freed when the guest page is deallocated, + * e.g. with the munmap system call. + */ +__attribute__((returns_nonnull)) +void *page_get_target_data(target_ulong address); + typedef int (*walk_memory_regions_fn)(void *, target_ulong, target_ulong, unsigned long); diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index 9d2ba287eeb..ae037dc9143 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -23,6 +23,9 @@ #include "internals.h" #include "exec/exec-all.h" #include "exec/page-protection.h" +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +#endif #include "exec/ram_addr.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" From patchwork Thu Dec 12 18:53:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AD1EE77182 for ; Thu, 12 Dec 2024 18:56:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLoMR-00022Q-Pb; Thu, 12 Dec 2024 13:56:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLoMM-0001lG-9s for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:56:26 -0500 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tLoMF-0006sT-Nz for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:56:26 -0500 Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-7242f559a9fso1142042b3a.1 for ; Thu, 12 Dec 2024 10:56:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734029777; x=1734634577; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8ZyQqmYchOy//62KNVupcJGjIjPSDBJu9hZW1p798Mo=; b=wW4EZLjpA/XS7xUkXEwiqmNJxjQyDmIL/rBzswpl79RB+XtSHDqIJ+umsj3X2/Fcf1 DZM52W1Z33XTOz1/7T5NSekbjvCli/ybiZ3X5wApSD/dLNnIkJ7xXv0G3RCNtjjQYk21 u4jtqCjcHi+xWvP3HzaE5cRmm0ig3V61sd0lp993pIMuYaX2cA0h9pzwu7LmKfWBrOSP Y/ckwbmLyegt6VBcNVVIu1dRNSDycFk/RZTkOubhcGkwRfAHN9C6YIxyRfFWrbSgit0B dWxGxNsbR/IIm5geFIU5S3FHxqq4OgIs0J/3KBOYXg3yuBrQRa7Z1bWwCsx9Nmsi3ISD 6ItA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734029777; x=1734634577; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8ZyQqmYchOy//62KNVupcJGjIjPSDBJu9hZW1p798Mo=; b=Qxn4SwuW1yTQEt0scZlURI94Ow02ZFVAb7h7L3vkczLZX5GgM3+iLXQ8IzMfb+nh/4 /r+FILx8PlKV2sOKVD2F9VuHQPrFcfNuahGjZ0to4KfM7/syTuGH1KcIQbfsQvvQ1foA HguX65Hsra7cF3TFXnPrCQERLxIwyXmqtLMcZrqzBx3ZcIcuaZ2JX3GCA8aNPTnMIHK9 hVJoTdiUH7A1miOVrsZwIyraXtofPk773yoZaj18ZyuCJazhPTm75PeT2ko7oKwPKHBp euMhcLqgEOv63rLHx2stQRqj7Fx1KuFONVA0qKEDRyAVrxIb0fT9xpUcAovRP5TU1xXO o4/A== X-Gm-Message-State: AOJu0YyLvAcmDvlzuoCVnurhOo323INUcd0MP2cSYHtYnCsZSJ2H0omX 8clobLy/VoR793XBAnDCuMhkySV1pwCA0SeZ4ECbdT3ABFszFa03CCPfE3xtVCJG/jOeQjs8B3I + X-Gm-Gg: ASbGncvDoPEyaBlRAfoGj0jniiR0oYeg8wlzpmsUpqv+oxELjWCCi6UjSRz2uzarHUZ udIDE3f+lbqfzqDkztm6jvtcGaeFjKDntWe3zwmiUiTs7UTJTUyQStNcjhLjjV63J0K+EjBAZO3 LS4o4KNnAJUs7ggnmgMWDJmNI65jDLhJpsLVUvyOrQwSh6bCpy9wFFbIhbfgpqCbt+2BYB1WA0R 45lGvHg+QMg+DaEFixGCX69ffUA77qYxNHqLSB4vrAEIuZfB3ZKWijPdMorFQu55VEQS2pNoa2p JONNScblyAqrRZG+GxWV0Xg0nV7QRJo= X-Google-Smtp-Source: AGHT+IHM57byOq8DidLWbTmPN2WQBgsCoNziLeUwN5Tnn5M4sqXtv1HJMh32t/398Ma0glSbYRgoiw== X-Received: by 2002:a05:6a00:2ea7:b0:725:e309:7110 with SMTP id d2e1a72fcca58-72906980ae5mr1767868b3a.5.1734029777632; Thu, 12 Dec 2024 10:56:17 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72904a0b171sm746922b3a.172.2024.12.12.10.56.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:56:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 13/18] accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (3/4) Date: Thu, 12 Dec 2024 19:53:36 +0100 Message-ID: <20241212185341.2857-14-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- bsd-user/qemu.h | 1 + include/exec/cpu-all.h | 12 ------------ include/user/page-protection.h | 12 ++++++++++++ linux-user/qemu.h | 1 + target/arm/tcg/sve_helper.c | 3 +++ target/hppa/op_helper.c | 3 +++ target/sparc/ldst_helper.c | 3 +++ 7 files changed, 23 insertions(+), 12 deletions(-) diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 3736c417860..04faee459df 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -26,6 +26,7 @@ #include "exec/exec-all.h" #include "user/abitypes.h" +#include "user/page-protection.h" extern char **environ; diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 86cd40020c9..73b11f58abb 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -130,18 +130,6 @@ extern const TargetPageBits target_page; int page_get_flags(target_ulong address); -/** - * page_check_range - * @start: first byte of range - * @len: length of range - * @flags: flags required for each page - * - * Return true if every page in [@start, @start+@len) has @flags set. - * Return false if any page is unmapped. Thus testing flags == 0 is - * equivalent to testing for flags == PAGE_VALID. - */ -bool page_check_range(target_ulong start, target_ulong last, int flags); - #endif CPUArchState *cpu_copy(CPUArchState *env); diff --git a/include/user/page-protection.h b/include/user/page-protection.h index d21fab1aaf9..bdd98a37de1 100644 --- a/include/user/page-protection.h +++ b/include/user/page-protection.h @@ -34,6 +34,18 @@ void page_set_flags(target_ulong start, target_ulong last, int flags); void page_reset_target_data(target_ulong start, target_ulong last); +/** + * page_check_range + * @start: first byte of range + * @len: length of range + * @flags: flags required for each page + * + * Return true if every page in [@start, @start+@len) has @flags set. + * Return false if any page is unmapped. Thus testing flags == 0 is + * equivalent to testing for flags == PAGE_VALID. + */ +bool page_check_range(target_ulong start, target_ulong last, int flags); + /** * page_check_range_empty: * @start: first byte of range diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 67bc81b1499..5f007501518 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -5,6 +5,7 @@ #include "exec/cpu_ldst.h" #include "user/abitypes.h" +#include "user/page-protection.h" #include "syscall_defs.h" #include "target_syscall.h" diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 904296705c6..5a543b8dbc0 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -29,6 +29,9 @@ #include "vec_internal.h" #include "sve_ldst_internal.h" #include "hw/core/tcg-cpu-ops.h" +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +#endif /* Return a value for NZCV as per the ARM PredTest pseudofunction. diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 744325969f5..beb8f88799e 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -25,6 +25,9 @@ #include "exec/cpu_ldst.h" #include "qemu/timer.h" #include "trace.h" +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +#endif G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp) { diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index d92c9f15934..4c54e456553 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -26,6 +26,9 @@ #include "exec/exec-all.h" #include "exec/page-protection.h" #include "exec/cpu_ldst.h" +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +#endif #include "asi.h" //#define DEBUG_MMU From patchwork Thu Dec 12 18:53:37 2024 Content-Type: text/plain; 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/exec/cpu-all.h | 6 ------ include/user/page-protection.h | 2 ++ accel/tcg/tb-maint.c | 3 +++ bsd-user/signal.c | 1 + cpu-target.c | 1 + linux-user/arm/cpu_loop.c | 1 + linux-user/signal.c | 1 + target/arm/tcg/helper-a64.c | 3 +++ target/s390x/tcg/mem_helper.c | 4 +++- 9 files changed, 15 insertions(+), 7 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 73b11f58abb..f7eea33b101 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -126,12 +126,6 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) -#if defined(CONFIG_USER_ONLY) - -int page_get_flags(target_ulong address); - -#endif - CPUArchState *cpu_copy(CPUArchState *env); /* Flags for use in ENV->INTERRUPT_PENDING. diff --git a/include/user/page-protection.h b/include/user/page-protection.h index bdd98a37de1..51daa186480 100644 --- a/include/user/page-protection.h +++ b/include/user/page-protection.h @@ -19,6 +19,8 @@ void page_protect(tb_page_addr_t page_addr); int page_unprotect(tb_page_addr_t address, uintptr_t pc); +int page_get_flags(target_ulong address); + /** * page_set_flags: * @start: first byte of range diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 8e272cf790f..3f1bebf6ab5 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -33,6 +33,9 @@ #include "tb-internal.h" #include "internal-common.h" #include "internal-target.h" +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +#endif /* List iterators for lists of tagged pointers in TranslationBlock. */ diff --git a/bsd-user/signal.c b/bsd-user/signal.c index da49b9bffc1..edbcd461bfa 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -22,6 +22,7 @@ #include "qemu/log.h" #include "qemu.h" #include "exec/page-protection.h" +#include "user/page-protection.h" #include "user/tswap-target.h" #include "gdbstub/user.h" #include "signal-common.h" diff --git a/cpu-target.c b/cpu-target.c index 4a88f1c6db8..69a49202110 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -29,6 +29,7 @@ #include "migration/vmstate.h" #ifdef CONFIG_USER_ONLY #include "qemu.h" +#include "user/page-protection.h" #else #include "hw/core/sysemu-cpu-ops.h" #include "exec/address-spaces.h" diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index ec665862d93..709f718a99d 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -25,6 +25,7 @@ #include "signal-common.h" #include "semihosting/common-semi.h" #include "exec/page-protection.h" +#include "user/page-protection.h" #include "target/arm/syndrome.h" #define get_user_code_u32(x, gaddr, env) \ diff --git a/linux-user/signal.c b/linux-user/signal.c index 9b6d772882d..a191e9b26f2 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -33,6 +33,7 @@ #include "trace.h" #include "signal-common.h" #include "host-signal.h" +#include "user/page-protection.h" #include "user/safe-syscall.h" #include "tcg/tcg.h" diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index 8f42a28d07b..bc144688dd5 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -34,6 +34,9 @@ #include "qemu/atomic128.h" #include "fpu/softfloat.h" #include /* for crc32 */ +#ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" +#endif /* C2.4.7 Multiply and divide */ /* special cases for 0 and LLONG_MIN are mandated by the standard */ diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 0e12dae2aa8..307388e5bd1 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -31,7 +31,9 @@ #include "qemu/int128.h" #include "qemu/atomic128.h" -#if !defined(CONFIG_USER_ONLY) +#if defined(CONFIG_USER_ONLY) +#include "user/page-protection.h" +#else #include "hw/s390x/storage-keys.h" #include "hw/boards.h" #endif From patchwork Thu Dec 12 18:53:38 2024 Content-Type: text/plain; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725e2388d37sm8653945b3a.73.2024.12.12.10.56.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:56:40 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 15/18] user: Forward declare target_cpu_copy_regs structure Date: Thu, 12 Dec 2024 19:53:38 +0100 Message-ID: <20241212185341.2857-16-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- linux-user/cpu_loop-common.h | 5 ++++- linux-user/aarch64/cpu_loop.c | 2 +- linux-user/alpha/cpu_loop.c | 2 +- linux-user/arm/cpu_loop.c | 2 +- linux-user/hexagon/cpu_loop.c | 2 +- linux-user/hppa/cpu_loop.c | 2 +- linux-user/i386/cpu_loop.c | 2 +- linux-user/loongarch64/cpu_loop.c | 2 +- linux-user/m68k/cpu_loop.c | 2 +- linux-user/microblaze/cpu_loop.c | 2 +- linux-user/mips/cpu_loop.c | 2 +- linux-user/openrisc/cpu_loop.c | 2 +- linux-user/ppc/cpu_loop.c | 2 +- linux-user/riscv/cpu_loop.c | 2 +- linux-user/s390x/cpu_loop.c | 2 +- linux-user/sh4/cpu_loop.c | 2 +- linux-user/sparc/cpu_loop.c | 2 +- linux-user/xtensa/cpu_loop.c | 2 +- 18 files changed, 21 insertions(+), 18 deletions(-) diff --git a/linux-user/cpu_loop-common.h b/linux-user/cpu_loop-common.h index e644d2ef909..aca51f53238 100644 --- a/linux-user/cpu_loop-common.h +++ b/linux-user/cpu_loop-common.h @@ -27,5 +27,8 @@ void target_exception_dump(CPUArchState *env, const char *fmt, int code); #define EXCP_DUMP(env, fmt, code) \ target_exception_dump(env, fmt, code) -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs); +typedef struct target_pt_regs target_pt_regs; + +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs); + #endif diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 71cdc8be50c..77f857a8216 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -185,7 +185,7 @@ void cpu_loop(CPUARMState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { ARMCPU *cpu = env_archcpu(env); CPUState *cs = env_cpu(env); diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c index 2ea039aa71f..b5403ed0e46 100644 --- a/linux-user/alpha/cpu_loop.c +++ b/linux-user/alpha/cpu_loop.c @@ -173,7 +173,7 @@ void cpu_loop(CPUAlphaState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 709f718a99d..be1f11022a7 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -513,7 +513,7 @@ void cpu_loop(CPUARMState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { CPUState *cpu = env_cpu(env); TaskState *ts = get_task_state(cpu); diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c index d41159e52ad..a1794470113 100644 --- a/linux-user/hexagon/cpu_loop.c +++ b/linux-user/hexagon/cpu_loop.c @@ -79,7 +79,7 @@ void cpu_loop(CPUHexagonState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { env->gpr[HEX_REG_PC] = regs->sepc; env->gpr[HEX_REG_SP] = regs->sp; diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c index 23b38ff9b28..503a204460e 100644 --- a/linux-user/hppa/cpu_loop.c +++ b/linux-user/hppa/cpu_loop.c @@ -188,7 +188,7 @@ void cpu_loop(CPUHPPAState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; for (i = 1; i < 32; i++) { diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index 7a35215278a..e06aa23de4c 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -331,7 +331,7 @@ static void target_cpu_free(void *obj) g_free(obj); } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { CPUState *cpu = env_cpu(env); bool is64 = (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) != 0; diff --git a/linux-user/loongarch64/cpu_loop.c b/linux-user/loongarch64/cpu_loop.c index 73d7b6796a4..935d5bcf2c8 100644 --- a/linux-user/loongarch64/cpu_loop.c +++ b/linux-user/loongarch64/cpu_loop.c @@ -97,7 +97,7 @@ void cpu_loop(CPULoongArchState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index f79b8e4ab05..69cdce95518 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -92,7 +92,7 @@ void cpu_loop(CPUM68KState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { CPUState *cpu = env_cpu(env); TaskState *ts = get_task_state(cpu); diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index 212e62d0a62..ee4ba768691 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -127,7 +127,7 @@ void cpu_loop(CPUMBState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { env->regs[0] = regs->r0; env->regs[1] = regs->r1; diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 462387a0737..1331a9a2b8d 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -211,7 +211,7 @@ done_syscall: } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { CPUState *cpu = env_cpu(env); TaskState *ts = get_task_state(cpu); diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index a7aa586c8f9..1bf9542d16a 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -83,7 +83,7 @@ void cpu_loop(CPUOpenRISCState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index 02204ad8beb..e168f1ce947 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -378,7 +378,7 @@ void cpu_loop(CPUPPCState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 0af533e186f..a72bc76da3d 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -94,7 +94,7 @@ void cpu_loop(CPURISCVState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { CPUState *cpu = env_cpu(env); TaskState *ts = get_task_state(cpu); diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index 8b7ac2879ef..42e4d24102e 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -180,7 +180,7 @@ void cpu_loop(CPUS390XState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; for (i = 0; i < 16; i++) { diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index c805f9db110..937d9fa265d 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -81,7 +81,7 @@ void cpu_loop(CPUSH4State *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 50424a54df5..58a2464da9f 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -357,7 +357,7 @@ void cpu_loop (CPUSPARCState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; env->pc = regs->pc; diff --git a/linux-user/xtensa/cpu_loop.c b/linux-user/xtensa/cpu_loop.c index d51ce053926..7564e25a966 100644 --- a/linux-user/xtensa/cpu_loop.c +++ b/linux-user/xtensa/cpu_loop.c @@ -238,7 +238,7 @@ void cpu_loop(CPUXtensaState *env) } } -void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) +void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { int i; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21632c4fc62sm89822805ad.194.2024.12.12.10.56.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:56:51 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 16/18] user: Move 'linux-user/cpu_loop-common.h' -> 'user/cpu_loop.h' Date: Thu, 12 Dec 2024 19:53:39 +0100 Message-ID: <20241212185341.2857-17-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org "linux-user/cpu_loop-common.h" is generic enough to be used by bsd-user, so rename it as "user/cpu_loop.h". Mechanical change running: $ sed -i -e 's,cpu_loop-common.h,user/cpu_loop.h,' \ $(git grep -l cpu_loop-common.h) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- linux-user/cpu_loop-common.h => include/user/cpu_loop.h | 4 ++-- linux-user/aarch64/cpu_loop.c | 2 +- linux-user/alpha/cpu_loop.c | 2 +- linux-user/arm/cpu_loop.c | 2 +- linux-user/hexagon/cpu_loop.c | 2 +- linux-user/hppa/cpu_loop.c | 2 +- linux-user/i386/cpu_loop.c | 2 +- linux-user/loongarch64/cpu_loop.c | 2 +- linux-user/m68k/cpu_loop.c | 2 +- linux-user/main.c | 2 +- linux-user/microblaze/cpu_loop.c | 2 +- linux-user/mips/cpu_loop.c | 2 +- linux-user/openrisc/cpu_loop.c | 2 +- linux-user/ppc/cpu_loop.c | 2 +- linux-user/riscv/cpu_loop.c | 2 +- linux-user/s390x/cpu_loop.c | 2 +- linux-user/sh4/cpu_loop.c | 2 +- linux-user/sparc/cpu_loop.c | 2 +- linux-user/syscall.c | 2 +- linux-user/xtensa/cpu_loop.c | 2 +- 20 files changed, 21 insertions(+), 21 deletions(-) rename linux-user/cpu_loop-common.h => include/user/cpu_loop.h (95%) diff --git a/linux-user/cpu_loop-common.h b/include/user/cpu_loop.h similarity index 95% rename from linux-user/cpu_loop-common.h rename to include/user/cpu_loop.h index aca51f53238..8e2df232758 100644 --- a/linux-user/cpu_loop-common.h +++ b/include/user/cpu_loop.h @@ -17,8 +17,8 @@ * along with this program; if not, see . */ -#ifndef CPU_LOOP_COMMON_H -#define CPU_LOOP_COMMON_H +#ifndef USER_CPU_LOOP_H +#define USER_CPU_LOOP_H #include "exec/log.h" #include "special-errno.h" diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 77f857a8216..c5d8a483a3f 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #include "qemu/guest-random.h" #include "semihosting/common-semi.h" diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c index b5403ed0e46..80ad536c5f2 100644 --- a/linux-user/alpha/cpu_loop.c +++ b/linux-user/alpha/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" void cpu_loop(CPUAlphaState *env) diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index be1f11022a7..10d8561f9b9 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -21,7 +21,7 @@ #include "qemu.h" #include "user-internals.h" #include "elf.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #include "semihosting/common-semi.h" #include "exec/page-protection.h" diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c index a1794470113..de70f736367 100644 --- a/linux-user/hexagon/cpu_loop.c +++ b/linux-user/hexagon/cpu_loop.c @@ -21,7 +21,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #include "internal.h" diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c index 503a204460e..890e758cd1c 100644 --- a/linux-user/hppa/cpu_loop.c +++ b/linux-user/hppa/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" static abi_ulong hppa_lws(CPUHPPAState *env) diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index e06aa23de4c..d96d5553faf 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -21,7 +21,7 @@ #include "qemu.h" #include "qemu/timer.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #include "user-mmap.h" diff --git a/linux-user/loongarch64/cpu_loop.c b/linux-user/loongarch64/cpu_loop.c index 935d5bcf2c8..0614d3de224 100644 --- a/linux-user/loongarch64/cpu_loop.c +++ b/linux-user/loongarch64/cpu_loop.c @@ -8,7 +8,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" void cpu_loop(CPULoongArchState *env) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 69cdce95518..5da91b997ae 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" void cpu_loop(CPUM68KState *env) diff --git a/linux-user/main.c b/linux-user/main.c index 06037304cb1..b97634a32dd 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -50,7 +50,7 @@ #include "elf.h" #include "trace/control.h" #include "target_elf.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "crypto/init.h" #include "fd-trans.h" #include "signal-common.h" diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index ee4ba768691..87236c166f2 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" void cpu_loop(CPUMBState *env) diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 1331a9a2b8d..6405806eb02 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #include "elf.h" #include "internal.h" diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index 1bf9542d16a..306b4f8eb43 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" void cpu_loop(CPUOpenRISCState *env) diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index e168f1ce947..2a0efaffcd6 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -21,7 +21,7 @@ #include "qemu.h" #include "qemu/timer.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env) diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index a72bc76da3d..3ac8bbfec1f 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -21,7 +21,7 @@ #include "qemu/error-report.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #include "elf.h" #include "semihosting/common-semi.h" diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index 42e4d24102e..c9124444ed2 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index 937d9fa265d..ee9eff3428a 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" void cpu_loop(CPUSH4State *env) diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 58a2464da9f..68f1e8ecd43 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" #define SPARC64_STACK_BIAS 2047 diff --git a/linux-user/syscall.c b/linux-user/syscall.c index c54b199b6d3..1b335688f12 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -143,7 +143,7 @@ #include "special-errno.h" #include "qapi/error.h" #include "fd-trans.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #ifndef CLONE_IO #define CLONE_IO 0x80000000 /* Clone io context */ diff --git a/linux-user/xtensa/cpu_loop.c b/linux-user/xtensa/cpu_loop.c index 7564e25a966..c0fcf743e70 100644 --- a/linux-user/xtensa/cpu_loop.c +++ b/linux-user/xtensa/cpu_loop.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu.h" #include "user-internals.h" -#include "cpu_loop-common.h" +#include "user/cpu_loop.h" #include "signal-common.h" static void xtensa_rfw(CPUXtensaState *env) From patchwork Thu Dec 12 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725ee10f928sm7501880b3a.32.2024.12.12.10.56.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:57:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 17/18] user: Declare cpu_loop() once in 'user/cpu_loop.h' Date: Thu, 12 Dec 2024 19:53:40 +0100 Message-ID: <20241212185341.2857-18-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Declare cpu_loop() once in "user/cpu_loop.h". bsd-user gets the G_NORETURN attribute. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- bsd-user/qemu.h | 2 +- include/user/cpu_loop.h | 2 ++ linux-user/user-internals.h | 1 - 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 04faee459df..3eaa14f3f56 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -26,6 +26,7 @@ #include "exec/exec-all.h" #include "user/abitypes.h" +#include "user/cpu_loop.h" #include "user/page-protection.h" extern char **environ; @@ -187,7 +188,6 @@ abi_long do_openbsd_syscall(void *cpu_env, int num, abi_long arg1, abi_long arg5, abi_long arg6); void gemu_log(const char *fmt, ...) G_GNUC_PRINTF(1, 2); extern __thread CPUState *thread_cpu; -void cpu_loop(CPUArchState *env); char *target_strerror(int err); int get_osversion(void); void fork_start(void); diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h index 8e2df232758..b0d4704018d 100644 --- a/include/user/cpu_loop.h +++ b/include/user/cpu_loop.h @@ -23,6 +23,8 @@ #include "exec/log.h" #include "special-errno.h" +G_NORETURN void cpu_loop(CPUArchState *env); + void target_exception_dump(CPUArchState *env, const char *fmt, int code); #define EXCP_DUMP(env, fmt, code) \ target_exception_dump(env, fmt, code) diff --git a/linux-user/user-internals.h b/linux-user/user-internals.h index 46ffc093f40..b9b05c1d11f 100644 --- a/linux-user/user-internals.h +++ b/linux-user/user-internals.h @@ -65,7 +65,6 @@ abi_long do_syscall(CPUArchState *cpu_env, int num, abi_long arg1, abi_long arg5, abi_long arg6, abi_long arg7, abi_long arg8); extern __thread CPUState *thread_cpu; -G_NORETURN void cpu_loop(CPUArchState *env); abi_long get_errno(abi_long ret); const char *target_strerror(int err); int get_osversion(void); From patchwork Thu Dec 12 18:53:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13905882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99873E77180 for ; Thu, 12 Dec 2024 18:57:32 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLoNH-0004of-2X; Thu, 12 Dec 2024 13:57:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLoN6-0003T7-5W for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:57:12 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tLoN4-0006wD-4H for qemu-devel@nongnu.org; Thu, 12 Dec 2024 13:57:11 -0500 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-434a736518eso12507085e9.1 for ; Thu, 12 Dec 2024 10:57:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734029828; x=1734634628; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZoaiN8fGbAdoZl91RstCXbOrdj9RzBIlWptTLfxPGQw=; b=HNYLi/szYbPQjuuFSC0A3aRyKVOkuUFuThdF3h2fjqKXs3RzgcTTdq/LrZovOvr2IO ITPSF0Bu381MPFAgZY5R46l42w/E+VWeXVghtpLl3gtdH/TsAofFhAq3LPB2i17HvjuR lS+5atKhZJzfblqjrQ12N7Q1tc31UATJVXJ4sxFUrWORYOqWBlFTaqnPViHt767Gn2mf UwifhWwpF3hLVHybg/ShiaYEnvVLSr3cby/gs+6M3w5i+eaetky+y311lzLqgWAfXkDT sN/OZH4YUVMQn1RRK2JHptNa/HweTl9JLGA0C+m48F0JK4o8CBgR1KrsclG+yAH8ZnD1 VuPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734029828; x=1734634628; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZoaiN8fGbAdoZl91RstCXbOrdj9RzBIlWptTLfxPGQw=; b=oF2jaPECk4zvov8styU2qK2v0peR7z7A8s4DL252jd3HwqRKNJVZshPhcKsk5zTUC9 3S89PdF3xS1GxQ15QdrztAIKEOtmqmbRBfGuqB14TFwWs3MzrckE4ePz6pYHuQX5+7zp wH0IEUpeycha49JGJD0PmRRoHN5rOTS4nMOJxVrK4zHiu80kGIyYzhOwazE0n/rA8tBe Gw+uPjVVrnI55l25W2qknYxPM2lvDq7apEHvmNbyYEBSSAMnIUR0RrNKb7hAZ/gZDtK7 Hff8GlL/WkBjQB7IYWmfY+etr7P1DilbFj8fXDQhIBF6iHez4Fnyu9WTG4HNJAXgqWga Ot5w== X-Gm-Message-State: AOJu0YzIV6E/y7jFUz7fs+qFssHvsXLMZOivC30+vs7i6jY+m+ZSTOxI CxF0SrEFrZ976VvVPzvuGFmaWlwhzE7WCg/NA6BaI23jvcBz/8kBNgy0WpnhIDCTjUKI3dMPoNI 0 X-Gm-Gg: ASbGncsA8LRM+AQ8z79i8LESYsUWU4MDkW7lQK3fnAV9b7RKw3tq+N1y1PhnJFEHE6m lST/3bXwShzzmpGEp4IKptu7cRxfNOkv63P0mbVk/JUbBuZ2EWkHHRNRKNjKghEMUn3af5XoO7y qbPdFdZRAc9b52RbeJ7ehktceMVFfkWyS0xG5LfgRcGFWo5TrIHPmjbuVHdatcLT/pdFGEbmWTW gicyG2anuU6BKz6J+k+/l5AOrQqp0nr0EkyMGPeJhq5I3ZcqRE1vN4Gk7AFIKTUyZFm3YkQlTdP tFPbxhUILC7bW4VvhfwDF+fBEEk8Hxo= X-Google-Smtp-Source: AGHT+IFmtSaV5uAU6WSntpqzBJroIIONvvk3AgSYOZjG4xeSg/NFjpm1g5beMkkHrJjXYGtmleVkTg== X-Received: by 2002:a05:600c:5122:b0:434:f586:7520 with SMTP id 5b1f17b1804b1-4361c393894mr70283425e9.6.1734029827803; Thu, 12 Dec 2024 10:57:07 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436255531dasm24469585e9.8.2024.12.12.10.57.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:57:07 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 18/18] user: Move various declarations out of 'exec/exec-all.h' Date: Thu, 12 Dec 2024 19:53:41 +0100 Message-ID: <20241212185341.2857-19-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Move various declarations related to user emulation from "exec/exec-all.h" to "user/cpu_loop.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/exec/exec-all.h | 55 +------------------------------------ include/user/cpu_loop.h | 54 ++++++++++++++++++++++++++++++++++++ accel/tcg/user-exec.c | 1 + bsd-user/signal.c | 1 + linux-user/signal.c | 1 + target/arm/tcg/mte_helper.c | 1 + 6 files changed, 59 insertions(+), 54 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b5ea607cf45..c4a6ad3af2d 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -22,7 +22,6 @@ #include "cpu.h" #if defined(CONFIG_USER_ONLY) -#include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif #include "exec/mmu-access-type.h" @@ -518,60 +517,8 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env, return get_page_addr_code_hostp(env, addr, NULL); } -#if defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) -/** - * adjust_signal_pc: - * @pc: raw pc from the host signal ucontext_t. - * @is_write: host memory operation was write, or read-modify-write. - * - * Alter @pc as required for unwinding. Return the type of the - * guest memory access -- host reads may be for guest execution. - */ -MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); - -/** - * handle_sigsegv_accerr_write: - * @cpu: the cpu context - * @old_set: the sigset_t from the signal ucontext_t - * @host_pc: the host pc, adjusted for the signal - * @host_addr: the host address of the fault - * - * Return true if the write fault has been handled, and should be re-tried. - */ -bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, - uintptr_t host_pc, abi_ptr guest_addr); - -/** - * cpu_loop_exit_sigsegv: - * @cpu: the cpu context - * @addr: the guest address of the fault - * @access_type: access was read/write/execute - * @maperr: true for invalid page, false for permission fault - * @ra: host pc for unwinding - * - * Use the TCGCPUOps hook to record cpu state, do guest operating system - * specific things to raise SIGSEGV, and jump to the main cpu loop. - */ -G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, - MMUAccessType access_type, - bool maperr, uintptr_t ra); - -/** - * cpu_loop_exit_sigbus: - * @cpu: the cpu context - * @addr: the guest address of the alignment fault - * @access_type: access was read/write/execute - * @ra: host pc for unwinding - * - * Use the TCGCPUOps hook to record cpu state, do guest operating system - * specific things to raise SIGBUS, and jump to the main cpu loop. - */ -G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, - MMUAccessType access_type, - uintptr_t ra); - -#else void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h index b0d4704018d..2f93575e2f4 100644 --- a/include/user/cpu_loop.h +++ b/include/user/cpu_loop.h @@ -20,7 +20,10 @@ #ifndef USER_CPU_LOOP_H #define USER_CPU_LOOP_H +#include "exec/abi_ptr.h" +#include "exec/mmu-access-type.h" #include "exec/log.h" +#include "exec/target_long.h" #include "special-errno.h" G_NORETURN void cpu_loop(CPUArchState *env); @@ -33,4 +36,55 @@ typedef struct target_pt_regs target_pt_regs; void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs); +/** + * adjust_signal_pc: + * @pc: raw pc from the host signal ucontext_t. + * @is_write: host memory operation was write, or read-modify-write. + * + * Alter @pc as required for unwinding. Return the type of the + * guest memory access -- host reads may be for guest execution. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); + +/** + * handle_sigsegv_accerr_write: + * @cpu: the cpu context + * @old_set: the sigset_t from the signal ucontext_t + * @host_pc: the host pc, adjusted for the signal + * @host_addr: the host address of the fault + * + * Return true if the write fault has been handled, and should be re-tried. + */ +bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, + uintptr_t host_pc, abi_ptr guest_addr); + +/** + * cpu_loop_exit_sigsegv: + * @cpu: the cpu context + * @addr: the guest address of the fault + * @access_type: access was read/write/execute + * @maperr: true for invalid page, false for permission fault + * @ra: host pc for unwinding + * + * Use the TCGCPUOps hook to record cpu state, do guest operating system + * specific things to raise SIGSEGV, and jump to the main cpu loop. + */ +G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra); + +/** + * cpu_loop_exit_sigbus: + * @cpu: the cpu context + * @addr: the guest address of the alignment fault + * @access_type: access was read/write/execute + * @ra: host pc for unwinding + * + * Use the TCGCPUOps hook to record cpu state, do guest operating system + * specific things to raise SIGBUS, and jump to the main cpu loop. + */ +G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, + MMUAccessType access_type, + uintptr_t ra); + #endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 815a39503f3..0561c4f6dc7 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -24,6 +24,7 @@ #include "qemu/bitops.h" #include "qemu/rcu.h" #include "exec/cpu_ldst.h" +#include "user/cpu_loop.h" #include "qemu/main-loop.h" #include "user/page-protection.h" #include "exec/page-protection.h" diff --git a/bsd-user/signal.c b/bsd-user/signal.c index edbcd461bfa..b4e1458237a 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu.h" +#include "user/cpu_loop.h" #include "exec/page-protection.h" #include "user/page-protection.h" #include "user/tswap-target.h" diff --git a/linux-user/signal.c b/linux-user/signal.c index a191e9b26f2..087c4d270e4 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -33,6 +33,7 @@ #include "trace.h" #include "signal-common.h" #include "host-signal.h" +#include "user/cpu_loop.h" #include "user/page-protection.h" #include "user/safe-syscall.h" #include "tcg/tcg.h" diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index ae037dc9143..846d659ff77 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -25,6 +25,7 @@ #include "exec/page-protection.h" #ifdef CONFIG_USER_ONLY #include "user/page-protection.h" +#include "user/cpu_loop.h" #endif #include "exec/ram_addr.h" #include "exec/cpu_ldst.h"