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Fri, 13 Dec 2024 09:44:25 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:4eec:e99c:89a6:d7a6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43625717c9fsm55520975e9.44.2024.12.13.09.44.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Dec 2024 09:44:24 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Wim Van Sebroeck , Guenter Roeck , Philipp Zabel , Geert Uytterhoeven , Rob Herring , linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [RFC PATCH] watchdog: rzv2h_wdt: Add support to retrieve the bootstatus information Date: Fri, 13 Dec 2024 17:44:19 +0000 Message-ID: <20241213174419.908525-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar On the RZ/V2H(P) SoC we can determine if the current boot is due to `Power-on-Reset` or due to the `Watchdog`. The information used to determine this is present on the CPG block. The CPG_ERROR_RSTm(m = 2 -8 ) registers are set in response to an error interrupt causing an reset. CPG_ERROR_RST2[ERROR_RST1] is set if there was an underflow/overflow on WDT1 causing an error interrupt. To fetch this information from CPG block `syscon` is used and bootstatus field in the watchdog device is updated based on the CPG_ERROR_RST2[ERROR_RST1] bit. Upon consumig CPG_ERROR_RST2[ERROR_RST1] bit we are also clearing it. Signed-off-by: Lad Prabhakar --- @Geert, I intend to drop WDT0/2/3 nodes (and related clocks) as HW manual says WDT1 is for CA55 (I'll first confirm this internally) Hi Geert/Rob, I havent included a binding changes as part of the RFC as I wanted to get some initial feedback on the implementation. Currently CPG block doesnt have the "syscon" this patch has been tested with below diff to SoC DTSI Cheers, Prabhakar Changes to SoC DTSI: @@ -243,7 +243,7 @@ pinctrl: pinctrl@10410000 { }; cpg: clock-controller@10420000 { - compatible = "renesas,r9a09g057-cpg"; + compatible = "renesas,r9a09g057-cpg", "syscon"; reg = <0 0x10420000 0 0x10000>; clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>; clock-names = "audio_extal", "rtxin", "qextal"; @@ -455,6 +456,7 @@ wdt1: watchdog@14400000 { clock-names = "pclk", "oscclk"; resets = <&cpg 0x76>; power-domains = <&cpg>; + syscon = <&cpg>; status = "disabled"; }; --- drivers/watchdog/rzv2h_wdt.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/rzv2h_wdt.c b/drivers/watchdog/rzv2h_wdt.c index 8defd0241213..8e0901bb7d2b 100644 --- a/drivers/watchdog/rzv2h_wdt.c +++ b/drivers/watchdog/rzv2h_wdt.c @@ -4,14 +4,17 @@ * * Copyright (C) 2024 Renesas Electronics Corporation. */ +#include #include #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -40,6 +43,10 @@ #define WDT_DEFAULT_TIMEOUT 60U +#define CPG_ERROR_RST2 0xb40 +#define CPG_ERROR_RST2_ERR_RST1 BIT(1) +#define CPG_ERROR_RST2_ERR_RST1_WEN (BIT(1) << 16) + static bool nowayout = WATCHDOG_NOWAYOUT; module_param(nowayout, bool, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" @@ -135,7 +142,7 @@ static int rzv2h_wdt_stop(struct watchdog_device *wdev) } static const struct watchdog_info rzv2h_wdt_ident = { - .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT, + .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_CARDRESET, .identity = "Renesas RZ/V2H WDT Watchdog", }; @@ -207,12 +214,29 @@ static int rzv2h_wdt_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct rzv2h_wdt_priv *priv; + struct regmap *regmap; + unsigned int buf; int ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; + regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = regmap_read(regmap, CPG_ERROR_RST2, &buf); + if (ret) + return -EINVAL; + + if (buf & CPG_ERROR_RST2_ERR_RST1) { + ret = regmap_write(regmap, CPG_ERROR_RST2, + CPG_ERROR_RST2_ERR_RST1_WEN | CPG_ERROR_RST2_ERR_RST1); + if (ret) + return -EINVAL; + } + priv->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); @@ -243,6 +267,7 @@ static int rzv2h_wdt_probe(struct platform_device *pdev) priv->wdev.info = &rzv2h_wdt_ident; priv->wdev.ops = &rzv2h_wdt_ops; priv->wdev.parent = dev; + priv->wdev.bootstatus = buf & CPG_ERROR_RST2_ERR_RST1 ? WDIOF_CARDRESET : 0; watchdog_set_drvdata(&priv->wdev, priv); watchdog_set_nowayout(&priv->wdev, nowayout); watchdog_stop_on_unregister(&priv->wdev);