From patchwork Sun Dec 15 17:08:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Belwon X-Patchwork-Id: 13908821 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A88621B2192 for ; Sun, 15 Dec 2024 17:10:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734282618; cv=none; b=EenSUiKeYuRoLBRNL5WO5XzWb8UTcUvnk82LITwDST4jnALh6mBeEVS+ZxxT5R1ATAVtBpRlZB44Bd2SF36gktB8GpWxVVjVyDtGccIu58+EFLsVAq2BiFaRzsOCvKnh7PriMZtxFzJFI/cABBNJspS70Iqs/GmALYnZ4QJgVy0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734282618; c=relaxed/simple; bh=Xqqch/vhNEgGYAn/i2LGTac53RcxdOr6D+YPPMY4tLQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Es3kN/enuanI6d6WyBknkM2/ZdqH2GKz92wdoNNeUzr1FrfhKiZQ3aqBwPPnhsLcWnFQBC2E6JS4BlItrtRPHB8X40hQIA4wqddVSOQSuldnF4rx1dq94vs1U74HSen/II0pjVzXw0/49UcT7OJNrcVJ1av1doEUMdjzrgazvV4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b=Dwwnwsi/; arc=none smtp.client-ip=34.202.193.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b="Dwwnwsi/" DKIM-Signature: a=rsa-sha256; b=Dwwnwsi/P9XgTOdSdIr7ZKC5V2Lkq4H8UPWGssqGubAD5sqyC8UsBxgowIBWCCmSz/IUEIUtz4QvXSwPsKGBD9BRewG5AhDcoUsA0FZFQVeemZ1ULTM8Va+lBRIvFQb0uFa4+DmwjBGwD3CtuE/5G+KtAEdxSpbUUIQPf4FwpqYhkv/kjepTEG+Ux7Metm3ebgAVgheLt/yhRanYRQ1ikB3CLBf+VqmeaX+QfuBOfE2aq7QgCD2w95yujZe6blytD88OB79GkeKJySAg97S3DVpBXOcWyFG4nMyRzMAARiHxPuaMXB7AZAhXHB3qeSt2X9Ep93BUccf/EJtDddX/bw==; s=purelymail3; d=purelymail.com; v=1; bh=Xqqch/vhNEgGYAn/i2LGTac53RcxdOr6D+YPPMY4tLQ=; h=Feedback-ID:Received:From:To:Subject:Date; Feedback-ID: 68247:10037:null:purelymail X-Pm-Original-To: linux-samsung-soc@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id 1363280443; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Sun, 15 Dec 2024 17:09:56 +0000 (UTC) From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/1] arm64: dts: exynos990: Add clock management unit nodes Date: Sun, 15 Dec 2024 18:08:03 +0100 Message-ID: <20241215170803.1756850-2-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241215170803.1756850-1-igor.belwon@mentallysanemainliners.org> References: <20241215170803.1756850-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by Purelymail Add CMU nodes for: - cmu_top: provides clocks for other blocks - cmu_hsi0: provides clocks for usb31 Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990.dtsi | 28 +++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi index 2619f821bc7c..d6a8c04e6602 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -5,6 +5,7 @@ * Copyright (c) 2024, Igor Belwon */ +#include #include / { @@ -199,6 +200,24 @@ pinctrl_peric1: pinctrl@10730000 { interrupts = ; }; + cmu_hsi0: clock-controller@10a00000 { + compatible = "samsung,exynos990-cmu-hsi0"; + reg = <0x10a00000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, + <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, + <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>, + <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>; + clock-names = "oscclk", + "bus", + "usb31drd", + "usbdp_debug", + "dpgtc"; + + }; + pinctrl_hsi1: pinctrl@13040000 { compatible = "samsung,exynos990-pinctrl"; reg = <0x13040000 0x1000>; @@ -245,6 +264,15 @@ pinctrl_cmgp: pinctrl@15c30000 { compatible = "samsung,exynos990-pinctrl"; reg = <0x15c30000 0x1000>; }; + + cmu_top: clock-controller@1a330000 { + compatible = "samsung,exynos990-cmu-top"; + reg = <0x1a330000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>; + clock-names = "oscclk"; + }; }; timer {