From patchwork Mon Dec 16 06:47:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 13909273 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A3331CEAB2; Mon, 16 Dec 2024 06:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331730; cv=none; b=sAGnUETsLd2q6vbocmC+r/2yoT2iU0Q0tzVDVow4v4lT64AlQtAnUm5Pk50AsFOOZChVW5WDCN5x6VNwuePLs7T5OZQATKEz48pojHsUkQpm19yMtyn8R7e89kyYAAWyP4ur40vB/7K9bDW/fI84edZfWSWnJCFr8v4voUxow58= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331730; c=relaxed/simple; bh=xwG7KILTeH2AI6bM+wQIURzWAR71Cye3Uil/wuyYQO4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=u3rz4sd2IXuwF9cvcIP1r36DR1KbrOq9e3jwVvM+GkpjI2L3doI/NboUnzUJry0BMyAMmwUkaFHwDg4AEFPA56QgHusJAUyp6HomjxtBzlGLOMFF2MaldrMnDnOwxFTfpvMofw3xJ3EzC/GgG14GA6NcxRcyNKgEHnZ4cz7L8Mo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RctacwlT; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RctacwlT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734331729; x=1765867729; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xwG7KILTeH2AI6bM+wQIURzWAR71Cye3Uil/wuyYQO4=; b=RctacwlT+3ffSdXU7qvmmwrWcSh8Agjqkjw0I9f8t+xwaO0i69R7hAD1 lfyGBVtb7YmNGT7mx/osnIXMQIWhc2WcQSwdzvdD37frVQ23mL7EmG/wk UYYfbHtXhHQCokiwUW508nlHdzLOQGJNaCGjzVVbta+LlOrHKN2iHnVV/ TK8TM0HAEeVCsT4S6ULq+NQHMv8+PSxtjRllDIsugLSB7wTeESerOemx3 ImrV/YviouwA/nEE9bHQqj7WV5fB39p5Ih+xehClS1Qi6dCBhVgt9Op+U I/tfHk+MsXyAEXIDSimL4sDabW5u6W5f2Wv/i/MLGhJAHwq5et5/hGJZW A==; X-CSE-ConnectionGUID: 4xtkTtILTQ6dh5WHvS9N7g== X-CSE-MsgGUID: I4TpjHfxTeedfdKEQu5szw== X-IronPort-AV: E=McAfee;i="6700,10204,11287"; a="34848186" X-IronPort-AV: E=Sophos;i="6.12,237,1728975600"; d="scan'208";a="34848186" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2024 22:48:48 -0800 X-CSE-ConnectionGUID: KqO2hNatSv6FE6QkJLzNMw== X-CSE-MsgGUID: I99YYVVuRpOEkmMLJ/QDqw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="128101840" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:48:45 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 1/9] igc: Rename xdp_get_tx_ring() for non-xdp usage Date: Mon, 16 Dec 2024 01:47:12 -0500 Message-Id: <20241216064720.931522-2-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Renamed xdp_get_tx_ring() function to a more generic name for use in upcoming frame preemption patches. Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 2 +- drivers/net/ethernet/intel/igc/igc_main.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index eac0f966e0e4..34a6e4d8a652 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -734,7 +734,7 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapter *adapter, u32 location); int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule); void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule); - +struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu); void igc_ptp_init(struct igc_adapter *adapter); void igc_ptp_reset(struct igc_adapter *adapter); void igc_ptp_suspend(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 27872bdea9bd..05146cc1b92c 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -2448,8 +2448,8 @@ static int igc_xdp_init_tx_descriptor(struct igc_ring *ring, return -ENOMEM; } -static struct igc_ring *igc_xdp_get_tx_ring(struct igc_adapter *adapter, - int cpu) +struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, + int cpu) { int index = cpu; @@ -2473,7 +2473,7 @@ static int igc_xdp_xmit_back(struct igc_adapter *adapter, struct xdp_buff *xdp) if (unlikely(!xdpf)) return -EFAULT; - ring = igc_xdp_get_tx_ring(adapter, cpu); + ring = igc_get_tx_ring(adapter, cpu); nq = txring_txq(ring); __netif_tx_lock(nq, cpu); @@ -2551,7 +2551,7 @@ static void igc_finalize_xdp(struct igc_adapter *adapter, int status) struct igc_ring *ring; if (status & IGC_XDP_TX) { - ring = igc_xdp_get_tx_ring(adapter, cpu); + ring = igc_get_tx_ring(adapter, cpu); nq = txring_txq(ring); __netif_tx_lock(nq, cpu); @@ -6677,7 +6677,7 @@ static int igc_xdp_xmit(struct net_device *dev, int num_frames, if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) return -EINVAL; - ring = igc_xdp_get_tx_ring(adapter, cpu); + ring = igc_get_tx_ring(adapter, cpu); nq = txring_txq(ring); __netif_tx_lock(nq, cpu); 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15 Dec 2024 22:48:48 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 2/9] igc: Optimize the TX packet buffer utilization Date: Mon, 16 Dec 2024 01:47:13 -0500 Message-Id: <20241216064720.931522-3-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Vinicius Costa Gomes Packet buffers (RX + TX) total 64KB. Neither RX or TX buffers can be larger than 34KB. So divide the buffer equally, 32KB for each. Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 8e449904aa7d..1f63a523faf2 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -400,7 +400,7 @@ #define I225_TXPBSIZE_DEFAULT 0x04000014 /* TXPBSIZE default */ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ -#define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ +#define IGC_TXPBSIZE_TSN 0x041c71c7 /* 7k bytes buffer for each queue + 4KB for BMC*/ #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ From patchwork Mon Dec 16 06:47:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 13909275 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1E0D1D416E; Mon, 16 Dec 2024 06:48:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331738; cv=none; b=k9DCH8YyQeNQbMABU64zb6CuxFtgV6sXIMF9o590idxy1cUHtvZZXJGP3Pl2H7JJrER/5N0HCtXA7yeZ0CcmfDFV5+Xvxkw6m4kAbm26FGqgpdV5AkyBhHSdKPi0IOmRW4/IYRLIvwuDTZ2GgvZHR18+MfQ9I7LWMirNgyM8jgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331738; c=relaxed/simple; bh=SH1knRUZnCuOeW48/BTbg9x3crY0Xqb3zWnodThDr08=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cUkHrUtSd1HvtQfqjlhOSEAR8NiI+Tl8x2uu+VwXYAKF4RalH87OS/861RKIP93LJYC//CVuZuDxTULvowLGw+xpXrLvqyTR12w+NJrmsmEK4aArZueMIev+tr9IoOg/ZTjdMvQucaM6U3187bBtpkqVGyRErzT+Jh69/S3gHjU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EfGDCoob; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EfGDCoob" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734331737; x=1765867737; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SH1knRUZnCuOeW48/BTbg9x3crY0Xqb3zWnodThDr08=; b=EfGDCoobXY8CA163Rj+EjTnRED6pKhrXx5TcVnd23+gI+d8c5c0Y+f2R 2DAUvHeE/ZRQeCSuddc+RC//7jqUvm+C6Q/SjAbbxmdDU2OZ4LHbYx+I/ /j3lJRzKKI5kPrHm3m1gphuAXHlq42dXO7jzw6K8VBdBqO8agjnzp9cHY Yi95oR/NzB6Z+fBNv7FmbGRL8GybRS03GXYwUIKK8ySCzJFhOvvP4/Ssc qVzfs3Huzs/9wrE+Y/OD0dDCSjYMvRh8CZqPLSfAAteXrUPJ2nwUXT5Ar BivKg56Ga0nje0bOaVMnCGjlfy9sNvQ7VibJuqlozspFKjBybUE+QJ40y A==; X-CSE-ConnectionGUID: FKz2NFXKTaWTYzIGU+ny9Q== X-CSE-MsgGUID: YruelxcYSiOeRH0/MelPXA== X-IronPort-AV: E=McAfee;i="6700,10204,11287"; a="34848208" X-IronPort-AV: E=Sophos;i="6.12,237,1728975600"; d="scan'208";a="34848208" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2024 22:48:56 -0800 X-CSE-ConnectionGUID: SsYkkiMFS5+xDZspKZwaww== X-CSE-MsgGUID: BjoyvCGVQUyitmnScZcIjw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="128101859" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:48:52 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 3/9] igc: Set the RX packet buffer size for TSN mode Date: Mon, 16 Dec 2024 01:47:14 -0500 Message-Id: <20241216064720.931522-4-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Vinicius Costa Gomes In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 3 +++ drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 1f63a523faf2..3a78753ab050 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -400,7 +400,10 @@ #define I225_TXPBSIZE_DEFAULT 0x04000014 /* TXPBSIZE default */ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ +/* The total (RX + TX) packet buffers must sum to less than 64KB */ #define IGC_TXPBSIZE_TSN 0x041c71c7 /* 7k bytes buffer for each queue + 4KB for BMC*/ +#define IGC_RXPBSIZE_TSN 0x0000f08f /* 15KB for EXP + 15KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 1e44374ca1ff..f0213cfce07d 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -132,13 +132,17 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) { u16 queue_per_tc[4] = { 3, 2, 1, 0 }; struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; wr32(IGC_GTXOFFSET, 0); wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_restore_retx_default(adapter); @@ -194,7 +198,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -202,6 +206,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_set_retx_qbvfullthreshold(adapter); From patchwork Mon Dec 16 06:47:15 2024 Content-Type: text/plain; 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15 Dec 2024 22:48:56 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 4/9] igc: Add support for receiving frames with all zeroes address Date: Mon, 16 Dec 2024 01:47:15 -0500 Message-Id: <20241216064720.931522-5-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Vinicius Costa Gomes The frame preemption verification (as defined by IEEE 802.3-2018 Section 99.4.3) handshake is done by the driver, the default configuration of the driver is to only receive frames with the driver address. So, in preparation for that add a second address to the list of acceptable addresses. Because the frame preemption "verify_enable" toggle only affects the transmission of verification frames, this needs to always be enabled. As that address is invalid, the impact in practical scenarios should be minimal. But still a bummer that we have to do this. Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 1 + drivers/net/ethernet/intel/igc/igc_main.c | 17 +++++++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.c | 2 ++ 3 files changed, 20 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index 34a6e4d8a652..480b54573d60 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -734,6 +734,7 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapter *adapter, u32 location); int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule); void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule); +int igc_enable_empty_addr_recv(struct igc_adapter *adapter); struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu); void igc_ptp_init(struct igc_adapter *adapter); void igc_ptp_reset(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 05146cc1b92c..3f0751a9530c 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -3962,6 +3962,23 @@ static int igc_uc_unsync(struct net_device *netdev, const unsigned char *addr) return 0; } +/** + * igc_enable_empty_addr_recv - Enable rx of packets with all-zeroes MAC address + * @adapter: Pointer to the igc_adapter structure. + * + * Frame preemption verification requires that packets with the all-zeroes + * MAC address are allowed to be received by IGC. This function adds the + * all-zeroes destination address to the list of acceptable addresses. + * + * @return: 0 on success, negative value otherwise. + */ +int igc_enable_empty_addr_recv(struct igc_adapter *adapter) +{ + u8 empty[ETH_ALEN] = { }; + + return igc_add_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST, empty, -1); +} + /** * igc_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set * @netdev: network interface device structure diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index f0213cfce07d..5cd54ce435b9 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -434,6 +434,8 @@ int igc_tsn_reset(struct igc_adapter *adapter) unsigned int new_flags; int err = 0; + igc_enable_empty_addr_recv(adapter); + new_flags = igc_tsn_new_flags(adapter); if (!(new_flags & IGC_FLAG_TSN_ANY_ENABLED)) From patchwork Mon Dec 16 06:47:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 13909277 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A2F01D516A; Mon, 16 Dec 2024 06:49:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331746; cv=none; b=lC/jZ9QpI9APouFiCD4xPwcGYGSMlF9iLprvC1ltsOiLhhQ9KzVC+5np2KhcQZ7Mp/GWjD2nbWoeJemLeLxzbNC16AVOzdG2urEaE0+w6ys9RpBpwf7UA/6OCBkkKhF1zfY3r9p7aJC5kHG7GK1q0573XEmI1nBGXAXtlEHitQY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331746; c=relaxed/simple; bh=wnUDCgOMDokraxchjWXWE2o8xToDxF2pNqrcc5fKKH8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=K5wi/4VjcQ0AU3x1DSlRYS8BeVcIqugJ61+ysjeCzTpiF+9wC2XfN8erp5o/mgUWz56t843fNAoQzlsr89FbkRFnfc+QIyLM6N15qNxd2XfFn5NFx6SRdt+AylfGsBX4Wz1XdrIoOuIImsr6oEctGwiukr8QyoBOy111/OFjKGE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=j1zubPyl; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="j1zubPyl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734331745; x=1765867745; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wnUDCgOMDokraxchjWXWE2o8xToDxF2pNqrcc5fKKH8=; b=j1zubPylajWRY3KxIYzkOUixrUNRkhpSBU4Zqf/6kt/VY43fPA8+uvAQ fW0itonj4OY/b0ZURW2UAjMH31koBpIVO2EajbH02jwSVOuUwF6rAbhEU FgpoitIZeUWnNz/DRCiY+CT8prJaKMGcrdZ1iI4xHL9CqPkWAlcIfKfa6 sWDfpIi7Ft2Oh/+9//aiOZc//iPGog0pO/4avm98mdYgazlNe6ahoa4j2 maqFZtQAwvkqZR9TN738E5w9LNd9gFRvSA5JOOMRBTVadx7u/eXbq8qD8 a0LGWhPtAm4ufxo0HDm44MTO0PzrVhZlue+QxKWc5fG+LnCWFFz2zcUUv g==; X-CSE-ConnectionGUID: Z8kzisMBQMeJWC3b1QZJcA== X-CSE-MsgGUID: zrwLGMRnQ+eDSXKakkEBXA== X-IronPort-AV: E=McAfee;i="6700,10204,11287"; a="34848230" X-IronPort-AV: E=Sophos;i="6.12,237,1728975600"; d="scan'208";a="34848230" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2024 22:49:04 -0800 X-CSE-ConnectionGUID: T161Qh0tQYqV8RmugmQOOA== X-CSE-MsgGUID: xojFAmqRTXCEM0A13ihfyw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="128101875" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:49:00 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 5/9] igc: Add support to set MAC Merge data via ethtool Date: Mon, 16 Dec 2024 01:47:16 -0500 Message-Id: <20241216064720.931522-6-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Created fpe_t struct to store MAC Merge data and implement the "ethtool --set-mm" callback. The fpe_t struct will host other frame preemption related data in future patches. The following fields are used to set IGC register: a) pmac_enabled -> TQAVCTRL.PREEMPT_ENA This global register sets the preemption scheme, controlling preemption capabilities in transmit and receive directions, as well as the verification handshake capability. b) tx_min_frag_size -> TQAVCTRL.MIN_FRAG Global register to set minimum fragments. The fields below don't set any register but will be utilized in the upcoming patches: a) verify_time b) verify_enabled c) tx_enabled Note that IGC doesn't have any register to enforce "tx_enabled" (preemption in transmit direction) like some other NIC. This field will be used in driver level to control verification procedure and managing preemption capability in transmit direction. At this point, verify response handshake is not enabled yet. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 24 ++++++++++++- drivers/net/ethernet/intel/igc/igc_defines.h | 3 ++ drivers/net/ethernet/intel/igc/igc_ethtool.c | 30 ++++++++++++++++ drivers/net/ethernet/intel/igc/igc_main.c | 2 ++ drivers/net/ethernet/intel/igc/igc_tsn.c | 37 ++++++++++++++++++-- drivers/net/ethernet/intel/igc/igc_tsn.h | 9 +++++ 6 files changed, 102 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index 480b54573d60..5a14e9101723 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -40,6 +40,25 @@ void igc_ethtool_set_ops(struct net_device *); #define IGC_MAX_TX_TSTAMP_REGS 4 +/** + * @verify_time: see struct ethtool_mm_state + * @verify_enabled: see struct ethtool_mm_state + * @tx_enabled: + * Note that IGC NIC does not have the capability to enable preemption in + * "transmit direction". This field is used to manage transmit preemption in + * driver level. + * @pmac_enabled: + * Enable the capability to receive preemptible frames. + * @tx_min_frag_size: see struct ethtool_mm_state + */ +struct fpe_t { + u32 verify_time; + bool verify_enabled; + bool tx_enabled; + bool pmac_enabled; + u32 tx_min_frag_size; +}; + enum igc_mac_filter_type { IGC_MAC_FILTER_TYPE_DST = 0, IGC_MAC_FILTER_TYPE_SRC @@ -332,6 +351,8 @@ struct igc_adapter { struct timespec64 period; } perout[IGC_N_PEROUT]; + struct fpe_t fpe; + /* LEDs */ struct mutex led_mutex; struct igc_led_classdev *leds; @@ -387,10 +408,11 @@ extern char igc_driver_name[]; #define IGC_FLAG_TSN_QBV_ENABLED BIT(17) #define IGC_FLAG_TSN_QAV_ENABLED BIT(18) #define IGC_FLAG_TSN_LEGACY_ENABLED BIT(19) +#define IGC_FLAG_TSN_PREEMPT_ENABLED BIT(20) #define IGC_FLAG_TSN_ANY_ENABLED \ (IGC_FLAG_TSN_QBV_ENABLED | IGC_FLAG_TSN_QAV_ENABLED | \ - IGC_FLAG_TSN_LEGACY_ENABLED) + IGC_FLAG_TSN_LEGACY_ENABLED | IGC_FLAG_TSN_PREEMPT_ENABLED) #define IGC_FLAG_RSS_FIELD_IPV4_UDP BIT(6) #define IGC_FLAG_RSS_FIELD_IPV6_UDP BIT(7) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 3a78753ab050..3088cdd08f35 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -544,6 +544,9 @@ #define IGC_TQAVCTRL_TRANSMIT_MODE_TSN 0x00000001 #define IGC_TQAVCTRL_ENHANCED_QAV 0x00000008 #define IGC_TQAVCTRL_FUTSCDDIS 0x00000080 +#define IGC_TQAVCTRL_PREEMPT_ENA 0x00000002 +#define IGC_TQAVCTRL_MIN_FRAG_MASK 0x0000C000 +#define IGC_TQAVCTRL_MIN_FRAG_SHIFT 14 #define IGC_TXQCTL_QUEUE_MODE_LAUNCHT 0x00000001 #define IGC_TXQCTL_STRICT_CYCLE 0x00000002 diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c index 817838677817..1954561ec4aa 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -8,6 +8,7 @@ #include "igc.h" #include "igc_diag.h" +#include "igc_tsn.h" /* forward declaration */ struct igc_stats { @@ -1781,6 +1782,34 @@ static int igc_ethtool_set_eee(struct net_device *netdev, return 0; } +static int igc_ethtool_set_mm(struct net_device *netdev, + struct ethtool_mm_cfg *cmd, + struct netlink_ext_ack *extack) +{ + struct igc_adapter *adapter = netdev_priv(netdev); + struct fpe_t *fpe = &adapter->fpe; + + if (cmd->tx_min_frag_size < IGC_TX_MIN_FRAG_SIZE || + cmd->tx_min_frag_size > IGC_TX_MAX_FRAG_SIZE) + NL_SET_ERR_MSG_MOD(extack, + "Invalid value for tx-min-frag-size"); + else + fpe->tx_min_frag_size = cmd->tx_min_frag_size; + + if (cmd->verify_time < MIN_VERIFY_TIME || + cmd->verify_time > MAX_VERIFY_TIME) + NL_SET_ERR_MSG_MOD(extack, + "Invalid value for verify-time"); + else + fpe->verify_time = cmd->verify_time; + + fpe->tx_enabled = cmd->tx_enabled; + fpe->pmac_enabled = cmd->pmac_enabled; + fpe->verify_enabled = cmd->verify_enabled; + + return igc_tsn_offload_apply(adapter); +} + static int igc_ethtool_get_link_ksettings(struct net_device *netdev, struct ethtool_link_ksettings *cmd) { @@ -2068,6 +2097,7 @@ static const struct ethtool_ops igc_ethtool_ops = { .set_rxfh = igc_ethtool_set_rxfh, .get_ts_info = igc_ethtool_get_ts_info, .get_channels = igc_ethtool_get_channels, + .set_mm = igc_ethtool_set_mm, .set_channels = igc_ethtool_set_channels, .get_priv_flags = igc_ethtool_get_priv_flags, .set_priv_flags = igc_ethtool_set_priv_flags, diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 3f0751a9530c..b85eaf34d07b 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -7144,6 +7144,8 @@ static int igc_probe(struct pci_dev *pdev, igc_tsn_clear_schedule(adapter); + igc_fpe_init(&adapter->fpe); + /* reset the hardware with the new settings */ igc_reset(adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 5cd54ce435b9..b968c02f5fee 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -5,6 +5,18 @@ #include "igc_hw.h" #include "igc_tsn.h" +#define DEFAULT_VERIFY_TIME 10 +#define IGC_MIN_FOR_TX_MIN_FRAG 0 +#define IGC_MAX_FOR_TX_MIN_FRAG 3 + +void igc_fpe_init(struct fpe_t *fpe) +{ + fpe->verify_enabled = false; + fpe->verify_time = DEFAULT_VERIFY_TIME; + fpe->pmac_enabled = false; + fpe->tx_min_frag_size = IGC_TX_MIN_FRAG_SIZE; +} + static bool is_any_launchtime(struct igc_adapter *adapter) { int i; @@ -49,6 +61,9 @@ static unsigned int igc_tsn_new_flags(struct igc_adapter *adapter) if (adapter->strict_priority_enable) new_flags |= IGC_FLAG_TSN_LEGACY_ENABLED; + if (adapter->fpe.pmac_enabled) + new_flags |= IGC_FLAG_TSN_PREEMPT_ENABLED; + return new_flags; } @@ -148,7 +163,8 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl &= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | - IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS); + IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS | + IGC_TQAVCTRL_PREEMPT_ENA | IGC_TQAVCTRL_MIN_FRAG_MASK); wr32(IGC_TQAVCTRL, tqavctrl); @@ -194,12 +210,22 @@ static void igc_tsn_set_retx_qbvfullthreshold(struct igc_adapter *adapter) wr32(IGC_RETX_CTL, retxctl); } +static u8 igc_fpe_get_frag_size_mult(const struct fpe_t *fpe) +{ + u32 tx_min_frag_size = fpe->tx_min_frag_size; + u8 mult = (tx_min_frag_size / 64) - 1; + + return clamp_t(u8, mult, IGC_MIN_FOR_TX_MIN_FRAG, + IGC_MAX_FOR_TX_MIN_FRAG); +} + static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; + u32 frag_size_mult; int i; wr32(IGC_TSAUXC, 0); @@ -370,10 +396,17 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_TXQCTL(i), txqctl); } - tqavctrl = rd32(IGC_TQAVCTRL) & ~IGC_TQAVCTRL_FUTSCDDIS; + tqavctrl = rd32(IGC_TQAVCTRL) & ~(IGC_TQAVCTRL_FUTSCDDIS | + IGC_TQAVCTRL_MIN_FRAG_MASK | IGC_TQAVCTRL_PREEMPT_ENA); tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; + if (adapter->fpe.pmac_enabled) + tqavctrl |= IGC_TQAVCTRL_PREEMPT_ENA; + + frag_size_mult = igc_fpe_get_frag_size_mult(&adapter->fpe); + tqavctrl |= frag_size_mult << IGC_TQAVCTRL_MIN_FRAG_SHIFT; + adapter->qbv_count++; cycle = adapter->cycle_time; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/ethernet/intel/igc/igc_tsn.h index 98ec845a86bf..08e7582f257e 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -4,6 +4,15 @@ #ifndef _IGC_TSN_H_ #define _IGC_TSN_H_ +/* IGC_TX_MIN_FRAG_SIZE is based on the MIN_FRAG field in Section 8.12.2 of the + * SW User Manual. + */ +#define IGC_TX_MIN_FRAG_SIZE 68 +#define IGC_TX_MAX_FRAG_SIZE 260 +#define MIN_VERIFY_TIME 1 +#define MAX_VERIFY_TIME 128 + +void igc_fpe_init(struct fpe_t *fpe); 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d="scan'208";a="128101886" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:49:04 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 6/9] igc: Add support for frame preemption verification Date: Mon, 16 Dec 2024 01:47:17 -0500 Message-Id: <20241216064720.931522-7-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The i226 hardware doesn't implement the process of verification internally, this is left to the driver. Add a simple implementation of the state machine defined in IEEE 802.3-2018, Section 99.4.7. The state machine is started manually by user after "verify-enabled" command is enabled. Implementation includes: 1. Send and receive verify frame 2. Verification state handling 3. Send and receive response frame Tested by triggering verification handshake: $ sudo ethtool --set-mm enp1s0 pmac-enabled on $ sudo ethtool --set-mm enp1s0 tx-enabled on $ sudo ethtool --set-mm enp1s0 verify-enabled on Note that Ethtool API requires enabling "pmac-enabled on" and "tx-enabled on" before "verify-enabled on" can be issued. After the upcoming patch ("igc: Add support to get MAC Merge data via ethtool") is implemented, verification status can be checked using: $ ethtool --show-mm enp1s0 MAC Merge layer state for enp1s0: pMAC enabled: on TX enabled: on TX active: on TX minimum fragment size: 252 RX minimum fragment size: 252 Verify enabled: on Verify time: 128 Max verify time: 128 Verification status: SUCCEEDED Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 16 ++ drivers/net/ethernet/intel/igc/igc_defines.h | 6 + drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +- drivers/net/ethernet/intel/igc/igc_main.c | 15 +- drivers/net/ethernet/intel/igc/igc_tsn.c | 230 +++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.h | 4 + 6 files changed, 277 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index 5a14e9101723..56a426765be7 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -40,6 +40,15 @@ void igc_ethtool_set_ops(struct net_device *); #define IGC_MAX_TX_TSTAMP_REGS 4 +/* Verification state defined as per section 30.14.1.2 in 802.3br spec */ +enum verify_state { + VERIFY_FAIL, + INIT_VERIFICATION, + VERIFIED, + SEND_VERIFY, + WAIT_FOR_RESPONSE, +}; + /** * @verify_time: see struct ethtool_mm_state * @verify_enabled: see struct ethtool_mm_state @@ -52,6 +61,12 @@ void igc_ethtool_set_ops(struct net_device *); * @tx_min_frag_size: see struct ethtool_mm_state */ struct fpe_t { + struct delayed_work verification_work; + unsigned long verify_timeout; + bool received_smd_v; + bool received_smd_r; + unsigned int verify_cnt; + enum verify_state verify_state; u32 verify_time; bool verify_enabled; bool tx_enabled; @@ -758,6 +773,7 @@ int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule); void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule); int igc_enable_empty_addr_recv(struct igc_adapter *adapter); struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu); +void igc_flush_tx_descriptors(struct igc_ring *ring); void igc_ptp_init(struct igc_adapter *adapter); void igc_ptp_reset(struct igc_adapter *adapter); void igc_ptp_suspend(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 3088cdd08f35..ba96776d5854 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -308,6 +308,8 @@ #define IGC_TXD_DTYP_C 0x00000000 /* Context Descriptor */ #define IGC_TXD_POPTS_IXSM 0x01 /* Insert IP checksum */ #define IGC_TXD_POPTS_TXSM 0x02 /* Insert TCP/UDP checksum */ +#define IGC_TXD_POPTS_SMD_V 0x10 /* Transmitted packet is a SMD-Verify */ +#define IGC_TXD_POPTS_SMD_R 0x20 /* Transmitted packet is a SMD-Response */ #define IGC_TXD_CMD_EOP 0x01000000 /* End of Packet */ #define IGC_TXD_CMD_IC 0x04000000 /* Insert Checksum */ #define IGC_TXD_CMD_DEXT 0x20000000 /* Desc extension (0 = legacy) */ @@ -370,9 +372,13 @@ #define IGC_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */ #define IGC_RXDEXT_STATERR_LB 0x00040000 +#define IGC_RXD_STAT_SMD_V 0x2000 /* SMD-Verify packet */ +#define IGC_RXD_STAT_SMD_R 0x4000 /* SMD-Response packet */ /* Advanced Receive Descriptor bit definitions */ #define IGC_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ +#define IGC_RXDADV_STAT_SMD_TYPE_MASK 0x06000 +#define IGC_RXDADV_STAT_SMD_TYPE_SHIFT 13 #define IGC_RXDEXT_STATERR_L4E 0x20000000 #define IGC_RXDEXT_STATERR_IPE 0x40000000 diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c index 1954561ec4aa..7cde0e5a7320 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1788,6 +1788,7 @@ static int igc_ethtool_set_mm(struct net_device *netdev, { struct igc_adapter *adapter = netdev_priv(netdev); struct fpe_t *fpe = &adapter->fpe; + bool verify_enabled_changed; if (cmd->tx_min_frag_size < IGC_TX_MIN_FRAG_SIZE || cmd->tx_min_frag_size > IGC_TX_MAX_FRAG_SIZE) @@ -1805,7 +1806,12 @@ static int igc_ethtool_set_mm(struct net_device *netdev, fpe->tx_enabled = cmd->tx_enabled; fpe->pmac_enabled = cmd->pmac_enabled; - fpe->verify_enabled = cmd->verify_enabled; + verify_enabled_changed = (cmd->verify_enabled != fpe->verify_enabled); + + if (verify_enabled_changed) { + fpe->verify_enabled = cmd->verify_enabled; + igc_fpe_verify_enabled_changed(fpe); + } return igc_tsn_offload_apply(adapter); } diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index b85eaf34d07b..e184959ef218 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -2534,7 +2534,7 @@ static struct sk_buff *igc_xdp_run_prog(struct igc_adapter *adapter, } /* This function assumes __netif_tx_lock is held by the caller. */ -static void igc_flush_tx_descriptors(struct igc_ring *ring) +void igc_flush_tx_descriptors(struct igc_ring *ring) { /* Once tail pointer is updated, hardware can fetch the descriptors * any time so we issue a write membar here to ensure all memory @@ -2585,6 +2585,7 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget) struct sk_buff *skb = rx_ring->skb; u16 cleaned_count = igc_desc_unused(rx_ring); int xdp_status = 0, rx_buffer_pgcnt; + int smd_type; while (likely(total_packets < budget)) { struct igc_xdp_buff ctx = { .rx_ts = NULL }; @@ -2622,6 +2623,18 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget) size -= IGC_TS_HDR_LEN; } + smd_type = igc_fpe_get_smd_type(rx_desc->wb.upper.status_error); + + if (igc_fpe_is_verify_or_response(smd_type, size)) { + igc_fpe_preprocess_verify_response(&adapter->fpe, + smd_type); + + /* Advance the ring next-to-clean */ + igc_is_non_eop(rx_ring, rx_desc); + cleaned_count++; + continue; + } + if (!skb) { xdp_init_buff(&ctx.xdp, truesize, &rx_ring->xdp_rxq); xdp_prepare_buff(&ctx.xdp, pktbuf - igc_rx_offset(rx_ring), diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index b968c02f5fee..3d39be2219f3 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -1,22 +1,252 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2019 Intel Corporation */ +#include #include "igc.h" +#include "igc_base.h" #include "igc_hw.h" #include "igc_tsn.h" #define DEFAULT_VERIFY_TIME 10 + +#define IGC_SMD_TYPE_SMD_V 0x1 +#define IGC_SMD_TYPE_SMD_R 0x2 #define IGC_MIN_FOR_TX_MIN_FRAG 0 #define IGC_MAX_FOR_TX_MIN_FRAG 3 +#define MAX_VERIFY_CNT 3 +#define SMD_FRAME_SIZE 60 +#define VERIFY_RESPONSE_DELAY 10 + +static int igc_fpe_init_smd_frame(struct igc_ring *ring, + struct igc_tx_buffer *buffer, + struct sk_buff *skb) +{ + unsigned int size = skb_headlen(skb); + dma_addr_t dma; + + dma = dma_map_single(ring->dev, skb->data, size, DMA_TO_DEVICE); + + if (dma_mapping_error(ring->dev, dma)) { + netdev_err_once(ring->netdev, "Failed to map DMA for TX\n"); + return -ENOMEM; + } + + buffer->skb = skb; + buffer->protocol = 0; + buffer->bytecount = skb->len; + buffer->gso_segs = 1; + buffer->time_stamp = jiffies; + dma_unmap_len_set(buffer, len, skb->len); + dma_unmap_addr_set(buffer, dma, dma); + + return 0; +} + +static int igc_fpe_init_tx_descriptor(struct igc_ring *ring, + struct sk_buff *skb, int type) +{ + struct igc_tx_buffer *buffer; + union igc_adv_tx_desc *desc; + u32 cmd_type, olinfo_status; + int err; + + if (!igc_desc_unused(ring)) + return -EBUSY; + + if (type != IGC_SMD_TYPE_SMD_V && type != IGC_SMD_TYPE_SMD_R) + return -EINVAL; + + buffer = &ring->tx_buffer_info[ring->next_to_use]; + err = igc_fpe_init_smd_frame(ring, buffer, skb); + if (err) + return err; + + cmd_type = IGC_ADVTXD_DTYP_DATA | IGC_ADVTXD_DCMD_DEXT | + IGC_ADVTXD_DCMD_IFCS | IGC_TXD_DCMD | + buffer->bytecount; + olinfo_status = buffer->bytecount << IGC_ADVTXD_PAYLEN_SHIFT; + + switch (type) { + case IGC_SMD_TYPE_SMD_V: + olinfo_status |= (IGC_TXD_POPTS_SMD_V << 8); + break; + case IGC_SMD_TYPE_SMD_R: + olinfo_status |= (IGC_TXD_POPTS_SMD_R << 8); + break; + } + + desc = IGC_TX_DESC(ring, ring->next_to_use); + desc->read.cmd_type_len = cpu_to_le32(cmd_type); + desc->read.olinfo_status = cpu_to_le32(olinfo_status); + desc->read.buffer_addr = cpu_to_le64(dma_unmap_addr(buffer, dma)); + + netdev_tx_sent_queue(txring_txq(ring), skb->len); + + buffer->next_to_watch = desc; + ring->next_to_use = (ring->next_to_use + 1) % ring->count; + + return 0; +} + +static int igc_fpe_xmit_smd_frame(struct igc_adapter *adapter, int type) +{ + int cpu = smp_processor_id(); + struct netdev_queue *nq; + struct igc_ring *ring; + struct sk_buff *skb; + void *data; + int err; + + if (!netif_running(adapter->netdev)) + return -ENOTCONN; + + ring = igc_get_tx_ring(adapter, cpu); + nq = txring_txq(ring); + + skb = alloc_skb(SMD_FRAME_SIZE, GFP_KERNEL); + if (!skb) + return -ENOMEM; + + data = skb_put(skb, SMD_FRAME_SIZE); + memset(data, 0, SMD_FRAME_SIZE); + + __netif_tx_lock(nq, cpu); + + err = igc_fpe_init_tx_descriptor(ring, skb, type); + igc_flush_tx_descriptors(ring); + + __netif_tx_unlock(nq); + + return err; +} + +static void igc_fpe_send_response(struct igc_adapter *adapter) +{ + int err = igc_fpe_xmit_smd_frame(adapter, IGC_SMD_TYPE_SMD_R); + + if (err) + netdev_err(adapter->netdev, "Error sending SMD-R frame\n"); +} + +static void igc_fpe_handle_verify(struct igc_adapter *adapter) +{ + struct fpe_t *fpe = &adapter->fpe; + unsigned long verify_time_jiffies; + int err; + + switch (fpe->verify_state) { + case SEND_VERIFY: + fpe->received_smd_r = false; + err = igc_fpe_xmit_smd_frame(adapter, IGC_SMD_TYPE_SMD_V); + + if (err) + netdev_err(adapter->netdev, "Error sending SMD-V\n"); + + fpe->verify_state = WAIT_FOR_RESPONSE; + verify_time_jiffies = msecs_to_jiffies(fpe->verify_time); + fpe->verify_timeout = jiffies + verify_time_jiffies; + + schedule_delayed_work(&fpe->verification_work, + verify_time_jiffies); + break; + + case WAIT_FOR_RESPONSE: + if (fpe->received_smd_r) { + fpe->verify_state = VERIFIED; + fpe->received_smd_r = false; + } else if (time_is_before_jiffies(fpe->verify_timeout)) { + fpe->verify_cnt++; + netdev_warn(adapter->netdev, + "Timeout waiting for SMD-R frame\n"); + + if (fpe->verify_cnt > MAX_VERIFY_CNT) { + fpe->verify_state = VERIFY_FAIL; + netdev_err(adapter->netdev, + "Exceeded attempts sending SMD-V\n"); + } else { + fpe->verify_state = SEND_VERIFY; + igc_fpe_handle_verify(adapter); + } + } + break; + + case VERIFY_FAIL: + case VERIFIED: + case INIT_VERIFICATION: + break; + } +} + +static void igc_fpe_verification(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct igc_adapter *adapter; + struct fpe_t *fpe; + + fpe = container_of(dwork, struct fpe_t, verification_work); + adapter = container_of(fpe, struct igc_adapter, fpe); + + if (fpe->received_smd_v) { + igc_fpe_send_response(adapter); + fpe->received_smd_v = false; + } + + if (fpe->verify_enabled) + igc_fpe_handle_verify(adapter); +} + void igc_fpe_init(struct fpe_t *fpe) { + INIT_DELAYED_WORK(&fpe->verification_work, igc_fpe_verification); fpe->verify_enabled = false; + fpe->verify_state = INIT_VERIFICATION; fpe->verify_time = DEFAULT_VERIFY_TIME; + fpe->received_smd_v = false; + fpe->received_smd_r = false; + fpe->verify_cnt = 0; fpe->pmac_enabled = false; fpe->tx_min_frag_size = IGC_TX_MIN_FRAG_SIZE; } +void igc_fpe_verify_enabled_changed(struct fpe_t *fpe) +{ + if (fpe->verify_enabled && fpe->tx_enabled) { + fpe->verify_state = SEND_VERIFY; + schedule_delayed_work(&fpe->verification_work, + msecs_to_jiffies(VERIFY_RESPONSE_DELAY)); + } else { + fpe->verify_state = INIT_VERIFICATION; + fpe->received_smd_v = false; + fpe->received_smd_r = false; + fpe->verify_cnt = 0; + } +} + +int igc_fpe_get_smd_type(__le32 status_error) +{ + u32 status = le32_to_cpu(status_error); + + return (status & IGC_RXDADV_STAT_SMD_TYPE_MASK) + >> IGC_RXDADV_STAT_SMD_TYPE_SHIFT; +} + +bool igc_fpe_is_verify_or_response(int smd_type, unsigned int size) +{ + return ((smd_type == IGC_SMD_TYPE_SMD_V || + smd_type == IGC_SMD_TYPE_SMD_R) && size == SMD_FRAME_SIZE); +} + +void igc_fpe_preprocess_verify_response(struct fpe_t *fpe, int smd_type) +{ + if (smd_type == IGC_SMD_TYPE_SMD_V) + fpe->received_smd_v = true; + else if (smd_type == IGC_SMD_TYPE_SMD_R) + fpe->received_smd_r = true; + + schedule_delayed_work(&fpe->verification_work, 0); +} + static bool is_any_launchtime(struct igc_adapter *adapter) { int i; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/ethernet/intel/igc/igc_tsn.h index 08e7582f257e..f3d83fbbd1f4 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -12,7 +12,11 @@ #define MIN_VERIFY_TIME 1 #define MAX_VERIFY_TIME 128 +int igc_fpe_get_smd_type(__le32 status_error); void igc_fpe_init(struct fpe_t *fpe); +bool igc_fpe_is_verify_or_response(int smd_type, unsigned int size); +void igc_fpe_preprocess_verify_response(struct fpe_t *fpe, int smd_type); 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d="scan'208";a="128101895" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:49:09 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 7/9] igc: Add support for preemptible traffic class in taprio Date: Mon, 16 Dec 2024 01:47:18 -0500 Message-Id: <20241216064720.931522-8-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Set queue as preemptible or express for taprio. This will eventually set queue-specific preemptible field in TXQCTL register. A preemptible queue can only be set if it satisfies the conditions in igc_fpe_is_tx_preempt_allowed(), including the verification handshake condition. However, the handshake is optional, as users can disable the "verify_enabled" field, which the function also handles. Verified that the correct preemptible hardware queue is set using the following commands: a) 1:1 TC-to-Queue Mapping $ sudo tc qdisc replace dev enp1s0 parent root handle 100 \ taprio num_tc 4 map 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 \ queues 1@0 1@1 1@2 1@3 base-time 0 sched-entry S F 100000 \ fp E E P P b) Non-1:1 TC-to-Queue Mapping $ sudo tc qdisc replace dev enp1s0 parent root handle 100 \ taprio num_tc 3 map 0 1 1 1 2 0 0 0 0 0 0 0 0 0 0 0 queues 2@0 1@2 1@3 fp E P P Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 2 +- drivers/net/ethernet/intel/igc/igc_defines.h | 1 + drivers/net/ethernet/intel/igc/igc_main.c | 36 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.c | 15 ++++++++ drivers/net/ethernet/intel/igc/igc_tsn.h | 1 + 5 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index 56a426765be7..fc1960925e28 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -192,7 +192,7 @@ struct igc_ring { bool launchtime_enable; /* true if LaunchTime is enabled */ ktime_t last_tx_cycle; /* end of the cycle with a launchtime transmission */ ktime_t last_ff_cycle; /* Last cycle with an active first flag */ - + bool preemptible; /* True if not express */ u32 start_time; u32 end_time; u32 max_sdu; diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index ba96776d5854..33c2e4ce7cc8 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -557,6 +557,7 @@ #define IGC_TXQCTL_QUEUE_MODE_LAUNCHT 0x00000001 #define IGC_TXQCTL_STRICT_CYCLE 0x00000002 #define IGC_TXQCTL_STRICT_END 0x00000004 +#define IGC_TXQCTL_PREEMPTIBLE 0x00000008 #define IGC_TXQCTL_QAV_SEL_MASK 0x000000C0 #define IGC_TXQCTL_QAV_SEL_CBS0 0x00000080 #define IGC_TXQCTL_QAV_SEL_CBS1 0x000000C0 diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index e184959ef218..2787a91965d1 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -6216,6 +6216,39 @@ static bool is_base_time_past(ktime_t base_time, const struct timespec64 *now) return timespec64_compare(now, &b) > 0; } +static u32 igc_map_tc_to_queue(const struct igc_adapter *adapter, + unsigned long preemptible_tcs) +{ + struct net_device *dev = adapter->netdev; + u32 i, queue = 0; + + for (i = 0; i < dev->num_tc; i++) { + u32 offset, count; + + if (!(preemptible_tcs & BIT(i))) + continue; + + offset = dev->tc_to_txq[i].offset; + count = dev->tc_to_txq[i].count; + queue |= GENMASK(offset + count - 1, offset); + } + + return queue; +} + +static void igc_save_preempt_queue(struct igc_adapter *adapter, + const struct tc_mqprio_qopt_offload *mqprio) +{ + u32 preemptible_queue = igc_map_tc_to_queue(adapter, + mqprio->preemptible_tcs); + + for (int i = 0; i < adapter->num_tx_queues; i++) { + struct igc_ring *tx_ring = adapter->tx_ring[i]; + + tx_ring->preemptible = preemptible_queue & BIT(i); + } +} + static bool validate_schedule(struct igc_adapter *adapter, const struct tc_taprio_qopt_offload *qopt) { @@ -6302,6 +6335,7 @@ static int igc_qbv_clear_schedule(struct igc_adapter *adapter) ring->start_time = 0; ring->end_time = NSEC_PER_SEC; ring->max_sdu = 0; + ring->preemptible = false; } spin_lock_irqsave(&adapter->qbv_tx_lock, flags); @@ -6458,6 +6492,8 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter, ring->max_sdu = 0; } + igc_save_preempt_queue(adapter, &qopt->mqprio); + return 0; } diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 3d39be2219f3..efd2a9f676d8 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -209,6 +209,17 @@ void igc_fpe_init(struct fpe_t *fpe) fpe->tx_min_frag_size = IGC_TX_MIN_FRAG_SIZE; } +static bool igc_fpe_is_verifed(const struct fpe_t *fpe) +{ + return (fpe->verify_enabled && fpe->verify_state == VERIFIED); +} + +bool igc_fpe_is_tx_preempt_allowed(const struct fpe_t *fpe) +{ + return (fpe->pmac_enabled && fpe->tx_enabled && + (igc_fpe_is_verifed(fpe) || !fpe->verify_enabled)); +} + void igc_fpe_verify_enabled_changed(struct fpe_t *fpe) { if (fpe->verify_enabled && fpe->tx_enabled) { @@ -539,6 +550,10 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) if (ring->launchtime_enable) txqctl |= IGC_TXQCTL_QUEUE_MODE_LAUNCHT; + if (igc_fpe_is_tx_preempt_allowed(&adapter->fpe) && + ring->preemptible) + txqctl |= IGC_TXQCTL_PREEMPTIBLE; + /* Skip configuring CBS for Q2 and Q3 */ if (i > 1) goto skip_cbs; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/ethernet/intel/igc/igc_tsn.h index f3d83fbbd1f4..2b67ecae99c9 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -14,6 +14,7 @@ int igc_fpe_get_smd_type(__le32 status_error); void igc_fpe_init(struct fpe_t *fpe); +bool igc_fpe_is_tx_preempt_allowed(const struct fpe_t *fpe); bool igc_fpe_is_verify_or_response(int smd_type, unsigned int size); void igc_fpe_preprocess_verify_response(struct fpe_t *fpe, int smd_type); void igc_fpe_verify_enabled_changed(struct fpe_t *fpe); From patchwork Mon Dec 16 06:47:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 13909280 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 032401D63EF; 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X-CSE-ConnectionGUID: cvTp+wK6TRKlq7bqvfBSlA== X-CSE-MsgGUID: EuHEr5MUT6iedd59K26n2Q== X-IronPort-AV: E=McAfee;i="6700,10204,11287"; a="34848263" X-IronPort-AV: E=Sophos;i="6.12,237,1728975600"; d="scan'208";a="34848263" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2024 22:49:17 -0800 X-CSE-ConnectionGUID: Cf90MwRjSsOAGdFwxULHHg== X-CSE-MsgGUID: F7gvB9BPTM2O0qRtzmZAmQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="128101907" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:49:13 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 8/9] igc: Add support to get MAC Merge data via ethtool Date: Mon, 16 Dec 2024 01:47:19 -0500 Message-Id: <20241216064720.931522-9-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Implement "ethtool --show-mm" callback for IGC. Tested with command: $ ethtool --show-mm enp1s0. MAC Merge layer state for enp1s0: pMAC enabled: on TX enabled: on TX active: on TX minimum fragment size: 252 RX minimum fragment size: 252 Verify enabled: on Verify time: 128 Max verify time: 128 Verification status: SUCCEEDED Verified that the fields value are retrieved correctly. Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc.h | 2 +- drivers/net/ethernet/intel/igc/igc_ethtool.c | 20 ++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.c | 33 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.h | 1 + 4 files changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index fc1960925e28..3199da9b87ba 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -40,7 +40,7 @@ void igc_ethtool_set_ops(struct net_device *); #define IGC_MAX_TX_TSTAMP_REGS 4 -/* Verification state defined as per section 30.14.1.2 in 802.3br spec */ +/* Verify state defined as per section 99.4.8, Figure 99-8 in 802.3br spec */ enum verify_state { VERIFY_FAIL, INIT_VERIFICATION, diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c index 7cde0e5a7320..16aa6e4e1727 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1782,6 +1782,25 @@ static int igc_ethtool_set_eee(struct net_device *netdev, return 0; } +static int igc_ethtool_get_mm(struct net_device *netdev, + struct ethtool_mm_state *cmd) +{ + struct igc_adapter *adapter = netdev_priv(netdev); + struct fpe_t *fpe = &adapter->fpe; + + cmd->tx_min_frag_size = fpe->tx_min_frag_size; + cmd->rx_min_frag_size = fpe->tx_min_frag_size; + cmd->pmac_enabled = fpe->pmac_enabled; + cmd->verify_enabled = fpe->verify_enabled; + cmd->verify_time = fpe->verify_time; + cmd->tx_active = igc_fpe_is_tx_preempt_allowed(&adapter->fpe); + cmd->tx_enabled = fpe->tx_enabled; + cmd->verify_status = igc_fpe_get_verify_status(&adapter->fpe); + cmd->max_verify_time = MAX_VERIFY_TIME; + + return 0; +} + static int igc_ethtool_set_mm(struct net_device *netdev, struct ethtool_mm_cfg *cmd, struct netlink_ext_ack *extack) @@ -2103,6 +2122,7 @@ static const struct ethtool_ops igc_ethtool_ops = { .set_rxfh = igc_ethtool_set_rxfh, .get_ts_info = igc_ethtool_get_ts_info, .get_channels = igc_ethtool_get_channels, + .get_mm = igc_ethtool_get_mm, .set_mm = igc_ethtool_set_mm, .set_channels = igc_ethtool_set_channels, .get_priv_flags = igc_ethtool_get_priv_flags, diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index efd2a9f676d8..919a7f088a72 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -258,6 +258,39 @@ void igc_fpe_preprocess_verify_response(struct fpe_t *fpe, int smd_type) schedule_delayed_work(&fpe->verification_work, 0); } +enum ethtool_mm_verify_status igc_fpe_get_verify_status(const struct fpe_t *fpe) +{ + enum ethtool_mm_verify_status verify_status; + + switch (fpe->verify_state) { + case VERIFY_FAIL: + verify_status = ETHTOOL_MM_VERIFY_STATUS_FAILED; + break; + + case INIT_VERIFICATION: + if (fpe->verify_enabled) + verify_status = ETHTOOL_MM_VERIFY_STATUS_INITIAL; + else + verify_status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; + break; + + case VERIFIED: + verify_status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; + break; + + case SEND_VERIFY: + case WAIT_FOR_RESPONSE: + verify_status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING; + break; + + default: + verify_status = ETHTOOL_MM_VERIFY_STATUS_UNKNOWN; + break; + } + + return verify_status; +} + static bool is_any_launchtime(struct igc_adapter *adapter) { int i; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/ethernet/intel/igc/igc_tsn.h index 2b67ecae99c9..913f983652e4 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -13,6 +13,7 @@ #define MAX_VERIFY_TIME 128 int igc_fpe_get_smd_type(__le32 status_error); +enum ethtool_mm_verify_status igc_fpe_get_verify_status(const struct fpe_t *fpe); void igc_fpe_init(struct fpe_t *fpe); bool igc_fpe_is_tx_preempt_allowed(const struct fpe_t *fpe); bool igc_fpe_is_verify_or_response(int smd_type, unsigned int size); From patchwork Mon Dec 16 06:47:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 13909281 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D1A91D8A0D; Mon, 16 Dec 2024 06:49:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331762; cv=none; b=rW0UfMZlTYavcRn3hYMibpbtgYkNb7faIcriR/XjgLuaETEPFgXjUUbfOO1nif+zdSFAuZ3251UXXvn4jk4wOqX8e/fL9k+4ydwOL58H9rTiT0p44xHcWW+b8f5IR8tIS785FC5XjzswdnZI3algXQ9+EFP4yBMc32/HaUEuoRU= ARC-Message-Signature: i=1; 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d="scan'208";a="128101929" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:49:17 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 9/9] igc: Add support to get frame preemption statistics via ethtool Date: Mon, 16 Dec 2024 01:47:20 -0500 Message-Id: <20241216064720.931522-10-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Implemented "ethtool --include-statistics --show-mm" callback for IGC. Tested preemption scenario to check preemption statistics: 1) Trigger verification handshake on both boards: $ sudo ethtool --set-mm enp1s0 pmac-enabled on $ sudo ethtool --set-mm enp1s0 tx-enabled on $ sudo ethtool --set-mm enp1s0 verify-enabled on 2) Set preemptible or express queue in taprio for tx board: $ sudo tc qdisc replace dev enp1s0 parent root handle 100 taprio \ num_tc 4 map 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 \ queues 1@0 1@1 1@2 1@3 base-time 0 sched-entry S F 100000 \ fp E E P P 3) Send large size packets on preemptible queue 4) Send small size packets on express queue to preempt packets in preemptible queue 5) Show preemption statistics on the receiving board: $ ethtool --include-statistics --show-mm enp1s0 MAC Merge layer state for enp1s0: pMAC enabled: on TX enabled: on TX active: on TX minimum fragment size: 252 RX minimum fragment size: 252 Verify enabled: on Verify time: 128 Max verify time: 128 Verification status: SUCCEEDED Statistics: MACMergeFrameAssErrorCount: 0 MACMergeFrameSmdErrorCount: 0 MACMergeFrameAssOkCount: 511 MACMergeFragCountRx: 764 MACMergeFragCountTx: 0 MACMergeHoldCount: 0 Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_ethtool.c | 40 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_regs.h | 19 ++++++++++ 2 files changed, 59 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c index 16aa6e4e1727..90a9dbb0d901 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1835,6 +1835,45 @@ static int igc_ethtool_set_mm(struct net_device *netdev, return igc_tsn_offload_apply(adapter); } +/** + * igc_ethtool_get_frame_ass_error - Get the frame assembly error count. + * @dev: Pointer to the net_device structure. + * @return: The count of frame assembly errors. + */ +static u64 igc_ethtool_get_frame_ass_error(struct net_device *dev) +{ + struct igc_adapter *adapter = netdev_priv(dev); + u32 ooo_smdc, ooo_frame_cnt, ooo_frag_cnt; /* Out of order statistics */ + struct igc_hw *hw = &adapter->hw; + u32 miss_frame_frag_cnt; + u32 reg_value; + + reg_value = rd32(IGC_PRMEXPRCNT); + ooo_smdc = reg_value & IGC_PRMEXPRCNT_OOO_SMDC; + ooo_frame_cnt = (reg_value & IGC_PRMEXPRCNT_OOO_FRAME_CNT) + >> IGC_PRMEXPRCNT_OOO_FRAME_CNT_SHIFT; + ooo_frag_cnt = (reg_value & IGC_PRMEXPRCNT_OOO_FRAG_CNT) + >> IGC_PRMEXPRCNT_OOO_FRAG_CNT_SHIFT; + miss_frame_frag_cnt = (reg_value & IGC_PRMEXPRCNT_MISS_FRAME_FRAG_CNT) + >> IGC_PRMEXPRCNT_MISS_FRAME_FRAG_CNT_SHIFT; + + return ooo_smdc + ooo_frame_cnt + ooo_frag_cnt + miss_frame_frag_cnt; +} + +static void igc_ethtool_get_mm_stats(struct net_device *dev, + struct ethtool_mm_stats *stats) +{ + struct igc_adapter *adapter = netdev_priv(dev); + struct igc_hw *hw = &adapter->hw; + + stats->MACMergeFrameAssErrorCount = igc_ethtool_get_frame_ass_error(dev); + stats->MACMergeFrameSmdErrorCount = 0; /* Not available in IGC */ + stats->MACMergeFrameAssOkCount = rd32(IGC_PRMPTDRCNT); + stats->MACMergeFragCountRx = rd32(IGC_PRMEVNTRCNT); + stats->MACMergeFragCountTx = rd32(IGC_PRMEVNTTCNT); + stats->MACMergeHoldCount = 0; /* Not available in IGC */ +} + static int igc_ethtool_get_link_ksettings(struct net_device *netdev, struct ethtool_link_ksettings *cmd) { @@ -2124,6 +2163,7 @@ static const struct ethtool_ops igc_ethtool_ops = { .get_channels = igc_ethtool_get_channels, .get_mm = igc_ethtool_get_mm, .set_mm = igc_ethtool_set_mm, + .get_mm_stats = igc_ethtool_get_mm_stats, .set_channels = igc_ethtool_set_channels, .get_priv_flags = igc_ethtool_get_priv_flags, .set_priv_flags = igc_ethtool_set_priv_flags, diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h index 12ddc5793651..f40946cce35a 100644 --- a/drivers/net/ethernet/intel/igc/igc_regs.h +++ b/drivers/net/ethernet/intel/igc/igc_regs.h @@ -222,6 +222,25 @@ #define IGC_FTQF(_n) (0x059E0 + (4 * (_n))) /* 5-tuple Queue Fltr */ +/* Time sync registers - preemption statistics */ +#define IGC_PRMEVNTTCNT 0x04298 /* TX Preemption event counter */ +#define IGC_PRMEVNTRCNT 0x0429C /* RX Preemption event counter */ +#define IGC_PRMPTDRCNT 0x04284 /* Good RX Preempted Packets */ + + /* Preemption Exception Counter */ +#define IGC_PRMEXPRCNT 0x042A0 +/* Received out of order packets with SMD-C and NOT ReumeRx */ +#define IGC_PRMEXPRCNT_OOO_SMDC 0x000000FF +/* Received out of order packets with SMD-C and wrong Frame CNT */ +#define IGC_PRMEXPRCNT_OOO_FRAME_CNT 0x0000FF00 +#define IGC_PRMEXPRCNT_OOO_FRAME_CNT_SHIFT 8 +/* Received out of order packets with SMD-C and wrong Frag CNT */ +#define IGC_PRMEXPRCNT_OOO_FRAG_CNT 0x00FF0000 +#define IGC_PRMEXPRCNT_OOO_FRAG_CNT_SHIFT 16 +/* Received packets with SMD-S and ReumeRx */ +#define IGC_PRMEXPRCNT_MISS_FRAME_FRAG_CNT 0xFF000000 +#define IGC_PRMEXPRCNT_MISS_FRAME_FRAG_CNT_SHIFT 24 + /* Transmit Scheduling Registers */ #define IGC_TQAVCTRL 0x3570 #define IGC_TXQCTL(_n) (0x3344 + 0x4 * (_n))