From patchwork Mon Dec 16 22:30:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13910643 Received: from mail-io1-f48.google.com (mail-io1-f48.google.com [209.85.166.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 607F45D8F0; Mon, 16 Dec 2024 22:30:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388240; cv=none; b=Y5UbCU+5PRNsRq1xGrEytvkHg7fjz9lj3VogMh7JcohyO0KlXViBsmLAQKjtMzcq4sC0NsNZ2oERI2Ex4tox/NsgTyq4dxUW+TptDyGZMZijf1p7uCMrz7Mr9LbCdKjLSavzxJS1Sqt4lGr8AJDTLQG2SfbQg4TOu+97zoQu+MU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388240; c=relaxed/simple; bh=j1nmSz4h9xbZuxtFBuqrqJx2eZckGLAAhtREhszTjdE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hripM+my9WAdRcrxO6xqrUvfwPPfIEgdnMLhfPIVJ3vPBiTUQXNzbxa88vdEPtak6vmzoIQSAW+Ka2v233Hd0JC4qjbXFa5jHViLPXFYUqAcF/DDoACz3ZHF3A0PjZmlNipSFUckh//5mtxGS1lrXTC4WqNp6BMMguycXEV4eaY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=C6XSv0pb; arc=none smtp.client-ip=209.85.166.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="C6XSv0pb" Received: by mail-io1-f48.google.com with SMTP id ca18e2360f4ac-844ce213af6so155162139f.1; Mon, 16 Dec 2024 14:30:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734388238; x=1734993038; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LumiF4eO+NG7cdcWuV/5Rou+YqcDG+HnDje6/Mwwnx4=; b=C6XSv0pbY1b3eX9lt5eD47CwFUkl7S21A7AY0D/xUF4fZc0JrBe6+Be/ejQ+1QetiF 8DBGgAag34c1QQge0yO7uZNasJmTCy+97y2nqnZGULsBzLPPTyEt86H8VLAQDz1hf3Hj QBQCswI+2J16ERyGgUwy3Mq8O74nnXL6wIJxiRqqVoGlX6l8+l7y2gYCPCFHG1LKPvMT c5sywxJGJ4i/917Nn4sazVwazdeUF7ow69sEl6X7vnCVNo/fNiIjqLJfzTvhbWYTa3SD tjihewr5uqBsi0rr5hJfRbVbBZ1dpUhyZBsc/6GhwNI9SJTRuJFBdsKUT5eIF/ZY5cpZ /KfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734388238; x=1734993038; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LumiF4eO+NG7cdcWuV/5Rou+YqcDG+HnDje6/Mwwnx4=; b=i1whqrvg0Ufi4cfmVPW+abRIcCk2X2IiuB0O/i1pPg+B3Xn2LOncGp1pJzWp7BsCQR YEJ2SsDPQBzg+WqYxJ4CRrwSkdfwMiNRaLb10NYvFf1C5sTCCWCIb1xQRTC949mSlGwL vQBCjop7wO21EuoUJz7U7+TehclBol1w5sycOrdmVxbPCYvObAoxZL0il62m2ImDADdz WhDqrVRVWOsajteSR89Fxdxc/u7gYJsN965QZ6cnX6dX51urNT4o9B+2+ZX2U4zJv9RH AvnPUC8cd7mr/bwpyYz0JmoRPhYiXSwhdNN3sBmMAdl2kFVhgvbGlQqs+GoSsRJtNp4j m1Jg== X-Forwarded-Encrypted: i=1; AJvYcCU8YlxVO1imM7fZpDJ1DUCp64v/6iV8U2iR2mw58IVJUuxA3IECjadHMD0IvYodRoSNKwsbL8c7KzQEKjXMeg==@vger.kernel.org, AJvYcCW4AT9Qqx8szHFtWveQ8W5TyIrA71HOSXG114KAn+ui98o5HLGVnl5kjg4yoslDQySq5pd9GXMGZD67@vger.kernel.org, AJvYcCWjymLz2idqWVxrdLuYr07/ffZESiTwJ6KFsggEM+zUaavXWV92RFzSO3/kZl7cYfkTTXrUxSXTnf53@vger.kernel.org, AJvYcCX3q5mUsUv3ZRXBO/kKqC+bZU+L9Ji1fd5CPgBztEYmQUs97WlN1filG3AbTvhy0lPc5pIVqCgBw4WGnu8=@vger.kernel.org X-Gm-Message-State: AOJu0Yy2XqjXQ2Lhxsln/5xCCJPMPodLZ02inFMFYadfqpb2sn1Ixpvt f1A03sCz2+0gI+lXLv2ZI5ZBXJlVb48XQPYXRzAtxJZn1kjtHLZLoueB7vLp X-Gm-Gg: ASbGncsw73uUbn6EKCzoD/d4MpeRGZUDC2En3VwxEtBujxCPh+UuaaFSVEiqQeEsvZQ WznPQcsSLxqAMszZlAPuxdLSQiVgDt/iCOiXCUrd/wOJZhn0HHosUcTMxu9WbU4Mr+3RbncLMfd keo6ZN2XhWtq0NJZxUtyFVZdSwXaMslUzb4MFcVFxoCJsXsZfPS7uAxVe9+TvdcGZ5owLS0js1s 3UHHtdzDg1Uvo99yo0QKbuKUrSeYd7no99PVVyUdlzQ X-Google-Smtp-Source: AGHT+IFJ0zxweZtV4BUdI65ENjg0CAhLMFsEaAIVI8x1QLfLKS6Ods/5TZFSAOVbhNAB5xHYi/+Mug== X-Received: by 2002:a05:6602:1603:b0:843:eca9:a050 with SMTP id ca18e2360f4ac-844e880ffc0mr1229590639f.1.1734388238501; Mon, 16 Dec 2024 14:30:38 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::d916]) by smtp.gmail.com with ESMTPSA id ca18e2360f4ac-844f629270asm149168839f.25.2024.12.16.14.30.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 14:30:37 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v8 1/5] dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible Date: Mon, 16 Dec 2024 17:30:22 -0500 Message-ID: <20241216223019.70155-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241216223019.70155-8-mailingradian@gmail.com> References: <20241216223019.70155-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clocks on SDM670 and SDM845 have no significant differences that would require a change in the clock controller driver. The only difference is the clock frequency at each level of the power domains, which is not specified in the clock driver. There should still be a compatible specific to the SoC, so add the compatible for SDM670 with the SDM845 compatible as fallback. Link: https://android.googlesource.com/kernel/msm/+/d4dc50c0a9291bd99895d4844f973421c047d267/drivers/clk/qcom/camcc-sdm845.c#2048 Suggested-by: Vladimir Zapolskiy Suggested-by: Konrad Dybcio Link: https://lore.kernel.org/linux-arm-msm/7d26a62b-b898-4737-bd53-f49821e3b471@linaro.org Signed-off-by: Richard Acayan Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,sdm845-camcc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml index 810b852ae371..fa95c3a1ba3a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml @@ -20,7 +20,11 @@ allOf: properties: compatible: - const: qcom,sdm845-camcc + oneOf: + - items: + - const: qcom,sdm670-camcc + - const: qcom,sdm845-camcc + - const: qcom,sdm845-camcc clocks: items: From patchwork Mon Dec 16 22:30:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13910644 Received: from mail-il1-f172.google.com (mail-il1-f172.google.com [209.85.166.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D3895D8F0; Mon, 16 Dec 2024 22:30:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388245; cv=none; b=DWR/GPhpQXnvAKL1NVcV3hOSRjgW8EyzV9mUZaPrwwKXtPmR/ykdNhKkpA+rIA9DNsbcIhQNMqztbqVEzRle6JlnK+Lv6R2I0ASFHgaAYdqFL6c38FTceUYRlgWX+dieyQCNzFD79L6pzUeCLWjIHMAqVhXeWMktV8VkZx3xZuk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388245; c=relaxed/simple; bh=YWGe7Sr6bu/2HBP+o81rg9kJpGeA4nes5PCErEz/pDo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e/9r2daU5RUao3n+C2s8ZOw7ELgjZc5o2dWhvAlSzEr8fZg6NIdl7CPAz8c7Kf3aWvABY+XkSdvZRyJWHkPOh9PgX1R9ZqfNAZ80G99rZK8TFM+GP3v/uwpvFgCxL3B+NkDubeyWetmKfEwJZEo9IVtmF604yuE0srL7TxTNanU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=YNp7sLKK; arc=none smtp.client-ip=209.85.166.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YNp7sLKK" Received: by mail-il1-f172.google.com with SMTP id e9e14a558f8ab-3a8146a8ddaso14420525ab.1; Mon, 16 Dec 2024 14:30:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734388241; x=1734993041; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VtCkHaRrF0i1XxvGOTELO6P5OC+rwnEy8Udx8ZC9LuI=; b=YNp7sLKKugh2FH96a2zp6cRTFRsswR+fqeq5/stdP8WXm7DiG9rAQbTe5g6fjqYXZx 4N9vIbW2KVFUDwyPQ50wT6K3etxBqC+vNzO5g2MI7lwaxlp43TKuZubX50V0LYvXweko bvycsYrNbGI61fRL2cgMQpQ2cfFvWA1r+aOXUq2aLxQnRq6WSRCwF37iWAQU+Ua81eXs IePsPedysT9PPf6Z2YR69kSvwnkz17u/n/REhWbnpimn95Bgsitxa+S+b5Kcp0fU0M3H PRQv3PJ/QktBdzTlBVuHLbVUM8gkEo7S2MFThVbFJ5f5Jvttzi0lABH+8ODmQucKqScy SRqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734388241; x=1734993041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VtCkHaRrF0i1XxvGOTELO6P5OC+rwnEy8Udx8ZC9LuI=; b=I50ZGJ2VusVRm6IGf+l7PMO+LiPEfLyW6riztkkjB8H/n0oBgA2leGabvei6Sk26mG 3T7QQcMoi/Nxh4E9LXjfCcb89Lx9vShXbcio727HwBvgxpXiLfjec7/HISZYPUc7oJKu j1qmH0si5vUMKWMFvlzFO1z+1SswDjRiE5myy+5eM+dkbO20BvNgHTJvs6bAyIU6E/J/ k4NkGWcyfrBtoO4qkd0wKdMSPyZ/xMcWIASVK9h/lUbZw7lSDG4eHEB3LplRj8PVqx7o 0VTPOEPrbLEVRCU+9zVA45H62EpF5n370idB80xANnqLs5T0KjvntKzmradai4E6kmuM qzmg== X-Forwarded-Encrypted: i=1; AJvYcCUEJxIAW5dnJA0/alNwtZZejqtk/fs0USH2VG7+HHvASO823ODxkO74UAS1QS6+Wa8e9uEce39PPZ7ld8cu4g==@vger.kernel.org, AJvYcCUKHIhWJ49AKSPVJcOJjTGfKcB9axsXlGZWHyjXMtrSTKv4mV0Yv4+PPgJMrvf+CHJyyBjXvaM6nJzx@vger.kernel.org, AJvYcCXbtPTNXx5b2AyniROcyxTN20TwKdrt0GpcXJoVDZCvSgDKe8BsurSxDdd+KBNY3QSeTeAoEOdVhep/8CQ=@vger.kernel.org, AJvYcCXrgp94AMHuv9hUS+Yo7royqZGvUvrsCmddtK5Um/LKAzMAMrt3DmI3RrH5X3cFgT6YUoqoXW6hiw78@vger.kernel.org X-Gm-Message-State: AOJu0Yz82Z9Hp24mVpvtG4HXfNeeT17K2ESXNFhXsDwB3OKKMUYZLHSN jpgAxNlL2WaVLrNbGdwL87bm4J3nV5HTXLDK1nnq8zD4klKZHUnq X-Gm-Gg: ASbGncuzMd8v+CEyczwK9vV60uIbsKpxAmtBW0oPsQz4m3vy2P0WdX2RlEiCC6rdM9Z ZEYnmvRRTCWIgo3VQuhw2J07byC0C7DCEjcX1DpdIBqYJUas4tRaXURVYqxe4P5RR6p9TGLQLKd 978UIskaDFPwTHOm7DaQYesqJSCLLurjf6jIu8G6sHEYNVmk6h51W2gF8EWd2u2nCcCoukkNPyN ihVibMgyNpwqUQmOH3Gl1f6wkAGnTezRcsRbcjkypR3 X-Google-Smtp-Source: AGHT+IFfV5S95HjOEU9QcpHPy0kpRnmPfdeQF+FMrZT8KV3bESLY/sD7Uubt4328Bj8n0lyXPIDImA== X-Received: by 2002:a05:6e02:168d:b0:3a7:e732:472e with SMTP id e9e14a558f8ab-3aff4615f24mr124557855ab.4.1734388241275; Mon, 16 Dec 2024 14:30:41 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::d916]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4e5e32a33b7sm1401695173.111.2024.12.16.14.30.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 14:30:40 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v8 2/5] dt-bindings: media: camss: Add qcom,sdm670-camss Date: Mon, 16 Dec 2024 17:30:23 -0500 Message-ID: <20241216223019.70155-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241216223019.70155-8-mailingradian@gmail.com> References: <20241216223019.70155-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As found in the Pixel 3a, the Snapdragon 670 has a camera subsystem with 3 CSIDs and 3 VFEs (including 1 VFE lite). Add this camera subsystem to the bindings. Adapted from SC8280XP camera subsystem. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/qcom,sdm670-camss.yaml | 318 ++++++++++++++++++ 1 file changed, 318 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml new file mode 100644 index 000000000000..f8701a8d27fe --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -0,0 +1,318 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM670 Camera Subsystem (CAMSS) + +maintainers: + - Richard Acayan + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sdm670-camss + + reg: + maxItems: 9 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + clocks: + maxItems: 22 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: vfe0 + - const: vfe0_axi + - const: vfe0_cphy_rx + - const: vfe1 + - const: vfe1_axi + - const: vfe1_cphy_rx + - const: vfe_lite + - const: vfe_lite_cphy_rx + + iommus: + maxItems: 4 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY0. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY1. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY2. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - iommus + - power-domains + - power-domain-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camera-controller@acb3000 { + compatible = "qcom,sdm670-camss"; + + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + vdda-phy-supply = <&vreg_l1a_1p225>; + vdda-pll-supply = <&vreg_l8a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csiphy_ep0: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&front_sensor_ep>; + }; + }; + }; + }; + }; From patchwork Mon Dec 16 22:30:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13910645 Received: from mail-io1-f45.google.com (mail-io1-f45.google.com [209.85.166.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1289E5D8F0; Mon, 16 Dec 2024 22:30:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388247; cv=none; b=VqNuLqqLrswqdCgPK1liWAav0fXmAlOID2W3hL9U+FoF5eDq3PxUxwZts9xJ/QfM9oAtb7Fcs67HaHizOXGys3wSZIEWy45xnC4+lBDYRrPfotpU9mAcR6oqonBbC/1AMz20V/92vG56AfvYTiFye9yHbAJgTiZXAdTKTI8GoeA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388247; c=relaxed/simple; bh=SUXc9u0TWw5gGgqFBFaLmZM31gG/4GGYqseRp9tI0eA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d+dfT1D82OWNA3zEm9Q1LUnUAQrtKAy3+Ok5HXdykfsMvNWmHzsBApkdb8sjtz7O4ZpkPKXt63rDLBjRIKA8/6FIBFLCrlurHvAFxHKoiTwsZ+QERfoV4wHngYo8SF+1FSgcH+uVhG31iU1fAqZEBdz5R1Z88RSCiP+cReSYA6c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AYpij6A1; arc=none smtp.client-ip=209.85.166.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AYpij6A1" Received: by mail-io1-f45.google.com with SMTP id ca18e2360f4ac-844e394395aso129027239f.3; Mon, 16 Dec 2024 14:30:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734388245; x=1734993045; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sAMKrp0JYTN1qmcj0JowE768G+mhJyyGnyHL1I5N/Y0=; b=AYpij6A1OGy3NzxRuEzTdjIoKDMrMoaQP9nAYaKHJ0r195iCeSQCQmqpXtm8cBmljI WD5mqZHI+mEUrWJgPJ+NirehzSBOzDgajBK4rbjF+fnwzbHU1eoJlB4wKGwIgNqK1gs/ YOrr2Z9TUFgOQD21Bdh8vOz+0OXMlAoxbhw7YV1bAyI7/gz2ngOvtpM1RJgRZ6XyLOTz sZu77B+//eibwApL9N9AaXR+12FnrlfqyeRFH5D+TSf9F7tsrILqanBvFMuB0kZEpKHW uI4ty+IZg00O2JB71jdyi3oZ6Toh9aXXyfR7IhKqqe5XtVnF7uk/TLjk+MX2ohyyhf4J GBjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734388245; x=1734993045; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sAMKrp0JYTN1qmcj0JowE768G+mhJyyGnyHL1I5N/Y0=; b=nszOR0mnDr+0yiL7HTnRz4fGzz+9YMX44w+s0OPva1HqKvkDl8V724wcK5UjQjYuNp l+Xoei9XnR7BgGJKFO/zN0RAtZwfIKqpDaAiLpbTYeidbblbArKt+KguExlF2deODVlA r8wpN8GATzgIosGiLA1k46w0cWxcxiyV0hin4mTxjl6IA0YV8tBqXt5kldt/xNglJ/fS S50g62i2xU0u3yf6TeMQoh3vMT8njPfx6u42BZRvXFT1OFzbMjquHZ5gKgqeT+sD3zDo h+9friNYpTXnx0wk3TmohHz87kpIsBYnvRwV8TLIt2svM9wjklIG2dMpMi9dI5DQofXt QVxA== X-Forwarded-Encrypted: i=1; AJvYcCV6WO2JDEHr/ds2Z31O3p7ktRdBVWJXJXUp2askRGUCT6PDbBkEoXNPu6eKB2BUwMlDb/wxEUqu6L4d@vger.kernel.org, AJvYcCWMuXWC6TW42oPDy8v65y0EoqwSLKK+GGcYR429Ol1YA5sZ9MndVakXh67ZEWN9uK/yvitKeGER2W8VBnc=@vger.kernel.org, AJvYcCWZ6NySixvRbgOtnOxbdAnJFE8v/+R6kKNIeu5pDvr3362jfupYlDz2LfFdUTmRR2YYa2B/sFvLkzVsL++ulQ==@vger.kernel.org, AJvYcCXOZPY0Gb+1yLJd1huY4scafEb1PJD/bfkLi8RuNA43zlLBm2HIAU7I6MxrcuFnkZiyhXxO1Mhhn75r@vger.kernel.org X-Gm-Message-State: AOJu0Yx3Ar+tGxUX1FzzCabOZXZbOp1pcUqWmNNO8QN5s87mx76wgesa c0hU/GTn3OzGeyvNHzXB4EBSdxCD4Ev8fXguJaYwD6fMe+6LuG04 X-Gm-Gg: ASbGncuOH/mZ9NOhR0f4F2xJxccBp+abbAIAAUxpGJ9TUZOcu00S9Ndg0Or48p0DRlx jPfaLziMIbnhVaUebY0fT4ZfWmRtvZBvHrYDjf7hqF2Q5oDQNTyvXBpWUxa+bjH2bZ2ZCThloZA 8/XCt2Wr6m2PodBBCAG0e0AByZNNb0+JcM8obGOmvi+3YEGiLrYqLmgM+MamKHTCMLdc4TraUma Sf1JDFfqTta+ZSmx0albTA1Q5GF3hizmLXI+pApYPa9 X-Google-Smtp-Source: AGHT+IGw8iJLS9XfQoERiWK9b4sI3kwpeOpATbiohknGUzBz3ZUqIqj5tM1VknrgFO6fBedFcnp32g== X-Received: by 2002:a05:6e02:1989:b0:3a7:6e59:33ad with SMTP id e9e14a558f8ab-3aff80100a3mr112262315ab.17.1734388245152; Mon, 16 Dec 2024 14:30:45 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::d916]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-3b24cf3adedsm17783995ab.53.2024.12.16.14.30.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 14:30:43 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v8 3/5] media: qcom: camss: add support for SDM670 camss Date: Mon, 16 Dec 2024 17:30:24 -0500 Message-ID: <20241216223019.70155-11-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241216223019.70155-8-mailingradian@gmail.com> References: <20241216223019.70155-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera subsystem for the SDM670 the same as on SDM845 except with 3 CSIPHY ports instead of 4. Add support for the SDM670 camera subsystem. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Acked-by: Bryan O'Donoghue Reviewed-by: Vladimir Zapolskiy --- .../bindings/media/qcom,sdm670-camss.yaml | 72 +++---- drivers/media/platform/qcom/camss/camss.c | 191 ++++++++++++++++++ 2 files changed, 227 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml index f8701a8d27fe..892412fb68a9 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -31,21 +31,6 @@ properties: - const: vfe1 - const: vfe_lite - interrupts: - maxItems: 9 - - interrupt-names: - items: - - const: csid0 - - const: csid1 - - const: csid2 - - const: csiphy0 - - const: csiphy1 - - const: csiphy2 - - const: vfe0 - - const: vfe1 - - const: vfe_lite - clocks: maxItems: 22 @@ -74,6 +59,21 @@ properties: - const: vfe_lite - const: vfe_lite_cphy_rx + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + iommus: maxItems: 4 @@ -177,10 +177,10 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - clocks - clock-names + - interrupts + - interrupt-names - iommus - power-domains - power-domain-names @@ -221,25 +221,6 @@ examples: "vfe1", "vfe_lite"; - interrupts = , - , - , - , - , - , - , - , - ; - interrupt-names = "csid0", - "csid1", - "csid2", - "csiphy0", - "csiphy1", - "csiphy2", - "vfe0", - "vfe1", - "vfe_lite"; - clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, <&camcc CAM_CC_CPAS_AHB_CLK>, <&camcc CAM_CC_IFE_0_CSID_CLK>, @@ -285,6 +266,25 @@ examples: "vfe_lite", "vfe_lite_cphy_rx"; + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + iommus = <&apps_smmu 0x808 0x0>, <&apps_smmu 0x810 0x8>, <&apps_smmu 0xc08 0x0>, diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 9fb31f4c18ad..aba2dbc00e82 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -738,6 +738,185 @@ static const struct camss_subdev_resources vfe_res_660[] = { } }; +static const struct camss_subdev_resources csiphy_res_670[] = { + /* CSIPHY0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + } +}; + +static const struct camss_subdev_resources csid_res_670[] = { + /* CSID0 */ + { + .regulators = {}, + .clock = { "cpas_ahb", "soc_ahb", "vfe0", + "vfe0_cphy_rx", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID1 */ + { + .regulators = {}, + .clock = { "cpas_ahb", "soc_ahb", "vfe1", + "vfe1_cphy_rx", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID2 */ + { + .regulators = {}, + .clock = { "cpas_ahb", "soc_ahb", "vfe_lite", + "vfe_lite_cphy_rx", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + } +}; + +static const struct camss_subdev_resources vfe_res_670[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE-lite */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .is_lite = true, + .line_num = 4, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + } +}; + static const struct camss_subdev_resources csiphy_res_845[] = { /* CSIPHY0 */ { @@ -2582,6 +2761,17 @@ static const struct camss_resources sdm660_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sdm670_resources = { + .version = CAMSS_845, + .csiphy_res = csiphy_res_670, + .csid_res = csid_res_670, + .vfe_res = vfe_res_670, + .csiphy_num = ARRAY_SIZE(csiphy_res_670), + .csid_num = ARRAY_SIZE(csid_res_670), + .vfe_num = ARRAY_SIZE(vfe_res_670), + .link_entities = camss_link_entities +}; + static const struct camss_resources sdm845_resources = { .version = CAMSS_845, .csiphy_res = csiphy_res_845, @@ -2627,6 +2817,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, + { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, From patchwork Mon Dec 16 22:30:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13910646 Received: from mail-il1-f178.google.com (mail-il1-f178.google.com [209.85.166.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA55F1D9595; Mon, 16 Dec 2024 22:30:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388249; cv=none; b=MfXzukLki9tixGtWyhTFQqKzdaFnO6KP6PT9TUFhH3fnscPfH/iS1x3Kz4i1Bc/yp8mD/qof77PLBCfCtIr8MDQECwtpR/y7w4fymqdDdD4HHAH4oP06A2IpHYBnBXUmgCsG9ObaanabbFGq804bwbRGkgcU87yHPmyHit/C4G8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388249; c=relaxed/simple; bh=cA8ia9gUiiYNXiF6cnwGU5yb3IDiwQmbEW9UlFxwV/c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sN5MkY8gQes5pCkerqdRlHg7Gr5fy/Tuchi7hfTzZJztttUzDxZanMw1b6vbSGaMKQAkimaNgnSivOeHg85Pxyo2MBwGDm0G8n0cda8zF+Llq44e1FhVn9DTNULH43gOj5IiY6OH+qA24VWiOKTLl9FVW90v38baP5jI4eXDDsU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SHjak/vM; arc=none smtp.client-ip=209.85.166.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SHjak/vM" Received: by mail-il1-f178.google.com with SMTP id e9e14a558f8ab-3a77980fe3aso15333025ab.0; Mon, 16 Dec 2024 14:30:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734388247; x=1734993047; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=riRl3ZaZxwmWu/pRGOcAcSHXuWSTMJ3QmPDQGJ4LbYU=; b=SHjak/vMi+Y2Gnty9Y1uXduqANlGltQW97LQU8qgpqreUaROoXWzzVE/Mbk8YUIZz3 Buz0oOtf9+GNWM3EatlaMhypTNrqR2sa0ZHRzzLy+AtQbN2vLWrvTWXa/yBX+L8bYhH1 VvbYQWUhxwCi81mDi9J4jFfLLOmdQQIJKIn0cK7c92aiwaWAV94QiiLosEeraXzuagg8 RrPgVqEFXQ2jJXSCHtxMRfiklAzktAEk0jVSzPgGXwdr1hXzPTgfwuTRUylfnhCMJc8M tqOdkPZ8c2606d6VrWzVuRQz0eoQtX2q9ylKTpAw2V/yjSrodATqv/Q/TGzayq6bYLpw d/FQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734388247; x=1734993047; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=riRl3ZaZxwmWu/pRGOcAcSHXuWSTMJ3QmPDQGJ4LbYU=; b=AlzMaDXNMAPwZwLcweJz/0roeTNs1nvusuOVE4jIG7vnaBkZFK/E1mseLGI2Cp0jz3 wRJ+ZUFPdio0A0MJRT6PFn5iFX+NsVQgb3Dre3OlesG64qpGHmgjD10fTr41oTf0v+tD GgNi+JMFhQHz8b0chVeyIZMC7eX7ZyASwlXUVT0COGEIBVDfMlXQET+YxngO5dm6Y7G+ LYvTdVPyc+xrjgyRvIn7b10Eiry0hBV1Okv4ur+tjFh7DnpcsdXMDdLEDfQ3iecgNsFm NGcCseHG21gjkaIz1FrBUgT49xpnMWNusYk9RtsyZYl3joT1lWWa2KsQF6uLc2tcm2YT FzHg== X-Forwarded-Encrypted: i=1; AJvYcCUqN9M4QBiUfiviFINY4b872R+RX70rX0ZfwsUaxRDhgyHLpt4c6aYbw3D7RZztZlWPBq9QAr9MymIMTxI=@vger.kernel.org, AJvYcCV6Xq2u3nBn5JShtX0I7QIc+IGPRNUsX2dQiii3qtOZirv0suXiPf7iQRHk7jOngn+j4RYb+iTG2GBu@vger.kernel.org, AJvYcCWWWXfYPX6yfYkk9IzP4cwudkv8X7Usb6+KfrxsBUwjlLwpRDmoJwjRyliMm80COWyyMKOrEPpRiqLR@vger.kernel.org, AJvYcCWsoBVpxVldIBmkxNLB9mePnBfcRo0wBQ2OUNj3wSdDsgOtrvXLaUh7DgrY+icjdNYau4lUH6JJzanmAqq/2g==@vger.kernel.org X-Gm-Message-State: AOJu0YwmxAgXoRdH7umgaWJD7KRmdBUBiIRrTfDhIGYxL69XC1f04LLi zozZN6JhW/bzz+VVAvyp9Y73cCaq3WY53fFHA1tkKaQdHggNy0y6 X-Gm-Gg: ASbGnctmapYfL5sl13+1MqeObN1/u7a0qgT4MnPIX0mhXKayX8F0HfJs+t7mAlxNH9L eEj2IYqShPL7DyOxkOW9RNayFOVJ00+OaExtb70bdSsqKEa9ecOG6WWNJgZmLsGVCgwZu0Ruiap jKT0R2DGVSms49hiOL5vVs+ORnI08Chu0zn50Xnkz8bjHO/Tmm0ey6AB7II9ovCWTyrxjxPQ/MG JtZ2/u24mzRCzr2g+9Fd2U16blthYlf4bZE4X6kv+iL X-Google-Smtp-Source: AGHT+IFty8oOihyivle+8peJGnh6EmrnG8Ai/vww0qs6bD9CwGd2q3ARpqE2MtX7XaA9wksjI7r29A== X-Received: by 2002:a92:c145:0:b0:3a8:13d5:bd2c with SMTP id e9e14a558f8ab-3bb076fd9d6mr11316335ab.2.1734388247037; Mon, 16 Dec 2024 14:30:47 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::d916]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4e5e32a336bsm1419661173.100.2024.12.16.14.30.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 14:30:46 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v8 4/5] arm64: dts: qcom: sdm670: add camcc Date: Mon, 16 Dec 2024 17:30:25 -0500 Message-ID: <20241216223019.70155-12-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241216223019.70155-8-mailingradian@gmail.com> References: <20241216223019.70155-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clock controller on SDM670 controls the clocks that drive the camera subsystem. The clocks are the same as on SDM845. Add the camera clock controller for SDM670. Reviewed-by: Bryan O'Donoghue Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index c93dd06c0b7d..328096b91126 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1400,6 +1400,16 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: display-subsystem@ae00000 { compatible = "qcom,sdm670-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Mon Dec 16 22:30:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13910647 Received: from mail-il1-f172.google.com (mail-il1-f172.google.com [209.85.166.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E98081D9595; Mon, 16 Dec 2024 22:30:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388252; cv=none; b=DKf4BGdKluCmFxDDVnWZerIFjCag0uL/hkKfKOzhbqAu8ru0agf9mSpFCQNqFQ3eRn2i/jDQtZk6ElCcX3+ep4V2ZPPh0w41Cx4N0jKf9Pa3aRU1JQt87uGyKL+2a/9zu7CQvFb2ORJbGSxx5hCMHeGwQjEIxubwSs++Y95lZ54= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734388252; c=relaxed/simple; bh=D6HafcycUX/EFtUqIaMfl7jdirUZ3qGVXb+NW3pysr0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SmHM3dJDgrpFub07ngHg0X/4QVde8EbpdKmmTsMktfG0xyVQ8PIukyxlxI7A5eNQ1kNMqn9lGeBNIzchZGFCaWqDu1SiieaeWgXr84Prw7XX5rrdTy0Z7oSUmtzzEz437VRnMv1sDOuaRv1lQti3f0ezA3V1vAb39V3FFqoDsSI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=loWqqdWd; arc=none smtp.client-ip=209.85.166.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="loWqqdWd" Received: by mail-il1-f172.google.com with SMTP id e9e14a558f8ab-3a9cee9d741so39842965ab.3; Mon, 16 Dec 2024 14:30:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734388250; x=1734993050; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=taKwwUF4bAATYZj9kNFDvG2mHEOjX+/eBWr1rC1nBhQ=; b=loWqqdWdn61nTgE8Lojmvwzp2QVrK6hEPW8uRaiWPrt+/ca4BbsqTdIcuu/kSzayfF 6S2AO/l9e0VwkuTcW+8sW1wJBaeXAohLODSFSR2MK8plt4dyqNXM9yawcmfxVPTRvEzf NNwfnEbxtK5taYf7UgvNOJhspAWlm5qoQoVtKy+7lRHLp09T06weJVWzgENt2YCUdjJ8 bP4HE/nzP0TqO6BQ0DlVqR+L/sNmbvccxyPN+i7QZpv9irIu7f6FSeRoUEMDnBRWvuP3 BwjhZsSNJyBDyJRuh2q1nTuUm+UeuDC4YptDpFaks4bSlTNXqM18lytXmlxltgXVrZVP piGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734388250; x=1734993050; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=taKwwUF4bAATYZj9kNFDvG2mHEOjX+/eBWr1rC1nBhQ=; b=HZpTWaajfMh04j9/sJCGgUAwOPukqBN0yZ9moPwzoKrhH+il8LTX9DF4OUQOFuQQi0 96Ar209T5oMDXw+j/mSJ1hHdplxrYvLkpNRWvyVYMi2nol1zi4E3QmDSoQXr2bsRyNJ/ qlLgIo1Yw2T+MgWKE6LCnNU9URABmp9PLkyRUmNNWmHqS9SLACw19tuOTgMuYPms+FlB uDY2hXTJJ9Fo6aHItg9EzE2Vvf3FcnfOYKCAI4wsK4N+NVl2G0Ar2EPnnCmXxLCGKCWv dpdbPpPKlrSKkn2V2vgbbkrJr4ffp0dUo4pl4P9guom+kgJDi67iuwXLaNVIzuKEkxIC sZmg== X-Forwarded-Encrypted: i=1; AJvYcCUTHgM1Yznlk6oVprfo3Rr/5JieRQNrBsopYJPUPxisVTyBBxKQRO+lTcadM4+1dkEfOIlsQ6SugLk6@vger.kernel.org, AJvYcCVRSAKtXheTK+xe/jXeM9+NYcsyU1WFnAjbM/IgS0heUg5tXT3+ExZJ2S6fO9av9ig36sk+wdfdpuqO@vger.kernel.org, AJvYcCW5ullapkicX3ig1xVZhVW7xGjU5yF7EqoDLFSt2p61Fb2d8Bpnru2bNRbN89qT/ZUbTqHPsnSIFHEG7J6fSQ==@vger.kernel.org, AJvYcCXjO+ESgiV9faOlaTjyvrf/7IC0ndvgNnqa7nYcm2bLyNaDXJDhEB/pvxxfilCN8Exvim52pv3AbWkgm3Q=@vger.kernel.org X-Gm-Message-State: AOJu0YzwqOEqv2z/bh68jyLK15CZJEOC5XLFxXr6x/fIQvUl2Ecio8RP vD2qrCccLtLO5kwuwGhJtEf/c/0Y3EMJuWXxff9a80h31C2mYGQl X-Gm-Gg: ASbGncv/0Vk+cefK/5VkTzz+TFynp8n+cqJ3iWqsTKtVJmozpUQWNkBJOYt0vVFK1zb UJngYm3ez2vvT9MBF138p7eaSe6Zc5tbFWvGdL7p3T/mQt/buPzKdyIK/OvUeYM1XWJq5oJ3ejd YHdOdSa5HYyS09HZsx7ihKBKapE4CmwR+6QF3cEIF9WyY8Xf4jrlfbrQCeQ0QFxTfuuuG8ZHyLM 6o4KIHKD6rd7iCddh9SSwCA3t8FSPSEtuVQsU6de7A/ X-Google-Smtp-Source: AGHT+IGE2PuithjN1n9QJC4e/W2MNQa3/EM2bNkUGgfItRp8e//YlVpzo5wnDQBYAmrJFVPpszEgrQ== X-Received: by 2002:a05:6e02:3308:b0:3a7:70a4:6877 with SMTP id e9e14a558f8ab-3bad2ea6ee0mr16670445ab.7.1734388250088; Mon, 16 Dec 2024 14:30:50 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::d916]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-3b2475afae7sm17987335ab.13.2024.12.16.14.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 14:30:49 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v8 5/5] arm64: dts: qcom: sdm670: add camss and cci Date: Mon, 16 Dec 2024 17:30:26 -0500 Message-ID: <20241216223019.70155-13-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241216223019.70155-8-mailingradian@gmail.com> References: <20241216223019.70155-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 670. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Reviewed-by: Vladimir Zapolskiy --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 185 +++++++++++++++++++++++++++ 1 file changed, 185 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 328096b91126..d4e1251ada04 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2022, Richard Acayan. All rights reserved. */ +#include #include #include #include @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 { gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + qup_i2c0_default: qup-i2c0-default-state { pins = "gpio0", "gpio1"; function = "qup0"; @@ -1400,6 +1429,162 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + cci: cci@ac4a000 { + compatible = "qcom,sdm670-cci", "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + + reg = <0 0x0ac4a000 0 0x4000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_CLK>; + clock-names = "camnoc_axi", + "soc_ahb", + "cpas_ahb", + "cci"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + camss: camera-controller@acb3000 { + compatible = "qcom,sdm670-camss"; + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + camss_port0: port@0 { + reg = <0>; + }; + + camss_port1: port@1 { + reg = <1>; + }; + + camss_port2: port@2 { + reg = <2>; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc"; reg = <0 0x0ad00000 0 0x10000>;