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For the Direct map region, the upper bound was calculated incorrectly in efadb18dd58aba ("xen/riscv: add VM space layout"). It should be 0x7f80000000 (considering that the value is exclusive, instead of 0x7f40000000). Therefore, the inclusive upper bound for that region is 0x7f80000000 - 1. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - update the commit message: add explanation about direct map upper bound. --- Changes in v2: - new patch --- xen/arch/riscv/include/asm/config.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 4954677aff..826e5c7172 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -41,17 +41,17 @@ * Start addr | End addr | Slot | area description * ============================================================================ * ..... L2 511 Unused - * 0xffffffffc0a00000 0xffffffffc0c00000 L2 511 Fixmap + * 0xffffffffc0a00000 0xffffffffc0bfffff L2 511 Fixmap * ..... ( 2 MB gap ) - * 0xffffffffc0400000 0xffffffffc0800000 L2 511 FDT + * 0xffffffffc0400000 0xffffffffc07fffff L2 511 FDT * ..... ( 2 MB gap ) - * 0xffffffffc0000000 0xffffffffc0200000 L2 511 Xen + * 0xffffffffc0000000 0xffffffffc01fffff L2 511 Xen * ..... L2 510 Unused - * 0x3200000000 0x7f40000000 L2 200-509 Direct map + * 0x3200000000 0x7f7fffffff L2 200-509 Direct map * ..... L2 199 Unused - * 0x30c0000000 0x31c0000000 L2 195-198 Frametable + * 0x30c0000000 0x31bfffffff L2 195-198 Frametable * ..... L2 194 Unused - * 0x3040000000 0x3080000000 L2 193 VMAP + * 0x3040000000 0x307fffffff L2 193 VMAP * ..... L2 0-192 Unused #elif RV_STAGE1_MODE == SATP_MODE_SV48 * Memory layout is the same as for SV39 in terms of slots, so only start and From patchwork Tue Dec 17 16:32:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13912198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED128E77189 for ; Tue, 17 Dec 2024 16:33:12 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.859437.1271583 (Exim 4.92) (envelope-from ) id 1tNaVJ-0001or-Oy; Tue, 17 Dec 2024 16:33:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 859437.1271583; Tue, 17 Dec 2024 16:33:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tNaVJ-0001oA-Is; Tue, 17 Dec 2024 16:33:01 +0000 Received: by outflank-mailman (input) for mailman id 859437; Tue, 17 Dec 2024 16:33:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tNaVI-0001J8-4n for xen-devel@lists.xenproject.org; Tue, 17 Dec 2024 16:33:00 +0000 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [2a00:1450:4864:20::230]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 92d7d980-bc94-11ef-99a3-01e77a169b0f; Tue, 17 Dec 2024 17:32:57 +0100 (CET) Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-3003e203acaso52208471fa.1 for ; Tue, 17 Dec 2024 08:32:57 -0800 (PST) Received: from fedora.. ([94.75.70.14]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-30344175b51sm13179021fa.69.2024.12.17.08.32.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 08:32:56 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 92d7d980-bc94-11ef-99a3-01e77a169b0f DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734453177; x=1735057977; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=B8fF4Ot/dFUzo2CoSRWH7wpyHlIxb6JWOqFio7Z7p/Y=; b=RgCZW4OaMBMl0hdncO/Lr2SI6Q1JTXTsOFdAS/A7zB4Ptp6zoe5YFlBVtqvJ42kR99 Z2aj0Mz6xq86BBS3warbQG7r+8PjLOehRvp+n+3ItY0OTaBSjgYWcYJsM41nFRy4qNvT 05ZQ6JedesrtgD0naA8pWB70PwHGB06bWPZlmZj+U9HhH09UqdzFTtmWggQYcpybUNAE FxJVgpxCnAHrpSPvgDNjjVITCSPTDuliknRjMeK/h7Nj7zYd5h7NIYRpGTMOvAKOoI3Q 9MmNyjnqTvL2pFXhU8z+72tt7I+twYua7ptWjSi9L9CPj/j8lI8TJXa3lQXXxONNZG5y xBVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734453177; x=1735057977; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B8fF4Ot/dFUzo2CoSRWH7wpyHlIxb6JWOqFio7Z7p/Y=; b=LBlenSV3de/7K9FnCVefNoSL+jdYtu9HAybEGmhE4I0W4WSOsRzfjwLZ7LS8RGeXX/ gH/jSOrdFG1YNWAh5i5oDguMkX3NOB+fmWWE3I506GiPoRrPXswV/cSWVwQRe6hiW84i d66jcjkXi6/WhGECULwYlL+m+uc3fazU/WTqLCQvpImfhdd2OgnJdWsJwIW3T9iLQK5A rzwEaCtW5eqcONIqlE96/u5loc3i12cyU9EiWBE0zb87crug/j3LSgUCgYeDV0JRewH5 jEePb52KyVIK1MpcheGpzxka4J4PSjlHuKz/inMax3VrPrJDBrw6iLqlpSj3MdEX1Q8E XT3w== X-Gm-Message-State: AOJu0Yy20qqWxO2PmbWji8ayeS0zVehLqVMxwfc/KCVvd4o1fjizVwe1 fxB6KcGnvhicR2HNtg8OBT8tNVcIisdjpg7wFe019vjkPLijoF5kCi0PxZlc X-Gm-Gg: ASbGncvm802dhAQte35wM1JBg9AMm8F0OKW0rS37zsyV0UmJUpMvhIeT70pkExWOVW7 IfOWU/LengzHdQ4N730jQqWdzDMLgikttMGxbtyZR3zlvkJo/bAeVVcmtGjVcfAXBsVfp+HRFLE DyGcnGATv8mtVSQiz86Hs/cTq1VLwY5f2yQt+Np7FUqw3mxv/D1VranjYMwXl+Uxf6uon9WyFCC KQKLqnR2zbLj/dPBANgXEg4N05yLkL0G+501Nt6tse3bJ1V1Vt/68C0kA== X-Google-Smtp-Source: AGHT+IH2JOIKtRnNsomRm3tKEqH8lmP6boS2Fzn0jxvAbIOolpLhsFdfZkCNLix1IEEMZA1IFzEC0w== X-Received: by 2002:a2e:a9a6:0:b0:302:1d7a:e09 with SMTP id 38308e7fff4ca-3044d29d399mr258061fa.31.1734453176861; Tue, 17 Dec 2024 08:32:56 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3 2/7] xen/riscv: add destroy_xen_mappings() to remove mappings in Xen page tables Date: Tue, 17 Dec 2024 17:32:46 +0100 Message-ID: <35f03b576d8423ca5b8764fdfe3251836f7b4a9a.1734452721.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: References: MIME-Version: 1.0 Introduce the destroy_xen_mappings() function, which removes page mappings in Xen's page tables between a start address s and an end address e. The function ensures that both s and e are page-aligned and verifies that the start address is less than or equal to the end address before calling pt_update() to invalidate the mappings. The pt_update() function is called with INVALID_MFN and PTE_VALID=0 in the flags, which tell pt_update() to remove mapping. No additional ASSERT() is required to check these arguments, as they are hardcoded in the call to pt_update() within destroy_xen_mappings(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in V3: - Fix code style: drop blanks in condition part of ternary operation. --- Changes in V2: - Drop ASSERT(s <= e). - Update implementation of destroy_xen_mappings() to avoid calling of pt_update() when start_addr >= end_addr and return -EINVAL. - Add Acked-by: Jan Beulich . --- xen/arch/riscv/mm.c | 6 ------ xen/arch/riscv/pt.c | 8 ++++++++ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c index 9359dc7f33..f2bf279bac 100644 --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -360,12 +360,6 @@ int xenmem_add_to_physmap_one(struct domain *d, unsigned int space, return 0; } -int destroy_xen_mappings(unsigned long s, unsigned long e) -{ - BUG_ON("unimplemented"); - return -1; -} - void share_xen_page_with_guest(struct page_info *page, struct domain *d, enum XENSHARE_flags flags) { diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c index d62aceb36c..2ca23206f4 100644 --- a/xen/arch/riscv/pt.c +++ b/xen/arch/riscv/pt.c @@ -421,6 +421,14 @@ int map_pages_to_xen(unsigned long virt, return pt_update(virt, mfn, nr_mfns, flags); } +int destroy_xen_mappings(unsigned long s, unsigned long e) +{ + ASSERT(IS_ALIGNED(s, PAGE_SIZE)); + ASSERT(IS_ALIGNED(e, PAGE_SIZE)); + + return (s < e) ? pt_update(s, INVALID_MFN, PFN_DOWN(e - s), 0) : -EINVAL; +} + int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns) { return pt_update(virt, INVALID_MFN, nr_mfns, PTE_POPULATE); From patchwork Tue Dec 17 16:32:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13912196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7FC5DE7717F for ; Tue, 17 Dec 2024 16:33:11 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.859436.1271578 (Exim 4.92) (envelope-from ) id 1tNaVJ-0001lp-Du; Tue, 17 Dec 2024 16:33:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 859436.1271578; Tue, 17 Dec 2024 16:33:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tNaVJ-0001le-A3; Tue, 17 Dec 2024 16:33:01 +0000 Received: by outflank-mailman (input) for mailman id 859436; Tue, 17 Dec 2024 16:32:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tNaVH-0001JJ-TT for xen-devel@lists.xenproject.org; Tue, 17 Dec 2024 16:32:59 +0000 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [2a00:1450:4864:20::234]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 93adbe3e-bc94-11ef-a0d6-8be0dac302b0; Tue, 17 Dec 2024 17:32:59 +0100 (CET) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-3035210e2d1so20865321fa.2 for ; Tue, 17 Dec 2024 08:32:59 -0800 (PST) Received: from fedora.. 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The set_fixmap() function maps a 4k page ( as only L0 is expected to be updated; look at setup_fixmap_mappings() ) at a specified fixmap entry using map_pages_to_xen(), while clear_fixmap() removes the mapping from a fixmap entry by calling destroy_xen_mappings(). Both functions ensure that the operations succeed by asserting that their respective calls (map_pages_to_xen() and destroy_xen_mappings()) return 0. `BUG()` is added to trigger a failure if any issues occur during the mapping or unmapping process. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in V3: - Fix code style: ident if-condition properly. --- Changes in V2: - Update the commit message. - drop local variables from {set, clear}_fixmap(); use if (... != 0) + BUG(). --- xen/arch/riscv/include/asm/fixmap.h | 5 +++++ xen/arch/riscv/pt.c | 16 ++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/xen/arch/riscv/include/asm/fixmap.h b/xen/arch/riscv/include/asm/fixmap.h index 818c8ce07b..e399a15f53 100644 --- a/xen/arch/riscv/include/asm/fixmap.h +++ b/xen/arch/riscv/include/asm/fixmap.h @@ -32,6 +32,11 @@ */ extern pte_t xen_fixmap[]; +/* Map a page in a fixmap entry */ +void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags); +/* Remove a mapping from a fixmap entry */ +void clear_fixmap(unsigned int map); + #define fix_to_virt(slot) ((void *)FIXMAP_ADDR(slot)) static inline unsigned int virt_to_fix(vaddr_t vaddr) diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c index 2ca23206f4..aea9f97a5a 100644 --- a/xen/arch/riscv/pt.c +++ b/xen/arch/riscv/pt.c @@ -8,6 +8,7 @@ #include #include +#include #include #include @@ -433,3 +434,18 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns) { return pt_update(virt, INVALID_MFN, nr_mfns, PTE_POPULATE); } + +/* Map a 4k page in a fixmap entry */ +void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags) +{ + if ( map_pages_to_xen(FIXMAP_ADDR(map), mfn, 1, flags | PTE_SMALL) != 0 ) + BUG(); +} + +/* Remove a mapping from a fixmap entry */ +void clear_fixmap(unsigned int map) +{ + if ( destroy_xen_mappings(FIXMAP_ADDR(map), + FIXMAP_ADDR(map) + PAGE_SIZE) != 0 ) + BUG(); +} From patchwork Tue Dec 17 16:32:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13912199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E83D5E77184 for ; Tue, 17 Dec 2024 16:33:12 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.859439.1271604 (Exim 4.92) (envelope-from ) id 1tNaVM-0002LJ-Dt; Tue, 17 Dec 2024 16:33:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 859439.1271604; Tue, 17 Dec 2024 16:33:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tNaVM-0002K9-5u; Tue, 17 Dec 2024 16:33:04 +0000 Received: by outflank-mailman (input) for mailman id 859439; Tue, 17 Dec 2024 16:33:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tNaVK-0001JJ-Ry for xen-devel@lists.xenproject.org; Tue, 17 Dec 2024 16:33:02 +0000 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [2a00:1450:4864:20::12d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 955e1109-bc94-11ef-a0d6-8be0dac302b0; Tue, 17 Dec 2024 17:33:02 +0100 (CET) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-54025432becso5484100e87.1 for ; Tue, 17 Dec 2024 08:33:02 -0800 (PST) Received: from fedora.. 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Currently, only QEMU is supported, which does not model cache behavior. Therefore, clean_and_invalidate_dcache_va_range() and clean_dcache_va_range() are implemented to simply return 0. For other cases, generate compilation error so a user won't miss to update this function if necessery. If hardware supports CMO or hardware-specific instructions, these functions should be updated accordingly. To support current implementation of these function CONFIG_QEMU_PLATFORM is introduced. invalidate_icache() is implemented using fence.i instruction as mentioned in the unpriv spec: The FENCE.I instruction was designed to support a wide variety of implementations. A simple implementation can flush the local instruction cache and the instruction pipeline when the FENCE.I is executed. A more complex implementation might snoop the instruction (data) cache on every data (instruction) cache miss, or use an inclusive unified private L2 cache to invalidate lines from the primary instruction cache when they are being written by a local store instruction. If instruction and data caches are kept coherent in this way, or if the memory system consists of only uncached RAMs, then just the fetch pipeline needs to be flushed at a FENCE.I. The FENCE.I instruction requires the presence of the Zifencei extension, which might not always be available. However, Xen uses the RV64G ISA, which guarantees the presence of the Zifencei extension. According to the unprivileged ISA specification (version 20240411): One goal of the RISC-V project is that it be used as a stable software development target. For this purpose, we define a combination of a base ISA (RV32I or RV64I) plus selected standard extensions (IMAFD, Zicsr, Zifencei) as a "general-purpose" ISA, and we use the abbreviation G for the IMAFDZicsr_Zifencei combination of instruction-set extensions. Set CONFIG_QEMU_PLATFORM=y in tiny64_defconfig to have proper implemtation of clean_and_invalidate_dcache_va_range() and clean_dcache_va_range() for CI. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in V3: - Updates for config QEMU: - Rename CONFIG_QEMU to CONFIG_QEMU_PLATFORM. - Drop "depends on RISCV_64" property for Config QEMU_PLATFORM. - Split help string. - Update implementation of the functions: clean_and_invalidate_dcache_va_range() and clean_dcache_va_range(). - Minimal code style fixes: move second argument of clean_and_invalidate_dcache_va_range() to next line. - Update the commit message. --- Changes in V2: - Update the commit message and subject: - drop information about HAS_CMO; - add information about Zifencei extension; - Introdce platforms directory and CONFIG_QEMU; update implementation of data/instruction cache operations as returning 0 for CONFIG_QEMU and for others - return -ENOTSUPP. - Drop HAS_CMO config. --- xen/arch/riscv/Kconfig | 2 ++ xen/arch/riscv/configs/tiny64_defconfig | 1 + xen/arch/riscv/include/asm/page.h | 22 +++++++++++++++++++++- xen/arch/riscv/platforms/Kconfig | 5 +++++ 4 files changed, 29 insertions(+), 1 deletion(-) create mode 100644 xen/arch/riscv/platforms/Kconfig diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 1858004676..00f329054c 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -52,6 +52,8 @@ config RISCV_ISA_C endmenu +source "arch/riscv/platforms/Kconfig" + source "common/Kconfig" source "drivers/Kconfig" diff --git a/xen/arch/riscv/configs/tiny64_defconfig b/xen/arch/riscv/configs/tiny64_defconfig index fc7a04872f..6af563bd73 100644 --- a/xen/arch/riscv/configs/tiny64_defconfig +++ b/xen/arch/riscv/configs/tiny64_defconfig @@ -10,3 +10,4 @@ CONFIG_RISCV_64=y CONFIG_DEBUG=y CONFIG_DEBUG_INFO=y CONFIG_EXPERT=y +CONFIG_QEMU_PLATFORM=y diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index bf3f75e85d..c82432dc67 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -7,6 +7,7 @@ #include #include +#include #include #include @@ -148,9 +149,28 @@ static inline bool pte_is_mapping(pte_t p) return (p.pte & PTE_VALID) && (p.pte & PTE_ACCESS_MASK); } +static inline int clean_and_invalidate_dcache_va_range(const void *p, + unsigned long size) +{ +#ifndef CONFIG_QEMU_PLATFORM + #error "should clean_and_invalidate_dcache_va_range() be updated?" +#endif + + return 0; +} + +static inline int clean_dcache_va_range(const void *p, unsigned long size) +{ +#ifndef CONFIG_QEMU_PLATFORM + #error "should clean_dcache_va_range() be updated?" +#endif + + return 0; +} + static inline void invalidate_icache(void) { - BUG_ON("unimplemented"); + asm volatile ( "fence.i" ::: "memory" ); } #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) diff --git a/xen/arch/riscv/platforms/Kconfig b/xen/arch/riscv/platforms/Kconfig new file mode 100644 index 0000000000..710423a59a --- /dev/null +++ b/xen/arch/riscv/platforms/Kconfig @@ -0,0 +1,5 @@ +config QEMU_PLATFORM + bool "QEMU based platform support" + help + Enable all the required drivers for QEMU riscv64 + virt emulated machine. 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in V3: - Rewrite part of flush_page_to_ram() to use BUG() instead of BUG_ON(). - Add Acked-by: Jan Beulich . --- Changes in V2: - Drop variable directmap_virt_end. - Update ASSERT in virt_to_page() to use DIRECTMAP_VIRT_END instead of variable directmap_virt_end. - Declare local varibale v as const inside flush_page_to_ram(). - Declare copy_from_paddr() in riscv/setup.h as in the future it will be used for copying kernel in guest memory. - Code style updates for copy_from_paddr(). - Make l and s variable in copy_from_paddr() as the virables' initializers. - Drop call of clean_dcache_va_range(dst, l) in copy_from_paddr() as the necessiry of it is Arm-specific: After memcpy'ing the kernel in guest memory Arm need to flush the dcache to make sure that the data actually reaches the memory before we start executing guest code with caches disabled. RISC-V has caches always enabled thereby there is no such issue for RISC-V. - Make local variable src in copy_from_paddr() as const. - Update the commit message and subject: drop information of relocate_fdt() introduction and rename it to "prereq for DTB relocation". - Add BUG_ON() inside flush_page_to_ram() to check the return value of clean_and_invalidate_dcache_va_range(). - Move relocate_fdt() introduction to the next patch to make this patch compilable. --- xen/arch/riscv/include/asm/mm.h | 8 ++++++-- xen/arch/riscv/include/asm/page.h | 12 ++++++++++-- xen/arch/riscv/include/asm/setup.h | 4 ++++ xen/arch/riscv/setup.c | 26 ++++++++++++++++++++++++++ 4 files changed, 46 insertions(+), 4 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 699ed23f0d..292aa48fc1 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -148,8 +149,11 @@ static inline void *page_to_virt(const struct page_info *pg) /* Convert between Xen-heap virtual addresses and page-info structures. */ static inline struct page_info *virt_to_page(const void *v) { - BUG_ON("unimplemented"); - return NULL; + unsigned long va = (unsigned long)v; + + ASSERT((va >= DIRECTMAP_VIRT_START) && (va <= DIRECTMAP_VIRT_END)); + + return frametable_virt_start + PFN_DOWN(va - directmap_virt_start); } /* diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index c82432dc67..a1d54c7fb1 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -7,6 +7,7 @@ #include #include +#include #include #include @@ -176,10 +177,17 @@ static inline void invalidate_icache(void) #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) #define copy_page(dp, sp) memcpy(dp, sp, PAGE_SIZE) -/* TODO: Flush the dcache for an entire page. */ static inline void flush_page_to_ram(unsigned long mfn, bool sync_icache) { - BUG_ON("unimplemented"); + const void *v = map_domain_page(_mfn(mfn)); + + if ( clean_and_invalidate_dcache_va_range(v, PAGE_SIZE) ) + BUG(); + + unmap_domain_page(v); + + if ( sync_icache ) + invalidate_icache(); } /* Write a pagetable entry. */ diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index 844a2f0ef1..c9d69cdf51 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -3,10 +3,14 @@ #ifndef ASM__RISCV__SETUP_H #define ASM__RISCV__SETUP_H +#include + #define max_init_domid (0) void setup_mm(void); +void copy_from_paddr(void *dst, paddr_t paddr, unsigned long len); + #endif /* ASM__RISCV__SETUP_H */ /* diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 9680332fee..bea3f27c4d 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -26,6 +27,31 @@ void arch_get_xen_caps(xen_capabilities_info_t *info) unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); +/** + * copy_from_paddr - copy data from a physical address + * @dst: destination virtual address + * @paddr: source physical address + * @len: length to copy + */ +void __init copy_from_paddr(void *dst, paddr_t paddr, unsigned long len) +{ + const void *src = (void *)FIXMAP_ADDR(FIX_MISC); + + while ( len ) + { + unsigned long s = paddr & (PAGE_SIZE - 1); + unsigned long l = min(PAGE_SIZE - s, len); + + set_fixmap(FIX_MISC, maddr_to_mfn(paddr), PAGE_HYPERVISOR_RW); + memcpy(dst, src + s, l); + clear_fixmap(FIX_MISC); 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Unflatten a device tree, creating the tree of struct device_node. It also fills the "name" and "type" pointers of the nodes so the normal device-tree walking functions can be used. Set device_tree_flattened to NULL in the case when acpi_disabled is equal to false. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in V3: - Add Acked-by: Jan Beulich . --- Changes in V2: - Move introduction of relocate_fdt() to the current patch with the following change: - use xvmalloc() instead of xmalloc_bytes() in relocate_fdt(); - Drop the check of returned fdt_size from boot_fdt_info() to be in sync with Arm and boot_fdt_info() will panic anyway if something wrong with DTB. - Update the commit message. --- xen/arch/riscv/setup.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index bea3f27c4d..fb6bbba684 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -8,6 +9,7 @@ #include #include #include +#include #include @@ -52,10 +54,24 @@ void __init copy_from_paddr(void *dst, paddr_t paddr, unsigned long len) } } +/* Relocate the FDT in Xen heap */ +static void * __init relocate_fdt(paddr_t dtb_paddr, size_t dtb_size) +{ + void *fdt = xvmalloc_array(uint8_t, dtb_size); + + if ( !fdt ) + panic("Unable to allocate memory for relocating the Device-Tree.\n"); + + copy_from_paddr(fdt, dtb_paddr, dtb_size); + + return fdt; +} + void __init noreturn start_xen(unsigned long bootcpu_id, paddr_t dtb_addr) { const char *cmdline; + size_t fdt_size; remove_identity_mapping(); @@ -80,8 +96,7 @@ void __init noreturn start_xen(unsigned long bootcpu_id, _end - _start, false) ) panic("Failed to add BOOTMOD_XEN\n"); - if ( !boot_fdt_info(device_tree_flattened, dtb_addr) ) - BUG(); + fdt_size = boot_fdt_info(device_tree_flattened, dtb_addr); cmdline = boot_fdt_cmdline(device_tree_flattened); printk("Command line: %s\n", cmdline); @@ -99,6 +114,18 @@ void __init noreturn start_xen(unsigned long bootcpu_id, */ system_state = SYS_STATE_boot; + if ( acpi_disabled ) + { + printk("Booting using Device Tree\n"); + device_tree_flattened = relocate_fdt(dtb_addr, fdt_size); + dt_unflatten_host_device_tree(); + } + else + { + device_tree_flattened = NULL; + panic("Booting using ACPI isn't supported\n"); + } + printk("All set up\n"); machine_halt();