From patchwork Wed Dec 18 12:22:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28E76E7718B for ; Wed, 18 Dec 2024 12:22:55 +0000 (UTC) Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) by mx.groups.io with SMTP id smtpd.web11.104357.1734524570694238707 for ; Wed, 18 Dec 2024 04:22:51 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@tuxon.dev header.s=google header.b=eSZn5LXj; spf=pass (domain: tuxon.dev, ip: 209.85.221.47, mailfrom: claudiu.beznea@tuxon.dev) Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-385e27c75f4so4899889f8f.2 for ; Wed, 18 Dec 2024 04:22:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1734524569; x=1735129369; darn=lists.cip-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=11AoqFUKSWD3zMs2LLxkh6xVkPrdT/9gMNfkIPFCQXU=; b=eSZn5LXjwds2SHY4wMcvuo3LcexFC+1e8p3E61y9YAV4Lp2aqID/xOhf//5KEiGBCR IDyIHXkuZB58ae5iaMDkmp+OdsK66g9/ALI/jRuevQl2k89VdmSlKM1UU1HScaTabCEV ZgwOBj1kQ5UQw0FcKrPfNNP2y4Ni0CfeS+f7icBSVQ6/oblBnaRunip0Buc0JWN//F0g O9KgvYy4CuBcKdEBGTLqxshV98jdWU8Gmv8Oqx8AxFt31jdVVQz1C5GAK1Xl90oKfDF/ y8CADClU3y4AN+zQx1rK0wJJziBRy2jZ2qPyqdb7TgIYFCwKwUjg1zBR4H++e0VHRz1y dvHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734524569; x=1735129369; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=11AoqFUKSWD3zMs2LLxkh6xVkPrdT/9gMNfkIPFCQXU=; b=OAN8E5Z+ZbC/RDlgBKbXQvnyQF+uMbQxAk6JtFvC8LA1vrqlCl45VXNGjNjEylKUTv teAVUfbWbXwgBu/Bg6mXkZVzzE69fA7oSM674pLvIu+GGW6FYjBD7uMin1sbsUIwLHJX cm/62ghDpCIFbXwrnIClwBMxlGamizlBlw73ADnLBn3WwREaus+pNTZ0uM7dJayBHp04 n1p1CGAjppIAHj0A4yif3icEGba+1+4Gbr7n3gtSiGspwif6k6JviyuoANhOi/H5UVhl FCXLx+pC3AvKWb2WzAwoot2DCKi4IltxPIT2KJOVd4VhzfkM/9i8OfEiDE6A+JXd+V0W D+uQ== X-Forwarded-Encrypted: i=1; AJvYcCV2zqBk4GwwXOI1hmKvJNVF1GYjpIDauCJnY/ptmI+0OvVEXwvQZpFpvtq0ht5v/6A/nhQsFj3A@lists.cip-project.org X-Gm-Message-State: AOJu0Ywz/KpY1bYqoZl6nLIbn5n4Hjb3FAt9BZIgUOtQlbr/A2xJtjH8 gX1cuG59JbKOhci6Wlag4AjAqy0LGpLOfAfus/eqFw+6st477tid67ku8OldI2k= X-Gm-Gg: ASbGncv4TI/HElcVCzEX6SYKGCcd1Jv8qgpAr8jsCYf6SvqKHWPVJfC7Ydsu2hecc0S PPHaP9Kw3Ij6JpNV+ajNkUr3VA/y7DYJtuYtPj0p0Z/ICs8jHyILN571FIXgdInTfRhgb8kF3ca avi3a+NdBvRyGywbRY5JSV7NqDCtDXrgGjCi8FsEAEq9HdpUTdVbhScKQ7I5NHWRzbOEeg+gX2s uh2YFv3hwejr23yPfh+gPfVSPA3TsxzV/4wCTCUUgXdFPXHF2sA4jsseSFtgvMcGQIxCCC22/ET S6PeywgSMfI= X-Google-Smtp-Source: AGHT+IG9D8nZhX2vOavSsotKZiYwwqMUgdZ4NYVz4rSz4wtlyBtyLhbZ5xDJbxq+BnnFAqobDJQ5XQ== X-Received: by 2002:a5d:6c63:0:b0:385:eb85:f111 with SMTP id ffacd0b85a97d-388e4d49ff7mr2936724f8f.14.1734524569067; Wed, 18 Dec 2024 04:22:49 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:48 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 1/8] clk: renesas: r9a08g045: Add clock and reset support for watchdog Date: Wed, 18 Dec 2024 14:22:39 +0200 Message-ID: <20241218122246.2365189-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:22:55 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17445 From: Claudiu Beznea commit 292d3079abf333540fef06c1533d7c21c6d21390 upstream. RZ/G3S has a watchdog module accessible by the Cortex-A core. Add clock and reset support for it. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240122111115.2861835-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- drivers/clk/renesas/r9a08g045-cpg.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c index 2582ba95256e..c3e6da2de197 100644 --- a/drivers/clk/renesas/r9a08g045-cpg.c +++ b/drivers/clk/renesas/r9a08g045-cpg.c @@ -193,6 +193,8 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = { DEF_MOD("ia55_pclk", R9A08G045_IA55_PCLK, R9A08G045_CLK_P2, 0x518, 0), DEF_MOD("ia55_clk", R9A08G045_IA55_CLK, R9A08G045_CLK_P1, 0x518, 1), DEF_MOD("dmac_aclk", R9A08G045_DMAC_ACLK, R9A08G045_CLK_P3, 0x52c, 0), + DEF_MOD("wdt0_pclk", R9A08G045_WDT0_PCLK, R9A08G045_CLK_P0, 0x548, 0), + DEF_MOD("wdt0_clk", R9A08G045_WDT0_CLK, R9A08G045_OSCCLK, 0x548, 1), DEF_MOD("sdhi0_imclk", R9A08G045_SDHI0_IMCLK, CLK_SD0_DIV4, 0x554, 0), DEF_MOD("sdhi0_imclk2", R9A08G045_SDHI0_IMCLK2, CLK_SD0_DIV4, 0x554, 1), DEF_MOD("sdhi0_clk_hs", R9A08G045_SDHI0_CLK_HS, R9A08G045_CLK_SD0, 0x554, 2), @@ -219,6 +221,7 @@ static const struct rzg2l_reset r9a08g045_resets[] = { DEF_RST(R9A08G045_GIC600_GICRESET_N, 0x814, 0), DEF_RST(R9A08G045_GIC600_DBG_GICRESET_N, 0x814, 1), DEF_RST(R9A08G045_IA55_RESETN, 0x818, 0), + DEF_RST(R9A08G045_WDT0_PRESETN, 0x848, 0), DEF_RST(R9A08G045_SDHI0_IXRST, 0x854, 0), DEF_RST(R9A08G045_SDHI1_IXRST, 0x854, 1), DEF_RST(R9A08G045_SDHI2_IXRST, 0x854, 2), From patchwork Wed Dec 18 12:22:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28EB1E7718C for ; Wed, 18 Dec 2024 12:22:55 +0000 (UTC) Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) by mx.groups.io with SMTP id smtpd.web10.104172.1734524571815353170 for ; Wed, 18 Dec 2024 04:22:52 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@tuxon.dev header.s=google header.b=AYSL8uwZ; spf=pass (domain: tuxon.dev, ip: 209.85.128.41, mailfrom: claudiu.beznea@tuxon.dev) Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4361d5dcf5bso69048495e9.3 for ; Wed, 18 Dec 2024 04:22:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1734524570; x=1735129370; darn=lists.cip-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JRihk1XGgKv8NhSJW0zRtXEipnAVHt6UpK3/YhUvPxw=; b=AYSL8uwZVUPg/iJ00RuuRv004PXGDdpEob/Y58s1mRWUNzR74Aj597BaAx5XkGx+aS YoHXy+Y17gCauyYXnP9UrYkhUo5e9DIJMhzHrY6mQS6xXxoshVlD59ZxHJ2+d6xQGS/O VIAS/Qm9ui43ikm5GLbM/6nGDi2qohajZLPwyI4KOcja9niC7jgDBbzB47B+xE1/GLOr iN+90sAsColoSW+RHCbvCY79oBGC3/7WDMKL9r2/TfGlEfIY+h+AKYa4V67KuCLceMfl XFw1z9wVhTz/5meacW4mayNm1EScaB9JgUcQM7NhxDTJWj3ylu9XdC8ucjMUX+joXBgd Nz3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734524570; x=1735129370; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JRihk1XGgKv8NhSJW0zRtXEipnAVHt6UpK3/YhUvPxw=; b=A5qETGdjlPBiV7iDjI3PY+f6L9ohuqAvYMSUS9dj3rTU2qTMBW+sV9t0R8KEIltlJN mRKyZnAbMa9j2epvL+BAhYGlgApWk6TRasYzffgYC5Tw3U49VgV8s9uyTjB1YCMI4YKm B0QgTyPtfgrevnPD6NQjxcj9T2TzCaUddQBPyBxc2CxqwR3ad8RTfBRhr4O0pKcvxjZv ie8L1iUaHgjG1oj5ImAIt9nUFAsgbVDHGqA7UjQBFn2DNi+xRqxizQUNSbkm2MfVrPY2 Q9QsNczEmDBfotP4cH65UkobQFn8SVKy84qbk15XhFeUQYVTwfA8ilpeGVPxwgik6xUq iS2w== X-Forwarded-Encrypted: i=1; AJvYcCW9SyaCT29CVobPF3/R+zqC9YQZSzQhpc3Dh8qpG843Pfxw1ooiye4VRm0txQv6TqSIVzAMU/6J@lists.cip-project.org X-Gm-Message-State: AOJu0YzcO9SPx7TDzhOP5C5aYAilN9NemZ+XwrD1Sknnb+Fqc+Li3Gj+ JYHZQf/Ja0NCv8xp9vMme58gn1gxk1B1OMgid1jfp7MmBuEgrtwKmDeBjF/A008= X-Gm-Gg: ASbGncuis0J5padNOsoErwn7gOd1f+lqPLlTtjYDzdApGr0cX6Ol7CMUTuVydBZW5Ls /LhfisJFKFbXybEMXUr98nIh15BNF0jam1fjnShWqLHZQAsgy8MAp1vi1BgNQSy+RgJZyF84N/y GQEBDxV71A4nd7JHw0bEG10Bd5ww/H9WKuOLsXlxuM/5E2CC6UpfhoyzLflAbkpf+p0V63xduzx idoIzMt9yu9RPOyIjv2Quee3n0wHT/yK8pOLGpaxwlJqehCtk1hUmsmYSqKduAt9QO50DcsAOd7 ccUtYNYwj00= X-Google-Smtp-Source: AGHT+IFVc7lVCH0oPRreWMAgaiyDBbRYkMeYBea4bV075/7g5qJ//Elg21pdKKLzKZla1dy1xP5QFw== X-Received: by 2002:a05:600c:4586:b0:434:f586:753c with SMTP id 5b1f17b1804b1-43655341348mr20351715e9.7.1734524570248; Wed, 18 Dec 2024 04:22:50 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:49 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 2/8] watchdog: rzg2l_wdt: Remove reset de-assert from probe Date: Wed, 18 Dec 2024 14:22:40 +0200 Message-ID: <20241218122246.2365189-3-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:22:55 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17446 From: Claudiu Beznea commit 064319c3fac88e04f53f3460cd24ae90de2d9fb6 upstream. There is no need to de-assert the reset signal on probe as the watchdog is not used prior executing start. Also, the clocks are not enabled in probe (pm_runtime_enable() doesn't do that), thus this is another indicator that the watchdog wasn't used previously like this. Instead, keep the watchdog hardware in its previous state at probe (by default it is in reset state), enable it when it is started and move it to reset state when it is stopped. This saves some extra power when the watchdog is unused. Signed-off-by: Claudiu Beznea Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/20240531065723.1085423-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck Signed-off-by: Claudiu Beznea --- drivers/watchdog/rzg2l_wdt.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index 9b2698a4fc1a..a473de5ff886 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -129,6 +129,12 @@ static int rzg2l_wdt_start(struct watchdog_device *wdev) if (ret) return ret; + ret = reset_control_deassert(priv->rstc); + if (ret) { + pm_runtime_put(wdev->parent); + return ret; + } + /* Initialize time out */ rzg2l_wdt_init_timeout(wdev); @@ -146,7 +152,9 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev) struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev); int ret; - rzg2l_wdt_reset(priv); + ret = reset_control_assert(priv->rstc); + if (ret) + return ret; ret = pm_runtime_put(wdev->parent); if (ret < 0) @@ -186,6 +194,12 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev, clk_prepare_enable(priv->osc_clk); if (priv->devtype == WDT_RZG2L) { + int ret; + + ret = reset_control_deassert(priv->rstc); + if (ret) + return ret; + /* Generate Reset (WDTRSTB) Signal on parity error */ rzg2l_wdt_write(priv, 0, PECR); @@ -236,13 +250,11 @@ static const struct watchdog_ops rzg2l_wdt_ops = { .restart = rzg2l_wdt_restart, }; -static void rzg2l_wdt_reset_assert_pm_disable(void *data) +static void rzg2l_wdt_pm_disable(void *data) { struct watchdog_device *wdev = data; - struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev); pm_runtime_disable(wdev->parent); - reset_control_assert(priv->rstc); } static int rzg2l_wdt_probe(struct platform_device *pdev) @@ -285,10 +297,6 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(priv->rstc), "failed to get cpg reset"); - ret = reset_control_deassert(priv->rstc); - if (ret) - return dev_err_probe(dev, ret, "failed to deassert"); - priv->devtype = (uintptr_t)of_device_get_match_data(dev); if (priv->devtype == WDT_RZV2M) { @@ -309,9 +317,7 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) priv->wdev.timeout = WDT_DEFAULT_TIMEOUT; watchdog_set_drvdata(&priv->wdev, priv); - ret = devm_add_action_or_reset(&pdev->dev, - rzg2l_wdt_reset_assert_pm_disable, - &priv->wdev); + ret = devm_add_action_or_reset(&pdev->dev, rzg2l_wdt_pm_disable, &priv->wdev); if (ret < 0) return ret; From patchwork Wed Dec 18 12:22:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39D2DE7718D for ; Wed, 18 Dec 2024 12:22:55 +0000 (UTC) Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) by mx.groups.io with SMTP id smtpd.web10.104173.1734524573041231026 for ; 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([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:50 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 3/8] watchdog: rzg2l_wdt: Remove comparison with zero Date: Wed, 18 Dec 2024 14:22:41 +0200 Message-ID: <20241218122246.2365189-4-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:22:55 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17447 From: Claudiu Beznea commit 900b938335f7fbd401dcba14c8069dbf38ed1f28 upstream. devm_add_action_or_reset() could return -ENOMEM or zero. Thus, remove comparison with zero of the returning value to make code simpler. Signed-off-by: Claudiu Beznea Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/20240531065723.1085423-7-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck Signed-off-by: Claudiu Beznea --- drivers/watchdog/rzg2l_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index a473de5ff886..2c50e4c76131 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -318,7 +318,7 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) watchdog_set_drvdata(&priv->wdev, priv); ret = devm_add_action_or_reset(&pdev->dev, rzg2l_wdt_pm_disable, &priv->wdev); - if (ret < 0) + if (ret) return ret; watchdog_set_nowayout(&priv->wdev, nowayout); From patchwork Wed Dec 18 12:22:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04F52E77188 for ; Wed, 18 Dec 2024 12:22:55 +0000 (UTC) Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) by mx.groups.io with SMTP id smtpd.web11.104360.1734524574103414869 for ; Wed, 18 Dec 2024 04:22:54 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@tuxon.dev header.s=google header.b=TW2f+ld+; spf=pass (domain: tuxon.dev, ip: 209.85.128.53, mailfrom: claudiu.beznea@tuxon.dev) Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-432d86a3085so42825785e9.2 for ; Wed, 18 Dec 2024 04:22:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1734524572; x=1735129372; darn=lists.cip-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jkJG4Bqf1RF27OjiKI0iUzCClliQfuwI+suFdV7UrVo=; b=TW2f+ld+fXhhMXeUh4HXFo4wm1ADkWIitnvCjSqvDlqfc091uITNaOYzWfvNgN/S22 +EWqOVKLBBmHWmsqqx609HbUp/Dou14znLyKbRu2p8SR61Hte/bFcnAoA5XPWp0PJiv5 HsKQa/xP8CLE0++3wvNsaX04/mK3ZLxpZdvNHjUmJoTzojc/vR+6GBE0WWA/48EEV8pP sb9DZ9HTV+8gEu03yxbsosgOrWp78Nj4YEAANKr6GWRJf9CmhK6GxFKnhdkJgYXcUjN5 Turo5XHAYM5IoymbuAEnht76hTcQNki1xM9VdfHZ7RSrSMevP69YMh+o49CGHFIK2vf5 ziww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734524572; x=1735129372; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jkJG4Bqf1RF27OjiKI0iUzCClliQfuwI+suFdV7UrVo=; b=efYY0XE3nBpj9vFFFUx1Jkm3oZflXf2CiFcLW+rDEYlGFXFmwVVCywDnfvUxaSRhIj zViD8iRbxtxtQtDxZ0uPCqENtO399RkPPf0u9woPlmAn/PRChOwXfKM15lyLGlvwW949 EcrEVR1syRFWcEe8d3gvqQwhLVlDA5fKRD0iq7BOx7ARtU5yiievP4wBFH1yaTvhkPXC DBR5A0uzmQaeCilStuvTi98IpnZZ/QdPtdrHSGn5+/7Xp/0CS7etjqqpb5nh76W9DU+d 6H0vWemfXOqZcVv9wVRK1RInIVNNM4YvqkAGwI3fYgRBn0TgVR1gn7mQwrmdBTOimM4L Kigg== X-Forwarded-Encrypted: i=1; AJvYcCUyqC+RL4As3r7BrTJwT4HG6SCMBf/N+kVW+rEoK3UlEowC2Evzz9di8Z8WH9yogWjC1grEVWnQ@lists.cip-project.org X-Gm-Message-State: AOJu0YzDRdOweCufAGkp9ruGTRgJKhM2ulw7mLEbq/SbKLJ0NTiL1dZM PayTU6bwOo8iSmrsBRaqeUcWUxWpi5qLrgp7YkkvlyMQs5Ksnd5SkKwu4Hw49Oo= X-Gm-Gg: ASbGncuDlm6VOXGoUca8uvrnS8Yej6UoXygf/miLEBlLP9c2E8FA7q9FlN6AMlE8rtS 3ewxdWbeRyO9Kn3sPixCjCeevBR+bsonDO7PNAv+IUZizbmtuYGv3MkFNFW9Svdq4G5bhFPOpIH z32DQ7kf0aCXVM/KpiyIZm5/OKfinkG8tlDbWFsC5lf+HTZk8XlDN84ECbSXmQRC2Gzl3p9/CzP rWxmnTi2Xa+pjKEDnWQui+XXlDL9ovK2/RCNGvFcaGX5OZUh45GqkmIvDqVOKzgeh1xhNCJHVmj LtDtRhZXZfQ= X-Google-Smtp-Source: AGHT+IHYwmIqW+SVFwvVVrbCJZq33ezEV0R9MmgHTS0fYz4zYf3Ft2HAnLrNXUCsPXcmyI/e1IUCwA== X-Received: by 2002:a05:6000:188d:b0:386:62f:cf18 with SMTP id ffacd0b85a97d-388e4db7e91mr2127734f8f.49.1734524572517; Wed, 18 Dec 2024 04:22:52 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:52 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 4/8] watchdog: rzg2l_wdt: Rely on the reset driver for doing proper reset Date: Wed, 18 Dec 2024 14:22:42 +0200 Message-ID: <20241218122246.2365189-5-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:22:55 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17448 From: Claudiu Beznea commit d8997ed79ed7c7c32b2ae571e0d99a58bbfd01fe upstream. The reset driver has been adapted in commit da235d2fac21 ("clk: renesas: rzg2l: Check reset monitor registers") to check the reset monitor bits before declaring reset asserts/de-asserts as successful/failure operations. With that, there is no need to keep the reset workaround for RZ/V2M in place in the watchdog driver. Signed-off-by: Claudiu Beznea Reviewed-by: Philipp Zabel Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/20240531065723.1085423-8-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck Signed-off-by: Claudiu Beznea --- drivers/watchdog/rzg2l_wdt.c | 39 ++++-------------------------------- 1 file changed, 4 insertions(+), 35 deletions(-) diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index 2c50e4c76131..ea535739f8b6 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -54,35 +53,11 @@ struct rzg2l_wdt_priv { struct reset_control *rstc; unsigned long osc_clk_rate; unsigned long delay; - unsigned long minimum_assertion_period; struct clk *pclk; struct clk *osc_clk; enum rz_wdt_type devtype; }; -static int rzg2l_wdt_reset(struct rzg2l_wdt_priv *priv) -{ - int err, status; - - if (priv->devtype == WDT_RZV2M) { - /* WDT needs TYPE-B reset control */ - err = reset_control_assert(priv->rstc); - if (err) - return err; - ndelay(priv->minimum_assertion_period); - err = reset_control_deassert(priv->rstc); - if (err) - return err; - err = read_poll_timeout(reset_control_status, status, - status != 1, 0, 1000, false, - priv->rstc); - } else { - err = reset_control_reset(priv->rstc); - } - - return err; -} - static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) { /* delay timer when change the setting register */ @@ -189,13 +164,12 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev, unsigned long action, void *data) { struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev); + int ret; clk_prepare_enable(priv->pclk); clk_prepare_enable(priv->osc_clk); if (priv->devtype == WDT_RZG2L) { - int ret; - ret = reset_control_deassert(priv->rstc); if (ret) return ret; @@ -207,7 +181,9 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev, rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); } else { /* RZ/V2M doesn't have parity error registers */ - rzg2l_wdt_reset(priv); + ret = reset_control_reset(priv->rstc); + if (ret) + return ret; wdev->timeout = 0; @@ -299,13 +275,6 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) priv->devtype = (uintptr_t)of_device_get_match_data(dev); - if (priv->devtype == WDT_RZV2M) { - priv->minimum_assertion_period = RZV2M_A_NSEC + - 3 * F2CYCLE_NSEC(pclk_rate) + 5 * - max(F2CYCLE_NSEC(priv->osc_clk_rate), - F2CYCLE_NSEC(pclk_rate)); - } - pm_runtime_enable(&pdev->dev); priv->wdev.info = &rzg2l_wdt_ident; From patchwork Wed Dec 18 12:22:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FCE7E77187 for ; Wed, 18 Dec 2024 12:23:05 +0000 (UTC) Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) by mx.groups.io with SMTP id smtpd.web10.104174.1734524575457942041 for ; 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([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:53 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 5/8] watchdog: rzg2l_wdt: Add suspend/resume support Date: Wed, 18 Dec 2024 14:22:43 +0200 Message-ID: <20241218122246.2365189-6-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:23:05 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17449 From: Claudiu Beznea commit 0aad7c4438b2e87359cd7b42c3e11b17f477ab8f upstream. The RZ/G3S supports deep sleep states where power to most of the IP blocks is cut off. To ensure proper working of the watchdog when resuming from such states, the suspend function is stopping the watchdog and the resume function is starting it. There is no need to configure the watchdog in case the watchdog was stopped prior to starting suspend. Signed-off-by: Claudiu Beznea Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/20240531065723.1085423-9-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck Signed-off-by: Claudiu Beznea --- drivers/watchdog/rzg2l_wdt.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index ea535739f8b6..1cf7360d7d48 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -286,6 +286,7 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) priv->wdev.timeout = WDT_DEFAULT_TIMEOUT; watchdog_set_drvdata(&priv->wdev, priv); + dev_set_drvdata(dev, priv); ret = devm_add_action_or_reset(&pdev->dev, rzg2l_wdt_pm_disable, &priv->wdev); if (ret) return ret; @@ -307,10 +308,35 @@ static const struct of_device_id rzg2l_wdt_ids[] = { }; MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids); +static int rzg2l_wdt_suspend_late(struct device *dev) +{ + struct rzg2l_wdt_priv *priv = dev_get_drvdata(dev); + + if (!watchdog_active(&priv->wdev)) + return 0; + + return rzg2l_wdt_stop(&priv->wdev); +} + +static int rzg2l_wdt_resume_early(struct device *dev) +{ + struct rzg2l_wdt_priv *priv = dev_get_drvdata(dev); + + if (!watchdog_active(&priv->wdev)) + return 0; + + return rzg2l_wdt_start(&priv->wdev); +} + +static const struct dev_pm_ops rzg2l_wdt_pm_ops = { + LATE_SYSTEM_SLEEP_PM_OPS(rzg2l_wdt_suspend_late, rzg2l_wdt_resume_early) +}; + static struct platform_driver rzg2l_wdt_driver = { .driver = { .name = "rzg2l_wdt", .of_match_table = rzg2l_wdt_ids, + .pm = &rzg2l_wdt_pm_ops, }, .probe = rzg2l_wdt_probe, }; From patchwork Wed Dec 18 12:22:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913584 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FD18E77188 for ; Wed, 18 Dec 2024 12:23:05 +0000 (UTC) Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) by mx.groups.io with SMTP id smtpd.web11.104362.1734524576725840309 for ; Wed, 18 Dec 2024 04:22:57 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@tuxon.dev header.s=google header.b=gWyLLnVQ; spf=pass (domain: tuxon.dev, ip: 209.85.128.53, mailfrom: claudiu.beznea@tuxon.dev) Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-434e3953b65so45144345e9.1 for ; Wed, 18 Dec 2024 04:22:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1734524575; x=1735129375; darn=lists.cip-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SWZU9u9KGM9/toaLraaZHb4O50yaoNfe/2yq1mKlP9g=; b=gWyLLnVQ2f6x6CpPw2e3y4LIrHQ21ZdLbFXUaOZuAw/UUC0ABQq4mjxoCufFmH7NuU 1yLiLt9RS5IusaWMIW45IsQEa7S2H4gU/OkERc/weI3XgG0o9Z463A9QczE76RQ43vkh kAenb3BNVQs8WbXJzxGAgRfW1Vnrz1NKvSjAhpsFvAUA8PtIacgWj2raSUEA+NOW0T4e Nqo2GT+sXZqxIG28XJJ8D1zCj+0+ukfZZpYsJ59Q6KXIsOtdr9PJpniVOg8zqZQ5lYDX NHnoboJR0c3MGK02lJLDE82l/ZDGvsi0Aekl/IQxQvPNyEEi7ePb3kWl9MwxcT1XS5zj sMSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734524575; x=1735129375; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SWZU9u9KGM9/toaLraaZHb4O50yaoNfe/2yq1mKlP9g=; b=TJqWR6Iwic/g/lkg43uLSpJQxWewL7FslPZB8f60qStvAg6uGJNG9Ysib/Shta5JMw fpQe5qShZqoMZ/yLzwk71ugdA8hMDg28LsnEvrAjMpMTiHnnv9YbOSNFd8dGaEnH2oCR ntwXMWtEbgVCKjCuslAlOxlhlnLw4QI7uEugnqF7FUfo3Alm8x9KT1IEr8aq1oFYCmBz eZvOgPuKUE8Nj3IV5Gj8klBzePiOWreWQzFDmnrO9M2H9JWX2AQ+/pAooSlkGoH3nfB3 jaDTIg6fzfy5ceevs7WLrCojDb6xD+TiUnymtWjPeioPhV903ZU9USu7ivtfBySNFAjU 7VnA== X-Forwarded-Encrypted: i=1; AJvYcCXqn0hnKdZCNUR4pcm7yxDmmHT2oU9a7ra09120F1I77SjpiIFk6owZUSchFUwdq0U0jgIUIj+C@lists.cip-project.org X-Gm-Message-State: AOJu0YxJnuKspbl7N2kv5caqHLE+xByedc2Y0cMEdkiDL27MhahdZmpN bZnLF3PvHiIZVC3FABvoCchmdoxoJYn3Xdl1q37WyoMeGu5jZ/5PxHU3XBpqSIY= X-Gm-Gg: ASbGncsBrlhPU2o2nTb/qo2ZqSulQYg4hvvp276mYB/sy9mefcaOE4th5sn9iURvuU6 SCWodmjEm7myQpgbXPxmV8tFK04SAID1wx7MrCCxXfTpUg9oV2PnKIT/PdaTK/kPHrpridG5KHz tQ5SFa/1v5veojHrCdPIxjglxARmXavjTabUmkCL6TwHGAR4DZWCeoMDnb1PtHy5Dq/DaIyOGi9 VhUic7+Ee/sxbBWN6i0MmwhiZaEbUBtuULl/bafqCCtwOyu1u5QhTIst0l6Fm8PL0gCC2Vngu8o mLCzjzlRgn0= X-Google-Smtp-Source: AGHT+IEl0D5XrqRRwhZminx8vCyLa8iUe0dLlKTAOW6O86UKTDJzbpx0dr4qlMOuIDzaC8N5UPOjog== X-Received: by 2002:a05:600c:3ba3:b0:431:60ec:7a96 with SMTP id 5b1f17b1804b1-43655426a25mr19333715e9.25.1734524575039; Wed, 18 Dec 2024 04:22:55 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:54 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 6/8] watchdog: rzg2l_wdt: Power on the watchdog domain in the restart handler Date: Wed, 18 Dec 2024 14:22:44 +0200 Message-ID: <20241218122246.2365189-7-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:23:05 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17450 From: Claudiu Beznea commit bad201b2ac4e238c6d4b6966a220240e3861640c upstream. On RZ/G3S the watchdog can be part of a software-controlled PM domain. In this case, the watchdog device need to be powered on in struct watchdog_ops::restart API. This can be done though pm_runtime_resume_and_get() API if the watchdog PM domain and watchdog device are marked as IRQ safe. We mark the watchdog PM domain as IRQ safe with GENPD_FLAG_IRQ_SAFE when the watchdog PM domain is registered and the watchdog device though pm_runtime_irq_safe(). Before commit e4cf89596c1f ("watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context'") pm_runtime_get_sync() was used in watchdog restart handler (which is similar to pm_runtime_resume_and_get() except the later one handles the runtime resume errors). Commit e4cf89596c1f ("watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context'") dropped the pm_runtime_get_sync() and replaced it with clk_prepare_enable() to avoid invalid wait context due to genpd_lock() in genpd_runtime_resume() being called from atomic context. But clk_prepare_enable() doesn't fit for this either (as reported by Ulf Hansson) as clk_prepare() can also sleep (it just not throw invalid wait context warning as it is not written for this). Because the watchdog device is marked now as IRQ safe (though this patch) the irq_safe_dev_in_sleep_domain() call from genpd_runtime_resume() returns 1 for devices not registering an IRQ safe PM domain for watchdog (as the watchdog device is IRQ safe, PM domain is not and watchdog PM domain is always-on), this being the case for RZ/G3S with old device trees and the rest of the SoCs that use this driver, we can now drop also the clk_prepare_enable() calls in restart handler and rely on pm_runtime_resume_and_get(). Thus, drop clk_prepare_enable() and use pm_runtime_resume_and_get() in watchdog restart handler. Signed-off-by: Claudiu Beznea Reviewed-by: Ulf Hansson Reviewed-by: Geert Uytterhoeven Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20241015164732.4085249-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck Signed-off-by: Claudiu Beznea --- drivers/watchdog/rzg2l_wdt.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index 1cf7360d7d48..71b81c8c570d 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -166,8 +167,22 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev, struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev); int ret; - clk_prepare_enable(priv->pclk); - clk_prepare_enable(priv->osc_clk); + /* + * In case of RZ/G3S the watchdog device may be part of an IRQ safe power + * domain that is currently powered off. In this case we need to power + * it on before accessing registers. Along with this the clocks will be + * enabled. We don't undo the pm_runtime_resume_and_get() as the device + * need to be on for the reboot to happen. + * + * For the rest of SoCs not registering a watchdog IRQ safe power + * domain it is safe to call pm_runtime_resume_and_get() as the + * irq_safe_dev_in_sleep_domain() call in genpd_runtime_resume() + * returns non zero value and the genpd_lock() is avoided, thus, there + * will be no invalid wait context reported by lockdep. + */ + ret = pm_runtime_resume_and_get(wdev->parent); + if (ret) + return ret; if (priv->devtype == WDT_RZG2L) { ret = reset_control_deassert(priv->rstc); @@ -275,6 +290,7 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) priv->devtype = (uintptr_t)of_device_get_match_data(dev); + pm_runtime_irq_safe(&pdev->dev); pm_runtime_enable(&pdev->dev); priv->wdev.info = &rzg2l_wdt_ident; From patchwork Wed Dec 18 12:22:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35652E7718B for ; Wed, 18 Dec 2024 12:23:05 +0000 (UTC) Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) by mx.groups.io with SMTP id smtpd.web11.104363.1734524577719746594 for ; Wed, 18 Dec 2024 04:22:58 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@tuxon.dev header.s=google header.b=iPDFNgxF; spf=pass (domain: tuxon.dev, ip: 209.85.221.53, mailfrom: claudiu.beznea@tuxon.dev) Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-385f07cd1a4so4384261f8f.1 for ; Wed, 18 Dec 2024 04:22:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1734524576; x=1735129376; darn=lists.cip-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WgxTatePtmMYlJQsFEFDlE1obW/nLAy4k+ERKlaRMTw=; b=iPDFNgxFEB3YjmhrRXGWhyLUwIUpCCc7ynPQsgfRJhLjPThMyM08B8xPgkepjzjtvO CfwdeWMIenExqYP7/8f4mG4oOLdAG5Uo5Sh3BRo7sgNGjYVrxmMT4nE/AkWKQqtJjSpI mJEKWhDbjbD4a9HPzMTS4Hfxj7HohTtqQEHfaL/Gv3aJsrUmYv6hgDwN0XEv3AY01S0n PgegmMYjzmFdK4TDvOLMEm4W8O2rTl4yomrhXceIb9efMzKAHJ1PsnjeZrL+urAvK1q+ qfOz7vUeEERqA2af+xVp/lbTBxP0QmFlllvhpU/i2+m18uNdSmAW3ApMaNG8Sx4T5ihv cK4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734524576; x=1735129376; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WgxTatePtmMYlJQsFEFDlE1obW/nLAy4k+ERKlaRMTw=; b=EwtIgEENiuCFUr8aIudakiVCdemdRHk+0jIg/hhjPTZM12zzaIVtA6gHQJX/ctQaNf gHbkdYBekIIi55QHeeMlIoEbyWzXrDW92LZ8QLLF62gDeq/W9FrKgFtxQ8mbqBQ8KFbp xdaEqNlpMzEVaLs+HI9r/IOYKNWkNjTNjdkUk5sw38M9WVKZrYKhwN2HzcRo8kJMGjCY 3z2CdJ4WqeztMc3FuO90JuMd7FMRRI/Ee17XG2H3Wmum/Ul8yaDC1BkH5+gQIwy8hEsH RUiKMi3o0+KFc9vbQgpzZ5nhy9wCELLc+d4I4dfuBO8S1F5uy+ExRPxcH5s+ZkjcTwce 9ZLw== X-Forwarded-Encrypted: i=1; AJvYcCVRfDUZfNy4BFUN1ZkeZOptE1A6Gf4VKOizaSsh5V+eUPVLeTtsT00shoKEx1rXGouQ9TBnKynz@lists.cip-project.org X-Gm-Message-State: AOJu0YxgIFT0L5fw6XfG8Lxzthh8Xa/XP4w9aVC4HZ1NgC5TrlmNUz5Y 1VOZbfZTRFbxiI3aNobrLXiadJbhtmw8WjuNpmxGJP65pjIX+nwJJv5j6NuS/X4= X-Gm-Gg: ASbGncvQVQpuvXN8TwlkdO+WgijZ+mWbNhArrfYfn1UrXdiYLtpYJV8e68yiw6ruy/k ef2POIbhM/2aVn25BeRL+7A3SG6qZjbjCBzd2b0FYCZqj3+Lg//hT/3Glij6HkpiJgg1Hphdh16 qECeqjGh7cjPEXbyvaBbAhZR38mIJk5QgQUYQGDGfwAB2OSzqIm/r/7ZxhTiliiN8hYnzNxhb7t uYN8s+z2pNQkpdi3Vv0eK+/Ba9Ij5V0lX+WvyHg+V0tFu/ug8ORGOoCg1HCNokJq+cFEFjO8OqA GeQKs8zgZo8= X-Google-Smtp-Source: AGHT+IGGa74TGxXM+6aBwjYyYwIf85/ZnJsH04f+87BdwwbRFuscwHirXlP3RkWtarpt7cZTRoMFXA== X-Received: by 2002:a05:6000:156b:b0:386:3825:2c3b with SMTP id ffacd0b85a97d-388e4d43a86mr2520764f8f.18.1734524576162; Wed, 18 Dec 2024 04:22:56 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:55 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 7/8] arm64: dts: renesas: r9a08g045: Add watchdog node Date: Wed, 18 Dec 2024 14:22:45 +0200 Message-ID: <20241218122246.2365189-8-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:23:05 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17451 From: Claudiu Beznea commit cee7bef61f51c04c9946cf4ddb81e85d9c1833d2 upstream. Add the DT node for the watchdog IP accessible by Cortex-A of RZ/G3S SoC (R9108G045). Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240122111115.2861835-10-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index aba6b0383778..f5f3f4f4c8d6 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -273,6 +273,20 @@ gic: interrupt-controller@12400000 { <0x0 0x12440000 0 0x60000>; interrupts = ; }; + + wdt0: watchdog@12800800 { + compatible = "renesas,r9a08g045-wdt", "renesas,rzg2l-wdt"; + reg = <0 0x12800800 0 0x400>; + clocks = <&cpg CPG_MOD R9A08G045_WDT0_PCLK>, + <&cpg CPG_MOD R9A08G045_WDT0_CLK>; + clock-names = "pclk", "oscclk"; + interrupts = , + ; + interrupt-names = "wdt", "perrout"; + resets = <&cpg R9A08G045_WDT0_PRESETN>; + power-domains = <&cpg>; + status = "disabled"; + }; }; timer { From patchwork Wed Dec 18 12:22:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13913582 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E5C3E7718A for ; Wed, 18 Dec 2024 12:23:05 +0000 (UTC) Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) by mx.groups.io with SMTP id smtpd.web10.104176.1734524579092510496 for ; Wed, 18 Dec 2024 04:22:59 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@tuxon.dev header.s=google header.b=bU7Y/+vU; spf=pass (domain: tuxon.dev, ip: 209.85.128.47, mailfrom: claudiu.beznea@tuxon.dev) Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-4361815b96cso42847205e9.1 for ; Wed, 18 Dec 2024 04:22:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1734524577; x=1735129377; darn=lists.cip-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=I8uQNymoji1ksmZrB7+5ifmXCiwpi+Yvt74CZN6UUYc=; b=bU7Y/+vU7erNEQCFWcLunu8oPHh1K7CcNsbrt045Kfyd1kpU4QMjXCTr61rApUVk/y RX9O0kYlX/d27T6PLpI5rvSkWdgEhrwsTOoF1lf7km0hLuYKkC8lH06LEoH5elQ3WNyM GXQsa9AM4p7hCkQIpAjBhyOLOIDMU9gp+tJc7SZ4x6lmGWL1/M+pACEgoOE1jgWFXJec OMLhGDktS6CPTs/YQJK0s+7jD9KiOkxbYN01xDwE+c55RhmEmpZAjXWz8VbpsBnB1dO+ DORH2PfE17Tz7hwIB8nKBYDMd/gQoQtzLFslv1JVEOpaajV3QckM84hKAoQDhMmcnOra noaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734524577; x=1735129377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I8uQNymoji1ksmZrB7+5ifmXCiwpi+Yvt74CZN6UUYc=; b=sCuiQayzdoGyVW4qn74IQH1Hl8Jiy6UzJKmNnmqO7PCeqVuLPCJ9tyEoToqBXKwGAj EuPQ5u4VcCPbRsB/TTjFV+kIzqB9MgGMJ35nNtaxTYqwhby45xL7La9FhsCzuMaydlJu NIO2c+DTp+6aRf54xDdG6yNTl/oDdfvfScdy01jUfMqYOTWSHHFetkF2LW4WmPeh/vvD Ir5HyC2VqQGeOH7ZP7KvgrKn0FYDw3v8/Nt7/GAyKu/hjHxX7+sCvE4PruMdqohF86K/ XOove+Eqccw51CLjQaiDfQy9vlO7JE8B1D8ci01KzaO0kU+4HrqQe/hyTKSI/+gwSaWl CCZQ== X-Forwarded-Encrypted: i=1; AJvYcCUCnt5PCTI2g6+e2KyC2niO+fYchWO6P/YL4ngMDtGp8k6OjhIZlEphT38fIy5QfjAn1t9rSzQr@lists.cip-project.org X-Gm-Message-State: AOJu0YzCNWaf0GOGOE5f84KVlDzAs37g6ftXVpBDPFeU6uxitn4n+f9a aO9MJCHPT1l0lNIMSc/BOc65L7nVcEneKwm5iuj+DX5eLV3uhfQLOj+aydGM2Cg= X-Gm-Gg: ASbGncvN5/JVWJfG3G2joHANbNqswnerWxlG6Yj8Du7wXRD2gtuuwgpuIeXGH+3RH/y 7NVIb+aTf1FATQMDW1zPGFA5um92nxojp7Abff78x9cRkHOSYQ3tnA9WD4q3Re+axZzU8nV8IvE lV+DqSppkNq8CmKZkguphK7d9nLKqYunJwg74nKdKf5GibCUbJYzm+XAgoXdEoCQnUEUWmMWQMV AKF1HQ5CMdQgYTqiDpC4fxurhEnMmnv6xnJoI7o1ezjziUGb/Q78gD9aG5JAB+vvSn2na4snqug WwLyFkuDch0= X-Google-Smtp-Source: AGHT+IHZn4wJKGx/ntnXzU704P4u4ZaL/WNUXOnk5t8lDUmY+arlkVHY389UYNxff1Tjj6iDjJlUJA== X-Received: by 2002:a05:600c:548e:b0:434:a968:89a3 with SMTP id 5b1f17b1804b1-4365535fc8fmr22640925e9.9.1734524577495; Wed, 18 Dec 2024 04:22:57 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b2dsm18790365e9.12.2024.12.18.04.22.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:22:56 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 6.1.y-cip 8/8] arm64: dts: renesas: rzg3s-smarc-som: Enable the watchdog interface Date: Wed, 18 Dec 2024 14:22:46 +0200 Message-ID: <20241218122246.2365189-9-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> References: <20241218122246.2365189-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:23:05 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17452 From: Claudiu Beznea commit 2c0f4dfad96a6809506265f53f251b83ab2c848a upstream. Enable the watchdog interface (accessible by Cortex-A of RZ/G3S SoC) on RZ/G3S SMARC SoM. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240122111115.2861835-11-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index d33ab4c88787..acac4666ae59 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -340,3 +340,8 @@ mux { }; }; }; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +};