From patchwork Wed Dec 18 14:52:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13913837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68DB5E7718C for ; Wed, 18 Dec 2024 15:02:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E53CB10EBDA; Wed, 18 Dec 2024 15:02:17 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="W/CW2Po8"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6B74810EBDA; Wed, 18 Dec 2024 15:02:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734534136; x=1766070136; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=xlpWJPaaUMWaNR0lC667XgbjZCYBsdCy7l/KnObWHTg=; b=W/CW2Po8LAW4mvCv7jFWZsZTJ1Kc1fCm3Iq2W81z1IjBdYFviYXVCWWs HJYd7MfVohqlb77Gw3wEFdijtt0zVLZELd+MT2tUhapPf5/JOkQuWijgf qPKQtAE5cBswFv1bqv0CSVVPSr6I45TmtEu7mcSJWcO3p3DoAvlfZ9bMM QTdF1lrC90DmlBc1EC/0d9XjEXjxkG6oACZaafLs24eesJB9tR4220MIo P0qNLEcK6o9p7hPS2f3ZT3GxQLWBwVPBmnK8A+sfzP1r6QrDb3x6wTqvI 8QJpSLNxirubAYNUTFZFYW0GV2UkPw4eBwgXXnzVzoAVN/htDQteP8CF+ A==; X-CSE-ConnectionGUID: Vu2Y5nXdSSOO/YefBc7q3A== X-CSE-MsgGUID: LSgbco6oRQCEN75/NXzDdQ== X-IronPort-AV: E=McAfee;i="6700,10204,11290"; a="45502467" X-IronPort-AV: E=Sophos;i="6.12,244,1728975600"; d="scan'208";a="45502467" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2024 07:02:16 -0800 X-CSE-ConnectionGUID: R6BlSBjIQL2PEzeorlXocQ== X-CSE-MsgGUID: LwKVeupUS/OU5fqJwV27FA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="102025385" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa003.fm.intel.com with ESMTP; 18 Dec 2024 07:02:14 -0800 From: Arun R Murthy Date: Wed, 18 Dec 2024 20:22:04 +0530 Subject: [PATCH v7 1/4] drm: Define histogram structures exposed to user MIME-Version: 1.0 Message-Id: <20241218-dpst-v7-1-81bfe7d08c2d@intel.com> References: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> In-Reply-To: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Dmitry Baryshkov Cc: 20240705091333.328322-1-mohammed.thasleem@intel.com, Arun R Murthy X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Display Histogram is an array of bins and can be generated in many ways referred to as modes. Ex: HSV max(RGB), Wighted RGB etc. Understanding the histogram data format(Ex: HSV max(RGB)) Histogram is just the pixel count. For a maximum resolution of 10k (10240 x 4320 = 44236800) 25 bits should be sufficient to represent this along with a buffer of 7 bits(future use) u32 is being considered. max(RGB) can be 255 i.e 0xFF 8 bit, considering the most significant 5 bits, hence 32 bins. Below mentioned algorithm illustrates the histogram generation in hardware. hist[32] = {0}; for (i = 0; i < resolution; i++) { bin = max(RGB[i]); bin = bin >> 3; /* consider the most significant bits */ hist[bin]++; } If the entire image is Red color then max(255,0,0) is 255 so the pixel count of each pixels will be placed in the last bin. Hence except hist[31] all other bins will have a value zero. Generated histogram in this case would be hist[32] = {0,0,....44236800} Description of the structures, properties defined are documented in the header file include/uapi/drm/drm_mode.h Signed-off-by: Arun R Murthy --- include/uapi/drm/drm_mode.h | 59 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index c082810c08a8b234ef2672ecf54fc8c05ddc2bd3..7a7039381142bb5dba269bdaec42c18be34e2d05 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -1355,6 +1355,65 @@ struct drm_mode_closefb { __u32 pad; }; +/* + * Maximum resolution at present 10k, 10240x4320 = 44236800 + * can be denoted in 25bits. With an additional 7 bits in buffer each bin + * can be a u32 value. + * Maximum value of max(RGB) is 255, so max 255 bins. + * If the most significant 5 bits are considered, then bins = 0xff >> 3 + * will be 32 bins. + * For illustration consider a full RED image of 10k resolution considering all + * 8 bits histogram would look like hist[255] = {0,0,....44236800} + */ +#define DRM_MODE_HISTOGRAM_HSV_MAX_RGB (1 << 0) + +/** + * struct drm_histogram_caps + * + * @histogram_mode: histogram generation modes, defined in the above macros + * @bins_count: number of bins for a chosen histogram mode. For illustration + * refer the above defined histogram mode. + */ +struct drm_histogram_caps { + u8 histogram_mode; + u32 bins_count; +}; + +/** + * struct drm_histogram_config + * + * @enable: flag to enable/disable histogram + * @hist_mode: histogram mode(HSV max(RGB), RGB, LUMA etc) + * @reserved1: Reserved for future use + * @reserved2: Reserved for future use + * @reserved3: Reserved for future use + * @reserved4: Reserved for future use + */ +struct drm_histogram_config { + bool enable; + u8 hist_mode; + u32 reserved1; + u32 reserved2; + u32 reserved3; + u32 reserved4; +}; + +/** + * struct drm_histogram + * + * @config: histogram configuration data pointed by struct drm_histogram_config + * @data_ptr: pointer to the array of histogram. + * Histogram is an array of bins. Data format for each bin depends + * on the histogram mode. Refer to the above histogram modes for + * more information. + * @nr_elements: number of bins in the histogram. + */ +struct drm_histogram { + struct drm_histogram_config config; + __u64 data_ptr; + __u32 nr_elements; +}; + #if defined(__cplusplus) } #endif From patchwork Wed Dec 18 14:52:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13913838 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C42D6E7718A for ; Wed, 18 Dec 2024 15:02:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0D99510EBDF; Wed, 18 Dec 2024 15:02:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IdHlGDjo"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 067D610EBDE; Wed, 18 Dec 2024 15:02:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734534139; x=1766070139; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=19WMoyPDKAK2GPM23QvKPROYX3ABxskxqKN2tyspnnA=; b=IdHlGDjo7BLag9YmQqL01n5GMJxp6quhqyMubVxN+ZQ03t5Xr4Jrl490 ziZvgeHVKglpwuj58OB9IW+5d7+JR6//JbRJp3SlagmKUSjmdrEYsKJH9 tl8fXj26xirC34YSNtgyDNJFOtwcy+tT3J1+yVku8Fa7uuKG9yNfy+XwG /FxDzIzaHyc1L4+SC40PV8LJawBOsW3p6X01gLuTCgOQJvM2mQ4QhBQUp JQggxz6Rk5H+zfd1XgIMMGLfbVcFUi9riowctO0fNPGQL/xXNZTaLGiMt 2sUrLuwN1h/rJu/7r0N6zQ+MDNRuKXtxW/EtZBh5T64J6fduff9yCK0WG w==; X-CSE-ConnectionGUID: 4o3nda7KTU6deEj8xVvZjA== X-CSE-MsgGUID: Wnc/TDCbQWmLGfYBL2jdqQ== X-IronPort-AV: E=McAfee;i="6700,10204,11290"; a="45502489" X-IronPort-AV: E=Sophos;i="6.12,244,1728975600"; d="scan'208";a="45502489" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2024 07:02:19 -0800 X-CSE-ConnectionGUID: lQ6v6g73Q6GoifuCcau7aA== X-CSE-MsgGUID: TPHfgt0ERfu1S0ysZLuZsw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="102025442" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa003.fm.intel.com with ESMTP; 18 Dec 2024 07:02:16 -0800 From: Arun R Murthy Date: Wed, 18 Dec 2024 20:22:05 +0530 Subject: [PATCH v7 2/4] drm: Define ImageEnhancemenT LUT structures exposed to user MIME-Version: 1.0 Message-Id: <20241218-dpst-v7-2-81bfe7d08c2d@intel.com> References: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> In-Reply-To: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Dmitry Baryshkov Cc: 20240705091333.328322-1-mohammed.thasleem@intel.com, Arun R Murthy X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" ImageEnhancemenT(IET) hardware interpolates the LUT value to generate the enhanced output image. LUT takes an input value, outputs a new value based on the data within the LUT. 1D LUT can remap individual input values to new output values based on the LUT sample. LUT can be interpolated by the hardware by multiple modes Ex: Direct Lookup LUT, Multiplicative LUT etc The list of supported mode by hardware along with the format(exponent mantissa) is exposed to user by the iet_lut_caps property. Maximum format being 8.24 i.e 8 exponent and 24 mantissa. For illustration a hardware supporting 1.9 format denotes this as 0x10001FF. In order to know the exponent do a bitwise AND with 0xF000000. The LUT value to be provided by user would be a 10bit value with 1 bit integer and 9 bit fractional value. Multiple formats can be supported, hence pointer is used over here. User can then provide the LUT with any one of the supported modes in any of the supported formats. The entries in the LUT can vary depending on the hardware capability with max being 255. This will also be exposed as iet_lut_caps so user can generate a LUT with the specified entries. Signed-off-by: Arun R Murthy --- include/uapi/drm/drm_mode.h | 46 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 7a7039381142bb5dba269bdaec42c18be34e2d05..34a6f48078fe7ff067002a459835c9af57d18848 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -1367,6 +1367,17 @@ struct drm_mode_closefb { */ #define DRM_MODE_HISTOGRAM_HSV_MAX_RGB (1 << 0) +/* LUT values are points on exponential graph with x axis and y-axis y=f(x) */ +#define DRM_MODE_IET_LOOKUP_LUT (1 << 0) +/* + * LUT values, points on negative exponential graph with x-axis and y-axis + * y = y/x so upon multiplying x, y is obtained, hence multiplicative. The + * format of LUT can at max be 8.24(8integer 24 fractional) represented by + * u32. Depending on the hardware capability and exponent mantissa can be + * chosen. + */ +#define DRM_MODE_IET_MULTIPLICATIVE (1 << 1) + /** * struct drm_histogram_caps * @@ -1414,6 +1425,41 @@ struct drm_histogram { __u32 nr_elements; }; +/** + * struct drm_iet_caps + * + * @iet_mode: pixel factor enhancement modes defined in the above macros + * @iet_sample_format: holds the address of an array of u32 LUT sample formats + * depending on the hardware capability. Max being 8.24 + * Doing a bitwise AND will get the present sample. + * Ex: for 1 integer 9 fraction AND with 0x10001FF + */ +struct drm_iet_caps { + u8 iet_mode; + u64 iet_sample_format; + __u32 nr_iet_sample_formats; +}; + +/** + * struct drm_iet_1dlut_sample + * @iet_mode: image enhancement mode, this will also convey the channel. + * @iet_format: LUT exponent and mantissa format, max being 8.24 + * @data_ptr: pointer to the array of values which is of type u32. + * 1 channel: 10 bit corrected value and remaining bits are reserved. + * multi channel: pointer to struct drm_color_lut + * @nr_elements: number of entries pointed by the data @data_ptr + * @reserved: reserved for future use + * @reserved1: reserved for future use + */ +struct drm_iet_1dlut_sample { + __u8 iet_mode; + __u32 iet_format; + __u64 data_ptr; + __u32 nr_elements; + __u32 reserved; + __u32 reserved1; +}; + #if defined(__cplusplus) } #endif From patchwork Wed Dec 18 14:52:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13913839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B65D8E7718B for ; Wed, 18 Dec 2024 15:02:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3399910EBE7; Wed, 18 Dec 2024 15:02:27 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="UgHJvNoH"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5E69510EBE2; Wed, 18 Dec 2024 15:02:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734534144; x=1766070144; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=kHKeJ6+L0SUQ1ATtE293JGNoa0JOxCN8Kpi9nCwIqxo=; b=UgHJvNoHIOPzLe/E4aNsAeNhFtHWmKB570x6kKlaZ9gu0q775bcXPgnZ BvZ40rEddD0diEHQEGgWPohTuHtv7sey/OQfnk+y0JXV/hCStsRiJyBao gi0XUTH5yzebR+tyE3nd+2sXD6bhEJ6te3zev0f0AGHOtqoOG3pLwmdGD hchYXziIUehtFYBTzTROJYeVbJ7aWkxtHtCjdm1qrvEv9lD8jdwqnxhy0 ziRMnuk8BcCJOou5gVN9jeFXo7D+xnQIgpiaY/w4ZmCL9KGSEMPxQfah4 LiZIXW1/3dNKlSL6r0vvJ5l4hJlwxSLpcoF96ySsVZeiYlcyPq16c7Cyi A==; X-CSE-ConnectionGUID: gTfpOZx/S5CfRvo04/RndQ== X-CSE-MsgGUID: 4ZdVWh50QqWkLGbRrfN2vQ== X-IronPort-AV: E=McAfee;i="6700,10204,11290"; a="45502524" X-IronPort-AV: E=Sophos;i="6.12,244,1728975600"; d="scan'208";a="45502524" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2024 07:02:21 -0800 X-CSE-ConnectionGUID: QGHfKofGTYGwDQmK/Rf2Lw== X-CSE-MsgGUID: Gvg5xT+vTrmg8lRo6Wjb2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="102025466" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa003.fm.intel.com with ESMTP; 18 Dec 2024 07:02:19 -0800 From: Arun R Murthy Date: Wed, 18 Dec 2024 20:22:06 +0530 Subject: [PATCH v7 3/4] drm/crtc: Expose API to create drm crtc property for histogram MIME-Version: 1.0 Message-Id: <20241218-dpst-v7-3-81bfe7d08c2d@intel.com> References: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> In-Reply-To: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Dmitry Baryshkov Cc: 20240705091333.328322-1-mohammed.thasleem@intel.com, Arun R Murthy X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add drm-crtc property for histogram and for the properties added add the corresponding get/set_property. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/drm_atomic_state_helper.c | 14 ++++++++ drivers/gpu/drm/drm_atomic_uapi.c | 15 ++++++++ drivers/gpu/drm/drm_crtc.c | 59 +++++++++++++++++++++++++++++++ include/drm/drm_crtc.h | 43 ++++++++++++++++++++++ 4 files changed, 131 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 519228eb109533d2596e899a57b571fa0995824f..dfe6293f7a42d034da3de593094019ca15014a02 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -143,6 +143,12 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, drm_property_blob_get(state->ctm); if (state->gamma_lut) drm_property_blob_get(state->gamma_lut); + if (state->histogram_caps) + drm_property_blob_get(state->histogram_caps); + if (state->histogram_enable) + drm_property_blob_get(state->histogram_enable); + if (state->histogram_data) + drm_property_blob_get(state->histogram_data); state->mode_changed = false; state->active_changed = false; state->planes_changed = false; @@ -156,6 +162,8 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, /* Self refresh should be canceled when a new update is available */ state->active = drm_atomic_crtc_effectively_active(state); state->self_refresh_active = false; + + state->histogram_updated = false; } EXPORT_SYMBOL(__drm_atomic_helper_crtc_duplicate_state); @@ -215,6 +223,12 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) drm_property_blob_put(state->degamma_lut); drm_property_blob_put(state->ctm); drm_property_blob_put(state->gamma_lut); + if (state->histogram_caps) + drm_property_blob_put(state->histogram_caps); + if (state->histogram_enable) + drm_property_blob_put(state->histogram_enable); + if (state->histogram_data) + drm_property_blob_put(state->histogram_data); } EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 370dc676e3aa543c9827b50df20df78f02b738c9..459d30898196c94392a7f916b1fa9ca3a334eea8 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -415,6 +415,15 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, return -EFAULT; set_out_fence_for_crtc(state->state, crtc, fence_ptr); + } else if (property == crtc->histogram_enable_property) { + ret = drm_property_replace_blob_from_id(dev, + &state->histogram_enable, + val, + -1, + sizeof(struct drm_histogram_config), + &replaced); + state->histogram_updated |= replaced; + return ret; } else if (property == crtc->scaling_filter_property) { state->scaling_filter = val; } else if (crtc->funcs->atomic_set_property) { @@ -452,6 +461,12 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; else if (property == config->prop_out_fence_ptr) *val = 0; + else if (property == crtc->histogram_caps_property) + *val = (state->histogram_caps) ? state->histogram_caps->base.id : 0; + else if (property == crtc->histogram_enable_property) + *val = (state->histogram_enable) ? state->histogram_enable->base.id : 0; + else if (property == crtc->histogram_data_property) + *val = (state->histogram_data) ? state->histogram_data->base.id : 0; else if (property == crtc->scaling_filter_property) *val = state->scaling_filter; else if (crtc->funcs->atomic_get_property) diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 3488ff067c69bb820b36177c97bc9fe5d5cbfea1..1c91cce3dcd31ede1e9d771af00c7c4414000a2b 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c @@ -939,3 +939,62 @@ int drm_crtc_create_scaling_filter_property(struct drm_crtc *crtc, return 0; } EXPORT_SYMBOL(drm_crtc_create_scaling_filter_property); + +/** + * drm_crtc_create_histogram_property: create histogram properties + * + * @crtc: pointer to the struct drm_crtc. + * + * The property HISTOGRAM_CAPS exposes the hardware capability for + * histogram which includes the histogram mode, number of bins etc + * The property HISTOGRAM_ENABLE allows user to enable/disable the + * histogram feature and also configure the hardware. + * Upon KMD enabling by writing to the hardware registers, histogram + * is generated. Histogram is composed of 'n' bins with each bin + * being an integer(pixel count). + * An event HISTOGRAM will be sent to the user. User upon receiving this + * event can read the hardware generated histogram using crtc property + * HISTOGRAM_DATA. + * User can use this histogram data to enhance the image or in shaders. + * + * Property HISTOGRAM_CAPS is a blob pointing to the struct drm_histogram_caps + * Description of the structure is in include/uapi/drm/drm_mode.h + * Property HISTOGRAM_ENABLE is a blob pointing to the struct + * drm_histogram_config + * Description of the structure is in include/uapi/drm/drm_mode.h + * Property HISTOGRAM_DATA is a blob pointing to the struct drm_histogram + * Description of the structure is in include/uapi/drm/drm_mode.h + * + * RETURNS: + * Zero for success or -errno + */ +int drm_crtc_create_histogram_property(struct drm_crtc *crtc) +{ + struct drm_property *prop; + + prop = drm_property_create(crtc->dev, DRM_MODE_PROP_ATOMIC | + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "HISTOGRAM_CAPS", 0); + if (!prop) + return -ENOMEM; + drm_object_attach_property(&crtc->base, prop, 0); + crtc->histogram_caps_property = prop; + + prop = drm_property_create(crtc->dev, DRM_MODE_PROP_ATOMIC | + DRM_MODE_PROP_BLOB, "HISTOGRAM_ENABLE", 0); + if (!prop) + return -ENOMEM; + drm_object_attach_property(&crtc->base, prop, 0); + crtc->histogram_enable_property = prop; + + prop = drm_property_create(crtc->dev, DRM_MODE_PROP_ATOMIC | + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "HISTOGRAM_DATA", 0); + if (!prop) + return -ENOMEM; + drm_object_attach_property(&crtc->base, prop, 0); + crtc->histogram_data_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_crtc_create_histogram_property); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 8b48a1974da3143c7de176e6fe3e01da9c8fc9d8..934cac2adb9889d2477e9601598796927bc016ea 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -274,6 +274,32 @@ struct drm_crtc_state { */ struct drm_property_blob *gamma_lut; + /** + * @histogram_caps: + * + * The blob points to the structure drm_histogram_caps. + * For more info on the elements of the struct drm_histogram_caps + * see include/uapi/drm/drm_mode.h + */ + struct drm_property_blob *histogram_caps; + /** + * @histogram_enable: + * + * The blob points to the structure drm_histogram_config. + * For more information on the elements of struct drm_histogram_config + * see include/uapi/drm/drm_mode.h + */ + struct drm_property_blob *histogram_enable; + /** + * @histogram_data: + * + * The blob points to the structure drm_histogram. + * For more information on the elements of struct drm_histogram + * see include/uapi/drm/drm_mode.h + */ + struct drm_property_blob *histogram_data; + bool histogram_updated; + /** * @target_vblank: * @@ -1088,6 +1114,22 @@ struct drm_crtc { */ struct drm_property *scaling_filter_property; + /** + * @histogram_caps_property: Optional CRTC property for getting the + * histogram hardware capability. + */ + struct drm_property *histogram_caps_property; + /** + * @histogram_enable_property: Optional CRTC property for enabling or + * disabling global histogram. + */ + struct drm_property *histogram_enable_property; + /** + * @histogram_data_proeprty: Optional CRTC property for getting the + * histogram blob data. + */ + struct drm_property *histogram_data_property; + /** * @state: * @@ -1323,5 +1365,6 @@ static inline struct drm_crtc *drm_crtc_find(struct drm_device *dev, int drm_crtc_create_scaling_filter_property(struct drm_crtc *crtc, unsigned int supported_filters); +int drm_crtc_create_histogram_property(struct drm_crtc *crtc); #endif /* __DRM_CRTC_H__ */ From patchwork Wed Dec 18 14:52:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13913840 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9E63E77188 for ; Wed, 18 Dec 2024 15:02:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E60D10EBED; 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X-CSE-ConnectionGUID: yk2+K/aqQX2ZZVmYP0naDA== X-CSE-MsgGUID: vuuYZ/DgQgiSpg03SO2ZHQ== X-IronPort-AV: E=McAfee;i="6700,10204,11290"; a="45502534" X-IronPort-AV: E=Sophos;i="6.12,244,1728975600"; d="scan'208";a="45502534" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Dec 2024 07:02:24 -0800 X-CSE-ConnectionGUID: 4lqRXPT4Qxex6Mqfza3MSw== X-CSE-MsgGUID: nkhNPfm/S0SeWmSHNDEzWw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="102025518" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa003.fm.intel.com with ESMTP; 18 Dec 2024 07:02:21 -0800 From: Arun R Murthy Date: Wed, 18 Dec 2024 20:22:07 +0530 Subject: [PATCH v7 4/4] drm/crtc: Expose API to create drm crtc property for IET LUT MIME-Version: 1.0 Message-Id: <20241218-dpst-v7-4-81bfe7d08c2d@intel.com> References: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> In-Reply-To: <20241218-dpst-v7-0-81bfe7d08c2d@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Dmitry Baryshkov Cc: 20240705091333.328322-1-mohammed.thasleem@intel.com, Arun R Murthy X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add drm-crtc property for IET 1DLUT and for the properties added add corresponding get/set_property. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/drm_atomic_state_helper.c | 9 ++++++++ drivers/gpu/drm/drm_atomic_uapi.c | 13 +++++++++++ drivers/gpu/drm/drm_crtc.c | 38 +++++++++++++++++++++++++++++++ include/drm/drm_crtc.h | 34 +++++++++++++++++++++++++++ 4 files changed, 94 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index dfe6293f7a42d034da3de593094019ca15014a02..ceab90cec57cc580afcf334e275982827e9b0e0d 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -149,6 +149,10 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, drm_property_blob_get(state->histogram_enable); if (state->histogram_data) drm_property_blob_get(state->histogram_data); + if (state->iet_lut_caps) + drm_property_blob_get(state->iet_lut_caps); + if (state->iet_lut) + drm_property_blob_get(state->iet_lut); state->mode_changed = false; state->active_changed = false; state->planes_changed = false; @@ -164,6 +168,7 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, state->self_refresh_active = false; state->histogram_updated = false; + state->iet_lut_updated = false; } EXPORT_SYMBOL(__drm_atomic_helper_crtc_duplicate_state); @@ -229,6 +234,10 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) drm_property_blob_put(state->histogram_enable); if (state->histogram_data) drm_property_blob_put(state->histogram_data); + if (state->iet_lut_caps) + drm_property_blob_put(state->iet_lut_caps); + if (state->iet_lut) + drm_property_blob_put(state->iet_lut); } EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 459d30898196c94392a7f916b1fa9ca3a334eea8..f31d24d80cc082b38c611b12f36f281fa7404869 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -424,6 +424,15 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, &replaced); state->histogram_updated |= replaced; return ret; + } else if (property == crtc->iet_lut_property) { + ret = drm_property_replace_blob_from_id(dev, + &state->iet_lut, + val, + -1, + sizeof(struct drm_iet_1dlut_sample), + &replaced); + state->iet_lut_updated |= replaced; + return ret; } else if (property == crtc->scaling_filter_property) { state->scaling_filter = val; } else if (crtc->funcs->atomic_set_property) { @@ -467,6 +476,10 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->histogram_enable) ? state->histogram_enable->base.id : 0; else if (property == crtc->histogram_data_property) *val = (state->histogram_data) ? state->histogram_data->base.id : 0; + else if (property == crtc->iet_lut_caps_property) + *val = (state->iet_lut_caps) ? state->iet_lut_caps->base.id : 0; + else if (property == crtc->iet_lut_property) + *val = (state->iet_lut) ? state->iet_lut->base.id : 0; else if (property == crtc->scaling_filter_property) *val = state->scaling_filter; else if (crtc->funcs->atomic_get_property) diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 1c91cce3dcd31ede1e9d771af00c7c4414000a2b..d8487603a61df7338713b42e92e455c7946cf03b 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c @@ -998,3 +998,41 @@ int drm_crtc_create_histogram_property(struct drm_crtc *crtc) return 0; } EXPORT_SYMBOL(drm_crtc_create_histogram_property); + +/** + * drm_crtc_create_iet_lut_property + * + * @crtc: pointer to the struct drm_crtc. + * + * This 1DLUT is used by the hardware to enahance the image. Hardware + * interpolates this LUT value to generate the enhanced output image. + * + * The blob property IET_LUT_CAPS points to the struct drm_iet_lut_caps + * The blob property IET_LUT points to the struct drm_iet_1dlut_sample + * Description of the structure is in include/uapi/drm/drm_mode.h + * + * RETURNS: + * Zero for success or -errno + */ +int drm_crtc_create_iet_lut_property(struct drm_crtc *crtc) +{ + struct drm_property *prop; + + prop = drm_property_create(crtc->dev, DRM_MODE_PROP_ATOMIC | + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "IET_LUT_CAPS", 0); + if (!prop) + return -ENOMEM; + drm_object_attach_property(&crtc->base, prop, 0); + crtc->iet_lut_caps_property = prop; + + prop = drm_property_create(crtc->dev, DRM_MODE_PROP_ATOMIC | + DRM_MODE_PROP_BLOB, "IET_LUT", 0); + if (!prop) + return -ENOMEM; + drm_object_attach_property(&crtc->base, prop, 0); + crtc->iet_lut_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_crtc_create_iet_lut_property); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 934cac2adb9889d2477e9601598796927bc016ea..73c867feee95d41c279f0831b3571827ad93d471 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -300,6 +300,29 @@ struct drm_crtc_state { struct drm_property_blob *histogram_data; bool histogram_updated; + /** + * @iet_lut_caps: + * + * The blob points to the structure drm_iet_lut_caps. + * For more info on the elements of the struct drm_iet_lut_caps + * see include/uapi/drm/drm_mode.h + */ + struct drm_property_blob *iet_lut_caps; + /** + * @iet_lut: + * + * The blob points to the struct drm_lut_sample + * For more information on the elements of struct drm_lut_sample + * see include/uapi/drm/drm_mode.h + */ + struct drm_property_blob *iet_lut; + /** + * @iet_lut_updates: + * + * Convey that the image enhanced data has been updated by the user + */ + bool iet_lut_updated; + /** * @target_vblank: * @@ -1130,6 +1153,17 @@ struct drm_crtc { */ struct drm_property *histogram_data_property; + /** + * @iet_lut_caps_property: Optional CRTC property for getting the + * iet LUT hardware capability. + */ + struct drm_property *iet_lut_caps_property; + /** + * @iet_lut_proeprty: Optional CRTC property for writing the + * image enhanced LUT + */ + struct drm_property *iet_lut_property; + /** * @state: *