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Wed, 18 Dec 2024 07:52:08 -0800 (PST) Received: from localhost.localdomain ([78.196.4.158]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-388c8060fb3sm14225403f8f.94.2024.12.18.07.52.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Dec 2024 07:52:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 1/4] target/ppc: Include missing headers in mmu-hash[32,64].h Date: Wed, 18 Dec 2024 16:51:59 +0100 Message-ID: <20241218155202.71931-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241218155202.71931-1-philmd@linaro.org> References: <20241218155202.71931-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org CPUState* is dereferenced, so we need the structure definition from "cpu.h". PowerPCCPU is declared in "cpu-qom.h". Include them in order to avoid when refactoring: In file included from ../../target/ppc/cpu_init.c:27: target/ppc/mmu-hash32.h:6:23: error: unknown type name 'PowerPCCPU' 6 | bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, | ^ target/ppc/mmu-hash32.h:66:15: error: incomplete definition of type 'struct ArchCPU' 66 | return cpu->env.spr[SPR_SDR1] & SDR_32_HTABORG; | ~~~^ target/ppc/mmu-hash64.h:173:36: error: unknown type name ‘PowerPCCPU’; did you mean ‘PowerPCCPUAlias’? 173 | static inline void ppc_hash64_init(PowerPCCPU *cpu) | ^~~~~~~~~~ | PowerPCCPUAlias Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/mmu-hash32.h | 3 +++ target/ppc/mmu-hash64.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/target/ppc/mmu-hash32.h b/target/ppc/mmu-hash32.h index 2838de031c7..abbff206d4e 100644 --- a/target/ppc/mmu-hash32.h +++ b/target/ppc/mmu-hash32.h @@ -3,6 +3,9 @@ #ifndef CONFIG_USER_ONLY +#include "target/ppc/cpu-qom.h" +#include "cpu.h" + bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, hwaddr *raddrp, int *psizep, int *protp, int mmu_idx, bool guest_visible); diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index ae8d4b37aed..b32e17c2c58 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -3,6 +3,8 @@ #ifndef CONFIG_USER_ONLY +#include "target/ppc/cpu-qom.h" + #ifdef TARGET_PPC64 void dump_slb(PowerPCCPU *cpu); int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, From patchwork Wed Dec 18 15:52:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13913891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71BB4E77187 for ; Wed, 18 Dec 2024 15:54:03 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tNwLc-0007WM-HL; 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Wed, 18 Dec 2024 07:52:13 -0800 (PST) Received: from localhost.localdomain ([78.196.4.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656afd57esm24251025e9.5.2024.12.18.07.52.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Dec 2024 07:52:13 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 2/4] tcg/tci: Include missing 'disas/dis-asm.h' header Date: Wed, 18 Dec 2024 16:52:00 +0100 Message-ID: <20241218155202.71931-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241218155202.71931-1-philmd@linaro.org> References: <20241218155202.71931-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org "disas/dis-asm.h" defines bfd_vma and disassemble_info, include it in order to avoid (when refactoring other headers): tcg/tci.c:1066:20: error: unknown type name 'bfd_vma' int print_insn_tci(bfd_vma addr, disassemble_info *info) ^ tcg/tci.c:1066:34: error: unknown type name 'disassemble_info' int print_insn_tci(bfd_vma addr, disassemble_info *info) ^ Signed-off-by: Philippe Mathieu-Daudé --- tcg/tci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tcg/tci.c b/tcg/tci.c index 3afb2235285..3eb95e20b65 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -21,6 +21,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" #include "tcg/tcg-ldst.h" +#include "disas/dis-asm.h" #include From patchwork Wed Dec 18 15:52:01 2024 Content-Type: text/plain; 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Wed, 18 Dec 2024 07:52:18 -0800 (PST) Received: from localhost.localdomain ([78.196.4.158]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-388c80601desm14330975f8f.90.2024.12.18.07.52.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Dec 2024 07:52:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 3/4] exec/ram_addr: Include missing 'exec/hwaddr.h' and 'exec/cpu-common.h' Date: Wed, 18 Dec 2024 16:52:01 +0100 Message-ID: <20241218155202.71931-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241218155202.71931-1-philmd@linaro.org> References: <20241218155202.71931-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'hwaddr' is defined in "exec/hwaddr.h", 'ram_addr_t' in "exec/cpu-common.h". Include these headers in order to avoid when refactoring unrelated headers: In file included from ../../hw/s390x/s390-virtio-ccw.c:17: include/sysemu/physmem-target.h:37:24: error: unknown type name 'hwaddr' 37 | (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client); | ^ In file included from ../../hw/s390x/s390-virtio-ccw.c:16: include/exec/ram_addr.h:52:36: error: unknown type name 'ram_addr_t' 52 | RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, | ^ Signed-off-by: Philippe Mathieu-Daudé --- include/exec/ram_addr.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 53785cdb87c..ff157c1f42a 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -28,6 +28,9 @@ #include "exec/exec-all.h" #include "qemu/rcu.h" +#include "exec/hwaddr.h" +#include "exec/cpu-common.h" + extern uint64_t total_dirty_pages; /** From patchwork Wed Dec 18 15:52:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13913889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7735BE77187 for ; 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Wed, 18 Dec 2024 07:52:22 -0800 (PST) Received: from localhost.localdomain ([78.196.4.158]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-388c8060566sm14261420f8f.102.2024.12.18.07.52.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Dec 2024 07:52:22 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 4/4] exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined Date: Wed, 18 Dec 2024 16:52:02 +0100 Message-ID: <20241218155202.71931-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241218155202.71931-1-philmd@linaro.org> References: <20241218155202.71931-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Include "cpu.h" earlier to get the MMU_USER_IDX definition soon enough and avoid when refactoring unrelated headers: In file included from include/exec/translator.h:271, from ../../accel/tcg/translator.c:13: include/exec/cpu-all.h: In function ‘cpu_mmu_index’: include/exec/cpu-all.h:274:12: error: ‘MMU_USER_IDX’ undeclared (first use in this function) 274 | return MMU_USER_IDX; | ^~~~~~~~~~~~ include/exec/cpu-all.h:274:12: note: each undeclared identifier is reported only once for each function it appears in ninja: build stopped: subcommand failed. We need to forward-declare cpu_mmu_index() to avoid on user emulation: In file included from include/exec/cpu-all.h:263, from include/exec/translator.h:271, from ../../accel/tcg/translator.c:13: ../../target/sparc/cpu.h: In function ‘cpu_get_tb_cpu_state’: ../../target/sparc/cpu.h:757:13: error: implicit declaration of function ‘cpu_mmu_index’ [-Werror=implicit-function-declaration] 757 | flags = cpu_mmu_index(env_cpu(env), false); | ^~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé --- include/exec/cpu-all.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index f7eea33b101..09f537d06fa 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -180,8 +180,12 @@ CPUArchState *cpu_copy(CPUArchState *env); | CPU_INTERRUPT_TGT_EXT_3 \ | CPU_INTERRUPT_TGT_EXT_4) +#include "cpu.h" + #ifdef CONFIG_USER_ONLY +static inline int cpu_mmu_index(CPUState *cs, bool ifetch); + /* * Allow some level of source compatibility with softmmu. We do not * support any of the more exotic features, so only invalid pages may @@ -271,7 +275,6 @@ static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) #endif /* !CONFIG_USER_ONLY */ /* Validate correct placement of CPUArchState. */ -#include "cpu.h" QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));